Zero-copy fast transmitting and receiving device, data transmitting method and data receiving method

Abstract

The invention provides a zero-copy rapid transceiving device, a data sending method and a data receiving method, and relates to the technical field of network communication, the zero-copy rapid transceiving device comprises a network card in which a direct memory access controller and an associated annular cache region are configured; the kernel protocol stack is configured with a data cache structure body, and a data pointer of the data cache structure body and a packet descriptor of the annular cache region are configured to point to the same memory region; when the network card receives external data, the direct memory access controller copies the data to the memory area according to the direction of the packet descriptor so that the data can be processed by the kernel protocol stack, and when the kernel protocol stack sends the data, the data is copied to the memory area according to the direction of the data pointer so that the data can be sent by the direct memory access controller. The method has the beneficial effects that data copying is not needed in a driving layer message data processing process, so that storage resources are effectively saved, the load of a CPU (Central Processing Unit) is reduced, and the network bandwidth and the system performance are effectively improved.

Description

Technical Field

[0001] The present invention relates to the field of network communication technology, and in particular to a zero-copy fast transceiver device, a data sending method and a data receiving method. Background Art

[0002] Currently, Ethernet port data transmission and reception are usually implemented with the help of DMA (Direct Memory Access). Its function is to realize data exchange between memory and Ethernet peripherals (NIC) without the participation of CPU. This will effectively release CPU resources and increase network port bandwidth.

[0003] DMA (Direct Memory Access) is a hardware-implemented peripheral I / O technology. After the Ethernet peripheral (NIC) receives a data packet, the driver allocates a buffer in the memory to receive the data packet; the address and size of the above buffer (i.e., the receive descriptor) are added to the receive ring buffer. The driver notifies the NIC that there is a new descriptor; the NIC takes the descriptor from the receive ring buffer to learn the address and size of the buffer; the NIC receives a new data packet; the NIC writes the new data packet directly to the allocated buffer through DMA.

[0004] When an application sends a network packet, it puts the data packet into a buffer, and the network protocol stack takes the data packet out of the buffer; the driver reads the data packet through DMA and sends it out through the physical network card.

[0005] However, due to the differences in data cache descriptors (data structures) between DMA hardware and software protocol stack, the software needs to perform data structure conversion and message data copying during the reception and transmission of the above data packets. Figure 1 As shown in the figure, the copy of the message data has a great impact on the performance. At the same time, it will also cause a waste of memory resources (at least two copies of valid data are saved during the sending and receiving phase).

[0006] In addition, in the network equipment scenario, the Ethernet frames received by the NIC often have a vendor-specific TAG field compared to the standard Ethernet frames. The processing of the vendor TAG field is currently also completed by software. When the TAG field is in the middle of the Ethernet frame, in addition to the TAG parsing and removal action, there is also a data move alignment action. Therefore, TAG field processing will also cause a large performance overhead.

[0007] In summary, for network port data transmission, although the introduction of DMA can effectively release CPU resources and improve the network port bandwidth, due to a large number of data copying and data parsing operations at the software level, some resources will be wasted and the CPU will be preempted, ultimately affecting the network port bandwidth and system performance. Summary of the invention

[0008] In view of the problems existing in the prior art, the present invention provides a zero-copy fast sending and receiving device, comprising:

[0009] A network card, wherein the network card is configured with a direct memory access controller and an associated ring buffer;

[0010] A kernel protocol stack, wherein the kernel protocol stack is configured with a data cache structure, wherein a data pointer of the data cache structure and a packet descriptor of the ring buffer area are configured to point to the same memory area;

[0011] When the network card receives external data, the direct memory access controller copies the data to the memory area according to the direction of the packet descriptor for processing by the kernel protocol stack; and when the kernel protocol stack sends data, the data is copied to the memory area according to the direction of the data pointer for sending by the direct memory access controller.

[0012] Preferably, the circular buffer associated with the direct memory access controller includes a data receiving circular buffer;

[0013] The direct memory access controller includes a first configuration module, which is used to initiate a memory application to the kernel protocol stack when the network card receives external data, obtain the physical address of the memory area corresponding to the data pointer in the applied data cache structure, and configure the packet descriptor of the data receiving ring buffer area to the physical address, so that the data pointer of the data cache structure and the packet descriptor of the data receiving ring buffer area are configured to point to the same memory area.

[0014] Preferably, the circular buffer area associated with the direct memory access controller includes a data transmission circular buffer area;

[0015] The direct memory access controller includes a second configuration module, which is used to obtain the physical address of the memory area corresponding to the data pointer in the data cache structure when the kernel protocol stack sends data, and configure the packet descriptor of the data sending ring buffer area to the physical address, so that the data pointer of the data cache structure and the packet descriptor of the data sending ring buffer area are configured to point to the same memory area.

[0016] Preferably, the packet descriptor of the ring buffer area includes a first buffer area and a second buffer area, the first buffer area is configured as a data pointer of the data cache structure pointing to the same memory area, and the second buffer area is configured to perform manufacturer tag parsing when the network card sends and receives data.

[0017] Preferably, the direct memory access controller includes a parsing control module, and the parsing control module includes:

[0018] A configuration unit, configured to configure an offset position and a data length of the manufacturer tag according to a chip type of a network chip attached to the network card;

[0019] a receiving and parsing unit connected to the configuration unit, configured to intercept the manufacturer tag information of the data length according to the offset position and save it to the second buffer area when receiving the external data, and to splice the message data before and after the segmentation and store it in the first buffer area for processing by the kernel protocol stack;

[0020] A sending parsing unit is connected to the configuration unit and is used to read the manufacturer tag information and the spliced ​​message data from the first buffer area and the second buffer area respectively when sending data outward, and insert the manufacturer tag information into the spliced ​​message data according to the offset position and the data length, so that the direct memory access controller can send it.

[0021] Preferably, the direct memory access controller also includes an enable control module, which is connected to the parsing control module, and is used to obtain the on / off status of the label function of the network chip hung under the network card, and control the parsing control module to be in an enabled state when the label function of the network chip is started, and to be in a disabled state when the label function of the network chip is turned off.

[0022] Preferably, the storage space of the first cache area and the storage space of the second cache area do not overlap.

[0023] Preferably, the direct memory access controller further comprises a third configuration module, which is used for allowing a user to configure a data structure supported by the second cache area.

[0024] The present invention also provides a data receiving method, which uses the above-mentioned zero-copy fast transceiver device, wherein the circular buffer area associated with the direct memory access controller in the zero-copy fast transceiver device includes a data receiving circular buffer area; the data receiving method comprises:

[0025] Step S1R, when the network card receives external data, the direct memory access controller configures the packet descriptor of the ring buffer area to point to the same memory area as the data pointer of the data buffer structure;

[0026] Step S2R: the direct memory access controller copies the data to the memory area according to the direction of the packet descriptor, so as to be processed by the kernel protocol stack.

[0027] The present invention also provides a data sending method, using the above-mentioned zero-copy fast sending and receiving device, the circular buffer area associated with the direct memory access controller includes a data sending circular buffer area; the data sending method includes:

[0028] Step S1T, when the kernel protocol stack sends data, the direct memory access controller configures the packet descriptor of the ring buffer area to point to the same memory area as the data pointer of the data buffer structure;

[0029] Step S2T: the direct memory access controller copies the data to the memory area according to the direction of the data pointer, so that the direct memory access controller can send the data.

[0030] The above technical solution has the following advantages or beneficial effects:

[0031] 1) By pointing the data cache of the hardware direct memory access controller and the software kernel protocol stack to the same memory area, the driver layer only saves one copy of the message data during the sending and receiving process, so that data copying is not required during the driver layer message data processing process, which effectively saves storage resources and reduces CPU load, thereby effectively improving network bandwidth and system performance;

[0032] 2) The vendor tag parsing is handed over to the direct memory access controller of the hardware part, which effectively reduces the performance overhead and improves the overall system performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 It is a schematic diagram of the data sending, receiving and copying process in the prior art;

[0034] Figure 2 This is a structural schematic diagram of a zero-copy fast transceiver in a preferred embodiment of the present invention;

[0035] Figure 3 A schematic diagram of the structure of data cache in a preferred embodiment of the present invention;

[0036] Figure 4 The structure diagram of the packet descriptor PktDesc of the ring buffer RingBuffer in a preferred embodiment of the present invention;

[0037] Figure 5 This is a schematic diagram of a data message carrying a TAG in a preferred embodiment of the present invention;

[0038] Figure 6 A schematic diagram of TAG processing in a preferred embodiment of the present invention;

[0039] Figure 7A flowchart of a data receiving method in a preferred embodiment of the present invention;

[0040] Figure 8 The figure is a flow chart of a data sending method in a preferred embodiment of the present invention. DETAILED DESCRIPTION

[0041] The present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments. The present invention is not limited to this embodiment, and other embodiments may also fall within the scope of the present invention as long as they conform to the gist of the present invention.

[0042] In a preferred embodiment of the present invention, based on the above problems existing in the prior art, a zero-copy fast transceiver device is provided. Figure 2 As shown, including:

[0043] Network card 1, network card 1 is configured with a direct memory access controller DMA and an associated ring buffer RingBuffer;

[0044] A kernel protocol stack 2, wherein a data cache structure 21 is configured in the kernel protocol stack 2, and a data pointer of the data cache structure 21 and a packet descriptor Pkt Desc (PacketDescriptor) of the ring buffer RingBuffer are configured to point to the same memory area;

[0045] When network card 1 receives external data, the direct memory access controller DMA copies the data to the memory area according to the direction of the packet descriptor PktDesc for processing by the kernel protocol stack 2. When kernel protocol stack 2 sends data, the data is copied to the memory area according to the direction of the data pointer for sending by the direct memory access controller DMA.

[0046] Specifically, Figure 1 As shown, in the prior art, taking data reception as an example, a direct memory access controller DMA is required to copy the network card received data to data1 once, and then the data in data1 is converted into a data structure by software and copied to frame, and then the kernel protocol stack 2 can process it, and the same goes for sending data. It can be seen that in the receiving and sending stages, at least two copies of the data are saved, one in data1 and the other in frame, resulting in a waste of memory resources, and the copying of message data has a greater impact on performance.

[0047] Based on this, in this embodiment, Figure 3As shown, the data pointer data of the data cache structure 21 and the pkt in the packet descriptor PktDesc (Packet Descriptor) of the ring buffer RingBuffer are configured to point to the same memory area data2, that is, the data cache of the DMA hardware and the software protocol stack in the network port driver points to the same memory area data2. In this way, both the software and hardware process the same storage space, so there is no need to copy data during the driver-level message data processing. This will effectively save storage resources (during the transmission and reception process, the driver level only saves one copy of the message data), reduce the CPU load, and thus improve network bandwidth and system performance.

[0048] In a preferred embodiment of the present invention, the ring buffer RingBuffer associated with the direct memory access controller DMA includes a data receiving ring buffer RRB;

[0049] The direct memory access controller DMA includes a first configuration module 31, which is used to initiate a memory application to the kernel protocol stack 2 when the network card 1 receives external data, obtain the physical address of the memory area corresponding to the data pointer in the applied data cache structure, and configure the packet descriptor PktDesc of the data receiving ring buffer RRB as the physical address, so that the data pointer of the data cache structure and the packet descriptor PktDesc of the data receiving ring buffer RRB are configured to point to the same memory area.

[0050] Specifically, in this embodiment, Figure 3 As shown, taking the data cache structure 21 as sk_buff as an example, its corresponding data pointer is data, pointing to the memory space data2, and taking the data frame occupying a single sk_buff as an example for explanation, in the data receiving direction, when the direct memory access controller DMA in the network port driver is initialized, the corresponding number of sk_buff resources are applied according to the data receiving ring buffer RRB associated with the direct memory access controller DMA, and then the physical address corresponding to the data pointer data in sk_buff is obtained, and the pkt in the packet descriptor PktDesc of the data receiving ring buffer RRB is configured as the physical address corresponding to data. When receiving data, the network port data will be directly copied by the direct memory access controller DMA to the space pointed to by pkt, that is, the memory space data2 pointed to by the data pointer data in sk_buff. It can be seen that during the data receiving process, the driver layer saves a copy of the message data, and no data copy is required during the message data processing process at the driver layer, that is, zero copy is achieved, which effectively saves storage resources and reduces the CPU load, thereby improving network bandwidth and system performance.

[0051] In a preferred embodiment of the present invention, the ring buffer RingBuffer associated with the direct memory access controller DMA includes a data transmission ring buffer TRB;

[0052] The direct memory access controller DMA includes a second configuration module 32, which is used to obtain the physical address of the memory area corresponding to the data pointer in the data cache structure when the kernel protocol stack 2 sends data, and configure the packet descriptor PktDesc of the data sending ring buffer area as the physical address, so that the data pointer of the data cache structure and the packet descriptor of the data sending ring buffer area TRB are configured to point to the same memory area.

[0053] Specifically, in this embodiment, the data transmission process is similar to the data reception process, and the only difference is that the configuration of the physical address of pkt in the packet descriptor PktDesc of the data transmission ring buffer TRB will be performed on the xmit interface.

[0054] In a preferred embodiment of the present invention, Figure 4 As shown, the packet descriptor PktDesc of the ring buffer RingBuffer includes a first buffer buffer1 and a second buffer buffer2. The first buffer buffer1 is configured as a data pointer of a data cache structure pointing to the same memory area, and the second buffer buffer2 is configured to perform manufacturer tag parsing when the network card sends and receives data.

[0055] Specifically, in this embodiment, the packet descriptor Pkt Desc of the ring buffer RingBuffer is configured with double bufferAddress, and it is necessary to ensure that the storage space of the first buffer buffer1 and the second buffer buffer2 do not overlap, that is, the two buffers are independent of each other. Among them, the first buffer buffer1 still performs the same function as the original pkt, that is, the data pointer configured as the data cache structure points to the same memory area, realizing the above-mentioned zero copy, which points to the data storage space of the protocol stack data structure (such as data of sk_buffer, payload of pbuf).

[0056] In a preferred embodiment of the present invention, the direct memory access controller DMA includes a parsing control module 33, and the parsing control module 33 includes:

[0057] The configuration unit 331 is used to configure the offset position and data length of the manufacturer tag according to the chip type of the network chip connected to the network card 1;

[0058] The receiving and parsing unit 332 is connected to the configuration unit 331, and is used to intercept the manufacturer tag information of the data length according to the offset position when receiving external data and save it to the second buffer area buffer2, and splice the message data before and after the segmentation and store it in the first buffer area buffer1, so that the kernel protocol stack 2 can process it;

[0059] The sending parsing unit 333 is connected to the configuration unit 331, and is used to read the manufacturer tag information and the spliced ​​message data from the first buffer area buffer1 and the second buffer area buffer2 respectively when sending data outward, and insert the manufacturer tag information into the spliced ​​message data according to the offset position and the data length, so as to be sent by the direct memory access controller DMA.

[0060] Specifically, in this embodiment, the network chip is an Ethernet chip. Different chip types correspond to different positions of vendor tags in the Ethernet frame. Based on this, it is necessary to configure different offset positions and data lengths of vendor tags based on the chip type, such as Figure 5 As shown, in the Ethernet frame structure of the network chip attached to the network card 1, a 6-byte vendor tag information TAG is added after the standard Ethernet frame SA. Since DA and SA are 6 bytes respectively, the corresponding offset position is 12 and the data length is 6.

[0061] When receiving data, the data interception start position is determined according to the offset position, and the interception length is determined according to the data length. The manufacturer tag information can be intercepted from the original message. Since the manufacturer tag information is located in the middle of the frame, after the interception is completed, the previous and next message data need to be spliced ​​and merged, such as Figure 6 When data is sent, the data insertion start position needs to be determined according to the offset position, and the insertion length needs to be determined according to the data length, so that the manufacturer tag information can be inserted into the message and sent out.

[0062] In a preferred embodiment of the present invention, the direct memory access controller DMA also includes an enable control module 34, which is connected to the parsing control module 33, and is used to obtain the on / off status of the label function of the network chip hung under the network card 1, and control the parsing control module 33 to be in an enabled state when the label function of the network chip is started, and to be in a disabled state when the label function of the network chip is turned off.

[0063] Specifically, in this embodiment, the enabling control module 34 serves as an enabling control switch of the parsing control module 33 to ensure that the enabling state of the parsing control module 22 is consistent with the on / off state of the tag function of the network chip, thereby saving energy consumption.

[0064] In a preferred embodiment of the present invention, the direct memory access controller DMA further includes a third configuration module 35 for allowing a user to configure a data structure supported by the second buffer area.

[0065] Specifically, in this embodiment, through the third configuration module 35, the user can customize the data structure supported by the second buffer area (such as LWIP_PBUF_CUSTOM_DATA of pbuf) according to needs or application scenarios.

[0066] The present invention also provides a data receiving method, using the above-mentioned zero-copy fast transceiver device, the ring buffer area associated with the direct memory access controller in the zero-copy fast transceiver device includes a data receiving ring buffer area; Figure 7 As shown, the data receiving method includes:

[0067] Step S1R, when the network card receives external data, the direct memory access controller configures the packet descriptor of the ring buffer area to point to the same memory area as the data pointer of the data buffer structure;

[0068] Step S2R: the direct memory access controller copies the data to the memory area according to the direction of the packet descriptor for processing by the kernel protocol stack.

[0069] The present invention also provides a data sending method, using the above-mentioned zero-copy fast transceiver device, the ring buffer area associated with the direct memory access controller includes a data sending ring buffer area; Figure 8 As shown, the data sending method includes:

[0070] Step S1T, when the kernel protocol stack sends data, the direct memory access controller configures the packet descriptor of the ring buffer area to point to the same memory area as the data pointer of the data buffer structure;

[0071] Step S2T: the direct memory access controller copies the data to the memory area according to the direction of the data pointer, so that the direct memory access controller can send the data.

[0072] In summary, this technical solution realizes zero-copy fast sending and receiving of messages at the network port driver level. It has been verified through actual measurements that the network port bandwidth is increased by about 1 times. At the same time, under the same message concurrent processing conditions, the RAM resources are only 50% of the original device.

[0073] The above description is only a preferred embodiment of the present invention, and does not limit the implementation mode and protection scope of the present invention. For those skilled in the art, it should be aware that all solutions obtained by equivalent substitutions and obvious changes made using the contents of this specification and illustrations should be included in the protection scope of the present invention.

Claims

1. A zero-copy fast transceiver device, characterized in that: include: A network card, wherein the network card is configured with a direct memory access controller and an associated ring buffer; A kernel protocol stack, wherein the kernel protocol stack is configured with a data cache structure, wherein a data pointer of the data cache structure and a packet descriptor of the ring buffer area are configured to point to the same memory area; When the network card receives external data, the direct memory access controller copies the data to the memory area according to the direction of the packet descriptor for processing by the kernel protocol stack; and when the kernel protocol stack sends data, the data is copied to the memory area according to the direction of the data pointer for sending by the direct memory access controller.

2. The zero-copy fast transceiver device according to claim 1, characterized in that: The circular buffer associated with the direct memory access controller includes a data receiving circular buffer; The direct memory access controller includes a first configuration module, which is used to initiate a memory application to the kernel protocol stack when the network card receives external data, obtain the physical address of the memory area corresponding to the data pointer in the applied data cache structure, and configure the packet descriptor of the data receiving ring buffer area to the physical address, so that the data pointer of the data cache structure and the packet descriptor of the data receiving ring buffer area are configured to point to the same memory area.

3. The zero-copy fast transceiver device according to claim 1, characterized in that: The circular buffer area associated with the direct memory access controller includes a data transmission circular buffer area; The direct memory access controller includes a second configuration module, which is used to obtain the physical address of the memory area corresponding to the data pointer in the data cache structure when the kernel protocol stack sends data, and configure the packet descriptor of the data sending ring buffer area to the physical address, so that the data pointer of the data cache structure and the packet descriptor of the data sending ring buffer area are configured to point to the same memory area.

4. The zero-copy fast transceiver device according to claim 1, characterized in that: The packet descriptor of the circular buffer area includes a first buffer area and a second buffer area, the first buffer area is configured as a data pointer of the data buffer structure pointing to the same memory area, and the second buffer area is configured to perform manufacturer tag parsing when the network card sends and receives data.

5. The zero-copy fast transceiver device according to claim 4, characterized in that: The direct memory access controller includes a parsing control module, and the parsing control module includes: A configuration unit, configured to configure an offset position and a data length of the manufacturer tag according to a chip type of a network chip attached to the network card; a receiving and parsing unit connected to the configuration unit, configured to intercept the manufacturer tag information of the data length according to the offset position and save it to the second buffer area when receiving the external data, and to splice the message data before and after the segmentation and store it in the first buffer area for processing by the kernel protocol stack; A sending parsing unit is connected to the configuration unit and is used to read the manufacturer tag information and the spliced ​​message data from the first buffer area and the second buffer area respectively when sending data outward, and insert the manufacturer tag information into the spliced ​​message data according to the offset position and the data length, so that the direct memory access controller can send it.

6. The zero-copy fast transceiver device according to claim 5, characterized in that: The direct memory access controller also includes an enable control module, which is connected to the parsing control module and is used to obtain the on / off status of the label function of the network chip hung under the network card, and control the parsing control module to be in an enabled state when the label function of the network chip is started, and to be in a disabled state when the label function of the network chip is turned off.

7. The zero-copy fast transceiver device according to claim 4, characterized in that: The storage space of the first cache area and the second cache area do not overlap.

8. The zero-copy fast transceiver device according to claim 4, characterized in that: The direct memory access controller also includes a third configuration module, which is used for allowing a user to configure a data structure supported by the second cache area.

9. A data receiving method, characterized in that: The zero-copy fast transceiver device as claimed in any one of claims 1 to 8 is applied, wherein the circular buffer area associated with the direct memory access controller in the zero-copy fast transceiver device includes a data receiving circular buffer area; Then the data receiving method comprises: Step S1R, when the network card receives external data, the direct memory access controller configures the packet descriptor of the ring buffer area to point to the same memory area as the data pointer of the data buffer structure; Step S2R: the direct memory access controller copies the data to the memory area according to the direction of the packet descriptor, so as to be processed by the kernel protocol stack.

10. A data transmission method, characterized in that: The zero-copy fast transceiver device according to any one of claims 1 to 8 is applied, wherein the circular buffer area associated with the direct memory access controller includes a data transmission circular buffer area; and the data transmission method includes: Step S1T, when the kernel protocol stack sends data, the direct memory access controller configures the packet descriptor of the ring buffer area to point to the same memory area as the data pointer of the data buffer structure; Step S2T: the direct memory access controller copies the data to the memory area according to the direction of the data pointer, so that the direct memory access controller can send the data.

Images