Equipment PUF value generation method and device, storage medium and electronic device

Abstract

The embodiment of the invention provides an equipment PUF value generation method and device, a storage medium, an electronic device and a program product, and the method comprises the steps: obtaining a predetermined restart frequency; the target device is controlled to be started up in the starting environments with the number of restarting times, a target power-on initial value of a built-in SRAM after the target device is started up each time is obtained, and the starting environments comprise the starting environments with the number of restarting times; and determining an auxiliary code for correcting the to-be-corrected characteristic value of the SRAM of the target equipment based on a value on a bit of which the value change rate is smaller than a preset threshold value in the plurality of target power-on initial values, so that the target equipment determines a physical unclonable function (PUF) value of the target equipment based on the auxiliary code.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of communications, and in particular, to a method, device, storage medium, electronic device, and program product for generating a PUF value of a device. Background Art

[0002] Physical Unclonable Function (PUF) is a technology that uses semiconductor physical information to generate a response sequence. Since the stability of semiconductor physical information is easily affected by environmental factors, an error correction algorithm is generally required as a safeguard for the stability of the PUF value. The PUF value generation method in related technologies cannot be widely used in lightweight devices because the error correction algorithm used has high energy consumption. Summary of the invention

[0003] The embodiments of the present invention provide a method, device, storage medium, electronic device and program product for generating a PUF value of a device, so as to at least solve the problem that the PUF value generation method in the related art cannot be widely used in lightweight devices due to the high energy consumption of the error correction algorithm adopted.

[0004] According to an embodiment of the present invention, a method for generating a PUF value of a device is provided, comprising: obtaining a predetermined number of restart times, wherein the number of restart times is predetermined in the following manner: controlling a plurality of test devices to start up in a plurality of startup environments respectively, and obtaining a test power-on initial value of a static random access memory SRAM built into each of the test devices after the power-on, wherein different test devices are located in different startup environments, and the environmental parameters included in different startup environments are not completely the same, and the types of the plurality of test devices are all target types; determining a first number of bits having equal values ​​in the plurality of the test power-on initial values, and a second number of bits having equal values ​​in a ratio greater than a predetermined ratio and less than 1, wherein the predetermined ratio is less than 1; determining a first length of a characteristic value to be corrected of the SRAM of the target device based on the first number and the time consumption of a plurality of error correction algorithms, and a target error correction algorithm, wherein the first length is less than the first number, and the type of the target device is the target type; determining the number of restarts of the target device based on the second number, the first number, the first length, and a first number of error correction bits, wherein the first number of error correction bits is the number of error correction bits of the target error correction algorithm; controlling the target device to start up in the restart-number startup environments respectively, and obtaining the target power-on initial value of the built-in SRAM of the target device after each startup, wherein the multiple startup environments include the restart-number startup environments; determining an auxiliary code for correcting the to-be-corrected characteristic value of the SRAM of the target device based on the values ​​of the bits whose value change rate is less than a predetermined threshold in the multiple target power-on initial values, so that the target device determines the physical unclonable function PUF value of the target device based on the auxiliary code.

[0005] In an exemplary embodiment, determining a first length of a characteristic value to be corrected of an SRAM of a target device based on the first number and the time consumption of multiple error correction algorithms, and a target error correction algorithm includes: determining a device performance of the target device; when it is determined that the device performance is greater than or equal to a preset performance value, determining the first length and the target error correction algorithm based on the following conditions: the time taken by the target error correction algorithm to correct the characteristic value of the first length is less than the preset time, and the target error correction algorithm is an error correction algorithm with the largest number of error correction bits among the error correction algorithms whose time taken to correct the characteristic value of the first length is less than the preset time; when it is determined that the device performance is less than the preset performance value, determining the first length and the target error correction algorithm based on the following conditions: the time taken by the target error correction algorithm to correct the characteristic value of the first length is less than the preset time, the operating resources required for the target device to run the target error correction algorithm are less than the preset resources, and the target error correction algorithm is an error correction algorithm with the largest number of error correction bits among the error correction algorithms whose time taken to correct the characteristic value of the first length is less than the preset time and whose operating resources required to run the target error correction algorithm are less than the preset resources.

[0006] In an exemplary embodiment, determining the restart number of the target device based on the second number, the first number, the first length, and the first error correction bit number includes: determining the restart number M by the following formula: M=Z / (Y+Z)×a×W / X, wherein Z is the second number, Y is the first number, W is the first length, X is the first error correction bit number, a is a constant, and the value of a is greater than 0 and less than 1.

[0007] In an exemplary embodiment, determining an auxiliary code for correcting the to-be-corrected characteristic value of the SRAM of the target device based on the values ​​of the bits whose value change rate is less than a predetermined threshold in the multiple target power-on initial values ​​includes: bitwise accumulation of the multiple target power-on initial values ​​to obtain a first array; selecting ┌W / 2┐ first values ​​with the largest values ​​and └W / 2┘ second values ​​with the smallest values ​​from the first array, and arranging the selected W values ​​in sequence according to their sequential positions in the first array to obtain a second array, wherein W is the first length; assigning all the first values ​​in the second array to the first value, and assigning all the second values ​​in the second array to the second value, to obtain the target characteristic value of the SRAM of the target device; determining the auxiliary code for correcting the to-be-corrected characteristic value of the SRAM of the target device based on the target characteristic value to restore the to-be-corrected characteristic value to the target characteristic value.

[0008] In an exemplary embodiment, assigning all of the first values ​​in the second array to the first value, and assigning all of the second values ​​in the second array to the second value includes at least one of the following: assigning all of the first values ​​in the second array to 1, and assigning all of the second values ​​in the second array to 0; assigning all of the first values ​​in the second array to 0, and assigning all of the second values ​​in the second array to 1.

[0009] In an exemplary embodiment, after determining an auxiliary code for correcting errors of characteristic values ​​of the SRAM of the target device based on values ​​at bits whose value change rate among a plurality of the target power-on initial values ​​is less than a predetermined threshold, the method further includes: sending the auxiliary code and target position information to the target device to instruct the target device to determine the PUF value of the target device based on the auxiliary code and the target position information, wherein the target position information includes position information of the first value and the second value in the first array.

[0010] In an exemplary embodiment, after sending the auxiliary code and the target position information to the target device, the method further includes: after the target device is powered on, obtaining the actual power-on initial value of the SRAM of the target device; the target device reads W third values ​​from the actual power-on initial value according to the target position information, and concatenates them to obtain the characteristic value to be corrected; the target device uses the auxiliary code to correct the characteristic value to be corrected to obtain the target characteristic value; the target device selects a predetermined number of values ​​from the target characteristic value according to a predetermined selection method to obtain a third array; the target device determines the PUF value of the target device based on the third array.

[0011] In an exemplary embodiment, the target device selects a predetermined number of values ​​from the target characteristic value according to a predetermined selection method to obtain a third array, which includes: the target device determines a target prime number from a preset prime number array; the target device loops through the target characteristic value with the target prime number as a step size to jump values ​​to obtain a predetermined number of fourth values, thereby obtaining the third array.

[0012] In an exemplary embodiment, the target device determines the PUF value of the target device based on the third array, including: the target device concatenates the predetermined number of fourth values ​​to obtain a target value; the target device uses the bitwise XOR value of the target value and the target prime number as the starting position, and loops through the target feature value again by bitwise XOR value to obtain the predetermined number of fifth values; the target device determines the PUF value of the target device based on the predetermined number of fifth values.

[0013] In an exemplary embodiment, the target device determines the PUF value of the target device based on the predetermined number of fifth values, including at least one of the following: the target device determines a value obtained by concatenating the predetermined number of fifth values ​​as the PUF value; the target device concatenates the predetermined number of fifth values ​​into a sixth value, and determines the value in the target format converted from the sixth value as the PUF value of the target device.

[0014] In an exemplary embodiment, the target device determines the target prime number from a preset prime number array, comprising at least one of the following: the target device determines the target prime number from the preset prime number array according to the type of the business currently to be performed by the target device; the target device determines the target prime number from the preset prime number array in a random selection manner.

[0015] In an exemplary embodiment, after the target device determines the PUF value of the target device based on the third array, the method further includes at least one of the following: the target device hashes the PUF value together with the SN MACCPUID to obtain identification information of the target device; the target device inputs the PUF value as an input to a KFD algorithm to generate an encryption key; the target device determines the PUF value as a public-private key generation factor.

[0016] According to another embodiment of the present invention, there is provided a device for generating a PUF value of a device, comprising: a first acquisition module, for acquiring a predetermined number of restart times, wherein the number of restart times is predetermined in the following manner: controlling a plurality of test devices to start up in a plurality of startup environments respectively, and acquiring a test power-on initial value of a static random access memory SRAM built into each of the test devices after the power-on, wherein different test devices are located in different startup environments, and the environmental parameters included in different startup environments are not completely the same, and the types of the plurality of test devices are all target types; determining a first number of bits having equal values ​​in the plurality of the test power-on initial values, and a second number of bits having equal values ​​in a ratio greater than a predetermined ratio and less than 1, wherein the predetermined ratio is less than 1; determining a first length of the to-be-corrected characteristic value of the SRAM of the target device, and a target length of the to-be-corrected characteristic value of the SRAM of the target device based on the first number and the time consumption of a plurality of error correction algorithms. A target error correction algorithm, wherein the first length is less than the first number, and the type of the target device is the target type; the restart number of the target device is determined based on the second number, the first number, the first length and the first number of error correction bits, wherein the first number of error correction bits is the number of error correction bits of the target error correction algorithm; a control module, used to control the target device to start up in the restart number of startup environments respectively, and obtain the target power-on initial value of the built-in SRAM of the target device after each startup, wherein the multiple startup environments include the restart number of startup environments; a first determination module, used to determine the auxiliary code for correcting the to-be-corrected characteristic value of the SRAM of the target device based on the values ​​of the bits whose value change rate is less than a predetermined threshold in the multiple target power-on initial values, so that the target device determines the physical unclonable function PUF value of the target device based on the auxiliary code.

[0017] According to yet another embodiment of the present invention, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any one of the above method embodiments when run.

[0018] According to yet another embodiment of the present invention, there is provided an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0019] According to yet another embodiment of the present invention, a computer program product is provided. The computer program product includes a computer program. When the computer program is executed by a processor, the steps in any one of the above method embodiments are implemented.

[0020] Through the present invention, since the length of the characteristic value to be corrected and the target error correction algorithm are determined based on the first number of bits with equal values ​​and the time consumption of multiple error correction algorithms, it is possible to solve the problem that the PUF value generation method in the related art cannot be widely used in lightweight devices due to the high energy consumption of the error correction algorithm adopted, thereby achieving the effect of reducing the computing pressure caused to the device during the PUF value generation process and expanding the application scope of the PUF value generation method. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 is a hardware structure block diagram of a mobile terminal according to a method for generating a device PUF value according to an embodiment of the present invention;

[0022] Figure 2 The process of the method for generating a device PUF value according to an embodiment of the present invention is as follows: Figure 1 ;

[0023] Figure 3 The process of the method for generating a device PUF value according to an embodiment of the present invention is as follows: Figure 2 ;

[0024] Figure 4 The process of the method for generating a device PUF value according to an embodiment of the present invention is as follows: Figure 3 ;

[0025] Figure 5 The process of the method for generating a device PUF value according to an embodiment of the present invention is as follows: Figure 4 ;

[0026] Figure 6 4 is a structural block diagram of a device for generating a PUF value of a device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0027] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings and in combination with the embodiments.

[0028] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0029] The method embodiments provided in the embodiments of the present application can be executed in a mobile terminal, a computer terminal or a similar computing device. Taking running on a mobile terminal as an example, Figure 1 is a hardware structure block diagram of a mobile terminal according to a method for generating a device PUF value according to an embodiment of the present invention. Figure 1 As shown, the mobile terminal may include one or more ( Figure 1Only one is shown in the figure) a processor 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, wherein the mobile terminal may also include a transmission device 106 and an input / output device 108 for communication functions. It can be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the mobile terminal. Figure 1 More or fewer components as shown, or with Figure 1 Different configurations are shown.

[0030] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the method for generating the device PUF value in the embodiment of the present invention. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, to implement the above method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include a memory remotely arranged relative to the processor 102, and these remote memories may be connected to the mobile terminal via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0031] The transmission device 106 is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of the mobile terminal. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0032] In this embodiment, a method for generating a PUF value of a device running on the above mobile terminal or network architecture is provided. Figure 2 The process of the method for generating a device PUF value according to an embodiment of the present invention is as follows: Figure 1 ,like Figure 2 As shown, the process includes the following steps:

[0033] Step S202, obtaining a predetermined number of restarts, wherein the number of restarts is predetermined in the following manner: controlling a plurality of test devices to start up in a plurality of startup environments respectively, and obtaining a test power-on initial value of a static random access memory SRAM built into each of the test devices after the test devices are started up, wherein different test devices are located in different startup environments, and the environmental parameters included in different startup environments are not completely the same, and the types of the plurality of test devices are all target types; determining a first number of bits having equal values ​​in the plurality of test power-on initial values, and a second number of bits having equal values ​​in a ratio greater than a predetermined ratio and less than 1, wherein the predetermined ratio is less than 1; determining a first length of a characteristic value to be corrected of the SRAM of the target device and a target error correction algorithm based on the first number and the time consumption of a plurality of error correction algorithms, wherein the first length is less than the first number, and the type of the target device is the target type; determining the number of restarts of the target device based on the second number, the first number, the first length, and a first number of error correction bits, wherein the first number of error correction bits is the number of error correction bits of the target error correction algorithm;

[0034] Step S204, controlling the target device to start up in the restart number of startup environments respectively, and obtaining a target power-on initial value of a built-in SRAM of the target device after each startup, wherein the multiple startup environments include the restart number of startup environments;

[0035] Step S206, based on the values ​​of the bits whose value change rate in the multiple target power-on initial values ​​is less than a predetermined threshold, an auxiliary code for correcting the to-be-corrected characteristic value of the SRAM of the target device is determined, so that the target device determines the physical unclonable function PUF value of the target device based on the auxiliary code.

[0036] In the above steps, the environmental parameters include but are not limited to: temperature, voltage, etc., the predetermined ratio includes but is not limited to: 90%, 95%, 97%, etc., the first length includes but is not limited to: the largest prime number less than the first number, the multiple error correction algorithms can be pre-set according to the type of the target device, the multiple error correction algorithms can be adjusted according to the type of the target device and the application scenario of the target device, and the error correction algorithms include but are not limited to: RS (Reed-Solomon) code, Hamming code, BCH (Bose-Chaudhuri-Hocquenghem) code, etc.

[0037] Through the above steps, since the length of the characteristic value to be corrected and the target error correction algorithm are determined based on the first number of bits with equal values ​​and the time consumption of multiple error correction algorithms, the problem that the PUF value generation method in the related art cannot be widely used in lightweight devices due to the high energy consumption of the error correction algorithm adopted is solved, the computing pressure on the device during the PUF value generation process is reduced, and the application scope of the PUF value generation method is expanded.

[0038] Among them, the execution subject of the above step S202 includes but is not limited to: a test program running on the terminal device, and the execution subject of the above steps S204 and S206 includes but is not limited to: a test program running on the terminal device, the target device, etc., but is not limited thereto.

[0039] In an optional embodiment, controlling the target device to start up in the startup environments for the number of restarts respectively includes: obtaining and counting the test power-on initial values ​​of the built-in SRAM of multiple test devices after starting up in each of the startup environments included in the multiple startup environments; determining the stability coefficient of the power-on initial value of the SRAM of the target type device in each of the startup environments according to the test power-on initial values ​​in each of the startup environments, and sorting the multiple startup environments from low to high according to the stability coefficient to obtain a first sequence; controlling the target device to start up in the startup environments for the first number of restarts in the first sequence respectively.

[0040] In the above steps, by selecting an environment in which the power-on initial value of the SRAM is unstable as the startup environment for generating the target power-on initial value, the target characteristic value of the target device generated based on the target power-on initial value can remain stable under multiple environments, thereby ensuring the stability of the device PUF value generated based on the target characteristic value.

[0041] In an optional embodiment, determining the auxiliary code for correcting the characteristic value to be corrected of the SRAM of the target device based on the values ​​of the bits whose value change rate among multiple target power-on initial values ​​is less than a predetermined threshold includes: determining the auxiliary code for correcting the characteristic value to be corrected of the SRAM of the target device based on the values ​​of the bits whose values ​​among multiple target power-on initial values ​​are all equal.

[0042] In an optional embodiment, determining a first length of a characteristic value to be corrected of an SRAM of a target device based on the first number and the time consumption of multiple error correction algorithms, and a target error correction algorithm includes: determining the device performance of the target device; when it is determined that the device performance is greater than or equal to a preset performance value, determining the first length and the target error correction algorithm based on the following conditions: the time taken by the target error correction algorithm to correct the characteristic value of the first length is less than the preset time, and the target error correction algorithm is an error correction algorithm with the largest number of error correction bits among the error correction algorithms whose time taken to correct the characteristic value of the first length is less than the preset time; when it is determined that the device performance is less than the preset performance value, determining the first length and the target error correction algorithm based on the following conditions: the time taken by the target error correction algorithm to correct the characteristic value of the first length is less than the preset time, the operating resources required for the target device to run the target error correction algorithm are less than the preset resources, and the target error correction algorithm is an error correction algorithm with the largest number of error correction bits among the error correction algorithms whose time taken to correct the characteristic value of the first length is less than the preset time and whose operating resources required to run the target error correction algorithm are less than the preset resources.

[0043] In the above steps, the device performance of the target device includes but is not limited to being determined based on one or more of the following performance parameters of the target device: processor performance (e.g., clock frequency, number of cores, number of threads, cache size, etc.), memory performance (e.g., memory capacity, memory speed, memory type, etc.), storage performance (e.g., hard disk type, storage capacity, read and write speeds, etc.), input / output (I / O) performance (e.g., throughput, response time, etc.), floating-point operation performance, network performance, parallel processing capability, etc.

[0044] In an optional embodiment, when it is determined that the device performance is greater than or equal to a preset performance value, a maximum prime number Q less than the first number is determined, and error correction durations for multiple error correction algorithms to correct the characteristic value of length Q are determined; when there is a first error correction algorithm with the error correction duration less than the preset duration, the error correction algorithm with the largest number of error correction bits in the first error correction algorithm is determined as the target algorithm, and Q is determined as the first length; when the first error correction algorithm does not exist, Q is replaced with a maximum prime number less than Q, and the above operations are repeated until the first error correction algorithm exists.

[0045] In an optional embodiment, when it is determined that the device performance is less than the preset performance value, a maximum prime number Q less than the first number is determined, and the error correction time for multiple error correction algorithms to correct the characteristic value of length Q and the operating resources required to run the multiple error correction algorithms are determined. When there is a second error correction algorithm whose error correction time is less than the preset time and whose operating resources are less than the preset resources, the error correction algorithm with the largest number of error correction bits in the second error correction algorithm is determined as the target algorithm, and Q is determined as the first length; when the second error correction algorithm does not exist, Q is replaced with a maximum prime number less than Q, and the above operations are repeated until the second error correction algorithm exists.

[0046] In the above steps, for devices with sufficient computing resources, when the error correction time is less than the predetermined time, the error correction algorithm with the strongest error correction capability is selected; and for devices with insufficient computing resources, when the error correction time is less than the predetermined time, an error correction algorithm with operating resources less than the preset resources and the strongest error correction capability is selected, thereby improving the reliability of data transmission and storage.

[0047] In an optional embodiment, determining the restart number of the target device based on the second number, the first number, the first length and the first error correction bit number includes: determining the restart number M by the following formula: M=Z / (Y+Z)×a×W / X, wherein Z is the second number, Y is the first number, W is the first length, X is the first error correction bit number, a is a constant, and the value of a is greater than 0 and less than 1.

[0048] In the above steps, a includes but is not limited to: 0.1, 0.2, 0.3, etc.

[0049] In an optional embodiment, determining an auxiliary code for correcting the to-be-corrected characteristic value of the SRAM of the target device based on the values ​​of the bits whose value change rate is less than a predetermined threshold in the multiple target power-on initial values ​​includes: bitwise accumulation of the multiple target power-on initial values ​​to obtain a first array; selecting the largest ┌W / 2┐ (i.e., W / 2 is rounded up) first values ​​and the smallest └W / 2┘ (i.e., W / 2 is rounded down) second values ​​from the first array, and arranging the selected W values ​​in sequence according to their sequential positions in the first array to obtain a second array, wherein W is the first length; assigning all the first values ​​in the second array to the first value, and assigning all the second values ​​in the second array to the second value, to obtain the target characteristic value of the SRAM of the target device; determining the auxiliary code for correcting the to-be-corrected characteristic value of the SRAM of the target device based on the target characteristic value to restore the to-be-corrected characteristic value to the target characteristic value.

[0050] In the above steps, the target characteristic value is determined based on the values ​​of W positions with stronger stability among the multiple target power-on initial values, thereby ensuring the stability of the target characteristic value and the uniform distribution of 0 and 1 in the target characteristic value.

[0051] In an optional embodiment, the first program instructs the target device to start up in the restart number of startup environments, and obtains the target characteristic value based on the target power-on initial value of the built-in SRAM after each startup, as well as the position information of the first value and the second value in the first array; the first program obtains the auxiliary code corresponding to the target characteristic value through the target error correction algorithm (for example, the auxiliary code corresponding to the target characteristic value is generated based on the RS code), and after obtaining the target characteristic value, when the target device is started up again, the characteristic value to be corrected is determined based on the power-on initial value of the built-in SRAM after startup and the position information, and the characteristic value to be corrected is restored to the target characteristic value through the auxiliary code. Optionally, in the case where the first program includes a program running on the target device, the target device stores the position information and the auxiliary code in a predetermined storage area in the target device after generating the position information and the auxiliary code; in the case where the first program includes a program running on other terminal devices, the first program sends the position information and the auxiliary code to the target device after generating the position information and the auxiliary code. Optionally, the target characteristic value includes but is not limited to: generated during the initialization phase before the target device leaves the factory, and the characteristic value to be corrected includes but is not limited to: generated during the use phase after the device leaves the factory.

[0052] In an optional embodiment, when the to-be-corrected characteristic value cannot be restored to the target characteristic value by the auxiliary code, the operation of generating the target characteristic value is repeatedly performed to obtain a new target characteristic value.

[0053] In an optional embodiment, assigning all of the first values ​​in the second array to the first value, and assigning all of the second values ​​in the second array to the second value includes at least one of the following: assigning all of the first values ​​in the second array to 1, and assigning all of the second values ​​in the second array to 0; assigning all of the first values ​​in the second array to 0, and assigning all of the second values ​​in the second array to 1.

[0054] In an optional embodiment, after determining an auxiliary code for correcting the characteristic value of the SRAM of the target device based on the values ​​of the bits whose value change rate is less than a predetermined threshold among multiple target power-on initial values, the method further includes: sending the auxiliary code and target position information to the target device to instruct the target device to determine the PUF value of the target device based on the auxiliary code and the target position information, wherein the target position information includes position information of the first value and the second value in the first array.

[0055] In the above steps, the target location information includes but is not limited to being recorded in the following ways: direct index recording, bitmap recording, encoding recording, data structure recording, binary tag recording, using memory mapped file recording, and using database storage recording.

[0056] In the above steps, the PUF value is determined by using the auxiliary code and the target position information, thereby enhancing the security of the generated PUF value.

[0057] In an optional embodiment, after sending the auxiliary code and the target position information to the target device, the method further includes: after the target device is powered on, obtaining the actual power-on initial value of the SRAM of the target device; the target device reads W third values ​​from the actual power-on initial value according to the target position information, and concatenates them to obtain the characteristic value to be corrected; the target device uses the auxiliary code to correct the characteristic value to be corrected to obtain the target characteristic value; the target device selects a predetermined number of values ​​from the target characteristic value according to a predetermined selection method to obtain a third array; the target device determines the PUF value of the target device based on the third array.

[0058] In the above steps, the predetermined selection method includes but is not limited to: starting from a predetermined starting position, selecting a predetermined number of values ​​according to a predetermined step length, and the predetermined starting position, the predetermined step length and the predetermined number can be adjusted according to the model of the target device and the application scenario of the target device. The predetermined number includes but is not limited to: 16 bits, 32 bits, 48 ​​bits, etc.

[0059] By generating the PUF value through the above method, the physical security of the target device is enhanced.

[0060] In an optional embodiment, the target device selects a predetermined number of values ​​from the target characteristic value according to a predetermined selection method, and obtaining the third array includes: the target device determines a target prime number from a preset prime number array; the target device loops through the target characteristic value with the target prime number as a step size to jump values ​​to obtain a predetermined number of fourth values, thereby obtaining the third array.

[0061] In an optional embodiment, the target device determines the PUF value of the target device based on the third array, including: the target device concatenates the predetermined number of fourth values ​​to obtain a target value; the target device uses the bitwise XOR value of the target value and the target prime number as the starting position, and loops again in the target characteristic value to jump values ​​according to the bitwise XOR value to obtain the predetermined number of fifth values; the target device determines the PUF value of the target device based on the predetermined number of fifth values.

[0062] In an optional embodiment, when the binary digit of the target prime number is greater than the predetermined number, the first numerical value corresponding to the character sequence of the predetermined number of characters in the binary character sequence of the target prime number is intercepted, and the first numerical value is updated to the target prime number; when the binary digit of the target prime number is less than the predetermined number, the binary character sequence of the target prime number is repeatedly concatenated, and the second numerical value corresponding to the character sequence containing the predetermined number of characters is intercepted, and the second numerical value is updated to the target prime number. Exemplary, when the predetermined number is 8 and the target prime number is "110", the target prime number is determined to be "11011011"; when the predetermined number is 8 and the target prime number is "110110110", the target prime number is determined to be "11011011".

[0063] In an optional embodiment, the target device determines the PUF value of the target device based on the predetermined number of fifth values, including at least one of the following: the target device determines a value obtained by concatenating the predetermined number of fifth values ​​as the PUF value; the target device determines a sixth value obtained by concatenating the predetermined number of fifth values, and determines a value in the target format converted from the sixth value as the PUF value of the target device.

[0064] In the above steps, the target format includes but is not limited to: binary, hexadecimal, etc.

[0065] In an optional embodiment, the target device determines the target prime number from a preset prime number array, comprising at least one of the following: the target device determines the target prime number from a preset prime number array according to the type of business currently to be performed by the target device; the target device determines the target prime number from a preset prime number array in a random selection manner.

[0066] In an optional embodiment, the target device determines the target prime number from a preset prime number array, including: selecting the target prime number at a corresponding position in the prime number array according to a hash value of the business-related information of the target device.

[0067] In an optional embodiment, after the target device determines the PUF value of the target device based on the third array, the method further includes at least one of the following: the target device hashes the PUF value together with SN MACCPUID (serial number-network interface card-central processing unit-identification) to obtain identification information of the target device; the target device uses the PUF value as an input to a KFD (Kernel Fisher Discrimination) algorithm to generate an encryption key; the target device determines the PUF value as a public-private key generation factor.

[0068] The following is an overall description of the solutions in the present invention in conjunction with specific embodiments:

[0069] Embodiment 1:

[0070] Figure 3 The process of the method for generating a device PUF value according to an embodiment of the present invention is as follows: Figure 2 ,like Figure 3 As shown, the process includes the following steps:

[0071] Step S302, controlling multiple test devices of the target type to start and restart multiple times in multiple different environments, and counting the changes in the number of 0s and 1s in the test power-on initial value of the built-in static random access memory SRAM after each restart, and determining the stability coefficient of the power-on initial value of the target type in multiple different environments according to the changes in the number of 0s and 1s in the power-on initial value;

[0072] Step S304, determining the number of bits Y (i.e., the number of bits that always remain 1 or 0) among the multiple test power-on initial values, whose values ​​remain stable under the multiple different environments, and the number of bits Z whose value stability is in the range of [90%, 100%);

[0073] Step S306, determining the length W of the target characteristic value used to generate the PUF value of the target device, where W includes a prime number less than Y, and testing the error correction time required for multiple error correction algorithms to correct the W-bit characteristic value according to the preset error correction coding time of the target device, and selecting an error correction algorithm with a stronger error correction capability from among the error correction algorithms whose error correction time is less than the error correction coding time as the target error correction algorithm;

[0074] Step S308, determining the number of restarts M of the target device in the initialization phase by the following formula: M=Z / (Y+Z)×0.1×W / [the number of error correction bits of the target error correction algorithm];

[0075] Step S310, retain M and W.

[0076] In the above steps, optionally, W includes the largest prime number less than Y, and the larger W is, the higher the security is. In the case where the target device is a high-performance device, the target error correction algorithm includes a complex error correction algorithm with a large number of error correction bits, thereby reducing the number of restarts for initialization of the target device. In the case where the target device is a low-performance device, the complexity of the selected target error correction algorithm is reduced by increasing the number of restarts for initialization of the target device or reducing the W value.

[0077] Embodiment 2:

[0078] Figure 4 The process of the method for generating a device PUF value according to an embodiment of the present invention is as follows: Figure 3 ,like Figure 4 As shown, the process includes the following steps:

[0079] Step S402, controlling the target device to restart in M ​​environments where the power-on initial value of the SRAM of the target device has poor stability under the multiple different environments to obtain a target power-on initial value of the SRAM of the target device;

[0080] Step S404, accumulating the SRAM values ​​of M power-ons bit by bit to obtain an array with a value range of 0-M;

[0081] Step S406, find the largest ┌W / 2┐ value and the smallest └W / 2┘ value in the array, and save and record the bit address information corresponding to each value;

[0082] Step S408, according to the bit address information (i.e., the aforementioned target position information), first mark the largest ┌W / 2┐ values ​​as 1, mark the smallest └W / 2┘ values ​​as 0, and then concatenate them bit by bit to obtain the target feature value T;

[0083] Step S410, performing error correction coding on T to obtain an auxiliary code F, and saving F.

[0084] Embodiment three:

[0085] Figure 5 The process of the method for generating a device PUF value according to an embodiment of the present invention is as follows: Figure 4 ,like Figure 5 As shown, the process includes the following steps:

[0086] Step S502, obtaining the power-on initial value of the SRAM after the target device is powered on, and reading the corresponding W bits in the power-on initial value according to the bit address information, and concatenating them to obtain the initial characteristic value T' (ie, the aforementioned characteristic value to be corrected);

[0087] Step S504, performing error correction on T' through F;

[0088] Step S506, determining whether the error correction is successful, if the error correction is successful, executing step S510, if the error correction is unsuccessful, executing step S508;

[0089] Step S508, re-execute the above steps S402 to S410;

[0090] Step S510, when the error correction is successful, select a target prime number Q' corresponding to the business scenario of the target device from a prefabricated prime number array, and jump to obtain 32 bits of the eigenvalue T in series to obtain a value of 1 with Q' as the step length;

[0091] Step S512, using the bitwise XOR value of the value 1 and Q' as the starting position and the bitwise XOR value as the step length to jump and take the value of the characteristic value T again to obtain the puf value.

[0092] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for enabling a terminal device (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present invention.

[0093] In this embodiment, a device for generating a PUF value of a device is also provided, and the device is used to implement the above-mentioned embodiments and preferred implementation modes, and the descriptions that have been made will not be repeated. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the device described in the following embodiments is preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0094] Figure 6 is a structural block diagram of a device for generating a PUF value according to an embodiment of the present invention, such as Figure 6As shown, the device includes: a first acquisition module 62, used to obtain a predetermined number of restarts, wherein the number of restarts is predetermined in the following manner: control multiple test devices to start up in multiple startup environments respectively, and obtain the test power-on initial value of the static random access memory SRAM built in each of the test devices after starting up, wherein different test devices are located in different startup environments, and the environmental parameters included in different startup environments are not completely the same, and the types of multiple test devices are all target types; determine a first number of bits with equal values ​​in the multiple test power-on initial values, and a second number of bits with equal values ​​greater than a predetermined ratio and less than 1, wherein the predetermined ratio is less than 1; determine a first length of the to-be-corrected characteristic value of the SRAM of the target device and the target error correction algorithm based on the first number and the time consumption of multiple error correction algorithms, wherein the first The length is less than the first number, and the type of the target device is the target type; the restart times of the target device are determined based on the second number, the first number, the first length and the first number of error correction bits, wherein the first number of error correction bits is the number of error correction bits of the target error correction algorithm; a control module 64 is used to control the target device to start up in the restart times startup environments respectively, and obtain the target power-on initial value of the built-in SRAM of the target device after each startup, wherein the multiple startup environments include the restart times startup environments; a first determination module 66 is used to determine the auxiliary code for correcting the to-be-corrected characteristic value of the SRAM of the target device based on the values ​​of the bits whose value change rate is less than a predetermined threshold in the multiple target power-on initial values, so that the target device determines the physical unclonable function PUF value of the target device based on the auxiliary code.

[0095] In an optional embodiment, the device further includes: a second determination module, which is used to determine, before obtaining a predetermined number of restarts, a first length of the characteristic value to be corrected of the SRAM of the target device, and a target error correction algorithm based on the first number and the time consumption of multiple error correction algorithms, wherein the second determination module includes: a first determination unit, which is used to determine the device performance of the target device; a second determination unit, which is used to determine the first length and the target error correction algorithm based on the following conditions when it is determined that the device performance is greater than or equal to a preset performance value: the time length for the target error correction algorithm to correct the characteristic value of the first length is less than the preset time length, and the target error correction algorithm is a third determining unit, configured to determine, when it is determined that the device performance is less than the preset performance value, the first length and the target error correction algorithm based on the following conditions: the time for the target error correction algorithm to correct the characteristic value of the first length is less than the preset time, the operating resources required for the target device to run the target error correction algorithm are less than the preset resources, and the target error correction algorithm is the error correction algorithm with the largest number of error correction bits among the error correction algorithms whose time for correcting the characteristic value of the first length is less than the preset time and whose operating resources required to run the target error correction algorithm are less than the preset resources.

[0096] In an optional embodiment, the device also includes: a third determination module, used to determine the restart number of the target device based on the second number, the first number, the first length and the first error correction bit number before obtaining the predetermined restart number, wherein the third determination module includes: a fourth determination unit, used to determine the restart number M by the following formula: M=Z / (Y+Z)×a×W / X, wherein Z is the second number, Y is the first number, W is the first length, X is the first error correction bit number, a is a constant, and the value of a is greater than 0 and less than 1.

[0097] In an optional embodiment, the first determination module 66 includes: an accumulation unit, which is used to accumulate the multiple target power-on initial values ​​bit by bit to obtain a first array; a screening unit, which is used to screen out ┌W / 2┐ first values ​​with the largest values ​​and └W / 2┘ second values ​​with the smallest values ​​from the first array, and arrange the screened W values ​​in sequence according to their sequential positions in the first array to obtain a second array, wherein W is the first length; an assignment unit, which is used to assign all the first values ​​in the second array to the first value, and to assign all the second values ​​in the second array to the second value, to obtain a target characteristic value of the SRAM of the target device; a restoration unit, which is used to determine, based on the target characteristic value, the auxiliary code for correcting the characteristic value to be corrected of the SRAM of the target device so as to restore the characteristic value to be corrected to the target characteristic value.

[0098] In an optional embodiment, the assignment unit includes at least one of the following: a first assignment sub-unit, used to assign all the first values ​​in the second array to 1, and to assign all the second values ​​in the second array to 0; a second assignment sub-unit, used to assign all the first values ​​in the second array to 0, and to assign all the second values ​​in the second array to 1.

[0099] In an optional embodiment, the device also includes: a sending module, which is used to determine the auxiliary code for correcting the characteristic value of the SRAM of the target device based on the value of the bit position whose value change rate is less than a predetermined threshold among multiple target power-on initial values, and then send the auxiliary code and target position information to the target device to instruct the target device to determine the PUF value of the target device based on the auxiliary code and the target position information, wherein the target position information includes the position information of the first value and the second value in the first array.

[0100] In an optional embodiment, the target device includes: a second acquisition module, used to obtain the actual power-on initial value of the SRAM of the target device after receiving the auxiliary code and target position information and powering on; a reading module, used to read W third values ​​from the actual power-on initial value according to the target position information, and concatenate them to obtain the characteristic value to be corrected; an error correction module, used to correct the characteristic value to be corrected using the auxiliary code to obtain the target characteristic value; a selection module, used to select a predetermined number of values ​​from the target characteristic value according to a predetermined selection method to obtain a third array; a fourth determination module, used to determine the PUF value of the target device based on the third array.

[0101] In an optional embodiment, the reading module includes: a fifth determining unit, used to determine a target prime number from a preset prime number array; a first acquiring unit, used to loop through jump values ​​in the target eigenvalue with the target prime number as a step size to obtain a predetermined number of fourth values, and obtain the third array.

[0102] In an optional embodiment, the fourth determination module includes: a concatenation unit, used to concatenate the predetermined number of fourth values ​​to obtain a target value; a second acquisition unit, used to use the bitwise XOR value of the target value and the target prime number as the starting position, and the bitwise XOR value as the step size to jump values ​​in the target characteristic value again to obtain the predetermined number of fifth values; a sixth determination unit, used to determine the PUF value of the target device based on the predetermined number of fifth values.

[0103] In an optional embodiment, the sixth determination unit includes at least one of the following: a first determination subunit, used to determine a value obtained by concatenating the predetermined number of fifth values ​​as the PUF value; a second determination subunit, used to determine a sixth value obtained by concatenating the predetermined number of fifth values, and a value in the target format converted from the sixth value as the PUF value of the target device.

[0104] In an optional embodiment, the fifth determining unit includes at least one of the following: a third determining subunit, used to determine the target prime number from the preset prime number array according to the type of the business currently to be executed by the target device; and a fourth determining subunit, used to determine the target prime number from the preset prime number array in a random selection manner.

[0105] In an optional embodiment, the target device also includes: a processing module, which is used to perform at least one of the following operations after determining the PUF value of the target device based on the third array: hashing the PUF value together with the SN MAC CPUID to obtain the identification information of the target device; using the PUF value as an input to the KFD algorithm to generate an encryption key; determining the PUF value as a public-private key generation factor.

[0106] It should be noted that the above modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0107] An embodiment of the present invention further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.

[0108] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0109] An embodiment of the present invention further provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0110] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0111] An embodiment of the present invention further provides a computer program product, the computer program product comprising a computer program, and when the computer program is executed by a processor, the steps in any one of the above method embodiments are implemented.

[0112] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.

[0113] Obviously, those skilled in the art should understand that the above modules or steps of the present invention can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order than here, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present invention is not limited to any specific combination of hardware and software.

[0114] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for generating a device PUF value, characterized in that: include: Obtain a predetermined number of restarts, wherein the number of restarts is predetermined in the following manner: control a plurality of test devices to start up in a plurality of startup environments respectively, and obtain a test power-on initial value of a static random access memory SRAM built into each of the test devices after the test devices are started up, wherein different test devices are located in different startup environments, and the environmental parameters included in different startup environments are not completely the same, and the types of the plurality of test devices are all target types; determine a first number of bits having equal values ​​in the plurality of test power-on initial values, and a second number of bits having equal values ​​in a ratio greater than a predetermined ratio and less than 1, wherein the predetermined ratio is less than 1; determine a first length of a characteristic value to be corrected of the SRAM of the target device and a target error correction algorithm based on the first number and the time consumption of a plurality of error correction algorithms, wherein the first length is less than the first number, and the type of the target device is the target type; determine the number of restarts of the target device based on the second number, the first number, the first length, and a first number of error correction bits, wherein the first number of error correction bits is the number of error correction bits of the target error correction algorithm; Controlling the target device to start up in the restart number of startup environments respectively, and obtaining a target power-on initial value of a built-in SRAM of the target device after each startup, wherein the multiple startup environments include the restart number of startup environments; Based on the values ​​of the bits whose value change rate is less than a predetermined threshold among the multiple target power-on initial values, an auxiliary code for correcting the to-be-corrected characteristic value of the SRAM of the target device is determined, so that the target device determines the physical unclonable function PUF value of the target device based on the auxiliary code.

2. The method according to claim 1, characterized in that Determining a first length of a to-be-corrected characteristic value of an SRAM of a target device based on the first number and the time consumption of multiple error correction algorithms, and a target error correction algorithm includes: determining device performance of the target device; In the case where it is determined that the device performance is greater than or equal to a preset performance value, the first length and the target error correction algorithm are determined based on the following conditions: the time duration for the target error correction algorithm to correct the characteristic value of the first length is less than the preset time duration, and the target error correction algorithm is an error correction algorithm with the largest number of error correction bits among the error correction algorithms for which the time duration for correcting the characteristic value of the first length is less than the preset time duration; When it is determined that the device performance is less than the preset performance value, the first length and the target error correction algorithm are determined based on the following conditions: the time duration for the target error correction algorithm to correct the characteristic value of the first length is less than the preset time duration, the operating resources required for the target device to run the target error correction algorithm are less than the preset resources, and the target error correction algorithm is an error correction algorithm with the largest number of error correction bits among the error correction algorithms whose time duration for correcting the characteristic value of the first length is less than the preset time duration and whose operating resources required to run the target error correction algorithm are less than the preset resources.

3. The method according to claim 1, characterized in that Determining the restart times of the target device based on the second number, the first number, the first length, and the first number of error correction bits includes: The restart times M are determined by the following formula: M=Z / (Y+Z)×a×W / X, where Z is the second number, Y is the first number, W is the first length, X is the first error correction bit number, and a is a constant whose value is greater than 0 and less than 1.

4. The method according to claim 1, characterized in that Determining the auxiliary code for correcting the error-corrected characteristic value of the SRAM of the target device based on the values ​​of the bits whose value change rate is less than a predetermined threshold among the plurality of target power-on initial values ​​includes: Accumulating the plurality of target power-on initial values ​​bit by bit to obtain a first array; ┌W / 2┐ first values ​​with the largest values ​​and └W / 2┘ second values ​​with the smallest values ​​are selected from the first array, and the selected W values ​​are arranged in sequence according to their positions in the first array to obtain a second array, where W is the first length; Assign all the first values ​​in the second array to the first value, and assign all the second values ​​in the second array to the second value, to obtain a target characteristic value of the SRAM of the target device; The auxiliary code used to correct the to-be-corrected characteristic value of the SRAM of the target device to restore the to-be-corrected characteristic value to the target characteristic value is determined based on the target characteristic value.

5. The method according to claim 4, characterized in that Assigning all the first values ​​in the second array to the first value, and assigning all the second values ​​in the second array to the second value comprises at least one of the following: Assign all the first values ​​in the second array to 1, and assign all the second values ​​in the second array to 0; All the first values ​​in the second array are assigned a value of 0, and all the second values ​​in the second array are assigned a value of 1.

6. The method according to claim 4, characterized in that After determining the auxiliary code for correcting the error of the characteristic value of the SRAM of the target device based on the values ​​of the bits whose value change rate is less than a predetermined threshold among the plurality of target power-on initial values, the method further includes: The auxiliary code and the target location information are sent to the target device to instruct the target device to determine the PUF value of the target device based on the auxiliary code and the target location information, wherein the target location information includes location information of the first value and the second value in the first array.

7. The method according to claim 6, characterized in that After sending the auxiliary code and the target location information to the target device, the method further includes: After the target device is powered on, obtaining an actual power-on initial value of the SRAM of the target device; The target device reads W third values ​​from the actual power-on initial value according to the target position information, and concatenates them to obtain the characteristic value to be corrected; The target device uses the auxiliary code to correct the characteristic value to be corrected to obtain the target characteristic value; The target device selects a predetermined number of values ​​from the target characteristic values ​​according to a predetermined selection method to obtain a third array; The target device determines the PUF value of the target device based on the third array.

8. The method according to claim 7, characterized in that The target device selects a predetermined number of values ​​from the target characteristic values ​​according to a predetermined selection method, and obtains a third array including: The target device determines a target prime number from a preset prime number array; The target device loops through the target characteristic values ​​by taking the target prime number as a step length to jump values ​​to obtain a predetermined number of fourth values, thereby obtaining the third array.

9. The method according to claim 8, characterized in that The target device determining the PUF value of the target device based on the third array includes: The target device connects the predetermined number of fourth values ​​in series to obtain a target value; The target device uses the bitwise XOR value of the target numerical value and the target prime number as the starting position, and loops through the target characteristic value again in a step size to jump values ​​to obtain the predetermined number of fifth values; The target device determines the PUF value of the target device based on the predetermined number of fifth values.

10. The method according to claim 9, characterized in that The PUF value of the target device determined by the target device based on the predetermined number of fifth values ​​includes at least one of the following: The target device determines a value obtained by serially connecting the predetermined number of fifth values ​​as the PUF value; The target device connects the predetermined number of fifth values ​​in series to form a sixth value, and determines a numerical value in a target format converted from the sixth value as the PUF value of the target device.

11. The method according to claim 8, characterized in that The target device determines a target prime number from a preset prime number array, including at least one of the following: The target device determines the target prime number from the preset prime number array according to the type of the business to be currently executed by the target device; The target device determines the target prime number from the preset prime number array in a random selection manner.

12. The method according to claim 7, characterized in that After the target device determines the PUF value of the target device based on the third array, the method further includes at least one of the following: The target device performs hash processing on the PUF value and the SN MAC CPUID to obtain identification information of the target device; The target device uses the PUF value as an input to the KFD algorithm to generate an encryption key; The target device determines the PUF value as a public-private key generation factor.

13. A device for generating a PUF value of a device, characterized in that: include: A first acquisition module is used to obtain a predetermined number of restarts, wherein the number of restarts is predetermined in the following manner: controlling a plurality of test devices to start up in a plurality of startup environments respectively, and obtaining a test power-on initial value of a static random access memory SRAM built into each of the test devices after the test devices are started up, wherein different test devices are located in different startup environments, and the environmental parameters included in different startup environments are not completely the same, and the types of the plurality of test devices are all target types; determining a first number of bits having equal values ​​in the plurality of test power-on initial values, and a second number of bits having equal values ​​in a ratio greater than a predetermined ratio and less than 1, wherein the predetermined ratio is less than 1; determining a first length of a characteristic value to be corrected of the SRAM of the target device and a target error correction algorithm based on the first number and the time consumption of a plurality of error correction algorithms, wherein the first length is less than the first number, and the type of the target device is the target type; determining the number of restarts of the target device based on the second number, the first number, the first length, and a first number of error correction bits, wherein the first number of error correction bits is the number of error correction bits of the target error correction algorithm; A control module, used for controlling the target device to start up in the restart number of startup environments respectively, and obtaining a target power-on initial value of a built-in SRAM of the target device after each startup, wherein the multiple startup environments include the restart number of startup environments; The first determination module is used to determine an auxiliary code for correcting the to-be-corrected characteristic value of the SRAM of the target device based on the values ​​of the bits whose value change rate is less than a predetermined threshold among the multiple target power-on initial values, so that the target device determines the physical unclonable function PUF value of the target device based on the auxiliary code.

14. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method described in any one of claims 1 to 12 when executed by a processor.

15. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method described in any one of claims 1 to 12 are implemented.

16. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method described in any one of claims 1 to 12 are implemented.

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