Data transmission delay detection method and system of automobile optical fiber Ethernet camera

Abstract

The invention discloses a data transmission delay detection method for an automobile optical fiber Ethernet camera, and the method comprises the steps: starting timing when a test starting signal is received, and transmitting a channel signal enabling the energy of a power supply to be output; after receiving the channel signal, the power management chip supplies power to the photoelectric communication transceiver and the camera, the FPGA chip receives an Ethernet signal sent by the photoelectric communication transceiver, and if protocol data from the camera is obtained from the Ethernet signal, timing is stopped, the Ethernet signal is obtained by converting an optical signal acquired from the camera by the photoelectric communication transceiver; and calculating the time interval from the start timing to the end timing. The photoelectric communication transceiver capable of carrying out photoelectric signal conversion is matched with the FPGA chip capable of identifying protocol data such as an AVTP protocol or an ARP protocol to construct a transmission and analysis path, the FPGA chip is matched with the power manager to construct a delay detection path, and accurate detection can be carried out aiming at the transmission delay condition of the optical fiber camera.

Description

Technical Field

[0001] The invention relates to a method for detecting data transmission delay of an automobile optical fiber Ethernet camera. Background Art

[0002] In the field of autonomous driving or assisted driving, significant progress has been made in recent years. In the autonomous driving or assisted driving system, the on-board camera is used to detect objects around the vehicle, such as pedestrians or other vehicles. If the data transmission of the camera is delayed, the system will lag in obtaining information, which will lead to the inability to respond in time such as braking and avoidance, thereby increasing the risk of accidents.

[0003] Due to the strong anti-interference ability, high data volume transmission and high data security of fiber optic cameras, vehicle-mounted cameras generally use vehicle-mounted fiber optic cameras. At present, there are no fiber optic camera products on the market, let alone test solutions for the system delay detection of key indicators of vehicle-mounted fiber optic camera products. In practical applications, in order to ensure the safety of vehicles during autonomous driving and assisted driving, the transmission delay of fiber optic cameras needs to be within an acceptable range. In order to more accurately control the transmission delay indicator of fiber optic cameras, accurate detection of this indicator is crucial. Summary of the invention

[0004] In view of the above problems, the present invention provides a detection method and system for accurately detecting the transmission delay time of an automotive fiber optic camera.

[0005] The present invention provides a method for detecting data transmission delay of an automobile optical fiber Ethernet camera, comprising: an FPGA chip monitors a start test signal, when receiving the start test signal, the FPGA chip starts timing and sends a channel signal for outputting power supply energy; after receiving the channel signal, a power management chip supplies power to an optoelectronic communication transceiver and a camera, so that the optoelectronic communication transceiver and the camera start working; the FPGA chip receives an Ethernet signal sent by the optoelectronic communication transceiver, and stops timing if AVTP data from the camera is obtained from the Ethernet signal, wherein the Ethernet signal is obtained by the optoelectronic communication transceiver from converting an optical signal obtained from the camera; the FPGA chip calculates the time interval from the start timing to the end timing and sends the time interval to a display device; the display device displays the time interval.

[0006] In some embodiments, the power management chip is connected to the optoelectronic communication transceiver and the camera to supply power to the optoelectronic communication transceiver and the camera; the power management chip communicates with the FPGA chip in real time; the FPGA chip monitors a start test signal, and when the start test signal is received, the FPGA chip starts timing, and before sending a channel signal to enable power energy output, it also includes: when the power management chip starts working, the FPGA chip starts working and sends a channel signal to prohibit power energy output, so that the power management chip does not supply power to the optoelectronic communication transceiver and the camera until the FPGA chip sends a channel signal to enable power energy output, and the power management chip supplies power to the optoelectronic communication transceiver and the camera.

[0007] In some embodiments, after the power management chip starts working, the FPGA chip starts working, and at the same time, the FPGA chip sends a channel signal to prohibit the output of power energy, so that the power management chip does not supply power to the optoelectronic communication transceiver and the camera, it also includes: the power module outputs AC high voltage electricity, the conversion module converts the AC high voltage electricity into DC low voltage electricity, and inputs the DC low voltage electricity into the power management chip.

[0008] In some embodiments, the display device is an LCD, and the power manager provides power to the LCD.

[0009] In some embodiments, the FPGA chip monitors the start test signal is the FPGA chip monitoring the start test signal triggered by the user.

[0010] The present invention also provides an automotive optical fiber Ethernet camera delay detection system, which is characterized by comprising: a power module and a detection module, wherein the power module is connected to the detection module and is used to supply power to the detection module; an optical fiber camera and a detection instrument, wherein the optical fiber camera and the detection instrument are connected via an optoelectronic cable, wherein the detection instrument is connected to the optical fiber camera to be tested via an optoelectronic cable and is used to test the optical fiber camera, wherein the detection instrument comprises a power management chip, an FPGA chip and an optoelectronic communication transceiver, wherein the power management chip is connected to the power module and is used to obtain a low voltage from the power module, wherein the power management chip is connected to the optoelectronic communication transceiver and the FPGA The chip is connected to supply power to the optoelectronic communication transceiver and the FPGA chip, and the optoelectronic communication transceiver and the FPGA chip can communicate with each other; when the FPGA chip receives a test start signal, it starts timing and sends a channel signal to output power energy, so that the power management chip supplies power to the optoelectronic communication transceiver and the optical fiber camera; when the FPGA chip receives an Ethernet signal converted by the optoelectronic communication transceiver from the optical signal received by the optical fiber camera and AVTP data can be parsed based on the Ethernet signal, the FPGA chip stops timing, and the FPGA chip determines the test result based on the time interval from the start timing to the end timing.

[0011] In some embodiments, a display device is also included, and the power management chip is connected to the display device to provide power to the display device.

[0012] In some embodiments, after obtaining a low voltage from the power module, the power management chip starts working and supplies power to the FPGA chip to start working. After the FPGA chip starts working, it sends a channel signal to prohibit power energy output, so that the power management chip does not supply power to the optoelectronic communication transceiver and the fiber optic camera until the FPGA chip starts timing and sends a channel signal for power energy output.

[0013] In some embodiments, an optoelectronic integrated connector is further included, and the optoelectronic communication transceiver is connected to the power management chip through the optoelectronic integrated connector, and the optical fiber communication transceiver is connected to the optical fiber camera through the optoelectronic integrated connector.

[0014] In some embodiments, the light source management chip performs real-time low-speed communication with the FPGA chip, and the FPGA chip performs real-time low-speed communication with the display device.

[0015] In the technical solution of the embodiment of the present invention, a transmission and parsing path is constructed by cooperating an optoelectronic communication transceiver capable of photoelectric signal conversion with an FPGA chip that can recognize protocol data such as AVTP protocol or ARP protocol. The FPGA chip cooperates with the power manager to construct a delay detection path, and ultimately the transmission delay of the fiber optic camera can be accurately detected.

[0016] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented according to the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present invention. Moreover, the same reference numerals are used throughout the drawings to represent the same components. In the drawings:

[0018] Figure 1 It is a flow chart of a method for detecting data transmission delay of an automotive optical fiber Ethernet camera in some embodiments of the present invention;

[0019] Figure 2 It is a structural schematic diagram of a data transmission delay detection system of an automotive optical fiber Ethernet camera in some embodiments of the present invention;

[0020] Figure 3 Schematic diagram of the structure of a detection device in a data transmission delay detection system of an automotive optical fiber Ethernet camera in some embodiments of the present invention. DETAILED DESCRIPTION

[0021] The following embodiments of the technical solution of the present invention are described in detail in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and are therefore only used as examples, and cannot be used to limit the protection scope of the present invention.

[0022] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which the present invention belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention; the terms "including" and "having" in the specification and claims of the present invention and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0023] In the description of the embodiments of the present invention, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present invention, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0024] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present invention. The appearance of the phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive of other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments. In the description of the embodiments of the present invention, the term "multiple" refers to more than two (including two)

[0025] The present invention provides a method for detecting data transmission delay of an automotive optical fiber Ethernet camera. Figure 1 As shown, the method includes:

[0026] Step 101, the FPGA chip 201 monitors the start test signal. When receiving the start test signal, the FPGA chip 201 starts timing and sends a channel signal to enable power supply energy output.

[0027] refer to Figure 2 and Figure 3 The optical fiber camera 10 is connected to the detection device 20 through an optical fiber line, and the detection device obtains AC power from the power supply interface. When the delay test needs to be started, the external power supply or the power supply interface supplies power to the detection device 20 through the power connector 206. Figure 3 The internal structure of the position detection device 20, the power connector 206 outputs a high voltage, which is converted into a low voltage and output to the power management chip PMIC (Power Management IC) 202 and the FPGA (Field-Programmable Gate Array) chip. After the FPGA chip is powered on, it monitors the start test signal, and when the start test signal is received, the timing starts. After the timing, the FPGA chip sends a channel signal to the power manager to output the power energy. The channel signal can be transmitted to the power management chip PMIC 202, so that the power management chip PMIC 202 executes step 102.

[0028] Step 102, after receiving the channel signal, the power management chip supplies power to the optoelectronic communication transceiver 203 and the camera, so that the optoelectronic communication transceiver 203 and the camera start working.

[0029] After the power management chip PMIC 202 receives the channel signal sent by the FPGA chip to output the power energy, the power management chip PMIC 202 supplies power to the optoelectronic communication transceiver 203 and the optical fiber camera. In some embodiments, an optoelectronic integrated connector is also included, the power management chip PMIC 202 is connected to the optoelectronic integrated connector and can supply power to the optoelectronic integrated connector, the optical fiber camera is connected to the optoelectronic integrated connector, the data output by the optical fiber camera is transmitted to the optoelectronic communication transceiver 203 via the optoelectronic integrated connector, and the signal sent by the optoelectronic integrated connector to the optoelectronic communication transceiver 203 is an optoelectronic signal.

[0030] Step 103, the FPGA chip 201 receives the Ethernet signal sent by the optoelectronic communication transceiver 203, and stops timing if the protocol data from the camera is obtained from the Ethernet signal, wherein the Ethernet signal is converted by the optoelectronic communication transceiver 203 from the optical signal obtained from the camera.

[0031] Specifically, after the fiber optic camera 10 is powered on and starts working, it can capture data obtained by shooting or recording. The fiber optic camera 10 sends the captured data to the optoelectronic communication transceiver 203 via the optoelectronic integrated connector. The optoelectronic communication transceiver 203 receives the optical signal sent from the optoelectronic integrated connector, converts the optical signal into an Ethernet signal, and sends it to the FPGA chip 201. The FPGA chip 201 receives the Ethernet signal sent by the optoelectronic communication transceiver 203 and identifies the signal. If protocol data, such as AVTP data or ARP data, is obtained from the Ethernet signal, the timing is stopped.

[0032] In the present application, the optoelectronic communication transceiver 203 belongs to the physical layer in the ISO seven-layer model. In the Ethernet communication model, the physical layer is only responsible for the conversion of Ethernet electrical signals, but cannot identify the communication protocols at the data link layer and above. In addition, the entire communication link not only has the AVTP protocol, but also other non-business protocols such as ARP working in coordination. Therefore, an FPGA chip 201 that can adapt and cooperate with the optoelectronic communication transceiver 203 is set. The chip integrates an AVTP protocol transceiver driver or an ARP protocol transceiver driver to identify the communication protocols at the data link layer and above. The two work together to deploy a complete solution that can perform delay testing.

[0033] Step 104, the FPGA chip 201 calculates the time interval from the start timing to the end timing and sends the time interval to the display device 204;

[0034] Step 105: the display device 204 displays the time interval.

[0035] In the technical solution of the embodiment of the present invention, a transmission and parsing path is constructed by cooperating an optoelectronic communication transceiver 203 capable of performing optoelectronic signal conversion with an FPGA chip 201 that can recognize protocol data such as the AVTP protocol or the ARP protocol. The FPGA chip 201 cooperates with the power manager to construct a delay detection path, and ultimately can accurately detect the transmission delay of the fiber optic camera.

[0036] In some embodiments, the power management chip is connected to the optoelectronic communication transceiver 203 and the camera to supply power to the optoelectronic communication transceiver 203 and the camera; the power management chip communicates with the FPGA chip 201 in real time; the FPGA chip 201 monitors the start test signal, and when the start test signal is received, the FPGA chip 201 starts timing, and before sending a channel signal to enable power energy output, it also includes: when the power management chip starts working, the FPGA chip 201 starts working and sends a channel signal to prohibit power energy output, so that the power management chip does not supply power to the optoelectronic communication transceiver 203 and the camera, until the FPGA chip 201 sends a channel signal to enable power energy output, and the power management chip supplies power to the optoelectronic communication transceiver 203 and the camera.

[0037] In order to prevent the transmission and recognition of the camera data before the FPGA chip 201 starts timing, and to enable the transmission and recognition of the camera data to be carried out in time after the timing, in this embodiment, the FPGA chip 201 is started to work first, and the FPGA chip 201 that starts working first sends a channel signal that prohibits the output of power energy, that is, a prohibition signal, and the prohibition signal is used to prevent the transmission and recognition of the camera data before the FPGA chip 201 starts timing. After sending the prohibition signal, the start test signal is triggered by operations such as user triggering or automatic triggering. Based on the start test signal, the FPGA chip 201 starts timing. After timing, the FPGA chip 201 sends a channel signal that enables the output of power energy, that is, the prohibition signal is released. At that time, the camera data of the optical fiber camera starts to be transmitted and recognized, and the time is counted during the transmission and recognition process to determine whether there is a delay and the delay time.

[0038] In some embodiments, after the power management chip starts working, the FPGA chip 201 starts working, and at the same time, the FPGA chip 201 sends a channel signal to prohibit the output of power energy, so that the power management chip does not supply power to the optoelectronic communication transceiver 203 and the camera, it also includes: the power module outputs AC high voltage electricity, the conversion module converts the AC high voltage electricity into DC low voltage electricity, and inputs the DC low voltage electricity into the power management chip.

[0039] In some embodiments, the display device 204 is an LCD, and the power manager provides power to the LCD.

[0040] In some embodiments, the present invention further provides a vehicle fiber optic Ethernet camera delay detection system, comprising: a power module and a detection module, wherein the power module is connected to the detection module for supplying power to the detection module; a fiber optic camera and a detection instrument, wherein the fiber optic camera and the detection instrument are connected via an optoelectronic cable, wherein the detection instrument is connected to the fiber optic camera to be tested via an optoelectronic cable for testing the fiber optic camera, wherein the detection instrument comprises a power management chip, an FPGA chip 201, and an optoelectronic communication transceiver 203, wherein the power management chip is connected to the power module for obtaining a low voltage from the power module, wherein the power management chip is connected to the optoelectronic communication transceiver 203 and the FPGA chip 201 for The optoelectronic communication transceiver 203 and the FPGA chip 201 are powered, and the optoelectronic communication transceiver 203 and the FPGA chip 201 are connected and can communicate with each other; when the FPGA chip 201 receives a test start signal, it starts timing and sends a channel signal to output power energy, so that the power management chip supplies power to the optoelectronic communication transceiver 203 and the optical fiber camera; when the FPGA chip 201 receives an Ethernet signal converted by the optoelectronic communication transceiver 203 from the optical signal received by the optical fiber camera and AVTP data can be parsed based on the Ethernet signal, the FPGA chip 201 stops timing, and the FPGA chip 201 determines the test result based on the time interval from the start timing to the end timing.

[0041] In some embodiments, a display device 204 is further included, and the power management chip is connected to the display device 204 to provide power to the display device 204 .

[0042] In some embodiments, after obtaining a low voltage from the power module, the power management chip starts working and supplies power to the FPGA chip 201 to start working. After the FPGA chip 201 starts working, it sends a channel signal to prohibit power energy output, so that the power management chip does not supply power to the optoelectronic communication transceiver 203 and the fiber optic camera until the FPGA chip 201 starts timing and sends a channel signal for power energy output.

[0043] In some embodiments, an optoelectronic integrated connector is further included, and the optoelectronic communication transceiver 203 is connected to the power management chip through the optoelectronic integrated connector, and the optical fiber communication transceiver is connected to the optical fiber camera through the optoelectronic integrated connector.

[0044] In some embodiments, the light source management chip performs real-time low-speed communication with the FPGA chip 201 , and the FPGA chip 201 performs real-time low-speed communication with the display device 204 .

[0045] In the technical solution of the embodiment of the present invention, a transmission and analysis path is constructed by cooperating an optoelectronic communication transceiver 203 capable of performing optoelectronic signal conversion with an FPGA chip 201 that can recognize the AVTP protocol. The FPGA chip 201 cooperates with the power manager to construct a delay detection path, and ultimately can accurately detect the transmission delay of the fiber optic camera.

[0046] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention, and they should all be included in the scope of the claims and specification of the present invention. In particular, as long as there is no structural conflict, the various technical features mentioned in each embodiment can be combined in any way. The present invention is not limited to the specific embodiments disclosed herein, but includes all technical solutions that fall within the scope of the claims.

Claims

1. A method for detecting data transmission delay of an automotive optical fiber Ethernet camera, characterized in that: include: The FPGA chip monitors the start test signal. When receiving the start test signal, the FPGA chip starts timing and sends a channel signal to the power manager to enable the power supply energy to be output; After receiving the channel signal, the power management chip supplies power to the optoelectronic communication transceiver and the camera, so that the optoelectronic communication transceiver and the camera start working; The FPGA chip receives an Ethernet signal sent by the optoelectronic communication transceiver, and stops timing if the protocol data from the camera is obtained from the Ethernet signal, wherein the Ethernet signal is obtained by the optoelectronic communication transceiver from converting the optical signal obtained from the camera; The FPGA chip calculates the time interval from the start timing to the end timing and sends the time interval to the display device; The display device displays the time interval.

2. The data transmission delay detection method according to claim 1, characterized in that: The power management chip is connected to the optoelectronic communication transceiver and the camera to supply power to the optoelectronic communication transceiver and the camera; before the FPGA chip monitors the start test signal, when the start test signal is received, the FPGA chip starts timing and sends a channel signal for outputting power energy, it also includes: When the power management chip starts working, the FPGA chip starts working and sends a channel signal to prohibit power energy output, so that the power management chip does not supply power to the optoelectronic communication transceiver and the camera, until the FPGA chip sends a channel signal to enable power energy output, and the power management chip supplies power to the optoelectronic communication transceiver and the camera.

3. The data transmission delay detection method according to claim 2, characterized in that: After the power management chip starts to work, the FPGA chip starts to work, and at the same time the FPGA chip sends a channel signal for prohibiting power energy output so that the power management chip does not supply power to the optoelectronic communication transceiver and the camera, the method further includes: The power module outputs AC high voltage electricity, the conversion module converts the AC high voltage electricity into DC low voltage electricity, and inputs the DC low voltage electricity into the power management chip and the FPGA chip.

4. The data transmission delay detection method according to claim 2, characterized in that: The display device is an LCD, and the power manager supplies power to the LCD.

5. The data transmission delay detection method according to any one of claims 1 to 4, characterized in that: The FPGA chip monitors the start test signal, which is a start test signal triggered by the user monitored by the FPGA chip.

6. A vehicle optical fiber Ethernet camera delay detection system, characterized in that: include: A power module and a detection module, wherein the power module is connected to the detection module and is used to supply power to the detection module; A fiber optic camera and a detection instrument, wherein the fiber optic camera and the detection instrument are connected via an optoelectronic cable, the detection instrument is connected to the fiber optic camera to be tested via an optoelectronic cable, and is used to test the fiber optic camera, the detection instrument comprises a power management chip, an FPGA chip, and an optoelectronic communication transceiver, the power management chip is connected to a power module, and is used to obtain a low voltage from the power module, the power management chip is connected to the optoelectronic communication transceiver and the FPGA chip, and is used to power the optoelectronic communication transceiver and the FPGA chip, and the optoelectronic communication transceiver and the FPGA chip are connected so as to be able to communicate with each other; When the FPGA chip receives a test start signal, it starts timing and sends a channel signal to output power energy, so that the power management chip supplies power to the optoelectronic communication transceiver and the fiber optic camera; when the FPGA chip receives an Ethernet signal converted by the optoelectronic communication transceiver from the optical signal received by the fiber optic camera and the protocol data can be parsed based on the Ethernet signal, the FPGA chip stops timing, and the FPGA chip determines the test result based on the time interval from the start timing to the end timing.

7. The optical fiber Ethernet camera delay detection system according to claim 6, characterized in that: A display device is also included, and the power management chip is connected to the display device to supply power to the display device.

8. The optical fiber Ethernet camera delay detection system according to claim 6, characterized in that: After obtaining a low voltage from the power module, the power management chip starts working and supplies power to the FPGA chip to start working. After the FPGA chip starts working, it sends a channel signal to prohibit power energy output, so that the power management chip does not supply power to the optoelectronic communication transceiver and the fiber optic camera until the FPGA chip starts timing and sends a channel signal for power energy output.

9. The optical fiber Ethernet camera delay detection system according to claim 6, characterized in that: It also includes an optoelectronic integrated connector, through which the optoelectronic communication transceiver is connected to the power management chip, and through which the optical fiber communication transceiver is connected to the optical fiber camera.

10. The optical fiber Ethernet camera delay detection system according to claim 9, characterized in that: The light source management chip performs real-time low-speed communication with the FPGA chip, and the FPGA chip performs real-time low-speed communication with the display device.

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