Transmitting device, receiving device, communication apparatus and method for random access communication

Abstract

A transmitting device for random access communication includes encoding circuitry to encode an input message into a first bit sequence and a second bit sequence, split the first bit sequence into d bit blocks and determine d vectors. The transmitting apparatus includes: a first mapping circuit configured to construct a first symbol vector by calculating a Kronecker product of d vectors; and a second mapping circuit for mapping the second bit sequence to a second symbol vector. The sending device comprises a cascade circuit used for cascading a first symbol vector and a second symbol vector into a baseband symbol vector; a modulation circuit for modulating the baseband symbol vector to generate a modulation symbol vector including modulation symbols; and an antenna for transmitting each modulation symbol of the modulation symbol vector in the radio frequency signal to a receiving device. The transmitting device combines tensor-based modulation and coherent modulation, and thus exhibits enhanced communication reliability and spectral efficiency.

Description

Technical Field

[0001] The present disclosure relates to the field of wireless communications, and more specifically, to a transmitting device, a receiving device, a communication apparatus including the transmitting device and the receiving device, and a method for random access communication. Background Art

[0002] With the rapid increase in the number of communication devices in the network, the concern about communication reliability has become increasingly prominent. Traditionally, conventional communication devices use multiple access methods with fixed resource allocation for data communication in the network. In the fixed access method, a given communication device is allocated dedicated time-frequency resources to send data via the communication channel. These traditional multiple access methods are inefficient in terms of channel utilization because a given communication device may sometimes not have any data to send in the dedicated time-frequency resources, resulting in a loss in spectrum efficiency.

[0003] In some scenarios, a conventional random access method is used instead of a conventional fixed access method to relatively better utilize a communication channel. In a conventional random access method, a conventional communication device (e.g., a transmitter) can send data on a communication channel when it has some data to send. Data transmission does not require a pre-assigned time slot or a fixed frequency. Conventional random access methods are generally divided into coherent methods and non-coherent methods. In a coherent method, the channel state is known to the communication device (i.e., the transmitter and the receiver). In a non-coherent method, it is considered that the channel state is unknown to both the conventional transmitter and the conventional receiver. In an implementation scenario of a random access method, a conventional receiver receives a large number of transmitted messages from multiple conventional transmitters that are active at that point in time. In addition, in a so-called passive setting, the conventional receiver does not know in advance the identity of the conventional transmitter in the active state, because it is assumed that the conventional transmitter is randomly activated in this implementation scenario of the random access method (e.g., a large-scale random access scenario). At present, it has been proposed to perform certain methods in such implementation scenarios of random access methods, such as pilot-based methods and non-coherent modulation. In the pilot-based method, the available channel access is divided into two parts, the first part is dedicated to the non-orthogonal pilot sequences (e.g., columns of a compressed sensing matrix) used at the traditional receiver in order to perform activity detection and channel estimation. The second part is dedicated to typical coherent modulation at the traditional receiver by decoding the channel estimated according to the first part. However, in non-coherent modulation, the entire channel usage set is dedicated to one constellation and is directly decoded at the traditional receiver without using channel knowledge of a specific constellation structure. An example of non-coherent modulation is tensor-based modulation, in which the constellation is generated using a specific structure emitted from a rank 1 tensor. However, the above method exhibits suboptimal performance in terms of the amount of data that can be encoded by each transmitter in the modulation (also known as spectral efficiency) and the number of traditional transmitters (or users) that can be supported, especially for systems using pilot-based methods. Therefore, in the traditional random access method, there are technical problems of insufficient communication reliability and a limited number of transmitters (or users) that can be supported simultaneously.

[0004] Therefore, in view of the above discussion, there is a need to overcome the above-mentioned shortcomings associated with traditional random access methods. Summary of the invention

[0005] The present disclosure provides a transmitting device, a receiving device, a communication apparatus including the transmitting device and the receiving device, and a method for random access communication. The present disclosure provides a solution to the existing problem that, in the conventional random access method, the amount of data that can be encoded by each transmitter in modulation is limited and the number of transmitters (or users) that can be supported simultaneously is limited. The purpose of the present disclosure is to provide a solution that at least partially overcomes the problems encountered in the prior art, and to provide an improved transmitting device, an improved receiving device, an improved communication apparatus including the improved transmitting device and the improved receiving device, and an improved method for random access communication.

[0006] The objects of the present disclosure are achieved by the solutions provided in the attached independent claims. Advantageous implementations of the present disclosure are further defined in the dependent claims.

[0007] In one aspect, the present disclosure provides a transmitting device for random access communication, the transmitting device including a coding circuit, the coding circuit being used to: encode an input message into a first bit sequence and a second bit sequence; split the first bit sequence into d bit blocks, where d>1; determine d vectors based on the d bit blocks. The transmitting device also includes a first mapping circuit, the first mapping circuit being used to construct a first symbol vector by calculating the Kronecker product of the d vectors to generate a d-order rank 1 tensor structure. The transmitting device also includes a second mapping circuit, the second mapping circuit being used to map the second bit sequence to a vector of baseband symbols, and apply an allocation matrix to the vector of baseband symbols to generate a second symbol vector, wherein the allocation matrix is ​​a precoding matrix based on the first bit sequence. The transmitting device also includes: a cascading circuit, being used to cascade the first symbol vector and the second symbol vector into a baseband symbol vector; a modulation circuit, being used to modulate the baseband symbol vector to generate a modulation symbol vector including a modulation symbol; and at least one antenna, being used to send each modulation symbol of the modulation symbol vector in a radio frequency signal to a receiving device.

[0008] The disclosed transmitting device combines tensor-based modulation (TBM) with coherent modulation, thereby showing improved spectral efficiency compared to conventional tensor-based modulation in the case of large symbol sizes. In other words, the transmitting device transmits a portion of the information payload through tensor-based modulation and transmits the remainder of the information payload through coherent modulation. The disclosed transmitting device provides improved spectral efficiency. In addition, the transmitting device can be used in block fading channels as well as non-block fading channels.

[0009] In one implementation, the encoding circuit is used to split an input message into a first message and a second message, encode the first message into a first bit sequence, and encode the second message into a second bit sequence.

[0010] The first bit sequence and the second bit sequence are used to generate a first symbol vector and a second symbol vector respectively through different vector symbol mappers.

[0011] In another implementation, the encoding circuit is used to encode the input message into a main bit sequence, and split the main bit sequence into a first bit sequence and a second bit sequence.

[0012] By splitting the main bit sequence into a first bit sequence and a second bit sequence, different vector symbol mappers may be used to generate a first symbol vector and a second symbol vector, respectively.

[0013] In another implementation, the encoding circuit is used to encode the message using a binary code.

[0014] By encoding the input message according to a binary code, redundancy is added to the input message, which makes the input message robust to noise and different kinds of interference.

[0015] In another implementation, the encoding circuit is to select the precoding matrix from a fixed dictionary comprising matrices, wherein each of the matrices of the fixed dictionary is equal to one of the same unitary matrix, the same unitary matrix multiplied by the same permutation matrix, the same unitary matrix multiplied by a truncated permutation matrix from a set of non-disjoint truncated permutation matrices, a matrix from a set of matrices corresponding to a subspace of a Grassmann space, or a matrix from a set of truncated unitary matrices. In another implementation, the encoding circuit's selection of the precoding matrix is ​​based on the first bit sequence.

[0016] Selecting the precoding matrix from a fixed dictionary reduces the complexity of the decoding process of the receiving device.

[0017] In another implementation, the modulation circuit is further used to map the baseband symbol vector in a time-frequency grid associated with multiple time-frequency resources according to a predefined allocation matrix associated with multi-carrier modulation (e.g., orthogonal frequency-division multiplexing (OFDM) modulation).

[0018] The time-frequency mapping of each element of the first symbol vector enables the receiving device to more accurately estimate and compensate for the timing offset and the carrier frequency offset, thereby obtaining improved communication reliability in a non-block fading channel in a communication system including a transmitting device and a receiving device.

[0019] In another implementation, the first mapping circuit is further configured to multiply each of the d vectors by a unitary matrix before calculating the Kronecker product.

[0020] The use of unitary matrices provides additional degrees of freedom for the design of sub-constellations. In addition, appropriate selection of unitary matrices enables the receiving device to accurately estimate and compensate for timing offset and carrier frequency offset, which further improves communication reliability.

[0021] In another implementation, the second mapping circuit is used to map the second bit sequence to a vector of baseband symbols by quadrature amplitude modulation or phase shift keying modulation or any scalar modulation in the prior art.

[0022] In another implementation, the cascade circuit is further configured to multiply a cascade result of the first symbol vector and the second symbol vector by a permutation matrix to form a baseband symbol vector.

[0023] A concatenated result of the first symbol vector and the second symbol vector is multiplied by a permutation matrix to form a baseband symbol vector, so that a timing offset and a carrier frequency offset are accurately estimated and compensated at a receiving device.

[0024] On the other hand, the present disclosure provides a receiving device for random access communication, the receiving device comprising: at least one antenna for simultaneously receiving multiple radio frequency signals from multiple transmitting devices; and a demodulation circuit for demodulating the received radio frequency signals into demodulated signals. The receiving device also includes a splitting circuit, which is used to split the demodulated signal into a first baseband signal and a second baseband signal. The receiving device also includes a separation circuit, which is used to generate multiple first estimated symbol vectors from the first baseband signal using a d-order rank 1 tensor structure associated with each transmitting device, where d>1, and generate multiple estimated channel parameters associated with the multiple transmitting devices and multiple estimated precoding matrices associated with the multiple transmitting devices based on the first baseband signal. The receiving device also includes an equalization circuit, which is used to generate multiple second estimated symbol vectors from the second baseband signal based on the multiple estimated precoding matrices and the multiple estimated channel parameters. The receiving device also includes a decoding circuit, which is used to decode each of the first estimated symbol vector and the second estimated symbol vector to generate multiple decoded messages, each decoded message includes a first bit sequence corresponding to a first part of the data and a second bit sequence corresponding to a second part of the data, and the second part of the data is associated with a corresponding sending device among the multiple sending devices.

[0025] The receiving device provides improved communication reliability while supporting a large number of users. In addition, the receiving device detects a group of transmitting devices in a plurality of transmitting devices in an active state through a separation circuit and an equalization circuit, and estimates corresponding channels of the group of transmitting devices in an active state in the plurality of transmitting devices. In addition, the equalization circuit is used to demap the coherent modulation used at the transmitting device using a plurality of estimated precoding matrices and a plurality of estimated channel parameters. In addition, the receiving device can be used in block fading channels as well as non-block fading channels.

[0026] In one implementation form, the decoding circuit includes: multiple first decoders, each of which is used to decode one of the first estimated symbol vectors generated by the separation circuit to generate multiple first decoded messages, each of which includes a first bit sequence corresponding to a first part of the data, and the first part of the data is associated with a corresponding transmitting device among multiple transmitting devices; and multiple second decoders, each of which is used to decode one of the second estimated symbol vectors generated by the equalization circuit to generate multiple second decoded messages, each of which includes a second bit sequence corresponding to a second part of the data, and the second part of the data is associated with a corresponding transmitting device among the multiple transmitting devices.

[0027] In another implementation, the decoding circuit includes multiple decoders, each decoder is used to receive one of the first estimated symbol vectors and one of the second estimated symbol vectors, cascade the received first estimated symbol vector and second estimated symbol vector into a cascaded estimated symbol vector, and decode the cascaded estimated symbol vector to generate multiple decoded messages.

[0028] In another implementation, the splitting circuit is further configured to apply a predefined permutation matrix to the demodulated signal to generate a first baseband signal and a second baseband signal.

[0029] In another implementation, the separation circuit is also used to estimate the time offset and frequency offset in each of the first estimated symbol vectors to generate multiple time offsets and multiple frequency offsets, and apply time offset compensation based on the corresponding time offset and frequency offset compensation based on the corresponding frequency offset to the corresponding first estimated symbol vector.

[0030] The estimation of the time offset and the frequency offset enables more accurate compensation for the time offset and the frequency offset in each of the first estimated symbol vectors.

[0031] In addition, the equalization circuit is further configured to generate each of the second estimated symbol vectors based on a plurality of time offsets, a plurality of frequency offsets, a plurality of estimated precoding matrices, and a plurality of estimated channel parameters.

[0032] In yet another aspect, the present disclosure provides a communication apparatus, which includes a transmitting device and a receiving device.

[0033] The communication device realizes all the advantages and technical effects of the sending device and the receiving device of the present disclosure.

[0034] On the other hand, the present disclosure provides a method for random access communication. The method includes a coding circuit of a transmitting device acquiring an input message, and the coding circuit encoding the input message into a first bit sequence and a second bit sequence. The method also includes: the coding circuit splits the first bit sequence into d bit blocks, where d>1; the coding circuit determines d vectors based on the d bit blocks. The method also includes a first mapping circuit of the transmitting device constructing a first symbol vector by calculating the Kronecker product of d vectors to generate a d-order rank 1 tensor structure, and a second mapping circuit of the transmitting device mapping the second bit sequence to a vector of baseband symbols. The method also includes: the second mapping circuit applies an allocation matrix to the vector of baseband symbols to generate a second symbol vector, wherein the allocation matrix is ​​a precoding matrix based on the first bit sequence; and the cascade circuit of the transmitting device cascades the first symbol vector and the second symbol vector into a baseband symbol vector. The method also includes: the modulation circuit of the transmitting device modulates the baseband symbol vector to generate a modulation symbol vector containing modulation symbols; and at least one antenna of the transmitting device sends each modulation symbol of the modulation symbol vector in the radio frequency signal to the receiving device.

[0035] The method realizes all the advantages and technical effects of the sending device of the present disclosure.

[0036] On the other hand, the present disclosure provides a method for random access communication. The method includes: at least one antenna of a receiving device simultaneously receives multiple radio frequency signals from multiple transmitting devices; a demodulation circuit of the receiving device demodulates the received radio frequency signal into a demodulated signal; and a splitting circuit of the receiving device uses a d-order rank 1 tensor structure associated with each transmitting device to split the demodulated signal into a first baseband signal and a second baseband signal, where d>1. The method also includes: the separation circuit generates multiple estimated channel parameters associated with multiple transmitting devices and multiple estimated precoding matrices associated with multiple transmitting devices based on the first baseband signal, and the equalization circuit of the receiving device estimates multiple second estimated symbol vectors from the second baseband signal based on the multiple estimated precoding matrices and the multiple estimated channel parameters; and the decoding circuit decodes each of the first estimated symbol vector and the second estimated symbol vector to generate multiple decoded messages, each decoded message including a first bit sequence corresponding to a first part of the data and a second bit sequence corresponding to a second part of the data, and the second part of the data is associated with a corresponding transmitting device among the multiple transmitting devices.

[0037] The method realizes all the advantages and technical effects of the receiving device disclosed in the present invention.

[0038] In yet another aspect, the present disclosure provides a computer program product comprising program instructions that, when executed by one or more processors in a computer system, perform a method for random access communications.

[0039] In yet another aspect, the present disclosure provides a computer system comprising one or more processors and one or more memories, wherein the one or more memories store program instructions that, when executed by the one or more processors, cause the one or more processors to perform a method for random access communication.

[0040] After executing the method for random access communication, one or more processors of the computer system achieve all advantages and technical effects of the method.

[0041] It should be appreciated that all of the above implementations may be combined.

[0042] It should be noted that all equipment, elements, circuits, units and devices described in this application can be implemented in software or hardware elements or any type of combination thereof. All steps performed by various entities described in this application and the described functions to be performed by various entities are intended to indicate that the corresponding entities are suitable for or used to perform the corresponding steps and functions. Although in the description of the following specific embodiments, the specific functions or steps to be performed by the external entity are not reflected in the description of the specific detailed elements of the entity performing the specific steps or functions, it should be clear to the technician that these methods and functions can be implemented in the corresponding software or hardware elements or any type of combination thereof. It should be understood that the features of the present disclosure are easy to be combined in various combinations without departing from the scope of the present disclosure defined by the appended claims.

[0043] Other aspects, advantages, features and objects of the present disclosure will become apparent from the accompanying drawings and detailed description of illustrative implementations interpreted in conjunction with the following appended claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] The above summary of the invention and the detailed description of the following illustrative embodiments can be better understood by reading in conjunction with the accompanying drawings. In order to illustrate the present disclosure, exemplary structures of the present disclosure are shown in the accompanying drawings. However, the present disclosure is not limited to the specific methods and tools disclosed herein. In addition, it should be understood by those skilled in the art that the accompanying drawings are not drawn to scale. Where possible, the same elements are represented by the same numbers.

[0045] Embodiments of the present disclosure will now be described by way of example only with reference to the following drawings, in which:

[0046] Figure 1 is a network environment diagram of a system having multiple sending devices and one receiving device according to an embodiment of the present disclosure;

[0047] Figure 2A is a block diagram illustrating various exemplary components of a transmitting device according to an embodiment of the present disclosure;

[0048] Figure 2B is a block diagram showing various exemplary components of a transmitting device according to another embodiment of the present disclosure;

[0049] Figure 2C is a block diagram showing various exemplary components of a transmitting device according to yet another embodiment of the present disclosure;

[0050] Figure 3 is a diagram of a time-frequency mapping of a modulation symbol vector in a time-frequency grid according to an embodiment of the present disclosure;

[0051] Figure 4 is a flow chart of a method for random access communication according to an embodiment of the present disclosure;

[0052] Figure 5 is a block diagram illustrating various exemplary components of a receiving device according to an embodiment of the present disclosure;

[0053] Figure 6 is a diagram of a receiving device of an embodiment of the present disclosure;

[0054] Figure 7 is a diagram of a separation circuit of a receiving device of an embodiment of the present disclosure;

[0055] Figure 8 is a diagram of an equalization circuit of a receiving device according to an embodiment of the present disclosure;

[0056] Fig. 9 is another diagram of a receiving device according to another embodiment of the present disclosure;

[0057] Fig. 10A and 10B Flowcharts of methods for random access communication according to embodiments of the present disclosure;

[0058] Fig.11 is a block diagram showing various exemplary components of a communication device according to an embodiment of the present disclosure;

[0059] Fig.12 is a graphical representation of an embodiment of the present disclosure, which shows the variation of block error rate (BLER) relative to signal-to-noise ratio (SNR) for tensor-based hybrid modulation and coherent modulation and typical tensor-based modulation in the case of large payload.

[0060] In the drawings, underlined numbers are used to indicate the item in which the underlined number is located or the item adjacent to the underlined number. Non-underlined numbers are associated with the item identified by the line associating the non-underlined number with the item. When a number is not underlined and has an associated arrow, the non-underlined number is used to identify the general item to which the arrow points. DETAILED DESCRIPTION

[0061] The following detailed description describes embodiments of the present disclosure and ways in which these embodiments can be implemented. Although some modes of implementing the present disclosure have been disclosed, those skilled in the art will recognize that there may be other embodiments for implementing or practicing the present disclosure.

[0062] Figure 1 FIG. 1 is a network environment diagram of a system having multiple sending devices and one receiving device according to an embodiment of the present disclosure. Figure 1 , shows a network environment of a system 100 including a plurality of transmitting devices 102 and a receiving device 104. Also shown is a communication network 106. The plurality of transmitting devices 102 include K transmitting devices, such as a first transmitting device 102A, a second transmitting device 102B, and up to a Kth transmitting device 102K.

[0063] Each of the plurality of transmitting devices 102 may include suitable logic, circuitry, interfaces, and / or code for communicating with the receiving device 104 via the communication network 106 (e.g., a propagation channel). Examples of each of the plurality of transmitting devices 102 may include, but are not limited to, an internet-of-things (IoT) device, a smartphone, a machine type communication (MTC) device, a computing device, an evolved universal mobile telecommunications system (UMTS) terrestrial radio access (E-UTRAN) NR-dual connectivity (EN-DC) device, a server, an IoT controller, a drone, custom hardware for wireless communication, a transmitter, or any other portable or non-portable electronic device. In the system 100, each of the plurality of transmitting devices 102 has a single antenna for communicating with the receiving device 104. However, in another implementation of the system 100, each of the plurality of transmitting devices 102 may have more than one antenna for communicating with the receiving device 104.

[0064] The receiving device 104 may include suitable logic, circuitry, interfaces and / or code for simultaneously receiving one or more radio frequency signals from multiple transmitting devices 102 via the communication network 106. Examples of the receiving device 104 may include, but are not limited to, an IoT controller, a base station, a server, a smartphone, custom hardware for wireless communication, a receiver, or any other portable or non-portable electronic device. In the system 100, the receiving device 104 has more than one antenna for communicating with the multiple transmitting devices 102.

[0065] The communication network 106 includes a medium (e.g., a communication channel) through which multiple transmitting devices 102 potentially communicate with the receiving device 104. Examples of the communication network 106 may include, but are not limited to, a cellular network (e.g., 2G, 3G, long-term evolution (LTE) 4G, 5G or 5G NR network, such as a sub 6GHz, cmWave or mmWave communication network), a wireless sensor network (WSN), a cloud network, a local area network (LAN), a vehicle-to-network (V2N) network, a metropolitan area network (MAN), and / or the Internet. Each of the multiple transmitting devices 102 in the network environment is used to connect to the receiving device 104 according to various wireless communication protocols. Examples of such wireless communication protocols, communication standards and techniques may include, but are not limited to, IEEE 802.11, 802.11p, 802.15, 802.16, 1609, worldwide interoperability for microwave access (Wi-MAX), transmission control protocol and Internet protocol (TCP / IP), user datagram protocol (UDP), hypertext transfer protocol (HTTP), long-term evolution (LTE), file transfer protocol (FTP), enhanced data GSM environment (EDGE), voice over Internet protocol (VoIP), email, instant messaging and / or short message service (SMS) protocols, and / or other cellular or IoT communication protocols.

[0066] In addition, a random number of the plurality of transmitting devices 102 may be simultaneously active and may be used to simultaneously transmit a plurality of radio frequency signals to the receiving device 104 via the communication network 106. Therefore, the system 100 may also be referred to as an exemplary implementation of massive random access communication, in which the plurality of transmitting devices 102 simultaneously transmit a plurality of radio frequency signals to the receiving device 104. Furthermore, each of the plurality of transmitting devices 102 simultaneously transmits a plurality of radio frequency signals to the receiving device 104 without any prior resource request (or grant).

[0067] Furthermore, in one implementation of the system 100, the communication network 106 may be used as a block fading channel between the plurality of transmitting devices 102 and the receiving device 104. In other words, the plurality of transmitting devices 102 and the receiving device 104 are considered to be completely synchronized with each other, and therefore, there is no timing offset and carrier frequency offset in the system 100. In another implementation of the system 100, there is no block fading channel between the plurality of transmitting devices 102 and the receiving device 104, and therefore, there is a timing offset and a carrier frequency offset at the plurality of transmitting devices 102, and the timing offset and the carrier frequency offset need to be compensated at the receiving device 104, so as to reduce the decoding error probability and obtain sufficient communication reliability in the system 100.

[0068] Figure 2A is a block diagram illustrating various exemplary components of a transmitting device according to an embodiment of the present disclosure. Figure 2A is a combination of Figure 1 Reference Figure 2A , a block diagram 200A of a transmitting device 202 is shown, which includes a coding circuit 204, a first mapping circuit 206, a second mapping circuit 208, a cascade circuit 210, a modulation circuit 211, an antenna 212, a processor 214, and a memory 216. In this implementation, the processor 214 and the memory 216 are separated. In another implementation, the memory 216 can be a part of the processor 214, such as a first-level cache memory.

[0069] In addition, in one implementation, the encoding circuit 204, the first mapping circuit 206, the second mapping circuit 208, the cascade circuit 210, and the modulation circuit 211 may be part of the processor 214. In another implementation, each of the encoding circuit 204, the first mapping circuit 206, the second mapping circuit 208, the cascade circuit 210, and the modulation circuit 211 is an independent circuit or module (which may not be part of the processor 214). The encoding circuit 204, the first mapping circuit 206, the second mapping circuit 208, the cascade circuit 210, and the modulation circuit 211 are communicatively coupled with the antenna 212, the processor 214, and the memory 216. In the present embodiment, the transmitting device 202 includes a single antenna, such as the antenna 212. However, in other embodiments, the transmitting device 202 may include multiple antennas.

[0070] The sending device 202 corresponds to ( Figure 1 The sending device 202 may be used to communicate with one of the multiple sending devices 102, for example, the Kth sending device 102K. Figure 1 ) receiving device 104 communicates.

[0071] The encoding circuit 204 may include suitable logic, circuits and / or interfaces for obtaining an input message and encoding the input message into a first bit sequence and a second bit sequence. In one implementation, the encoding circuit 204 may be a binary encoder. The encoding circuit 204 may be, for example, Figure 2B and 2C Described in detail in .

[0072] The first mapping circuit 206 may comprise suitable logic, circuitry, and / or interfaces for constructing a first symbol vector by computing the Kronecker product of d vectors to generate a rank-1 tensor structure of order d.

[0073] The second mapping circuit 208 may comprise suitable logic, circuitry, and / or interfaces for mapping the second bit sequence to a vector of baseband symbols.

[0074] The concatenation circuit 210 may comprise suitable logic, circuitry, and / or interfaces that may be operable to concatenate the first symbol vector and the second symbol vector into a baseband symbol vector.

[0075] The modulation circuitry 211 may comprise suitable logic, circuitry, and / or interfaces that may be operable to generate a modulation symbol vector comprising modulation symbols.

[0076] Antenna 212 may include a Figure 1The antenna 212 may include, but is not limited to, an RF transceiver, a network interface, a telematics unit, or any antenna suitable for use in an IoT device, an IoT controller, a user device, a repeater, a base station, or other portable or non-portable communication device. The antenna 212 may communicate wirelessly via various wireless communication protocols.

[0077] The processor 214 may include suitable logic, circuitry, and / or interfaces for executing instructions stored in the memory 216. Examples of the processor 214 may include, but are not limited to, an integrated circuit, a coprocessor, a microprocessor, a microcontroller, a complex instruction set computing (CISC) processor, an application-specific integrated circuit (ASIC) processor, a reduced instruction set (RISC) processor, a very long instruction word (VLIW) processor, a central processing unit (CPU), a state machine, a data processing unit, and other processors or circuits. In addition, the processor 214 may refer to one or more separate processors, processing devices, and processing units as part of a machine.

[0078] The memory 216 may include suitable logic, circuitry, and / or interfaces for storing machine code and / or instructions executable by the processor 214. The memory 216 may temporarily store one or more modulation symbol vectors, which are then transmitted by the antenna 212 to the receiving device 104 in the form of one or more radio frequency signals. Implementation examples of the memory 216 may include, but are not limited to, electrically erasable programmable read-only memory (EEPROM), random access memory (RAM), read only memory (ROM), hard disk drive (HDD), flash memory, secure digital (SD) card, solid-state drive (SSD), computer-readable storage media, and / or CPU cache memory. The memory 216 may store an operating system and / or a computer program product to operate the sending device 202. Computer-readable storage media for providing non-transitory memory may include, but are not limited to, electronic storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination of the above devices.

[0079] Figure 2B is a block diagram illustrating various exemplary components of a transmitting device according to another embodiment of the present disclosure. Figure 2B is a combination of Figure 1 and 2A Reference Figure 2B , a block diagram of the sending device 202 is shown.

[0080] In operation, the sending device 202 is used to communicate with ( Figure 1The receiving device 104 of the transmitting device 202 performs random access communication. The transmitting device 202 includes a coding circuit 204 for encoding an input message into a first bit sequence and a second bit sequence. In one implementation, the coding circuit 204 of the transmitting device 202 is used to obtain an input message, such as a binary message m of B bits. In response to obtaining the input message (e.g., a binary message, m=1010001), the transmitting device 202 outputs a modulation symbol vector v of dimension T, where T is the number of times the channel is used. In addition, the coding circuit 204 is used to encode the input message (i.e., the binary message, m=1010001) into a first bit sequence and a second bit sequence. In one implementation, the coding circuit 204 can be used to split the input message (i.e., the binary message, m=1010001) into a first message and a second message, and then encode the first message into a first bit sequence and encode the second message into a second bit sequence, such as Figure 2B In another implementation, the encoding circuit 204 may be used to encode the input message (ie, binary message, m=1010001) into a primary bit sequence, and split the primary bit sequence into a first bit sequence and a second bit sequence, for example, Figure 2C Described in detail in.

[0081] According to an embodiment, the encoding circuit 204 is used to split the input message into a first message and a second message, encode the first message into a first bit sequence, and encode the second message into a second bit sequence. Figure 2B As shown in FIG. 1 , the encoding circuit 204 is used to split the input message (i.e., binary message, m=1010001) into a first message (also represented as m1, where m1=101) and a second message (also represented as m2, where m2=0001). The first message (i.e., m1=101) and the second message (i.e., m2=0001) have B p and B q bits, so the B of the input message (i.e., binary message, m=1010001) p +B q = B bits. Thereafter, the encoding circuit 204 is used to encode the first message (i.e., m1=101) into a first bit sequence (also denoted as μ1), and encode the second message (i.e., m2=0001) into a second bit sequence (also denoted as μ2). The number of coded bits of the first bit sequence (i.e., μ1) and the second bit sequence (i.e., μ2) are B′ respectively. p and B′ q .

[0082] According to an embodiment, the encoding circuit 204 is used to encode the message using a binary code. In one implementation, the encoding circuit 204 can be used to encode the first message (i.e., m1=101) and the second message (i.e., m2=0001) into a first bit sequence (i.e., μ1) and a second bit sequence (i.e., μ2) respectively through a binary code (e.g., a source code, a channel code, etc.). The channel code may include a low-density parity check (LDPC) code, a turbo code, a Viterbi code, etc.

[0083] The encoding circuit 204 of the transmitting device 202 is also used to split the first bit sequence into d bit blocks, where d>1, and determine d vectors based on the d bit blocks. In addition, the encoding circuit 204 is used to split the first bit sequence (i.e., μ1) into d blocks, where d is an arbitrary number and is greater than 1. For example, in one case, the first bit sequence (i.e., μ1) can have 11 bits, such as 00110101011, and the first bit sequence (i.e., μ1) is split into d blocks in a certain manner, so that the first block has three bits (e.g., μ′1=001), the second block has three bits (e.g., μ′2=101), the third block has three bits (e.g., μ′3=010), and the fourth block has the last two bits (e.g., μ′4=11). In this way, the first bit sequence (i.e., μ1) is split into four blocks. Thereafter, the encoding circuit 204 is used to determine d vectors based on the d bit blocks. In the above case, d is equal to 4, and the encoding circuit 204 is used to determine 4 vectors. The first block (i.e., μ′1=001) is used to generate the first vector (also represented as x1). Similarly, the second block (i.e., μ′2=101), the third block (i.e., μ′3=010), and the fourth block (i.e., μ′4=11) are used to generate the second vector (also represented as x2), the third vector (also represented as x3), and the fourth vector (also represented as x4), respectively. Similarly, the dth block (e.g., μ′ d ) is used to generate the dth vector (also represented as x d The generated d vectors (i.e., x1, x2, ..., x d ) is p i dimensional vector, and the generated d vectors (i.e., x1, x2, ..., x d ) corresponds to a plurality of sub-constellations (i.e., C1, C2, ..., C d ). Generating d vectors based on d bit blocks may also be referred to as vector symbol mapping, and therefore, the encoding circuit 204 may also be referred to as a vector symbol mapper circuit.

[0084] The first mapping circuit 206 is used to construct a first symbol vector by calculating the Kronecker product of d vectors to generate a d-order rank 1 tensor structure. The first mapping circuit 206 is used to construct a first symbol vector by calculating the Kronecker product of d vectors (ie, x1, x2, ..., x d ) to construct the first symbol vector to generate a rank 1 tensor structure of order d. The Kronecker product is a form of matrix multiplication, using the mathematical symbol The Kronecker product is also called the tensor product (or direct product). Using the Kronecker product is beneficial because the dimensions of the matrices that are multiplied based on the Kronecker product do not need to have any relationship to each other. d ) is expressed as The constructed first symbol vector has a multi-dimensional data structure. In addition, the constructed first symbol vector carries the same information as the input message (i.e., binary message, m) obtained by the encoding circuit 204. The constructed first symbol vector can also be called a d-order rank l tensor structure, which means that the constructed first symbol vector can be understood as a d-dimensional array of real numbers and complex numbers. The d-dimensional array of real numbers or complex numbers has corresponding dimensions p1…p d (which can be represented as a tensor of order "d" and size "p1×...×p d ″) The tensor structure contains The numbers can also be stored sequentially (in a predefined order) in a Any possible representation is The tensor structure of x1…x is often called the rank-1 tensor structure, where “x1…x d " refers to the corresponding dimensions p1...p d In the case where the tensor structure can be represented as the sum of at least n vectors, the tensor structure can be considered as a rank n tensor. Using the Kronecker product is advantageous because the Kronecker product forms a definite and fixed tensor structure (i.e., a definite multidimensional data structure) of the first symbol vector, which simplifies the waveform design for random access communication.

[0085] The second mapping circuit 208 is used to map the second bit sequence to a vector of baseband symbols and apply the allocation matrix to the vector of baseband symbols to generate a second symbol vector, wherein the allocation matrix is ​​a precoding matrix based on the first bit sequence. The second mapping circuit 208 is used to map the second bit sequence (i.e., μ2) to a vector of baseband symbols of dimension q (which can also be expressed as ). Therefore, the second mapping circuit 208 can also be called a coherent vector symbol mapper. In addition, the second mapping circuit 208 is used to apply an allocation matrix (also represented by U) to a vector of baseband symbols (i.e., a) to generate a second symbol vector (also referred to as Ua). The allocation matrix (i.e., U) is also called a precoding matrix, which is determined based on a first bit sequence (i.e., μ1) using a precoder selection. The first bit sequence (i.e., μ1) is used to determine a (Tp)×q-dimensional matrix corresponding to a fixed dictionary The μ1th matrix in The first bit sequence (i.e., μ1) and its integer represent the Confusion between.

[0086] According to one embodiment, the second mapping circuit 208 is used to map the second bit sequence to a vector of baseband symbols by quadrature amplitude modulation or phase shift keying modulation. In one implementation, the second mapping circuit 208 can be used to map the second bit sequence (i.e., μ2) to a vector of baseband symbols (i.e., a) by quadrature amplitude modulation (QAM). In other words, each scalar element of the vector of modulation symbols (i.e., a) is generated using QAM symbols. In another implementation, the second mapping circuit 208 can be used to map the second bit sequence (i.e., μ2) to a vector of baseband symbols (i.e., a) by phase shift keying (PSK) modulation. In other words, each scalar element of the vector of baseband symbols (i.e., a) is generated using PSK symbols.

[0087] According to an embodiment, the encoding circuit 204 is configured to select the precoding matrix from a fixed dictionary comprising matrices, wherein each of the matrices of the fixed dictionary is equal to one of the same unitary matrix, the same unitary matrix multiplied by the same permutation matrix, the same unitary matrix multiplied by a truncated permutation matrix from a set of non-disjoint truncated permutation matrices, a matrix from a set of matrices corresponding to a subspace of the Grassmann space, or a matrix from a set of truncated unitary matrices. The encoding circuit 204 is configured to select the precoding matrix from the fixed dictionary In one implementation, the fixed dictionary includes a plurality of matrices. Each of the matrices can be the same unitary matrix (also denoted as V), so the fixed dictionary Therefore, in the case of multiple transmitters, each transmitter uses the same unitary matrix (ie, V). In another implementation, the fixed dictionary Each of the matrices in can be the same unitary matrix (ie, V) multiplied by the same permutation matrix (also denoted as Π), so the fixed dictionary In yet another implementation, the fixed dictionary Each of the matrices can be the same unitary matrix (ie, V) multiplied by a disjoint truncated permutation matrix (also denoted as Π i ), which means that for any i≠j, Therefore, the fixed dictionary In yet another implementation, the fixed dictionary Each of the matrices can be the same unitary matrix (ie, V) multiplied by a non-disjoint truncated permutation matrix (ie, Π i ), so the fixed dictionary In yet another implementation, the fixed dictionary Each of the matrices of may be a matrix from a set of matrices corresponding to a subspace of the Grassmann space. Each matrix may have dimension q in a space of dimension (Tp). In yet another implementation, the fixed dictionary Each of the matrices of may be a matrix from a set of truncated unitary matrices. Examples of a set of truncated unitary matrices may include, but are not limited to, a composite of Givens rotations, a Fourier matrix, a normalized Hadamard matrix, a cascaded Gabo matrix, a r Matrix of the framework, etc.

[0088] The cascade circuit 210 is used to cascade the first symbol vector and the second symbol vector into a baseband symbol vector. The cascade circuit 210 is used to cascade the first symbol vector (ie, ) is multiplied by the second symbol vector (ie, Ua) to generate a baseband symbol vector (also denoted as v) according to equation (1). The baseband symbol vector (ie, v) may also be referred to as a transmit symbol vector.

[0089]

[0090] The modulation circuit 211 is used to modulate the baseband symbol vector to generate a modulation symbol vector including modulation symbols.

[0091] The antenna 212 is used to transmit each modulation symbol of the modulation symbol vector in the radio frequency signal to the receiving device 104. The radio frequency signal refers to the electromagnetic wave used to transmit each modulation symbol of the modulation symbol vector (i.e., v) in the air. Each modulation symbol of the modulation symbol vector (i.e., v) is linearly mapped to a corresponding signal frequency so as to modulate the modulation symbol vector in the radio frequency signal (e.g., carrier wave) to be transmitted to the receiving device 104. Figure 1 ) receiving device 104.

[0092] According to one embodiment, the modulation circuit 211 is also used to map the baseband symbol vector in a time-frequency grid associated with multiple time-frequency resources according to a predefined allocation matrix. In one implementation of the system 100, there may be no block fading channel between the transmitting device 202 and the receiving device 104. In other words, the transmitting device 202 (or multiple transmitting devices 102) and the receiving device 104 may not be completely synchronized with each other. Therefore, timing offset and carrier frequency offset will occur during data transmission from the transmitting device 202 to the receiving device 104, and the timing offset and carrier frequency offset need to be compensated at the receiving device 104. In this implementation, it is necessary to perform time-frequency mapping at the transmitting device 202, and it is also necessary to perform corresponding time-frequency demapping at the receiving device 104, and estimate and compensate for the time offset and carrier frequency offset. The modulation circuit 211 is used to map the baseband symbol vector in a time-frequency grid of OFDM modulation having F frequency subcarriers and S time symbols, for example Figure 3 At each transmitting device (e.g., transmitting device 202), the frequency domain signal representation of each element of the mapped first symbol vector having N subcarriers undergoes an inverse discrete Fourier transform (IDFT) to form N time domain samples. In addition, to avoid any inter-symbol interference, the length N CP The cyclic prefix (CP) of the samples is added to each OFDM symbol (i.e., N time domain samples) at the transmitting device 202 by a "cyclic prefix" module. The resulting signal is then converted to the analog domain using a digital-to-analog converter, and the converted signal is further up-converted to radio frequency and amplified by an up-conversion and power amplification module, which is not shown here for simplicity.

[0093] According to an embodiment, the first mapping circuit 206 is further configured to multiply each of the d vectors by a unitary matrix before calculating the Kronecker product. In one implementation, the first mapping circuit 206 is configured to multiply each of the d vectors (i.e., x) by a unitary matrix before calculating the Kronecker product. 1，k , …, x d，k ) is multiplied by a unitary matrix. The unitary matrix provides additional degrees of freedom for the design of the sub-constellation. Specifically, the use of the structured sub-constellation in combination with the unitary matrix can reduce the complexity at the receiving device 104 and improve the performance in estimating and compensating the timing offset and the carrier frequency offset.

[0094] According to one embodiment, the cascade circuit 210 is further configured to multiply the cascade result of the first symbol vector and the second symbol vector by a permutation matrix to form a baseband symbol vector. ) and the concatenation result of the second symbol vector (ie, Ua) is multiplied by the permutation matrix to form a baseband symbol vector (ie, v). In one case, the concatenation circuit 210 is configured to pass a predefined permutation matrix (ie, ) parameterizes the baseband symbol vector (i.e., v) to map the baseband symbol vector (i.e., v) in the time-frequency grid.

[0095]

[0096] The predefined permutation matrix (i.e., A) can be viewed as mapping the modulation symbol vector onto the time-frequency grid. a way.

[0097] Therefore, the transmitting device 202 provides improved communication reliability and supports a large number of users at the same time. In addition, the transmitting device 202 combines tensor-based modulation (TBM) with coherent modulation, and therefore, in the case of large bandwidth, shows improved spectral efficiency compared to traditional tensor-based modulation. In other words, the transmitting device 202 transmits a portion of the information payload by tensor-based modulation, and transmits the rest of the information payload by coherent modulation. In addition, the transmitting device 202 can be used in block fading channels and non-block fading channels. Since the cascade circuit 210 and the modulation circuit 211 of the transmitting device 202 include a time-frequency mapping between the elements of the first symbol vector and the physical resources used, this further enables accurate estimation and compensation of timing offset and carrier frequency offset at the receiving device 104 in a non-block fading channel, and therefore, improved communication reliability is obtained in a communication system including the transmitting device 202 and the receiving device 104. In addition, the transmitting device 202 implements an improved waveform design for large-scale random access communication, which has a reduced decoding error probability and improved spectral efficiency.

[0098] Figure 2C is a block diagram showing various exemplary components of a transmitting device according to yet another embodiment of the present disclosure. Figure 2C is a combination of Figure 1 , 2A and 2B. Figure 2C , a block diagram of the sending device 202 is shown.

[0099] The block diagram of the transmitting device 202 corresponds to ( Figure 2B) is a block diagram of a sending device 202, except that the encoding circuit 204 is used to directly apply the binary code to the input message (i.e., the binary message, m=1010001) and output the main bit sequence (which can also be expressed as μ), without splitting the input message (i.e., the binary message, m=1010001) into a first message (i.e., m1=101) and a second message (i.e., m2=0001), and then respectively encoding the first message and the second message.

[0100] According to an embodiment, the encoding circuit 204 is used to encode the input message into a main bit sequence, and split the main bit sequence into a first bit sequence and a second bit sequence. In the block diagram of the transmitting device 202, it is shown that the encoding circuit 204 is used to directly encode the input message (i.e., binary message, m=1010001) into a main bit sequence (i.e., μ) through a binary code. In addition, the encoding circuit 204 is used to split the main bit sequence (i.e., μ) into a first bit sequence (i.e., μ1) and a second bit sequence (i.e., μ2).

[0101] Figure 3 is a diagram of the time-frequency mapping of a modulation symbol vector in a time-frequency grid of an embodiment of the present disclosure. Figure 3 is a combination of Figure 1 , 2A , 2B and 2C. Figure 3 , a time-frequency grid 300 representing a plurality of time-frequency resources is shown. The time-frequency grid 300 includes an X-axis 302 and a Y-axis 304. The X-axis 302 represents a time domain representation, and the Y-axis 304 represents a frequency domain representation.

[0102] The modulation circuit 211 of the transmitting device 202 is used to map the baseband symbol vector (ie, v k ). A plurality of time-frequency resources of the time-frequency grid 300 are defined according to a predefined allocation matrix, wherein the baseband symbol vector (ie, v k ) is mapped to one of the time-frequency resources of the time-frequency grid 300. For example, a complex value (i.e., v k (s, f)) corresponds to the baseband symbol vector (i.e., v k ) is an element sent at the sth time resource and the fth frequency resource. Therefore, the baseband symbol vector (i.e., v k ) can also be called SF-dimensional vector. In order to be consistent with the vectorization operation related to the tensor structure, the SF-dimensional vector can be represented as the column-major vectorization of the time-frequency matrix, as depicted in equation (3).

[0103]

[0104] Figure 4The present invention is a flowchart of a method for random access communication according to an embodiment of the present invention. Figure 4 is a combination of Figure 1 , 2A , 2B, 2C and 3 are described. Figure 4 , showing a method 400 including steps 402 to 418. The method 400 is composed of ( Figure 1 2 or by each of the multiple sending devices 102 (of FIG. 2 ) or by the sending device 202 (of FIG. 2 ).

[0105] A method 400 is provided for random access communication, wherein a random number of multiple transmitting devices 102 (or transmitting devices 202) can be simultaneously active and can be used to simultaneously transmit multiple radio frequency signals to a receiving device 104 without any prior resource request (or grant). In addition, the method 400 is applicable to two implementation scenarios, the first of which is when a block fading channel exists between each of the multiple transmitting devices 102 (or transmitting devices 202) and the receiving device 104, and the second of which is when a block fading channel does not exist between each of the multiple transmitting devices 102 (or transmitting devices 202) and the receiving device 104. In the first implementation scenario, each of the multiple transmitting devices 102 (or transmitting devices 202) and the receiving device 104 are completely synchronized with each other, so that in a system (e.g., Figure 1 In the second implementation scenario, each of the multiple transmitting devices 102 (or the transmitting device 202) and the receiving device 104 are not completely synchronized with each other, so a timing offset and a carrier frequency offset may occur during transmission from each of the multiple transmitting devices 102 (or the transmitting device 202) to the receiving device 104, and the timing offset and the carrier frequency offset need to be compensated at the receiving device 104.

[0106] At step 402, the method 400 includes the encoding circuit 204 of the transmitting device 202 obtaining an input message. In one implementation, the input message corresponds to a binary message including a certain number of bits.

[0107] At step 404, the method 400 further includes the encoding circuit 204 encoding the input message into the first bit sequence and the second bit sequence. The input message obtained by the encoding circuit 204 is also encoded into the first bit sequence and the second bit sequence by a binary encoder or a polar encoder.

[0108] According to an embodiment, the encoding circuit 204 performs encoding including splitting the input message into a first message and a second message, encoding the first message into a first bit sequence, and encoding the second message into a second bit sequence. In one implementation, the encoding circuit 204 is used to split the input message into a first message and a second message, and then respectively encode the first message into a first bit sequence and encode the second message into a second bit sequence, for example Figure 2B Described in detail in.

[0109] According to an embodiment, the encoding circuit 204 performs encoding including encoding the input message into a main bit sequence, and splitting the main bit sequence into a first bit sequence and a second bit sequence. In another implementation, the encoding circuit 204 is used to encode the input message into a main bit sequence, and split the main bit sequence into a first bit sequence and a second bit sequence, for example, Figure 2C Described in detail in.

[0110] According to an embodiment, the encoding circuit 204 uses a binary code for encoding. The encoding circuit 204 is used to encode the input message using a binary code, such as a super three code, a gray code, a reflection code, a sequential code, etc.

[0111] At step 406 , the method 400 further includes the encoding circuit 204 dividing the first bit sequence into d bit blocks, where d>1. The first bit sequence is divided into d bit blocks, where d is an arbitrary number and is greater than 1.

[0112] At step 408, the method 400 further includes the encoding circuit 204 determining d vectors based on the d bit blocks. The d bit blocks are further encoded into d vectors based on the number of bits in each of the d blocks.

[0113] At step 410, the method 400 also includes the first mapping circuit 206 of the transmitting device 202 constructing a first symbol vector by calculating the Kronecker product of the d vectors to generate a d-order rank 1 tensor structure. The first mapping circuit 206 is used to construct a first symbol vector by calculating the Kronecker product of the d vectors obtained from the d bit blocks to generate a d-order rank 1 tensor structure. The constructed first symbol vector can also be called a d-order rank 1 tensor structure, which means that the constructed first symbol vector can be understood as a d-dimensional array of real numbers and complex numbers.

[0114] At step 412, the method 400 further includes the second mapping circuit 208 of the transmitting device 202 mapping the second bit sequence to the vector of baseband symbols. The second mapping circuit 208 is configured to map the second bit sequence to the vector of baseband symbols of dimension q using coherent modulation.

[0115] According to one embodiment, the second mapping circuit 208 maps the second bit sequence to a vector of baseband symbols including using quadrature amplitude modulation or phase shift keying modulation. In one implementation, the second mapping circuit 208 can be used to map the second bit sequence to a vector of baseband symbols by quadrature amplitude modulation (QAM). In other words, each scalar element of the vector of baseband symbols is generated using QAM symbols. In another implementation, the second mapping circuit 208 can be used to map the second bit sequence to a vector of baseband symbols by phase shift keying (PSK) modulation. In other words, each scalar element of the vector of baseband symbols is generated using PSK symbols.

[0116] At step 414, the method 400 also includes the second mapping circuit 208 applying the allocation matrix to the vector of baseband symbols to generate a second symbol vector, wherein the allocation matrix is ​​a precoding matrix based on the first bit sequence. The second mapping circuit 208 is used to apply the allocation matrix to the vector of baseband symbols to generate the second symbol vector. The allocation matrix is ​​also called a precoding matrix, which is determined based on the first bit sequence using the precoder selection.

[0117] According to an embodiment, the encoding circuit 204 performs encoding including selecting a precoding matrix from a fixed dictionary including matrices, wherein each of the matrices of the fixed dictionary is equal to the same unitary matrix, the same unitary matrix multiplied by the same permutation matrix, the same unitary matrix multiplied by a truncated permutation matrix from a set of non-disjoint truncated permutation matrices, a matrix from a set of matrices corresponding to a subspace of the Grassmann space, or one of the matrices from a set of truncated unitary matrices. The encoding circuit 204 is used to select the precoding matrix from the fixed dictionary, wherein the fixed dictionary includes a plurality of matrices. In one implementation, each of the matrices of the fixed dictionary may be the same unitary matrix multiplied by the same permutation matrix. In yet another implementation, each of the matrices of the fixed dictionary may be the same unitary matrix multiplied by a disjoint truncated permutation matrix. In yet another implementation, each of the matrices of the fixed dictionary may be the same unitary matrix multiplied by a non-disjoint truncated permutation matrix. In yet another implementation, each of the matrices of the fixed dictionary may be a matrix from a set of matrices corresponding to a subspace of the Grassmann space. In yet another implementation, each of the matrices of the fixed dictionary may be a matrix from a set of truncated unitary matrices. |

[0118] At step 416, the method 400 further includes the concatenation circuit 210 of the transmitting device 202 concatenating the first symbol vector and the second symbol vector into a baseband symbol vector. The concatenation circuit 210 is configured to concatenate the first symbol vector and the second symbol vector to generate a baseband symbol vector.

[0119] At step 417 , the method 400 further includes the modulation circuit 211 of the transmitting device 202 modulating the baseband symbol vector to generate a modulation symbol vector including modulation symbols.

[0120] At step 418, the method 400 also includes the antenna 212 of the transmitting device 202 transmitting each modulation symbol of the modulation symbol vector in the radio frequency signal to the receiving device 104. The radio frequency signal refers to an electromagnetic wave used to transmit each modulation symbol of the modulation symbol vector (i.e., v) in the air. Each modulation symbol of the modulation symbol vector (i.e., v) is linearly mapped to a corresponding signal frequency so as to modulate the modulation symbol vector in the radio frequency signal (e.g., carrier wave) that is transmitted to the receiving device 104. Figure 1 ) receiving device 104.

[0121] According to one embodiment, the modulation circuit 211 constructs the modulation symbol vector and further includes mapping the baseband symbol vector in a time-frequency grid associated with a plurality of time-frequency resources according to a predefined allocation matrix. In the case where each of the plurality of transmitting devices 102 (or the transmitting device 202) is not completely synchronized with the receiving device 104, the modulation circuit 211 is used to map the baseband symbol vector to the time-frequency grid associated with the plurality of time-frequency resources so as to accurately and effectively estimate and compensate for the timing offset and the carrier frequency offset at the receiving device 104 in combination with the cascade circuit 210, the timing offset and the carrier frequency offset being caused by the incomplete synchronization between each of the plurality of transmitting devices 102 (or the transmitting device 202) and the receiving device 104. The modulation circuit 211 is used to map the baseband symbol vector in a time-frequency grid of OFDM modulation having F frequency subcarriers and S time symbols, for example, in Figure 3 Described in detail in.

[0122] According to an embodiment, the method 400 further includes the first mapping circuit 206 multiplying each of the d vectors by a unitary matrix before calculating the Kronecker product. In one implementation, the first mapping circuit 206 is configured to multiply each of the d vectors by a unitary matrix before calculating the Kronecker product.

[0123] According to an embodiment, the method 400 further includes the cascade circuit 210 multiplying the concatenation result of the first symbol vector and the second symbol vector by a permutation matrix to form a baseband symbol vector. The cascade circuit 210 is configured to multiply the concatenation result of the first symbol vector and the second symbol vector by a permutation matrix to form a baseband symbol vector. In one case, the cascade circuit 210 is configured to multiply the baseband symbol vector by a predefined permutation matrix.

[0124] Steps 402 to 418 are merely illustrative, and other alternatives may be provided in which one or more steps are added, one or more steps are deleted, or one or more steps are provided in a different order without departing from the scope of the claims herein.

[0125] In one aspect, a computer program product is provided that, when executed by one or more processors in a computer system (e.g., processor 214 of transmitting device 202), performs method 400. In another aspect, a computer system is provided that includes one or more processors (e.g., processor 214) and one or more memories (e.g., memory 216), the one or more memories (i.e., memory 216) storing program instructions that, when executed by the one or more processors (i.e., processor 214), cause the one or more processors (i.e., processor 214) to perform method 400. As previously described, in one implementation, some or all of the one or more memories may be part of some or all of the one or more processors. In another implementation, the one or more memories are components separate from the one or more processors.

[0126] In another aspect, a processor is provided, which includes various circuits for executing the method 400 , such as the encoding circuit 204 , the first mapping circuit 206 , the second mapping circuit 208 , the cascading circuit 210 , and the modulation circuit 211 .

[0127] In yet another aspect, the present disclosure provides a non-transitory computer-readable medium storing computer-implemented instructions that, when executed by a computer, cause the computer to perform the operations of method 400 .

[0128] Figure 5 is a block diagram illustrating various exemplary components of a receiving device according to an embodiment of the present disclosure. Figure 5 is a combination of Figure 1 and 2 are used to describe the components. Figure 5 , showing that ( Figure 1The block diagram 500 of the receiving device 104 of FIG. 1 includes an antenna 502, a demodulation circuit 503, a splitting circuit 504, a separation circuit 506, an equalization circuit 508, a decoding circuit 510, a processor 512, and a memory 514. The decoding circuit 510 includes a plurality of first decoders 516, a plurality of second decoders 518, and a plurality of decoders 520. In one implementation, each of the demodulation circuit 503, the splitting circuit 504, the separation circuit 506, the equalization circuit 508, and the decoding circuit 510 may be part of the processor 512. In another implementation, the demodulation circuit 503, the splitting circuit 504, the separation circuit 506, the equalization circuit 508, and the decoding circuit 510 are separate circuits or modules (which may not be part of the processor 512). The demodulation circuit 503, the splitting circuit 504, the separation circuit 506, the equalization circuit 508, and the decoding circuit 510 are communicatively coupled to the memory 514 and the antenna 502. The receiving device 104 includes at least one antenna, such as antenna 502 (or 1, 2, 3, ... M antennas).

[0129] Antenna 502 may include a device for simultaneously transmitting from multiple transmitting devices (e.g., Figure 1 The plurality of transmitting devices 102) may receive the plurality of RF signals. Advantageously, the number of receiving antennas at the receiving device 104 may be less than the number of transmitting signals. The implementation example of antenna 502 is similar to antenna 212 ( Figure 2A ) implementation example.

[0130] The demodulation circuit 503 may comprise suitable logic, circuitry, and / or interfaces for demodulating a received RF signal into a demodulated signal.

[0131] The splitting circuit 504 may comprise suitable logic, circuitry, and / or interfaces that may be operable to split the demodulated signal into a first baseband signal and a second baseband signal.

[0132] The separation circuit 506 may include suitable logic, circuits and / or interfaces for: generating multiple first estimated symbol vectors from a first baseband signal using a d-order rank-1 tensor structure associated with each transmitting device, where d>1; and generating multiple estimated channel parameters associated with multiple transmitting devices 102 and multiple estimated precoding matrices associated with the multiple transmitting devices 102 based on the first baseband signal.

[0133] The equalization circuit 508 may comprise suitable logic, circuitry, and / or interfaces that may be operable to estimate a plurality of second estimated symbol vectors from the second baseband signal based on a plurality of estimated precoding matrices and a plurality of estimated channel parameters.

[0134] The decoding circuit 510 may include suitable logic, circuitry and / or interfaces for decoding each of the first estimated symbol vector and the second estimated symbol vector to generate a plurality of decoded messages, each decoded message comprising a first bit sequence corresponding to a first portion of data and a second bit sequence corresponding to a second portion of data, the second portion of data being associated with a corresponding transmitting device among a plurality of transmitting devices (102).

[0135] The processor 512 may include suitable logic, circuitry, and / or interfaces for executing instructions stored in the memory 514. An example implementation of the processor 512 is similar to ( Figure 2A An implementation example of the processor 214.

[0136] The memory 514 may include suitable logic, circuitry, and / or interfaces for storing machine code and / or instructions executable by the processor 512. The memory 514 may temporarily store one or more decoded messages. An example implementation of the memory 514 is similar to ( Figure 2A Memory 514 may store an operating system and / or a computer program product to operate receiving device 104. Computer-readable storage media for providing non-transitory memory may include, but are not limited to, electronic storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination of the above devices.

[0137] In operation, the receiving device 104 for random access communication includes an antenna 502 for simultaneously receiving multiple radio frequency signals from multiple transmitting devices 102. In a large-scale random access scenario, the antenna 502 of the receiving device 104 is used to simultaneously access multiple transmitting devices (e.g., ( Figure 1 ) multiple transmitting devices 102) receive multiple radio frequency signals.

[0138] The receiving device 104 further includes a demodulation circuit 503, which is used to demodulate the received radio frequency signal into a demodulated signal.

[0139] The receiving device 104 further includes a splitting circuit 504 for splitting the demodulated signal into a first baseband signal and a second baseband signal. In the case where each of the plurality of transmitting devices 102 is completely synchronized with the receiving device 104, the splitting circuit 504 of the receiving device 104 is used to split the plurality of demodulated signals into the first baseband signal (or the first pM-dimensional vector, y p ) and the second baseband signal (or the second (Tp) M-dimensional vector, y q In this way, the first baseband signal (ie, y p ) and the second baseband signal (ie, y q) can be expressed according to equation (4):

[0140]

[0141] Vector w p and w q respectively correspond to the first baseband signal (ie, y p ) and the second baseband signal (ie, y q ) together with the noise term received.

[0142] The receiving device 104 also includes a separation circuit 506, which is used to: generate multiple first estimated symbol vectors from the first baseband signal using a d-order rank-1 tensor structure associated with each transmitting device, where d>1; generate multiple estimated channel parameters associated with multiple transmitting devices 102 and multiple estimated precoding matrices associated with the multiple transmitting devices 102 based on the first baseband signal. The separation circuit 506 is used to generate multiple first estimated symbol vectors sent through p grid resource elements from the first baseband signal using a d-order rank-1 tensor structure associated with each transmitting device, where d>1, which can also be called tensor decomposition. The separation circuit 506 is also used to generate multiple estimated channel parameters associated with multiple transmitting devices 102 and multiple estimated precoding matrices associated with multiple transmitting devices 102 based on the first baseband signal, for example Figure 6 , 7 and 9 are described in detail.

[0143] The receiving device 104 further includes an equalization circuit 508, which is used to generate a plurality of second estimated symbol vectors from the second baseband signal based on the plurality of estimated precoding matrices and the plurality of estimated channel parameters. The equalization circuit 508 is used to generate a plurality of second estimated symbol vectors from the second baseband signal based on the plurality of estimated precoding matrices and the plurality of estimated channel parameters calculated using the first radio frequency signal, the plurality of second estimated symbol vectors being sent using resource elements occupied by coherent modulation, for example, in Figure 8 Described in detail in.

[0144] The receiving device 104 also includes a decoding circuit 510, which is used to decode each of the first estimated symbol vector and the second estimated symbol vector to generate multiple decoded messages, each decoded message including a first bit sequence corresponding to a first part of the data and a second bit sequence corresponding to a second part of the data, the second part of the data being associated with a corresponding sending device among the multiple sending devices 102.

[0145] The decoding circuit 510 is used to decode each of the first estimated symbol vectors to generate a plurality of first decoded messages (which can also be expressed as ). Each of the plurality of first decoded messages, for example, a first decoded message (also represented as )) includes a first bit sequence corresponding to the first portion of the data (also represented as ), the first portion of the data is associated with a corresponding sending device among the plurality of sending devices 102 (eg, the first sending device 102A).

[0146] The decoding circuit 510 is further configured to decode each of the second estimated symbol vectors to generate a plurality of second decoded messages, each of the second decoded messages including a second bit sequence corresponding to a second portion of the data, the second portion of the data being associated with a corresponding transmitting device in the plurality of transmitting devices 102. The decoding circuit 510 is configured to decode each of the second estimated symbol vectors to generate a plurality of second decoded messages (also denoted as ). Each of the second decoded messages, for example, the second decoded message (also represented as )) includes a second bit sequence corresponding to the second portion of the data (also represented as ), the second portion of the data is associated with a corresponding sending device among the plurality of sending devices 102 (eg, the first sending device 102A).

[0147] According to an embodiment, the splitting circuit 504 is further configured to apply a predefined permutation matrix to the demodulated signal to generate a first baseband signal and a second baseband signal. The predefined permutation matrix corresponds to a predefined permutation matrix (also represented as ) is applied to each of the first baseband signal and the second baseband signal at the receiving device 104 to restore the effect of the predefined permutation matrix (i.e., A) used at the transmitting device 202 (of FIG. 2). ) is applied to each of the first baseband signal and the second baseband signal, a plurality of first estimated symbol vectors and second estimated symbol vectors are generated at the receiving device 104.

[0148] According to an embodiment, the separation circuit 506 is further used to: estimate the time offset and frequency offset in each of the first estimated symbol vectors to generate multiple time offsets and multiple frequency offsets; and apply the time offset compensation based on the corresponding time offset and the frequency offset compensation based on the corresponding frequency offset to the corresponding first estimated symbol vector. In one case, when there is no block fading channel between each of the multiple transmitting devices 102 (or the transmitting device 202) and the receiving device 104, a timing offset and a carrier frequency offset will occur at each of the multiple transmitting devices 102, and the timing offset and the carrier frequency offset need to be compensated at the receiving device 104. Therefore, the separation circuit 506 is also used to estimate and compensate for the timing offset and the carrier frequency offset at the receiving device 104. In other words, the separation circuit 506 is used to: estimate the time offset and the carrier frequency offset in each of the first estimated symbol vectors; and apply the time offset compensation based on the corresponding time offset and the frequency offset compensation based on the corresponding frequency offset to the corresponding estimated symbol vector.

[0149] Therefore, the receiving device 104 provides improved communication reliability and supports a large number of users at the same time. In addition, the receiving device 104 detects a group of transmitting devices in the plurality of transmitting devices 102 that are in an active state, and estimates the corresponding channels of the group of transmitting devices in the plurality of transmitting devices 102 that are in an active state by means of the separation circuit 506 and the equalization circuit 508. In addition, the equalization circuit 508 is used to demap the coherent modulation used at the transmitting device 202 using multiple time offsets, multiple frequency offsets, multiple estimated precoding matrices, and multiple estimated channel parameters. In addition, the receiving device 104 can be used in block fading channels and non-block fading channels. By means of time-frequency mapping of elements of the first symbol vector and rotating each element of the first symbol vector by a unitary matrix used at the transmitting device 202 and the separation circuit 506, accurate estimation and compensation of timing offset and carrier frequency offset can be achieved, which further reduces the probability of decoding errors and improves communication reliability at the receiving device 104.

[0150] Figure 6 is a diagram of a receiving device according to an embodiment of the present disclosure. Figure 6 is a combination of Figure 1 , 2A , 2B, 2C, 3, 4 and 5. Reference Figure 6 , showing that ( Figure 1 ) is a diagram 600 of a receiving device 104 that includes a separation circuit 506 and an equalization circuit 508.

[0151] The first baseband signal (i.e., the first pM-dimensional vector, y p) is processed by the separation circuit 506. The separation circuit 506 may also be referred to as a tensor-based modulation (TBM) receiver. The separation circuit 506 is used to generate a plurality of first sub-messages (also represented as ), and a plurality of estimated channel parameters associated with the plurality of transmitting devices (which may also be expressed as ), for example in Figure 7 In addition, the separation circuit 506 is used to generate multiple estimated precoding matrices associated with multiple transmitting devices 102 based on the first RF signal (which can also be expressed as In other words, the separation circuit 506 is used to generate a plurality of encoded first sub-messages, for example, the encoded first sub-message (also represented as ) and its corresponding precoding matrix (which can also be expressed as In addition, the second baseband signal (ie, the second (Tp) M-dimensional vector, y q ) is processed by the equalization circuit 508. The equalization circuit 508 may also be referred to as a coherent receiver. The equalization circuit 508 is used to use multiple estimated precoding matrices (ie, ) and multiple estimated channel parameters A plurality of second sub-messages (also represented as ), for example in Figure 8 Thereafter, the plurality of second sub-messages (ie, ) and a plurality of first sub-messages generated by the separation circuit 506 (ie, ) are cascaded to form multiple estimated messages (also represented as ).

[0152] Figure 7 is a diagram of a separation circuit of a receiving device according to an embodiment of the present disclosure. Figure 7 is a combination of Figure 1 , 2A , 2B, 2C, 3, 4, 5 and 6. Figure 7 , showing that ( Figure 1 700 of the separation circuit 506 and the decoding circuit 510 of the receiving device 104 of FIG. 700 is also shown. A plurality of binary encoders 702 and a plurality of precoder selection circuits 704 are also shown.

[0153] By processing the received first baseband signal (ie, the first pM-dimensional vector, y p), the separation circuit 506 is used to generate a plurality of first estimated symbol vectors. Thereafter, the plurality of first estimated symbol vectors are subjected to tensor decomposition (e.g., regular multivariate decomposition) corresponding to each of the plurality of transmitting devices 102. The tensor decomposition is used to separate the plurality of first estimated symbol vectors into single-user components, thus outputting Vector symbols of which Integer represents the estimated number of sent messages. For example, the first estimated symbol vector (which can also be expressed as ) corresponds to the first transmitting device 102A, and the Kth estimated symbol vector (also represented as ) corresponds to the Kth transmitting device 102K among the plurality of transmitting devices 102. In addition, during the tensor decomposition, the separation circuit 506 is used to generate a plurality of estimated channel parameters associated with the plurality of transmitting devices 102 (ie, ).

[0154] According to an embodiment, the decoding circuit 510 includes a plurality of first decoders 516, each of which is used to decode one of the first estimated symbol vectors generated by the separation circuit 506 to generate a plurality of first decoded messages, each of which includes a first bit sequence corresponding to a first portion of data, the first portion of the data being associated with a corresponding transmitting device in the plurality of transmitting devices 102. p ) are processed into a plurality of first estimated symbol vectors, a plurality of first decoders 516 (or a single-user decoder) of the decoding circuit 510 is used to decode one of the first estimated symbol vectors to generate a plurality of first decoded messages (ie, For example, the first estimated symbol vector corresponding to the first transmitting device 102A (ie, ) is used to generate a first decoded message among multiple first decoded messages (which can also be expressed as ). Similarly, the K-th estimated symbol vector corresponding to the K-th transmitting device 102K (ie, ) is used to generate the Kth decoded message among the multiple first decoded messages (which can also be expressed as ). Each of the plurality of first decoded messages includes a first bit sequence corresponding to a first portion of data associated with a corresponding transmitting device in the plurality of transmitting devices 102. For example, a first decoded message (ie, ) includes a first bit sequence corresponding to the first portion of the data (also represented as ), the first portion of the data is associated with a corresponding transmitting device (eg, the first transmitting device 102A) among the plurality of transmitting devices 102. Similarly, the Kth decoded message (ie, ) includes the Kth bit sequence corresponding to the first part of the data (which can also be expressed as ), the first part of the data is associated with a corresponding sending device among the multiple sending devices 102 (e.g., the Kth sending device 102K).

[0155] Thereafter, a plurality of first decoded messages (ie, ) is processed by a plurality of binary encoders 702 and a plurality of precoder selection circuits 704 to estimate a plurality of precoding matrices associated with a plurality of transmitting devices 102 (ie, ).

[0156] Figure 8 is a diagram of an equalization circuit of a receiving device according to an embodiment of the present disclosure. Figure 8 is a combination of Figure 1 , 2A , 2B, 2C, 3, 4, 5, 6 and 7. Figure 8 , showing that ( Figure 1 800 of an equalization circuit 508 and a decoding circuit 510 of a receiving device 104. A soft demapper 802 is also shown.

[0157] The equalization circuit 508 may be implemented using any classical coherent receiver (eg, minimum mean square error, MMSE equalizer). The equalization circuit 508 of the receiving device 104 is configured to receive the second RF signal (ie, the second (Tp) M-dimensional vector, y q ) Estimate multiple second estimated symbol vectors using a linear equation system according to equation (5)

[0158]

[0159] By using multiple estimated channel parameters in equation (6) (i.e., ) replace h k and use multiple estimated precoding matrices (i.e., ) replaces the precoding matrix To obtain an approximate solution to equation (5), and All are estimated by the separation circuit 506 of the receiving device 104 (or TBM receiver), and equation (6) is solved to estimate a plurality of second estimated symbol vectors by calculating the minimum mean square error (MMSE).

[0160]

[0161] Before applying the equalization circuit 508 to the second RF signal (ie, the second (Tp) M-dimensional vector, y q) is then used to calculate the log-likelihood ratios (LLRs) using the soft demapper 802. These log-likelihood ratios are represented in a1...a K The inferred value of the bits encoded in . LLR calculation (also expressed as l 1，1 , .., l 1，B , l k，1 , ..., l k，B , l K，1 , ..., l K，B ) is then processed by a plurality of second decoders 518 (eg, binary decoders) of the decoding circuit 510.

[0162] The decoding circuit 510 further includes a plurality of second decoders 518, each of which is used to decode one of the second estimated symbol vectors generated by the equalization circuit 508 (or the MMSE equalizer) to generate a plurality of second decoded messages, each of which includes a second bit sequence corresponding to a second portion of the data, the second portion of the data being associated with a corresponding transmitting device in the plurality of transmitting devices 102. For the plurality of second decoded messages generated (i.e., ), the code validity is checked. For example, if the binary code includes code redundancy checksum (CRC) bits, the code validity can be checked, in which case the code is valid when the CRC constraint is met. For the second decoded message that does not meet the code validity, the process of checking the code validity is iterated a predefined number of times. It can also be noted that the parameter q can be freely selected, which affects the performance of the equalization circuit 508 (i.e., the MMSE equalizer). In practice, a joint equalization method can also be used, which involves solving the (Tp).M system of equations, which involves the equations a1...a K q·K unknown scalar variables of the form . Therefore, to ensure adequate performance of the equalization circuit 508 (or MMSE equalizer), it may be advantageous to impose q·K≤(Tp).M. Similarly, to ensure that the equalization circuit 508 (or MMSE equalizer) generates a reliable output, the linear precoder dictionary (i.e., ) to minimize the number of ) is the overlap between the linear subspaces spanned by K randomly selected elements in .

[0163] Fig. 9 is another diagram of a receiving device according to another embodiment of the present disclosure. Fig. 9 is a combination of Figure 1 , 2A , 2B, 2C, 3, 4, 5, 6, 7 and 8. Fig. 9 , showing that ( Figure 1 ) is an illustration 900 of a receiving device 104 that includes a separation circuit 506, an equalization circuit 508, and multiple decoders 520 of a decoding circuit 510.

[0164] The diagram 900 of the receiving device 104 is ( Figure 6 ) is an alternative version of the diagram 600 of the receiving device 104. In addition, the diagram 900 of the receiving device 104 may correspond to ( Figure 2C In the diagram 900 of the receiving device 104, the separation circuit 506 (or TBM receiver) and the equalization circuit 508 (or coherent receiver) do not perform binary decoding. In addition, each of the separation circuit 506 (or TBM receiver) and the equalization circuit 508 (or coherent receiver) provides an LLR vector (which can also be represented as having a corresponding size B′) p and B′ q bits of l 1，k and l 2，k ) in the form of "soft information". The soft information is then concatenated for each transmitting device and is considered as an input to each of a plurality of decoders 520 (e.g., a binary decoder) of a decoding circuit 510 for performing message decoding of the output estimate message.

[0165] According to an embodiment, the decoding circuit 510 includes a plurality of decoders 520, each of which is used to receive one of the first estimated symbol vectors and one of the second estimated symbol vectors, concatenate the received first estimated symbol vector and the second estimated symbol vector into a concatenated estimated symbol vector, and decode the concatenated estimated symbol vector to generate a plurality of decoded messages, each of which includes a first bit sequence and a second bit sequence, the first bit sequence corresponding to a first portion of data associated with a corresponding transmitting device among the plurality of transmitting devices 102, and the second bit sequence corresponding to a second portion of data associated with the corresponding transmitting device. In other words, each of the plurality of decoders 520 of the decoding circuit 510 is used to generate a plurality of decoded messages according to the first estimated symbol vector (i.e., l 1，1 , ..., l 1，k , ..., l 1，K ) and a second estimated symbol vector (i.e., l 2，1 , ..., l 2，k , ..., l 2，K ) receives the soft information. Thereafter, each of the plurality of decoders 520 is used to concatenate the received first estimated symbol vector and the second estimated symbol vector into a concatenated estimated symbol vector, and decode the concatenated estimated symbol vector to generate a plurality of decoded messages (i.e., ). Each decoded message includes a first bit sequence (ie, ) and a second bit sequence (ie, ), the first bit sequence corresponds to a first portion of data associated with a corresponding transmitting device among the plurality of transmitting devices 102 (e.g., the first transmitting device 102A), and the second bit sequence corresponds to a second portion of data associated with a corresponding transmitting device among the plurality of transmitting devices 102 (e.g., the first transmitting device 102A).

[0166] Fig. 10A and 10B The flowchart of the method for random access communication of the embodiment of the present disclosure is shown in FIG. Fig. 10A and 10B , a method 1000 for random access communication is shown. The method 1000 includes steps 1002 to 1018 (steps 1002 to 1010 of the method 1000 are in Fig. 10A , and steps 1012 to 1018 are shown in Fig. 10B Method 1000 comprises ( Figure 1 ) receiving device 104 executes.

[0167] A method 1000 is provided for random access communication, wherein a random number of multiple transmitting devices 102 (or transmitting devices 202) can be randomly in an active state and can be used to simultaneously transmit multiple radio frequency signals to a receiving device 104 without any previous resource request (or grant). In addition, the method 1000 is applicable to two implementation scenarios, the first of which is that there is a block fading channel between each of the multiple transmitting devices 102 (or transmitting device 202) and the receiving device 104, and the second is that there is no block fading channel between each of the multiple transmitting devices 102 (or transmitting device 202) and the receiving device 104. In the first implementation scenario, each of the multiple transmitting devices 102 (or transmitting device 202) and the receiving device 104 are completely synchronized with each other, so that in a system (e.g., Figure 1 In the system 100 of FIG. 1000, no timing offset and carrier frequency offset will occur. In the second implementation scenario, each of the multiple transmitting devices 102 (or the transmitting device 202) and the receiving device 104 are not completely synchronized with each other, so a timing offset and a carrier frequency offset will occur during transmission from each of the multiple transmitting devices 102 (or the transmitting device 202) to the receiving device 104, and the timing offset and the carrier frequency offset need to be compensated at the receiving device 104. By executing the method 1000, the receiving device 104 learns how many transmitting devices are in an active state on the transmitting side, and estimates the corresponding channels of the transmitting devices in the active state.

[0168] At step 1002, method 1000 includes an antenna (e.g., antenna 502) of a receiving device (e.g., receiving device 104) receiving multiple radio frequency signals from multiple transmitting devices (e.g., multiple transmitting devices 102) simultaneously. In a large-scale random access scenario, antenna 502 of receiving device 104 is used to simultaneously receive multiple radio frequency signals from ( Figure 1 ) multiple transmitting devices 102 receive multiple radio frequency signals.

[0169] At step 1003 , the method 1000 includes a demodulation circuit (eg, the demodulation circuit 503 ) of a receiving device (eg, the receiving device 104 ) demodulating the received radio frequency signal into a demodulated signal.

[0170] At step 1004, the method 1000 further includes a splitting circuit (e.g., splitting circuit 504) of a receiving device (e.g., receiving device 104) splitting the demodulated signal into a first baseband signal and a second baseband signal. In the case where each of the plurality of transmitting devices 102 is completely synchronized with the receiving device 104, the splitting circuit 504 of the receiving device 104 is used to split the plurality of demodulated signals into the first baseband signal and the second baseband signal.

[0171] At step 1006, the method 1000 also includes a separation circuit (e.g., separation circuit 506) of a receiving device (e.g., receiving device 104) generating a plurality of first estimated symbol vectors from the first baseband signal using a d-order rank-1 tensor structure associated with each transmitting device, where d>1. The separation circuit 506 is used to generate a plurality of first estimated symbol vectors transmitted through p grid resource elements from the first baseband signal. In addition, the separation circuit 506 is used to separate the plurality of first estimated symbol vectors using a d-order rank-1 tensor structure (e.g., a regular multivariate decomposition) associated with each transmitting device, where d>1, which may also be referred to as tensor decomposition.

[0172] At step 1010, the method 1000 further includes the separation circuit 506 generating a plurality of estimated channel parameters associated with the plurality of transmitting devices 102 and a plurality of estimated precoding matrices associated with the plurality of transmitting devices 102 based on the first baseband signal. The separation circuit 506 is further configured to generate a plurality of estimated channel parameters associated with the plurality of transmitting devices 102 and a plurality of estimated precoding matrices associated with the plurality of transmitting devices 102 based on the first baseband signal, such as previously described in Figure 6 , 7 , 8 and 9 are described in detail.

[0173] At step 1012, the method 1000 further includes an equalization circuit (e.g., equalization circuit 508) estimating a plurality of second estimated symbol vectors from the second baseband signal based on the plurality of estimated precoding matrices and the plurality of estimated channel parameters, the plurality of second estimated symbol vectors being sent through resource elements occupied by coherent modulation. The equalization circuit 508 is further configured to separate the plurality of second estimated symbol vectors based on the plurality of estimated precoding matrices and the plurality of estimated channel parameters calculated using the first RF signal, such as previously described in Figure 8 Described in detail in.

[0174] At step 1016, method 1000 also includes decoding circuitry (e.g., decoding circuitry 510) decoding each of the first estimated symbol vector and the second estimated symbol vector to generate a plurality of decoded messages, each decoded message including a first bit sequence corresponding to a first portion of data and a second bit sequence corresponding to a second portion of data, the second portion of data being associated with a corresponding transmitting device in the plurality of transmitting devices 102. Decoding circuitry 510 is configured to decode each of the first estimated symbol vector and the second estimated symbol vector to generate a plurality of decoded messages. Each decoded message includes a first bit sequence corresponding to a first portion of data and a second bit sequence corresponding to a second portion of data, the second portion of data being associated with a corresponding transmitting device in the plurality of transmitting devices 102.

[0175] According to one embodiment, the decoding circuit 510 performs decoding including each of a plurality of first decoders (e.g., a plurality of first decoders 516) of the decoding circuit 510 decoding one of the first estimated symbol vectors to generate a plurality of first decoded messages, each of the first decoded messages including a first bit sequence corresponding to a first portion of data, the first portion of the data being associated with a corresponding transmitting device among the plurality of transmitting devices 102. After processing the received first RF signal into a plurality of first estimated symbol vectors, the plurality of first decoders 516 (or single-user decoders) of the decoding circuit 510 are used to decode one of the first estimated symbol vectors to generate a plurality of first decoded messages. Each of the plurality of first decoded messages includes a first bit sequence corresponding to a first portion of data, the first portion of the data being associated with a corresponding transmitting device among the plurality of transmitting devices 102, such as previously described. Figure 7 Described in detail in.

[0176] The method 1000 also includes each of a plurality of second decoders (e.g., a plurality of second decoders 518) of the decoding circuit 510 decoding one of the second estimated symbol vectors generated by the equalization circuit 508 to generate a plurality of second decoded messages, each of the second decoded messages including a second bit sequence corresponding to a second portion of the data, the second portion of the data being associated with a corresponding transmitting device in the plurality of transmitting devices 102. After processing the received second RF signal into a plurality of second estimated symbol vectors, the plurality of second decoders 518 (or single-user decoders) of the decoding circuit 510 are used to decode one of the second estimated symbol vectors to generate a plurality of second decoded messages. Each of the plurality of second decoded messages includes a second bit sequence corresponding to a second portion of the data, the second portion of the data being associated with a corresponding transmitting device in the plurality of transmitting devices 102, such as previously described. Figure 8 Described in detail in.

[0177] According to an embodiment, the decoding circuit 510 performs decoding including: each of the multiple decoders (e.g., multiple decoders 520) of the decoding circuit 510 receives one of the first estimated symbol vectors and one of the second estimated symbol vectors; each decoder concatenates the received first estimated symbol vector and the second estimated symbol vector into a concatenated estimated symbol vector; and each decoder decodes the concatenated estimated symbol vector to generate multiple decoded messages, each decoded message including a first bit sequence and a second bit sequence, the first bit sequence corresponding to a first part of the data associated with a corresponding transmitting device in the multiple transmitting devices 102, and the second bit sequence corresponding to a second part of the data associated with the corresponding transmitting device. In other words, each of the multiple decoders 520 of the decoding circuit 510 is used to receive soft information according to one of the first estimated symbol vectors and one of the second estimated symbol vectors. Thereafter, each of the multiple decoders 520 is used to concatenate the received first estimated symbol vector and the second estimated symbol vector into a concatenated estimated symbol vector, and decode the concatenated estimated symbol vector to generate multiple decoded messages. Each decoded message includes a first bit sequence corresponding to a first portion of data associated with a corresponding transmitting device in the plurality of transmitting devices 102 (e.g., the first transmitting device 102A), and a second bit sequence corresponding to a second portion of data associated with a corresponding transmitting device in the plurality of transmitting devices 102 (e.g., the first transmitting device 102A), such as previously described in Fig. 9 Described in detail in.

[0178] According to an embodiment, the method 1000 further includes the splitting circuit 504 applying a predefined permutation matrix to the demodulated signal to generate a first baseband signal and a second baseband signal. In the case where each of the plurality of transmitting devices 102 (or the transmitting device 202) is not completely synchronized with the receiving device 104, the splitting circuit 504 is further used to apply the predefined permutation matrix to the demodulated signal to generate the first baseband signal and the second baseband signal. The predefined permutation matrix corresponds to the effect of restoring the predefined permutation matrix used at the transmitting device 202 by applying the predefined permutation matrix to each of the first radio frequency signals at the receiving device 104. After the predefined permutation matrix is ​​applied to each of the first baseband signal and the second baseband signal, a plurality of first estimated symbol vectors and second estimated symbol vectors are generated at the receiving device 104.

[0179] According to an embodiment, the method 1000 further includes: the separation circuit 506 estimates the time offset and the frequency offset in each of the first estimated symbol vectors to generate multiple time offsets and multiple frequency offsets; and the separation circuit 506 applies the time offset compensation based on the corresponding time offset and the frequency offset compensation based on the corresponding frequency offset to the corresponding estimated symbol vector. In one case, when there is no block fading channel between each of the multiple transmitting devices 102 (or the transmitting device 202) and the receiving device 104, a timing offset and a carrier frequency offset will occur at each of the multiple transmitting devices 102, and the timing offset and the carrier frequency offset need to be compensated at the receiving device 104. Therefore, the separation circuit 506 is also used to estimate and compensate for the timing offset and the carrier frequency offset at the receiving device 104.

[0180] Furthermore, the method 1000 includes the equalization circuit 508 generating each of the second estimated symbol vectors based on a plurality of time offsets, a plurality of frequency offsets, a plurality of estimated precoding matrices, and a plurality of estimated channel parameters.

[0181] Steps 1002 to 1018 are merely illustrative, and other alternatives may be provided in which one or more steps are added, one or more steps are deleted, or one or more steps are provided in a different order without departing from the scope of the claims herein.

[0182] In one aspect, a computer program product is provided, which, when executed by one or more processors in a computer system (e.g., processor 512 of receiving device 104), performs method 1000. In another aspect, a computer system is provided, which includes one or more processors (e.g., processor 512) and one or more memories (e.g., memory 514), the one or more memories (i.e., memory 514) storing program instructions, which, when executed by the one or more processors (i.e., processor 512), cause the one or more processors (i.e., processor 512) to perform method 1000.

[0183] In another aspect, a processor is provided that includes various circuits for performing the method 1000 , such as a demodulation circuit 503 , a splitting circuit 504 , a separation circuit 506 , an equalization circuit 508 , and a decoding circuit 510 .

[0184] In yet another aspect, the present disclosure provides a non-transitory computer-readable medium storing computer-implemented instructions that, when executed by a computer, cause the computer to perform the operations of method 1000 .

[0185] Fig.11 is a block diagram illustrating various exemplary components of a communication device according to an embodiment of the present disclosure. Fig.11 is a combination of Figure 1 , 2A , 2B, 2C, 4, 5, 6, 7, 8, 9, 10A and 10B. Fig.11 , a block diagram 1100 of a communication device 1102 is shown, the communication device comprising ( Figure 2A ) sending device 202 and ( Figure 1 ) of a receiving device 104. In another embodiment, the communication apparatus 1102 may include a plurality of sending devices 102 and receiving devices 104.

[0186] The communication device 1102 including the transmitting device 202 and the receiving device 104 exhibits a reduced decoding error rate probability, improved communication reliability and spectrum efficiency. In addition, the communication device 1102 can be used in a large-scale random access scenario with improved communication reliability and spectrum efficiency. Examples of the communication device 1102 may include, but are not limited to, a transceiver, a base station, a user equipment, etc. The communication device 1102 including the transmitting device 202 (or multiple transmitting devices 102) and the receiving device 104 can be used for IoT, large-scale random access scenarios, uplink multi-input-multi-output (MIMO) random access with multiple transmitting devices 102, etc.

[0187] Fig.12 is a graphical representation of an embodiment of the present disclosure, which shows the variation of block error rate (BLER) relative to signal-to-noise ratio (SNR) for tensor-based hybrid modulation and coherent modulation and typical tensor-based modulation in the case of large payload. Fig.12 is a combination of Figure 1 , 2A , 2B, 2C, 3, 4, 5, 6, 7, 8, 9, 10A to 10B and 11. Fig.12 , shows a graphical representation 1200 having an X-axis 1202 representing SNR in decibels (dB) and a Y-axis 1204 representing BLER.

[0188] The graphical representation 1200 shows the variation of BLER with respect to SNR in an ideal case where there is no timing offset and carrier frequency offset. In one implementation, the graphical representation 1200 can be obtained by considering a message size of 10 bytes or 40 bytes, 8.24 active user equipment (UE) or transmitting devices, 240 potential user equipment (UE), a carrier frequency of 700 MHz, a bandwidth of 6 resource blocks (RB), polarization codes for channel coding, 8 base station antennas, 1 UE antenna, a channel model with TDL-A 30ns and 3Km / h and system parameters (numerology) of SCS15kHz, and 14 operating systems (OS). In addition, the number of times the channel is used (i.e., T), p, and q are 1008, 252, 756, or 378, respectively.

[0189] In the graphical representation 1200, a first line 1206 and a second line 1208 are shown. Each of the first line 1206 and the second line 1208 respectively represents a change in BLER relative to SNR, which is obtained when 8 user equipments (UEs) transmit a 240-bit payload through tensor-based modulation (TBM) and coherent modulation (also referred to as TBM+C) and a typical TBM. In addition, the first line 1206 achieves a gain of 0.5 dB compared to the second line 1208. In other words, TBM together with the coherent modulation (i.e., TBM+C) represented by the first line 1206 achieves a gain of 0.5 dB compared to the typical TBM represented by the second line 1208. A third line 1210 and a fourth line 1212 are also shown. Each of the third line 1210 and the fourth line 1212 respectively represents a change in BLER relative to SNR, which is obtained when 24 user equipment (UE) transmits a 240-bit payload through TBM together with coherent modulation (i.e., TBM+C) and a typical TBM. In addition, the third line 1210 achieves a 3dB gain compared to the fourth line 1212. In other words, TBM together with coherent modulation (i.e., TBM+C) represented by the third line 1210 achieves a 3dB gain compared to the typical TBM represented by the fourth line 1212. A fifth line 1214 and a sixth line 1216 are also shown. Each of the fifth line 1214 and the sixth line 1216 respectively represents a change in BLER relative to SNR, which is obtained when 8 user equipment (UE) transmits an 80-bit payload through TBM together with coherent modulation (i.e., TBM+C) and a typical TBM. Furthermore, the fifth line 1214 achieves a loss of -1 dB compared to the sixth line 1216. In other words, the TBM together with the coherent modulation represented by the fifth line 1214 (i.e., TBM+C) achieves a loss of -1 dB compared to the typical TBM represented by the sixth line 1216. Thus, it can be said that the TBM together with the coherent modulation (i.e., TBM+C) is superior to the typical TBM when a large payload needs to be transmitted and in the presence of a large number of users.

[0190] Without departing from the scope of the present disclosure as defined by the appended claims, the embodiments of the present disclosure described above may be modified. "Including", "incorporating", "having", "being / for", etc., used to describe and claim the present disclosure, are intended to be interpreted in a non-exclusive manner, that is, items, components or elements not explicitly described may also exist. References to the singular should also be interpreted as involving the plural. The word "exemplary" used herein means "as an example, instance or illustration". Any embodiment described as "exemplary" is not necessarily interpreted as being more preferred or more advantageous than other embodiments, and / or excluding the combination of features of other embodiments. The word "optionally" used herein means "provided in some embodiments and not provided in other embodiments". It should be understood that certain features of the present disclosure described in the context of a single embodiment for the sake of clarity may also be provided in a single embodiment by combination. On the contrary, the various features of the present disclosure described in the context of a single embodiment for the sake of brevity may also be provided in any other described embodiment of the present disclosure individually or by any suitable combination or as appropriate.

Claims

1. A transmitting device (202) for random access communication, characterized in that: include: The encoding circuit (204) is used for: encoding an input message into a first bit sequence and a second bit sequence, The first bit sequence is divided into d bit blocks, where d>1, Determining d vectors based on the d bit blocks; A first mapping circuit (206) for constructing a first symbol vector by calculating the Kronecker product of the d vectors to generate a rank-1 tensor structure of order d; The second mapping circuit (208) is used for: Mapping the second bit sequence to a vector of baseband symbols, applying an allocation matrix to the vector of baseband symbols to generate a second symbol vector, wherein the allocation matrix is ​​a precoding matrix based on the first bit sequence; A cascade circuit (210), configured to cascade the first symbol vector and the second symbol vector into a baseband symbol vector; A modulation circuit (211) for modulating the baseband symbol vector to generate a modulation symbol vector including a modulation symbol; as well as At least one antenna (212) is used to transmit each modulation symbol of the modulation symbol vector in a radio frequency signal to a receiving device.

2. The sending device (202) according to claim 1, characterized in that The encoding circuit (204) is used for: splitting the input message into a first message and a second message, encoding the first message into the first bit sequence, The second message is encoded as the second bit sequence.

3. The sending device (202) according to claim 1, characterized in that The encoding circuit (204) is used for encoding the input message into a main bit sequence, and splitting the main bit sequence into the first bit sequence and the second bit sequence.

4. The sending device (202) according to any one of claims 1 to 3, characterized in that: The encoding circuit (204) is used to encode the message using a binary code.

5. The sending device (202) according to any one of claims 1 to 4, characterized in that: The encoding circuit (204) is configured to select the precoding matrix from a fixed dictionary comprising matrices, wherein each of the matrices of the fixed dictionary is equal to one of the same unitary matrix, the same unitary matrix multiplied by the same permutation matrix, the same unitary matrix multiplied by a truncated permutation matrix from a set of non-disjoint truncated permutation matrices, a matrix from a set of matrices corresponding to a subspace of a Grassmann space, or a matrix from a set of truncated unitary matrices.

6. The sending device (202) according to any one of claims 1 to 5, characterized in that: The modulation circuit (211) is used for mapping the baseband symbol vector in a time-frequency grid associated with a plurality of time-frequency resources according to a predefined allocation matrix associated with multi-carrier orthogonal frequency division multiplexing modulation.

7. The sending device (202) according to any one of claims 1 to 6, characterized in that: The first mapping circuit (206) is further configured to multiply each of the d vectors by a unitary matrix before calculating the Kronecker product.

8. The sending device (202) according to any one of claims 1 to 7, characterized in that: The second mapping circuit (208) is used to map the second bit sequence to the vector of baseband symbols by quadrature amplitude modulation or phase shift keying modulation.

9. The sending device (202) according to any one of claims 1 to 8, characterized in that: The cascade circuit (210) is further configured to multiply the cascade result of the first symbol vector and the second symbol vector by a permutation matrix to form the baseband symbol vector.

10. A receiving device (104) for random access communication, characterized in that: include: at least one antenna (502) for simultaneously receiving a plurality of radio frequency signals from a plurality of transmitting devices (102); A demodulation circuit (503), used for demodulating the received radio frequency signal into a demodulation signal; A splitting circuit (504), configured to split the demodulated signal into a first baseband signal and a second baseband signal; A separation circuit (506) for: generating a plurality of first estimated symbol vectors from the first baseband signal using a rank-1 tensor structure of order d associated with each transmitting device, where d>1; generating, based on the first baseband signal, a plurality of estimated channel parameters associated with the plurality of transmitting devices (102) and a plurality of estimated precoding matrices associated with the plurality of transmitting devices (102); generating a plurality of second estimated symbol vectors from the second baseband signal based on the plurality of estimated precoding matrices and the plurality of estimated channel parameters; as well as A decoding circuit (510) is used to: Each of the first estimated symbol vector and the second estimated symbol vector is decoded to generate a plurality of decoded messages, each decoded message comprising a first bit sequence corresponding to a first portion of data and a second bit sequence corresponding to a second portion of data, the second portion of data being associated with a corresponding transmitting device among the plurality of transmitting devices (102).

11. The receiving device (104) according to claim 10, characterized in that The decoding circuit (510) comprises: a plurality of first decoders (516), each of which is configured to decode one of the first estimated symbol vectors generated by the separation circuit (506) to generate a plurality of first decoded messages, each of which includes a first bit sequence corresponding to a first portion of data associated with a corresponding transmitting device of the plurality of transmitting devices (102); and a plurality of second decoders (518), each second decoder being configured to decode one of the second estimated symbol vectors generated by the equalization circuit (508) to generate a plurality of second decoded messages, each of the second decoded messages comprising a second bit sequence corresponding to a second portion of data associated with a corresponding transmitting device among the plurality of transmitting devices (102).

12. The receiving device (104) according to claim 10, characterized in that The decoding circuit (510) comprises a plurality of decoders (520), each decoder being configured to: receiving one of the first estimated symbol vectors and one of the second estimated symbol vectors, concatenate the received first estimated symbol vector and the second estimated symbol vector into a concatenated estimated symbol vector, The concatenated estimated symbol vectors are decoded to generate a plurality of decoded messages.

13. The receiving device (104) according to any one of claims 10 to 12, characterized in that: The splitting circuit (504) is further configured to apply a predefined permutation matrix to the demodulated signal to generate the first baseband signal and the second baseband signal.

14. The receiving device (104) according to any one of claims 10 to 13, characterized in that: The separation circuit (506) is also used for: estimating a time offset and a frequency offset in each of the first estimated symbol vectors to generate a plurality of time offsets and a plurality of frequency offsets, applying a time offset compensation based on the corresponding time offset and a frequency offset compensation based on the corresponding frequency offset to the corresponding first estimated symbol vector, The equalization circuit (508) is further configured to generate each of the second estimated symbol vectors based on the plurality of time offsets, the plurality of frequency offsets, the plurality of estimated precoding matrices, and the plurality of estimated channel parameters.

15. A communication device (1102), characterized in that: The invention comprises a transmitting device (202) according to any one of claims 1 to 9 and a receiving device (104) according to any one of claims 10 to 14.

16. A method (400) for random access communication, characterized in that: include: The encoding circuit (204) of the sending device (202) obtains an input message; The encoding circuit (204) encodes the input message into a first bit sequence and a second bit sequence; The encoding circuit (204) divides the first bit sequence into d bit blocks, where d>1; The encoding circuit (204) determines d vectors based on the d bit blocks; The first mapping circuit (206) of the transmitting device (202) constructs a first symbol vector by calculating the Kronecker product of the d vectors to generate a rank-1 tensor structure of order d; The second mapping circuit (208) of the transmitting device (202) maps the second bit sequence to a vector of baseband symbols; The second mapping circuit (208) applies an allocation matrix to the vector of baseband symbols to generate a second symbol vector, wherein the allocation matrix is ​​a precoding matrix based on the first bit sequence; The cascade circuit (210) of the transmitting device (202) cascades the first symbol vector and the second symbol vector into a baseband symbol vector; The modulation circuit (211) of the transmitting device (202) modulates the baseband symbol vector to generate a modulation symbol vector including modulation symbols; At least one antenna (212) of the transmitting device (202) transmits each modulation symbol of the modulation symbol vector in a radio frequency signal to a receiving device (104).

17. The method (400) according to claim 16, characterized in that: The encoding circuit (204) performs encoding including: splitting the input message into a first message and a second message, encoding the first message into the first bit sequence, The second message is encoded as the second bit sequence.

18. The method (400) according to claim 16, characterized in that: The encoding circuit (204) performs encoding including: Encoding the input message as a primary bit sequence, The main bit sequence is split into the first bit sequence and the second bit sequence.

19. The method (400) according to any one of claims 16 to 18, characterized in that: The encoding circuit (204) performs encoding using binary code.

20. The method (400) according to any one of claims 16 to 19, characterized in that: The encoding circuit (204) performs encoding including selecting the precoding matrix from a fixed dictionary including matrices, wherein each of the matrices of the fixed dictionary is equal to one of the same unitary matrix, the same unitary matrix multiplied by the same permutation matrix, the same unitary matrix multiplied by a truncated permutation matrix from a set of non-disjoint truncated permutation matrices, a matrix from a set of matrices corresponding to a subspace of a Grassmann space, or a matrix from a set of truncated unitary matrices.

21. The method (400) according to any one of claims 16 to 20, characterized in that: The modulation circuit (211) constructing the first symbol vector also includes mapping the baseband symbol vector in a time-frequency grid associated with multiple time-frequency resources according to a predefined permutation allocation matrix associated with multi-carrier orthogonal frequency division multiplexing modulation.

22. The method (400) according to any one of claims 16 to 21, characterized in that: The first mapping circuit (206) is further configured to multiply each of the d vectors by a unitary matrix before calculating the Kronecker product.

23. The method (400) according to any one of claims 16 to 22, characterized in that: The second mapping circuit (208) maps the second bit sequence to the vector of baseband symbols including using quadrature amplitude modulation or phase shift keying modulation.

24. The method (400) according to any one of claims 16 to 23, characterized in that: The concatenation circuit (210) further comprises multiplying the concatenation result of the first symbol vector and the second symbol vector by a permutation matrix to form the baseband symbol vector.

25. A method (1000) for random access communication, characterized in that: include: At least one antenna (502) of the receiving device (104) simultaneously receives a plurality of radio frequency signals from a plurality of transmitting devices (102); The demodulation circuit (503) of the receiving device (104) demodulates the received radio frequency signal into a demodulation signal; The splitting circuit (504) of the receiving device (104) splits the demodulated signal into a first baseband signal and a second baseband signal; The separation circuit (506) of the receiving device (104) generates a plurality of first estimated symbol vectors from the first baseband signal using a rank-1 tensor structure of order d associated with each transmitting device, where d>1; The separation circuit (506) generates a plurality of estimated channel parameters associated with the plurality of transmitting devices (102) and a plurality of estimated precoding matrices associated with the plurality of transmitting devices (102) based on the first baseband signal; The equalization circuit (508) of the receiving device (104) generates a plurality of second estimated symbol vectors from the second baseband signal based on the plurality of estimated precoding matrices and the plurality of estimated channel parameters; The decoding circuit (510) of the receiving device (104) decodes each of the first estimated symbol vector and the second estimated symbol vector to generate multiple decoded messages, each decoded message including a first bit sequence corresponding to a first portion of data and a second bit sequence corresponding to a second portion of data, wherein the second portion of data is associated with a corresponding transmitting device among the multiple transmitting devices (102).

26. The method (1000) according to claim 25, characterized in that The decoding circuit (510) performs decoding including: each of a plurality of first decoders (516) of the decoding circuit (510) decodes one of the first estimated symbol vectors to generate a plurality of first decoded messages, each first decoded message comprising a first bit sequence corresponding to a first portion of data associated with a corresponding transmitting device of the plurality of transmitting devices (102); Each of the plurality of second decoders (518) of the decoding circuit (510) decodes one of the second estimated symbol vectors generated by the equalization circuit (508) to generate a plurality of second decoded messages, each of the second decoded messages comprising a second bit sequence corresponding to a second portion of data associated with a corresponding transmitting device among the plurality of transmitting devices (102).

27. The method (1000) according to claim 25, characterized in that The decoding circuit (510) performs decoding including: Each of a plurality of decoders (520) of the decoding circuit (510) receives one of the first estimated symbol vectors and one of the second estimated symbol vectors; Each decoder concatenates the received first estimated symbol vector and the second estimated symbol vector into a concatenated estimated symbol vector; Each decoder decodes the concatenated estimated symbol vectors to generate a plurality of decoded messages.

28. The method (1000) according to any one of claims 25 to 27, characterized in that Also included is the splitting circuit (504) applying a predefined permutation matrix to the demodulated signal to generate the first baseband signal and the second baseband signal.

29. The method (1000) according to any one of claims 25 to 28, characterized in that Also includes: The separation circuit (506) estimates the time offset and the frequency offset in each of the first estimated symbol vectors to generate a plurality of time offsets and a plurality of frequency offsets; The separation circuit (506) applies a time offset compensation based on the corresponding time offset and a frequency offset compensation based on the corresponding frequency offset to the corresponding first estimated symbol vector; The equalization circuit (508) generates each of the second estimated symbol vectors based on the plurality of time offsets, the plurality of frequency offsets, the plurality of estimated precoding matrices, and the plurality of estimated channel parameters.

30. A computer program product, characterized in that The method comprises program instructions which, when executed by one or more processors in a computer system, perform the method (400) according to any one of claims 16 to 24 and / or the method (1000) according to any one of claims 25 to 29.

31. A computer system, characterized in that: It comprises one or more processors and one or more memories, wherein the one or more memories store program instructions, and when the program instructions are executed by the one or more processors, the one or more processors execute the method (400) according to any one of claims 16 to 24 and / or the method (1000) according to any one of claims 25 to 29.

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