Novel semiconductor substrate preparation method

Abstract

The invention provides a novel semiconductor substrate preparation method, relates to the technical field of semiconductor chips, and aims to solve the problem of relatively large material loss in a substrate preparation process. The novel semiconductor substrate preparation method comprises the following steps: providing a supporting layer and a donor layer; the donor layer comprises a first surface and a second surface which are oppositely arranged, and the supporting layer is bonded to the first surface of the donor layer; laser irradiation is carried out on the side, away from the first surface, of the second surface of the donor layer, a modified layer is formed, a first sub-layer is formed on the part, from the modified layer to the first surface, of the donor layer, and a second sub-layer is formed on the part, from the modified layer to the second surface, of the donor layer; stripping the second sub-layer and the first sub-layer from the modified layer; and polishing the surface, away from the supporting layer, of the first sub-layer to obtain the semiconductor substrate. The semiconductor substrate is used for preparing electronic equipment.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor chip technology, and in particular to a new method for preparing a semiconductor substrate. Background Art

[0002] High-electron-mobility transistors (HEMTs) are mainly used as power amplifiers in electronic devices. Gallium nitride (GaN)-based HEMTs are widely used in base stations and other equipment due to their high performance. Among them, GaN-based HEMTs are usually made on high-purity silicon carbide substrates through epitaxial growth.

[0003] The formation process of silicon carbide substrate mainly adopts high-purity silicon carbide powder, and obtains SiC crystal by high-temperature sublimation at a temperature of more than 2000 degrees through the physical vapor transport process (PVT). During the growth process of SiC crystal, a high purity growth environment must be maintained (nitrogen in the air needs to be isolated). Then, the SiC crystal is processed by wire cutting, grinding and polishing to obtain silicon carbide substrate.

[0004] However, in the process of obtaining a silicon carbide substrate from a SiC crystal through cutting, grinding and polishing, a large amount of material is lost. Summary of the invention

[0005] The embodiments of the present disclosure provide a new method for preparing a semiconductor substrate, aiming to solve the problem of large material loss during the substrate preparation process.

[0006] To achieve the above objectives, the embodiments of the present disclosure adopt the following technical solutions: A new method for preparing a semiconductor substrate is provided, the method comprising: providing a support layer and a donor layer; the support layer comprises a polycrystalline silicon carbide substrate or a grade D silicon carbide substrate, and the material of the donor layer is in a single crystal structure; bonding; the donor layer comprises a first surface and a second surface arranged opposite to each other, and the support layer is bonded to the first surface of the donor layer; laser irradiation; laser irradiation is performed on a side of the second surface of the donor layer away from the first surface, a modified layer is formed at a position of the donor layer with a first preset thickness away from the first surface, a portion of the donor layer from the modified layer to the first surface forms a first sublayer, and a portion of the donor layer from the modified layer to the second surface forms a second sublayer; peeling; the second sublayer and the first sublayer are peeled off from the modified layer; polishing; the surface of the first sublayer away from the support layer is polished, the first sublayer after polishing forms a single crystal layer, and the single crystal layer and the support layer form a semiconductor substrate.

[0007] The above-mentioned embodiment of the present disclosure provides a new method for preparing a semiconductor substrate. By bonding a support layer on one side of the donor layer, the support layer has a supporting function, which can improve the machinability of the donor layer, so that the material thickness of the peeled donor layer can be thinner, thereby achieving the purpose of saving materials. Moreover, a modified layer is formed inside the donor layer by laser irradiation. By adjusting the conditions of laser irradiation, the first preset thickness can be made thinner, so as to realize the formation of a semiconductor substrate using less material of the donor layer, reduce material loss, and further save costs.

[0008] In some embodiments, a new method for preparing a semiconductor substrate further includes: cyclically performing bonding, laser irradiation, stripping and polishing steps to obtain a semiconductor substrate in each cycle; in the bonding step of each cycle, the second sublayer in the previous cycle process is used as the donor layer of the current cycle process to bond with the support layer of the current cycle.

[0009] In some embodiments, in a cycle, when the thickness range of the donor layer is <200 μm, the following steps are performed: laser irradiation is performed on the side of the second surface of the donor layer away from the first surface to form a modified layer between the first surface and the second surface of the donor layer; the portion of the donor layer from the modified layer to the first surface forms a first sublayer, and the portion of the donor layer from the modified layer to the second surface forms a second sublayer, and the thickness of the first sublayer and the second sublayer are both greater than or equal to a first preset thickness; a third supporting layer and a fourth supporting layer are provided, the third supporting layer is bonded to the first sublayer, and the fourth supporting layer is bonded to the second sublayer; the first sublayer and the second sublayer are peeled off from the modified layer; the surface of the first sublayer away from the third supporting layer is polished to obtain another semiconductor substrate; the surface of the second sublayer away from the fourth supporting layer is polished to obtain another semiconductor substrate.

[0010] In some embodiments, the first preset thickness ranges from 5 μm to 350 μm.

[0011] In some embodiments, the first preset thickness ranges from 40 μm to 50 μm.

[0012] In some embodiments, the thickness of the single crystal layer is in a range of 5 μm to 15 μm.

[0013] In some embodiments, the surface roughness of the single crystal layer is Ra≤0.2.

[0014] In some embodiments, the conditions of laser irradiation include at least one of the following: a wavelength range of 532nm to 1064nm, a pulse width range of 500fs to 80ps, an output power range of 1.5W to 12W, a scanning interval range of 0.3mm to 0.5mm, a scanning speed range of 50mm / s to 1200mm / s and a vibration frequency range of 60KHz to 120KHz.

[0015] In some embodiments, bonding includes bonding the support layer to the first surface of the donor layer using a thermal bonding process.

[0016] In some embodiments, the peeling includes peeling the second sub-layer and the first sub-layer from the modified layer using ultrasonic treatment.

[0017] In some embodiments, the ultrasonic power of the ultrasonic treatment ranges from 200W to 1000W.

[0018] In some embodiments, the initial thickness of the donor layer ranges from 200 μm to 500 μm.

[0019] In some embodiments, the thickness of the support layer ranges from 200 μm to 1000 μm.

[0020] In some embodiments, the surface roughness of the support layer is Ra≤1.

[0021] In some embodiments, the material of the donor layer includes any one of silicon carbide, diamond, and gallium oxide. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the present disclosure, the following briefly introduces the drawings required for use in some embodiments of the present disclosure. Obviously, the drawings described below are only drawings of some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can also be obtained based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams, and are not limitations on the actual size of the products involved in the embodiments of the present disclosure, the actual process of the method, etc.

[0023] Figure 1 is a flow chart of a novel method for preparing a semiconductor substrate according to some embodiments; Figure 2 It is a structural schematic diagram corresponding to each step of a new method for preparing a semiconductor substrate according to some embodiments; Figure 3 is another flow chart of a novel method for preparing a semiconductor substrate according to some embodiments; Figure 4 is a schematic structural diagram of laser irradiation in a new method for preparing a semiconductor substrate according to some embodiments; Figure 5 A schematic diagram of a structure of peeling in a new method for preparing a semiconductor substrate according to some embodiments; Figure 6 A schematic diagram of a polishing structure in a new method for preparing a semiconductor substrate according to some embodiments; Figure 7 is a schematic structural diagram of a semiconductor substrate according to some embodiments; Figure 8 is a schematic structural diagram of an electronic device according to some embodiments. DETAILED DESCRIPTION

[0024] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of the present disclosure.

[0025] In the description of the present disclosure, it should be understood that the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present disclosure.

[0026] Unless the context requires otherwise, throughout the specification and claims, the term "including" is to be interpreted as an open, inclusive meaning, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "exemplarily" or "some examples" and the like are intended to indicate that specific features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the specific features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner.

[0027] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.

[0028] When describing some embodiments, the expression "connected" and its derivatives may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components have direct physical or electrical contact with each other.

[0029] “At least one of A, B, and C” has the same meaning as “at least one of A, B, or C” and both include the following combinations of A, B, and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B, and C.

[0030] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.

[0031] As used herein, "about," "substantially," or "approximately" includes the stated value and an average value that is within an acceptable range of variation from the particular value as determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0032] Exemplary embodiments are described herein with reference to cross-sectional views and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of layers and regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are conceivable. Therefore, the exemplary embodiments should not be interpreted as being limited to the shapes of the regions shown herein, but include shape deviations due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device, and are not intended to limit the scope of the exemplary embodiments.

[0033] As used herein, the term "substrate" refers to a material onto which subsequent layers of material may be added. The substrate itself may be patterned. The material added onto the substrate may be patterned or may remain unpatterned.

[0034] As a representative substrate material for third-generation semiconductors, SiC substrate has a Mohs hardness of >9.2, second only to diamond. Therefore, the traditional cutting method of SiC substrates is a multi-wire cutting process: the consumables are metal wires and oily diamond suspensions. Taking the cutting of a 6-inch substrate as an example, a single cutting time is about 130 hours, and the diameter of the wire saw used in the cutting process is 0.16mm. In addition, due to the particle size of the abrasive in the mortar and the vibration of the cutting wire mesh, each cutting loss is about 180μm / piece; in addition, mechanical fractures during the cutting process cause cutting damage, and the depth of the damage layer is about 55μm / face to 60μm / face, and the total loss of the two surfaces of a single piece is 110μm / piece to 120μm / piece. Using multi-wire cutting and subsequent grinding and polishing processes, the total material loss per piece is about 300μm / piece. Taking the target thickness of the 6-inch substrate obtained as 350μm as an example, the material loss of a single piece reaches more than 40%.

[0035] From the above, it can be seen that how to reduce the material loss in the SiC substrate cutting process or produce more substrate slices with the same thickness of crystal while ensuring the substrate quality is the key issue in substrate processing at present.

[0036] Based on this, the embodiments of the present disclosure provide a new method for preparing a semiconductor substrate, such as Figure 1 As shown, a new method for preparing a semiconductor substrate includes steps: R1 to R6.

[0037] R1, such as Figure 2 As shown, a support layer 11 and a donor layer 120 are provided; the support layer 11 includes: a polycrystalline silicon carbide substrate or a D-grade silicon carbide substrate, and the material of the donor layer 120 is a single crystal structure.

[0038] Exemplarily, the initial thickness d1 of the donor layer 120 ranges from 200 μm to 500 μm. For example, the thickness d1 of the donor layer 120 is 200 μm, 250 μm, 300 μm, 350 μm, 400 μm, 450 μm or 500 μm, etc., which is not limited here.

[0039] Exemplarily, the material of the donor layer 120 includes any one of silicon carbide, diamond and gallium oxide.

[0040] Exemplarily, the thickness h2 of the support layer 11 ranges from 200 μm to 1000 μm. For example, the thickness h2 of the support layer 11 is 200 μm, 300 μm, 500 μm, 600 μm, 700 μm, 800 μm or 1000 μm, etc., which is not limited here.

[0041] It should be noted that the material of the donor layer 120 is, for example, P-grade silicon carbide, and the difference between P-grade silicon carbide and D-grade silicon carbide lies in the silicon carbide content. The silicon carbide content of P-grade silicon carbide is higher than that of D-grade silicon carbide.

[0042] R2, such as Figure 2 As shown, bonding; the donor layer 120 includes a first surface m1 and a second surface m2 arranged opposite to each other, and the support layer 11 is bonded to the first surface m1 of the donor layer 120.

[0043] It should be noted that the two opposite surfaces of the donor layer 120 along the direction of the thickness d1 are the first surface m1 and the second surface m2, respectively. Taking the material of the donor layer 120 as silicon carbide as an example, the first surface m1 is the C surface of the donor layer 120, and the second surface m2 is the Si surface of the donor layer 120. The C surface refers to the (000-1) surface of silicon carbide, and the terminating atoms of this surface are carbon atoms. The Si surface refers to the (0001) crystal plane of the silicon carbide wafer, and the terminating atoms of this surface are silicon atoms. The difference between the C surface and the Si surface will affect the physical and chemical properties of the SiC wafer, such as thermal conductivity, electrical conductivity, carrier mobility and interface surface density. The selection of the C surface and the Si surface will also affect the manufacturing process and performance of SiC devices, such as epitaxial growth, ion implantation, oxidation, metal deposition and contact resistance.

[0044] The support layer 11 is bonded to the first surface m1 of the donor layer 120, that is, the support layer 11 is bonded to the C surface of the donor layer 120. Moreover, for the two surfaces opposite to each other in the direction where the thickness d1 of the silicon carbide is located, when the first surface m1 is one of the C surface and the Si surface, then the second surface m2 is the other of the C surface and the Si surface, that is, when the support layer 11 is bonded to the C surface of the donor layer 120, after the subsequent peeling and polishing process is performed on the side of the donor layer 120 away from the support layer 11, the surface of the side of the donor layer 120 away from the support layer 11 is still the Si surface.

[0045] Exemplarily, the support layer 11 is bonded to the first surface m1 of the donor layer 120 using a thermal bonding process.

[0046] R3, such as Figure 2 As shown, laser irradiation is performed; laser irradiation is performed on the side of the second surface m2 of the donor layer 120 away from the first surface m1, a modified layer 12a is formed at a position in the donor layer 120 with a first preset thickness d11 away from the first surface m1, the portion of the donor layer 120 from the modified layer 12a to the first surface m1 forms a first sublayer 121, and the portion of the donor layer 120 from the modified layer 12a to the second surface m2 forms a second sublayer 122.

[0047] It should be noted that when the material of the donor layer 120 includes silicon carbide, the modified layer 12 a is decomposed from single crystal SiC into amorphous Si, C and SiC.

[0048] Exemplarily, the conditions of laser irradiation include at least one of the following: a wavelength range of 532nm to 1064nm, a pulse width range of 500fs to 80ps, an output power range of 1.5W to 12W, a scanning interval range of 0.3mm to 0.5mm, a scanning speed range of 50mm / s to 1200mm / s and a vibration frequency range of 60KHz to 120KHz.

[0049] For example, the wavelength is 532nm, 650nm, 710nm, 790nm, 870nm, 960nm, 1032nm or 1064nm, the pulse width is 500fs, 600fs, 650fs, 750fs, 800fs, 1ps, 10ps, 20ps, 30ps, 40ps, 50ps, 60ps, 70ps or 80ps, the output power is 1.5W, 3W, 4W, 6W, 7W, 9W, 10 W, 11W or 12W, etc., the scanning interval is 0.3mm, 0.4mm or 0.5mm, etc., the scanning speed is 50mm / s, 100mm / s, 200mm / s, 400mm / s, 550mm / s, 600mm / s, 750mm / s, 800mm / s or 1200mm / s, etc., the vibration frequency is 60KHz, 75KHz, 80KHz, 90KHz, 100KHz or 120KHz, etc., and there is no limitation here.

[0050] Exemplarily, the first preset thickness d11 ranges from 5 μm to 350 μm. Preferably, the first preset thickness d11 ranges from 40 μm to 50 μm.

[0051] For example, the first preset thickness d11 is 5 μm, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 40 μm, 50 μm, 70 μm, 100 μm, 150 μm, 200 μm or 350 μm, etc., which is not limited here.

[0052] By varying the laser irradiation conditions, a modified layer 12 a may be formed in the donor layer 120 at a position that is different from the first surface m1 by the first preset thickness d11 .

[0053] For example, the wavelength of laser irradiation is 1030 nm, the pulse width is 750 fs, the output power is 2.5 W, the scanning interval is 0.5 mm, the scanning speed is 800 mm / s, and the vibration frequency is 60 KHz. At this time, the first preset thickness d11 is about 50 μm. In other words, the 50 μm thick portion of the donor layer 120 can be used to form a semiconductor substrate 10.

[0054] For another example, the wavelength of laser irradiation is 1030nm, the pulse width is 750fs, the output power is 1.5W, the scanning interval is 0.3mm, and the scanning speed is 600mm / s. At this time, the first preset thickness d11 is about 40μm. That is to say, the 40μm thick portion of the donor layer 120 can be used to form a semiconductor substrate 10. Reduce the laser power (for example, from 2.5W to 1.5W), according to the Gaussian law of laser beam energy distribution, after the laser spot shape is determined, the greater the energy, the greater the distance between the focus point and the crack extension surface, and vice versa; in addition, the scanning interval is changed from 0.5mm to 0.3mm and the scanning speed is changed from 800mm / s to 600mm / s, so that the modified layer 12a is modified more fully, and ultrasonic separation is easier to achieve.

[0055] It should be noted that there is no limitation on the execution order of step R2 bonding and step R3 laser irradiation, that is, after the support layer 11 is bonded to the donor layer 120, laser irradiation is performed on the side of the second surface m2 of the donor layer 120 away from the first surface m1; or, after laser irradiation is performed on the side of the second surface m2 of the donor layer 120 away from the first surface m1, the support layer 11 is bonded to the donor layer 120.

[0056] R4, such as Figure 2 As shown, peeling; the second sub-layer 122 and the first sub-layer 121 are peeled off from the modified layer 12a.

[0057] Exemplarily, ultrasonic treatment is used to peel off the second sub-layer 122 and the first sub-layer 121 from the modified layer 12a.

[0058] Exemplarily, the ultrasonic power of the ultrasonic treatment ranges from 200W to 1000W. For example, the ultrasonic power of the ultrasonic treatment is 200W, 350W, 400W, 500W, 700W, 800W, 850W, 900W or 1000W, etc., which is not limited here.

[0059] It should be noted that the principle of ultrasonic assisted peeling is to apply ultrasonic waves at a frequency close to or slightly larger than the natural frequency of the single crystal material of the donor layer 120. When ultrasonic waves are applied, a resonance-like effect can be generated inside the material to generate tensile stress and separate at the position of the modified layer 12a.

[0060] R5, such as Figure 2 As shown, polishing; the surface of the first sublayer 121 away from the support layer 11 is polished, and after polishing, the first sublayer 121 forms a single crystal layer 12, and the single crystal layer 12 and the support layer 11 form a semiconductor substrate 10.

[0061] For an introduction to the semiconductor substrate 10 , please refer to the subsequent content and will not be described in detail here.

[0062] R6, such as Figure 2 As shown, the steps of bonding, laser irradiation, stripping and polishing are performed cyclically, and a semiconductor substrate 10 is obtained in each cycle; in the bonding step of each cycle, the second sublayer 122 in the previous cycle process is used as the donor layer 120 of the current cycle process to bond with the support layer 11 of the current cycle.

[0063] It should be noted that, in the polishing step R5, the surface of the second sub-layer 122 separated from the first sub-layer 121 is also polished to remove the sub-damage layer formed in the second sub-layer 122 due to the modification, and the second sub-layer 122 with the sub-damage layer removed is used as the donor layer 120 of the next cycle and bonded to the support layer 11 of the next cycle.

[0064] Through the above steps R1 to R6, the donor layer 120 is used to prepare multiple semiconductor substrates 10 through a cyclic method, making full use of the donor layer 120 to achieve the purpose of saving materials. Moreover, due to the setting of the laser irradiation conditions, the first preset thickness d11 can be flexibly controlled so that the donor layer 120 for preparing a single semiconductor substrate 10 consumes less material. For example, the thickness of the donor layer 120 formed into a single semiconductor substrate 10 is 40μm, 30μm or less than 30μm. Compared with the single-chip loss of about 300μm in the related art, the embodiment of the present disclosure further saves materials.

[0065] In some embodiments, Figure 3 As shown, in the cycle, when the thickness of the donor layer 120 is less than 200 μm, that is, in the cycle, the second sublayer 122 serves as the donor layer 120 of the next cycle, at this time, the thickness of the donor layer 120 is less than 200 μm. A new method for preparing a semiconductor substrate also includes: T1 to T4.

[0066] It should be noted that, in this cycle, for the sake of convenience of introduction, the donor layer 120 can be represented as the second sub-donor layer 1202, and each time the laser is irradiated, the portion from the modified layer 12a to the first surface m1 (C surface) forms the first sub-layer 121, and the portion of the donor layer 120 from the modified layer 12a to the second surface m2 (Si surface) forms the second sub-layer 122.

[0067] T1, such as Figure 2 As shown, laser irradiation is performed on the side of the second surface m1 of the donor layer 120 away from the first surface m1, and a modified layer 12a is formed between the first surface m1 and the second surface m2 of the donor layer 120; the portion of the donor layer 120 from the modified layer 12a to the first surface m1 forms a first sublayer 121, and the portion of the donor layer 120 from the modified layer 12a to the second surface m2 forms a second sublayer 122, and the thickness of the first sublayer 121 and the second sublayer 122 are both greater than or equal to the first preset thickness d11.

[0068] T2, such as Figure 2 As shown, a third supporting layer 113 and a fourth supporting layer 114 are provided, the third supporting layer 113 is bonded to the first sub-layer 121 , and the fourth supporting layer 114 is bonded to the second sub-layer 122 .

[0069] T3, such as Figure 2 As shown, the first sub-layer 121 and the second sub-layer 122 are peeled off from the modified layer 12a.

[0070] For the introduction of peeling, please refer to step R4 and will not be repeated here.

[0071] T4, such as Figure 2 As shown, the surface of the first sublayer 121 away from the third supporting layer 113 is polished to obtain another semiconductor substrate 10; the surface of the second sublayer 122 away from the fourth supporting layer 114 is polished to obtain another semiconductor substrate 10.

[0072] Through steps T1 to T4, a donor layer 120 with a thickness range of <200 μm is formed into two semiconductor substrates 10, and two support layers 11, namely a third support layer 113 and a fourth support layer 114, are respectively bonded to the C surface and Si surface of the donor layer 120. The third support layer 113 and the fourth support layer 114 have a supporting effect on the donor layer 120, thereby improving the machinability of the donor layer 120 and facilitating the processing of the thinner donor layer 120. The donor layer 120 forms two semiconductor substrates 10, thereby improving the yield of the semiconductor substrates 10.

[0073] According to the above steps R1 to R6 and T1 to T4, the following embodiments are provided.

[0074] like Figure 2 As shown, the following takes the thickness d1 of the donor layer 120 as 350 μm as an example to introduce a method for preparing the donor layer 120 to form four semiconductor substrates 10, which includes steps S1 to S13.

[0075] S1, such as Figure 2 As shown, a first support layer 111 and a donor layer 120 are provided, and a thickness d1 of the donor layer 120 is 350 μm.

[0076] Exemplarily, the first support layer 111 and the donor layer 120 are both cylindrical, and the radial dimensions of the first support layer 111 and the donor layer 120 are equal. For example, the radial dimensions of the first support layer 111 and the donor layer 120 are 6 inches.

[0077] Exemplarily, the material of the donor layer 120 is single crystal SiC.

[0078] Exemplarily, the first support layer 111 is a polycrystalline SiC substrate, and the thickness h2 of the first support layer 111 is in the range of 200 μm to 500 μm; the surface roughness range of the first support layer 111 is Ra≤1 nm, and the surface roughness of the first support layer 111 is small, which is conducive to improving the bonding force between the first support layer 111 and the donor layer 120. For example, the force between the first support layer 111 and the donor layer 120 is van der Waals force.

[0079] S2, such as Figure 2 As shown, the first support layer 111 is bonded to one side of the donor layer 120 .

[0080] Exemplarily, the first support layer 111 and the donor layer 120 are first cleaned with deionized water, and then the first support layer 111 and the donor layer 120 are placed in a bonding chamber of a bonding device, and at least one of the three gases N2, O2 and Ar is introduced, and high voltage is applied to discharge the gas to form plasma. After the surfaces of the first support layer 11 and the donor layer 120 are activated by plasma, the chemical bonds on the surfaces of the first support layer 11 and the donor layer 120 are opened to form dangling bonds, and then pressurized and annealed in the temperature range of 300°C to 500°C to complete the bonding of the first support layer 11 and the donor layer 120.

[0081] In the embodiment of the present disclosure, the C surface of the donor layer 120 is bonded to the first support layer 111, and the surface of the semiconductor substrate 10 away from the support layer 11 is a Si surface, which can be epitaxially grown to form a high electron mobility transistor 13 (such as Figure 8 as shown).

[0082] S3, such as Figure 2 and Figure 4 As shown, laser irradiation is performed on a side of the donor layer 120 away from the first supporting layer 111 , and a modified layer 12 a is formed at a position of the donor layer 120 that is about 50 μm away from the first supporting layer 111 .

[0083] The portion of the donor layer 120 from the modified layer 12 a to the first surface m1 forms a first sublayer 121 , and the portion of the donor layer 120 from the modified layer 12 a to the second surface m2 forms a second sublayer 122 .

[0084] It should be noted that 50 μm is the first preset thickness d11.

[0085] Exemplarily, the laser irradiation conditions are: wavelength 1030nm, pulse width 750fs, output power 2.5w, scanning interval 0.5mm, scanning speed 800mm / s, vibration frequency 60KHz-120KHz. After the donor layer 120 is scanned on the entire surface, the modified layer 12a is formed.

[0086] It should be noted that the donor layer 120 may be irradiated with laser and then the C surface of the donor layer 120 may be bonded to one side of the first supporting layer 111 to obtain the bonded donor layer 120 and the first supporting layer 111 .

[0087] S4, such as Figure 2 and Figure 5 As shown, the bonding structure of the donor layer 120 including the modified layer 12a and the first support layer 111 is placed in an ultrasonic assisted device 20 and ultrasonically treated so that the donor layer 120 is separated from the position of the modified layer 12a.

[0088] The first sub-layer 121 and the first supporting layer 111 are referred to as a first initial bonding body 131 ; the second sub-layer 122 is used for preparing the next semiconductor substrate 10 .

[0089] The ultrasonic auxiliary device 20 includes: an ultrasonic cavity 21 and an ultrasonic generator 22 located in the ultrasonic cavity 21. The ultrasonic cavity 21 also contains water and a coupling agent, such as glycerol or polyethylene glycol.

[0090] S5. Grind and polish the sides where the first initial bonding body 131 and the second sub-layer 122 are separated from each other to remove sub-damage generated inside the SiC material due to the separation of the two.

[0091] The second sub-layer 122 after grinding and polishing is called the first sub-donor layer 1201, which is used as the donor layer 120 of the next cycle.

[0092] Exemplarily, the grinding depth is about 40 μm to remove sub-damage generated inside the SiC material.

[0093] like Figure 2 and Figure 6 As shown, polishing and cleaning are then performed, for example, using Chemical Mechanical Polishing (CMP), with a polishing depth of about 1 μm to 3 μm.

[0094] For example, the polishing device 40 includes an upper polishing plate 41 , a lower polishing plate 42 , and a polishing liquid injector 43 .

[0095] like Figure 2 and Figure 7 As shown, after grinding and polishing, the first initial bonding body 131 forms a semiconductor substrate 10, and the thickness h1 of the single crystal layer 12 is about 7μm to 9μm. The thickness d2 of the first sub-donor layer 1201 is equal to the thickness d1=350μm of the donor layer 120, minus the first preset thickness d11=50μm, minus the grinding depth of about 40μm, minus the polishing depth of about 1μm to 3μm, that is, the thickness d2 of the first sub-donor layer 1201 is 350μm-50μm-40-1μm≈259μm.

[0096] S6, such as Figure 2 As shown, laser irradiation is performed on one side of the second surface m2 of the first sub-donor layer 1201 to form a modified layer 12a at a position about 50 μm away from the first surface m1.

[0097] The first surface m1 is the C-plane of the first sub-donor layer 1201 , and the second surface m2 is the Si-plane of the first sub-donor layer 1201 .

[0098] Exemplarily, the conditions for laser irradiation refer to the above step S3 and are not described in detail here.

[0099] S7, such as Figure 2 As shown, a second supporting layer 112 is provided, and the second supporting layer 112 is bonded to the first surface m1 (C surface) of the first sub-donor layer 1201 .

[0100] For the introduction of bonding contents, please refer to step S2 and will not be repeated here.

[0101] S8, such as Figure 2 As shown, the bonding structure of the first sub-donor layer 1201 including the modified layer 12a and the second supporting layer 112 is placed in an ultrasonic-assisted device 20 and ultrasonically treated so that the first sub-donor layer 1201 is separated from the position of the modified layer 12a.

[0102] The bonding structure of the first sub-layer 121 and the second supporting layer 112 forms a second initial bonding body 132 ; the second sub-layer 122 is used for preparing the next semiconductor substrate 10 .

[0103] S9, grinding and polishing the sides where the second initial bonding body 132 and the second sub-layer 122 are separated from each other to remove sub-damage generated inside the SiC material due to the separation of the two.

[0104] The second sub-layer 122 is ground and polished to form a second sub-donor layer 1202 , and the second sub-donor layer 1202 is used as the donor layer 120 of the next cycle.

[0105] like Figure 2 and Figure 7 As shown, the second initial bonding body 132 forms a second semiconductor substrate 10, and the thickness h1 of the single crystal layer 12 is about 7μm to 9μm. The thickness d3 of the second sub-donor layer 1202 is equal to the thickness d2 = 259μm of the first sub-donor layer 1201, minus the first preset thickness d11 = 50μm, minus the grinding depth of about 40μm, minus the polishing depth of about 1μm to 3μm, that is, the thickness d3 of the second sub-donor layer 1202 is 259μm-50μm-40μm-1μm≈168μm.

[0106] S10, such as Figure 2As shown, laser irradiation is performed on the side of the second surface m2 of the second sub-donor layer 1202 away from the first surface m1 to form a modified layer 12a at a position about 50 μm away from the first surface m1.

[0107] Exemplarily, the conditions for laser irradiation refer to the above step S3 and are not described in detail here.

[0108] S11, such as Figure 2 As shown, a third supporting layer 113 and a fourth supporting layer 114 are provided, and the third supporting layer 113 and the fourth supporting layer 114 are bonded to the first surface m1 and the second surface m2 of the second sub-donor layer 1202 , respectively.

[0109] For the introduction of bonding, please refer to step S2 and will not be repeated here.

[0110] For example, the third supporting layer 113 is bonded to the first surface m1 (C surface) of the second sub-donor layer 1202 , and the fourth supporting layer 114 is bonded to the second surface (Si surface) of the second sub-donor layer 1202 .

[0111] In other implementations, the third supporting layer 113 can be bonded to the C-face of the second sub-donor layer 1202 , and then laser irradiation can be performed on the side of the Si-face of the second sub-donor layer 1202 away from the C-face, and then the fourth supporting layer 114 can be bonded to the Si-face of the second sub-donor layer 1202 .

[0112] S12, placing the bonding structure of the second sub-donor layer 1202 including the modified layer 12a and the third supporting layer 113 and the fourth supporting layer 114 into an ultrasonic assisted device 20, and performing ultrasonic treatment, so that the second sub-donor layer 1202 is separated from the position of the modified layer 12a.

[0113] The portion of the second sub-donor layer 1202 from the modified layer 12a to the first surface m1 forms the first sub-layer 121 , and the portion of the donor layer 120 from the modified layer 12a to the second surface m2 forms the second sub-layer 122 .

[0114] The first sub-layer 121 and the third supporting layer 113 form a third initial bonding body 133 ; the second sub-layer 122 and the fourth supporting layer 114 form a fourth initial bonding body 134 .

[0115] S13 , grinding the surfaces of the third initial bonding body 133 and the fourth initial bonding body 134 separated from each other to obtain a third semiconductor substrate 10 and a fourth semiconductor substrate 10 .

[0116] Through the above steps S1 to S13 , four semiconductor substrates 10 are formed with the donor layer 120 having a thickness d1 of 350 μm. Compared with one substrate formed with the donor layer 120 having a thickness of 350 μm, the material loss is reduced to 1 / 4 of the original.

[0117] For example, the material consumption is 3000 RMB / mm: the material cost saving = 3000 × 0.65 × 0.75 = 1462.5; thinning station: the traditional processing thinning removal amount is 120 μm per piece (double-sided) grinding, and the embodiment of the present disclosure removes 80 μm per piece. The grinding wheel is estimated as a single grinding wheel processing 100 pieces (grinding wheel unit price 20000 RMB), and the cost reduction per piece = 20000 / 100 × 1 / 3 = 66.7; After the above cost reduction addition, ignoring the bonding water and electricity costs, considering Considering the original single-piece substrate processing fee (the empirical value of the processing fee is calculated based on RMB 800 / piece, the cost of the single-piece SiC substrate is 3000×0.65+800=2750), the proportion of the cutting and thinning cost reduced to the original cost = (2750-1462.5-66.7) / 2750×100%=44.3%, so the cost is reduced by about 44.3%. Therefore, the new semiconductor substrate preparation method provided in the embodiment of the present disclosure greatly reduces the cost of the single-piece semiconductor substrate 10.

[0118] Since the third support layer 113 is bonded to the first surface m1 of the second sub-donor layer 1202, the second surface m2 (Si surface) of the semiconductor substrate 10 having the third support layer 113 can be used to produce an epitaxial layer to form a high electron mobility transistor 13 (such as Figure 8 As shown). Since the fourth support layer 114 is bonded to the second surface m2 of the second sub-donor layer 1202, the first surface m1 (C-plane) of the semiconductor substrate 10 having the fourth support layer 114 can be used as a seed crystal in a physical vapor transport method for growing a SiC single crystal.

[0119] like Figure 7 As shown, an embodiment of the present disclosure further provides a semiconductor substrate 10, the semiconductor substrate 10 includes: a support layer 11 and a single crystal layer 12, the support layer 11 includes: a polycrystalline silicon carbide substrate or a D-grade silicon carbide substrate; the single crystal layer 12 is bonded to one side of the support layer 11, and the thickness h1 of the single crystal layer 12 ranges from 5μm to 15μm.

[0120] From the above content about a new semiconductor substrate preparation method, it can be seen that the setting of bonding the support layer 11 to one side of the donor layer 120, combined with the laser irradiation process, can obtain a semiconductor substrate 10 with a thinner single crystal layer 12 thickness h1, and reduce material loss and manufacturing cost.

[0121] Exemplarily, the thickness h1 of the single crystal layer 12 is 5 μm, 6 μm, 8 μm, 9 μm, 10 μm, 11 μm, 12 μm, 13 μm, 14 μm or 15 μm, etc., which is not limited here.

[0122] Exemplarily, the material of the single crystal layer 12 includes any one of silicon carbide, diamond and gallium oxide.

[0123] The above-mentioned novel method for preparing a semiconductor substrate can be used to prepare a single crystal layer 12 having any one of silicon carbide, diamond and gallium oxide.

[0124] In some examples, such as Figure 7 As shown, the surface roughness of the single crystal layer 12 is in the range of Ra≤0.2 nm.

[0125] Wherein, Ra represents the arithmetic mean deviation of the profile. By setting the surface roughness of the single crystal layer 12 to Ra≤0.2 nm, the single crystal layer 12 can be used for epitaxial growth of semiconductor devices, for example, the semiconductor device includes a high electron mobility transistor 13 (such as Figure 8 as shown).

[0126] In some examples, such as Figure 7 As shown, the surface roughness of the support layer 11 is in the range of Ra≤1 nm.

[0127] The surface roughness of the support layer 11 will affect the bonding effect between the support layer 11 and the donor layer 120. By setting the surface roughness range of the support layer 11 to Ra≤1nm, the bonding force between the support layer 11 and the donor layer 120 is improved, so that the bonding force between the support layer 11 and the donor layer 120 is stronger.

[0128] In some examples, such as Figure 7 As shown, the thickness h2 of the support layer 11 ranges from 200 μm to 1000 μm.

[0129] Exemplarily, the thickness h2 of the support layer 11 is 200 μm, 250 μm, 300 μm, 350 μm, 400 μm, 450 μm, 500 μm, 600 μm, 700 μm, 750 μm, 800 μm, 900 μm or 1000 μm, etc., which is not limited here.

[0130] By setting the thickness h2 of the support layer 11 to be in the range of 200 μm to 1000 μm, it can be ensured that the support layer 11 has a good supporting effect on the donor layer 120 , so as to obtain a semiconductor substrate 10 with a thinner thickness h1 of the single crystal layer 12 .

[0131] like Figure 8 As shown, an embodiment of the present disclosure further provides an electronic device 100 , which includes the semiconductor substrate 10 as described in any of the above embodiments, and further includes: a high electron mobility transistor 13 , which is located on one side of the semiconductor substrate 10 .

[0132] Exemplarily, the electronic device 100 is a user device or terminal device of different types such as a computer, a mobile phone, a tablet computer, a wearable device, and a vehicle-mounted device; the electronic device 100 may also be a network device such as a base station. The specific form of the electronic device 100 is not particularly limited in the embodiment of the present application.

[0133] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed by the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A new method for preparing a semiconductor substrate, characterized in that: include: Providing a support layer and a donor layer; the support layer comprises a polycrystalline silicon carbide substrate or a D-grade silicon carbide substrate, and the material of the donor layer is in a single crystal structure; Bonding; The donor layer comprises a first surface and a second surface disposed opposite to each other, and the support layer is bonded to the first surface of the donor layer; Laser irradiation; Performing laser irradiation on a side of the second surface of the donor layer away from the first surface, forming a modified layer at a position of the donor layer with a first preset thickness away from the first surface, a portion of the donor layer from the modified layer to the first surface forming a first sublayer, and a portion of the donor layer from the modified layer to the second surface forming a second sublayer; Peeling off; peeling off the second sub-layer and the first sub-layer from the modified layer; Polishing: polishing the surface of the first sub-layer away from the supporting layer, so that the first sub-layer after polishing forms a single crystal layer, and the single crystal layer and the supporting layer form a semiconductor substrate.

2. A new method for preparing a semiconductor substrate according to claim 1, characterized in that: Also includes: cyclically performing the steps of bonding, laser irradiation, stripping and polishing, and obtaining a semiconductor substrate in each cycle; In the bonding step of each cycle, the second sub-layer in the previous cycle is used as the donor layer of the current cycle to bond with the support layer of the current cycle.

3. A new method for preparing a semiconductor substrate according to claim 2, characterized in that: In the cycle, when the thickness of the donor layer is in the range of <200 μm, the following steps are performed: Performing laser irradiation on a side of the second surface of the donor layer away from the first surface to form a modified layer between the first surface and the second surface of the donor layer; the portion of the donor layer from the modified layer to the first surface forms a first sublayer, and the portion of the donor layer from the modified layer to the second surface forms a second sublayer, and the thickness of the first sublayer and the second sublayer are both greater than or equal to the first preset thickness; Providing a third supporting layer and a fourth supporting layer, bonding the third supporting layer to the first sub-layer, and bonding the fourth supporting layer to the second sub-layer; peeling the first sub-layer and the second sub-layer from the modified layer; The surface of the first sub-layer away from the third supporting layer is polished to obtain another semiconductor substrate; the surface of the second sub-layer away from the fourth supporting layer is polished to obtain another semiconductor substrate.

4. A new method for preparing a semiconductor substrate according to claim 1, characterized in that: The first preset thickness ranges from 5 μm to 350 μm.

5. A new method for preparing a semiconductor substrate according to claim 4, characterized in that: The first preset thickness ranges from 40 μm to 50 μm.

6. A new method for preparing a semiconductor substrate according to claim 1, characterized in that: The thickness of the single crystal layer is in the range of 5 μm to 15 μm.

7. A new method for preparing a semiconductor substrate according to claim 1, characterized in that: The surface roughness of the single crystal layer is Ra≤0.

2.

8. A new method for preparing a semiconductor substrate according to claim 1, characterized in that: The conditions of the laser irradiation include at least one of the following: a wavelength range of 532nm to 1064nm, a pulse width range of 500fs to 80ps, an output power range of 1.5W to 12W, a scanning interval range of 0.3mm to 0.5mm, a scanning speed range of 50mm / s to 1200mm / s and a vibration frequency range of 60KHz to 120KHz.

9. A new method for preparing a semiconductor substrate according to claim 1, characterized in that: The bonding includes: bonding the support layer to the first surface of the donor layer using a thermal bonding process.

10. A new method for preparing a semiconductor substrate according to claim 1, characterized in that: The peeling includes: peeling the second sub-layer and the first sub-layer from the modified layer by ultrasonic treatment.

11. A new method for preparing a semiconductor substrate according to claim 10, characterized in that: The ultrasonic power of the ultrasonic treatment ranges from 200W to 1000W.

12. A new method for preparing a semiconductor substrate according to claim 1, characterized in that: The initial thickness of the donor layer ranges from 200 μm to 500 μm.

13. A new method for preparing a semiconductor substrate according to claim 1, characterized in that: The thickness of the support layer ranges from 200 μm to 1000 μm.

14. A new method for preparing a semiconductor substrate according to claim 1, characterized in that: The surface roughness of the support layer is Ra≤1.

15. A new method for preparing a semiconductor substrate according to any one of claims 1 to 14, characterized in that: The material of the donor layer includes any one of silicon carbide, diamond and gallium oxide.

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