Aging test circuit and method and chip

Abstract

The invention provides an aging test circuit and method and a chip, and belongs to the field of chip testing. The circuit comprises a test control module, a sensor control module, a temperature identification and control module, a heating and heat dissipation module, an aging control module, a scan chain and an aging output and sensor output indication module. Related modules with a junction temperature test function are added in an aging test circuit of a chip, so that the junction temperature of the chip can be detected while the aging test of the chip is performed, and the chip is heated or cooled based on the junction temperature, so that the aging frequency of the chip in the aging test process of the chip is controlled, and the reliability of the chip is improved. The influence of too low or too high temperature of the chip on the test result is avoided, and the accuracy of the chip aging test is improved.

Description

Technical Field

[0001] The present application belongs to the field of chip testing technology, and in particular relates to an aging test circuit, method and chip. Background Art

[0002] Aging test design is a common design method in testability design, which can ensure a high aging coverage. Usually in the aging test mode, the chip temperature is detected by a temperature sensor set outside the chip, and then the experimental environment is heated or cooled based on the chip temperature control to achieve stable chip temperature under aging.

[0003] However, the above method not only requires a lot of peripheral circuit support and software control, but also cannot accurately detect the real-time temperature of the chip, and it is difficult to accurately and timely control the chip temperature. During the test, the chip temperature is prone to be too high or too low, which reduces the accuracy of the chip aging test. Summary of the invention

[0004] Some embodiments of the present application provide aging test circuits, methods and chips.

[0005] Some embodiments of the present application provide an aging test circuit, the circuit comprising: a test control module, a sensor control module, a temperature identification and control module, a heating and heat dissipation module, an aging control module, a scan chain, an aging output and a sensor output indication module;

[0006] The test control module is used to send a start signal to the test control module and the sensor control module respectively in response to a received test instruction;

[0007] The sensor control module is used to send a sensor output signal to the temperature identification and control module in response to the start signal;

[0008] The temperature identification and control module identifies the junction temperature of the chip in response to the sensor output signal, sends a junction temperature heating / heat dissipation enable signal to the heating and heat dissipation module based on the junction temperature, and sends a junction temperature output signal to the aging output and sensor output indication module;

[0009] The heating and cooling module is used to heat or cool the chip in response to the junction temperature heating / cooling enable signal;

[0010] The burn-in control module is used to send a burn-in control signal to the scan chain in response to the start signal;

[0011] The scan chain is used to detect the circuit aging degree of the chip and send the obtained aging output signal to the aging output and sensor output indication module;

[0012] The aging output and sensor output indication module is used to output the aging output signal and the junction temperature output signal.

[0013] Optionally, the temperature identification and control module includes: a serial-parallel identification module, a serial-to-parallel module, a parallel-to-parallel module, and a serial-to-parallel analysis module;

[0014] The serial-to-parallel identification module is used to identify the serial-to-parallel type of the sensor output signal; when the serial-to-parallel type of the sensor output signal is a serial type, the sensor output signal is sent to the serial-to-parallel module; when the serial-to-parallel type of the sensor output signal is a parallel type, the sensor output signal is sent to the parallel-to-parallel module;

[0015] The serial-to-parallel module is used to convert the serial sensor output signal into a parallel display signal;

[0016] The parallel-to-parallel module is used to convert the output signal of the parallel type sensor into a parallel display signal;

[0017] The serial-parallel analysis module is used to send a junction temperature output signal to the aging output and sensor output indication module based on the parallel display signal.

[0018] Optionally, the circuit further comprises: a temperature display module;

[0019] The serial-parallel analysis module is further used to send an internal temperature display signal to the temperature display module based on the parallel display signal;

[0020] The temperature display module is used to output the internal temperature display signal.

[0021] Optionally, the temperature display module includes: an internal temperature display control module and a display output control module;

[0022] The internal temperature display control module is used to convert the temperature display signal into human-readable information and send the human-readable signal to the display output control module;

[0023] The display output control module is used to select and output the human-readable information and provide a human-computer interaction function.

[0024] Optionally, the sensor control module is further used to:

[0025] In response to the start signal, the temperature sensor in the chip sends a trigger signal, wherein the trigger signal is used to instruct the temperature sensor to perform temperature detection on the chip;

[0026] receiving chip temperature data sent by the temperature sensor based on the trigger signal;

[0027] A sensor output signal is sent to the temperature identification and control module based on the chip temperature data.

[0028] Optionally, the aging output and sensor output indication module includes: an output selection control module and a display distribution module;

[0029] The output selection control module is used to select and output the aging output signal and the junction temperature output signal;

[0030] The display distribution module is used to distribute the aging output signal and the junction temperature output signal to a human-computer interaction device.

[0031] Optionally, the circuit further comprises: a mode allocation module, configured to send a start signal to the aging control module or the sensor control module in response to a received mode trigger signal.

[0032] Optionally, the mode trigger signal includes: a junction temperature mode signal and an aging mode signal;

[0033] The mode allocation module is further used to: switch the operation mode of the chip to the junction temperature mode in response to a received junction temperature mode signal, or switch the operation mode of the chip to the aging mode in response to a received aging mode signal.

[0034] Optionally, the mode allocation module is further used to:

[0035] When the junction temperature mode signal and the aging mode signal are not received, the operation mode of the chip is switched to a normal operation mode.

[0036] Optionally, the mode allocation module is further used to:

[0037] When the value of the junction temperature mode signal is 1 and the value of the aging mode signal is 0, switching the operation mode of the chip to the junction temperature mode;

[0038] When the value of the junction temperature mode signal is 0 and the value of the aging mode signal is 1, switching the operation mode of the chip to the aging mode;

[0039] When the value of the junction temperature mode signal is 0 and the value of the aging mode signal is 0, the operation mode of the chip is switched to the normal operation mode.

[0040] Some embodiments of the present application provide an aging test method, which is applied to the aging test circuit of the above-mentioned chip, and the method includes:

[0041] In response to the received test instruction, identifying a junction temperature of the chip;

[0042] Heating or cooling the chip based on the junction temperature, and outputting a junction temperature output signal;

[0043] The circuit aging degree of the chip is detected, and an aging output signal is output.

[0044] Some embodiments of the present application provide a chip, including the above-mentioned aging test circuit.

[0045] The aging test circuit, method and chip provided in the present application add relevant modules of the junction temperature test function to the aging test circuit, so that the junction temperature of the chip can be detected during the chip aging test, and the chip is heated or dissipated based on the junction temperature to control the frequency of chip aging during the chip aging test, thereby avoiding the influence of too low or too high chip temperature on the test results and improving the accuracy of the chip aging test.

[0046] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0048] Figure 1 The structure diagram of an aging test circuit provided by some embodiments of the present application is schematically shown;

[0049] Figure 2 The structure diagram of a temperature identification and control module in an aging test circuit provided in some embodiments of the present application is schematically shown;

[0050] Figure 3 The structure diagram of another aging test circuit provided by some embodiments of the present application is schematically shown;

[0051] Figure 4 The structure diagram of a temperature display module in an aging test circuit provided in some embodiments of the present application is schematically shown;

[0052] Figure 5The structure diagram of a sensor control module in an aging test circuit provided in some embodiments of the present application is schematically shown;

[0053] Figure 6 The structure diagram of an aging output and sensor output indication module in an aging test circuit provided by some embodiments of the present application is schematically shown;

[0054] Figure 7 A schematic diagram of the principle of an existing chip aging mode is shown schematically;

[0055] Figure 8 The schematic diagram schematically shows a principle diagram of an aging test circuit provided by some embodiments of the present application;

[0056] Fig. 9 The following schematically shows a logic diagram of an aging test circuit provided by some embodiments of the present application;

[0057] Fig.10 The flowchart of an aging test method provided by some embodiments of the present application is schematically shown; DETAILED DESCRIPTION

[0058] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0059] Figure 1 The schematic diagram of the structure of an aging test circuit provided by the present application is shown schematically, and the circuit includes: a test control module 10, a sensor control module 20, a temperature identification and control module 30, a heating and heat dissipation module 40, an aging control module 50, a scan chain 60, and an aging output and sensor output indication module 70;

[0060] The test control module 10 is used to send a start signal to the test control module 10 and the sensor control module 20 respectively in response to a received test instruction;

[0061] The sensor control module 20 is used to send a sensor output signal to the temperature identification and control module 30 in response to the start signal;

[0062] The temperature identification and control module 30 identifies the junction temperature of the chip in response to the sensor output signal, and sends a junction temperature heating / heat dissipation enable signal to the heating and heat dissipation module 40 based on the junction temperature, and sends a junction temperature output signal to the aging output and sensor output indication module 70;

[0063] The heating and cooling module 40 is used to heat or cool the chip in response to the junction temperature heating / cooling enable signal;

[0064] The burn-in control module 50 is used to send a burn-in control signal to the scan chain 60 in response to the start signal;

[0065] The scan chain 60 is used to detect the circuit aging degree of the chip and send the obtained aging output signal to the aging output and sensor output indication module 70;

[0066] The aging output and sensor output indication module 70 is used to output the aging output signal and the junction temperature output signal.

[0067] It should be noted that the aging test circuit in some embodiments of the present application can be interconnected with the chip to be tested, or can be integrated into the chip to be tested. The specific configuration can be based on actual needs and is not limited here.

[0068] In an embodiment of the present application, when the test starts, the user can input a test instruction through the test control module to trigger the test control module to start executing the test process on the chip to be tested. Of course, the test instruction can also be pre-set in the test control module, and the test instruction can be automatically generated when the chip is powered on or at a specific time.

[0069] First, the test control module sends start signals to the aging control module and the sensor control module respectively. For easy distinction, the start signal sent to the aging control module is recorded as the aging start signal, and the start signal sent to the sensor control module is recorded as the sensor start signal.

[0070] For the junction temperature test process of the chip, after receiving the sensor start signal, the sensor control module will control the temperature sensor in the chip to detect the temperature of the chip, and obtain the chip temperature data from the temperature sensor, and then the sensor control module sends the sensor output signal to the temperature identification and control module based on the obtained chip temperature data. The temperature identification and control module can analyze the chip temperature data based on the received sensor output signal to determine the junction temperature of the chip. It is worth noting that the junction temperature is the highest temperature of the actual semiconductor chip (wafer, bare die, etc.) in the electronic device, which can be analyzed based on the value range of the chip temperature. Then the temperature identification and control module can send a junction temperature heating and cooling enable signal to the heating and cooling module based on the obtained junction temperature.

[0071] It is worth noting that, in the process of testing the junction temperature, the temperature identification and control module can first send a junction temperature heating enable signal to the heating and cooling module, so that the heating and cooling module continues to heat the chip until the temperature of the chip does not rise significantly, and the junction temperature of the chip can be determined. Then in the subsequent aging test process, the temperature identification and control module can compare the aging speed requirement of the aging test with the junction temperature to determine whether to send a junction temperature heating enable signal or a junction temperature heat dissipation enable signal to the heating and cooling module. For example, when the aging speed required for the aging test needs to be increased, if the current chip temperature is lower than the junction temperature, the heating and cooling module can be made to heat the chip by sending a junction temperature heating enable signal to the heating and cooling module, so that the chip is aged at a higher temperature; conversely, when the aging speed required for the aging test needs to be reduced, the heating and cooling module can be made to dissipate the heat of the chip by sending a junction temperature heat dissipation enable signal to the heating and cooling module, so that the chip is aged at a lower temperature. Of course, this is only an exemplary description, and the way in which the temperature identification and control module controls the operation of the heating and cooling module based on the junction temperature can be set according to actual needs, and is not limited here. In this way, the purpose of performing aging test on the chip while performing junction temperature test can be achieved.

[0072] Finally, the temperature identification and control module sends the obtained junction temperature output signal to the aging output and sensor output indication module.

[0073] For the chip aging test process, the chip circuit can be tested through the scan chain technology. The scan chain can implant a shift register into the chip, so that the signal value of the trigger inside the chip can be controlled and observed from the outside. Specifically, the ordinary register in the chip is replaced with a shift register, and then the trigger and shift register in the chip are connected into a serial chain; each shift register or trigger can be controlled by the input signal and output signal in the scan chain.

[0074] The working modes of the scan chain include: shift mode and normal working mode. The two working modes of the scan chain can be switched by controlling the value of the aging control signal of the scan chain; specifically, when the value of the aging control signal is 0, the working mode of the scan chain is the normal working mode, and the function and working mode of the shift register are the same as those of the ordinary register; when the value of the aging control signal is 1, the working mode of the scan chain is the shift mode, and the shift register can shift the scan input value into the trigger on the chain, or shift the value in the trigger on the chain out of the scan chain for observation, and identify the degree of aging of the chip based on the observed trigger value.

[0075] Furthermore, the aging control module sends an aging control signal to the scan chain in response to the aging start signal, and the scan chain sends the observed value in the trigger to the aging output and sensor output indication module in the form of an aging output signal.

[0076] The burn-in output and sensor output indication module will output the burn-in output signal and the junction temperature output signal together, so that the user can easily obtain the burn-in test results and junction temperature test results for the chip at the same time.

[0077] The embodiment of the present application adds relevant modules of the junction temperature test function to the chip aging test circuit, so that the junction temperature of the chip can be detected during the chip aging test, and the chip is heated or dissipated based on the junction temperature to control the frequency of chip aging during the chip aging test, thereby avoiding the influence of too low or too high chip temperature on the test results and improving the accuracy of the chip aging test.

[0078] Optionally, refer to Figure 2 The temperature identification and control module 30 includes: a serial-parallel identification module 301, a serial-to-parallel conversion module 302, a parallel-to-parallel conversion module 303, and a serial-to-parallel analysis module 304;

[0079] The serial-to-parallel identification module 301 is used to identify the serial-to-parallel type of the sensor output signal; when the serial-to-parallel type of the sensor output signal is a serial type, the sensor output signal is sent to the serial-to-parallel module; when the serial-to-parallel type of the sensor output signal is a parallel type, the sensor output signal is sent to the parallel-to-parallel module;

[0080] The serial-to-parallel module 302 is used to convert the serial sensor output signal into a parallel display signal;

[0081] The parallel-to-parallel module 303 is used to convert the parallel type sensor output signal into a parallel display signal;

[0082] The serial-parallel analysis module 304 is used to send a junction temperature output signal to the aging output and sensor output indication module 70 based on the parallel display signal.

[0083] In the embodiment of the present application, in order to display the sensor output signal, it is necessary to convert the sensor output signal into a display signal, and the sensor output signal stores two types of serial type and parallel type. Therefore, the embodiment of the present application sets two modules for converting the sensor output signal into a display signal, namely a serial-to-parallel module and a parallel-to-parallel module. The serial-to-parallel module is used to convert the serial type sensor output signal into a parallel type display signal, and the parallel-to-parallel module is used to convert the parallel type sensor output signal into a parallel type display signal. Both the parallel-to-parallel module and the serial-to-parallel module are provided with a finite state machine, which can set a processing state and a non-processing state internally, corresponding to the output signal type of the sensor control module being a parallel type and a serial type, respectively. For the parallel-to-parallel module, when the output signal type of the sensor control module is a parallel type, it switches to a processing state to process the sensor output signal; when the output signal type of the sensor control module is a serial type, the parallel-to-parallel module switches to a non-processing state to ignore the output signal of the sensor control module this time. For the serial-to-parallel module, when the output signal type of the sensor control module is a serial type, the serial-to-parallel module switches to a processing state to process the output signal of the sensor control module; when the output signal type of the sensor control module is a parallel type, the serial-to-parallel module switches to a non-processing state to ignore the output signal of the sensor control module.

[0084] Specifically, the serial-parallel identification module is responsible for processing the data signal (chip temperature data) sent by the temperature sensor, and distributes the chip temperature data to the serial-to-parallel module or the parallel-to-parallel module according to the type of chip temperature data, and both the serial-to-parallel module and the parallel-to-parallel module will convert the chip temperature data into a parallel display signal. The serial-to-parallel analysis module identifies the junction temperature and current temperature of the chip by analyzing the parallel display signal, and then generates a junction temperature output signal based on the junction temperature, and generates an internal temperature display signal based on the current temperature of the chip. Furthermore, the serial-to-parallel analysis module will also output a heating / heating enable signal to the heating and cooling module based on the chip junction temperature and the aging speed requirement of the current chip aging test; specifically, when the aging speed of the chip is lower than the test requirement, if the chip temperature does not exceed the junction temperature, a heating enable signal is output to the heating and cooling module to increase the chip temperature and increase the chip aging speed; when the aging speed of the chip is higher than the test requirement, a heat dissipation enable signal is output to the heating and cooling module to reduce the chip temperature and reduce the chip aging speed.

[0085] The embodiment of the present application converts chip temperature data into parallel display signals by setting a serial-to-parallel module and a parallel-to-parallel module in the temperature identification and control module, thereby ensuring that the output junction temperature output signals are output in parallel, thereby improving the output efficiency of the junction temperature output signals.

[0086] Optionally, refer to Figure 3 , the circuit further comprises: a temperature display module 90;

[0087] The serial-parallel analysis module 304 is further used to send an internal temperature display signal to the temperature display module 90 based on the parallel display signal;

[0088] The temperature display module 90 is used to output the internal temperature display signal.

[0089] In the embodiment of the present application, the serial-parallel analysis module in the temperature identification and control module will also convert the parallel display signal into an internal temperature display signal, which will be output to the temperature display module 90 and displayed to the user by the temperature display module 90.

[0090] Optionally, refer to Figure 4 The temperature display module 90 includes: an internal temperature display control module 901 and a display output control module 902;

[0091] The internal temperature display control module 901 is used to convert the temperature display signal into human-readable information and send the human-readable signal to the display output control module;

[0092] The display output control module 902 is used to select and output the human-readable information and provide a human-computer interaction function.

[0093] In an embodiment of the present application, the display output control module is responsible for processing the internal temperature display control module information, distinguishing and selecting the output internal temperature information for human-computer interaction. The internal temperature display control module sets different states for different temperature display signals by using an internally set finite state machine, and sets the corresponding output human-readable information for different states. For example, when the chip temperature represented by the internal temperature display signal is too low, human-readable information indicating that the chip temperature is too low can be output, or when the internal temperature display signal represents that the chip temperature has reached the junction temperature, human-readable information indicating that the chip temperature cannot be increased can be output. Of course, this is only an example description, and the specific human-readable signal setting method can be set according to actual needs, which is not limited here.

[0094] In the embodiment of the present application, the internal temperature display control module converts the internal temperature display signal into a user-readable artificial signal, which is then displayed by the display output control module, so that the user can understand the internal temperature of the chip more intuitively.

[0095] Optionally, refer to Figure 5 The sensor control module 20 includes: a controller 201, a state analysis module 202,

[0096] The controller 201 is used for causing the temperature sensor in the chip to send a trigger signal in response to the start signal, wherein the trigger signal is used for instructing the temperature sensor to perform temperature detection on the chip;

[0097] The state analysis module 202 is used to receive the chip temperature data sent by the temperature sensor based on the trigger signal;

[0098] A sensor output signal is sent to the temperature identification and control module 30 based on the chip temperature data.

[0099] In an embodiment of the present application, the sensor control module is responsible for configuring the sensor startup data and selecting the temperature sensor data output mode. First, the temperature sensor startup signal is obtained by the CPU processing the correct test instruction sequence. The sensor control module generates a trigger signal and sends it to the temperature sensor. The temperature sensor receives the trigger signal from the sensor control module, runs and generates chip temperature data and returns it to the sensor control module. Finally, the sensor control module sends the data information (sensor output signal) to the temperature identification and control module. The temperature sensor can be set at different observation points inside the chip.

[0100] Optionally, refer to Figure 6 , the aging output and sensor output indication module 70, package blocks: output selection control module 701, display distribution module 702;

[0101] The output selection control module 701 is used to select and output the aging output signal and the junction temperature output signal;

[0102] The display distribution module 702 is used to distribute the aging output signal and the junction temperature output signal to a human-computer interaction device.

[0103] In the embodiment of the present application, the selection control module is responsible for selecting the output of the aging output signal and the junction temperature output signal; the display distribution module is responsible for distributing the output signal to the human-computer interaction device for display. The human-computer interaction device may refer to a display screen and an input keyboard, a mouse, a touch screen, etc., which can be used by the user to add, delete, modify, and query the output signal.

[0104] Optionally, the circuit further includes: a mode allocation module 80 for sending a start signal to the aging control module 50 or the sensor control module 20 in response to a received mode trigger signal.

[0105] Optionally, the mode trigger signal includes: a junction temperature mode signal and an aging mode signal;

[0106] The mode allocation module 80 is further used to: switch the operation mode of the chip to the junction temperature mode in response to the received junction temperature mode signal, or switch the operation mode of the chip to the aging mode in response to the received aging mode signal.

[0107] Optionally, the mode allocation module 80 is further configured to:

[0108] When the junction temperature mode signal and the aging mode signal are not received, the operation mode of the chip is switched to a normal operation mode.

[0109] Optionally, the mode allocation module 80 is further configured to:

[0110] When the value of the junction temperature mode signal is 1 and the value of the aging mode signal is 0, switching the operation mode of the chip to the junction temperature mode;

[0111] When the value of the junction temperature mode signal is 0 and the value of the aging mode signal is 1, switching the operation mode of the chip to the aging mode;

[0112] When the value of the junction temperature mode signal is 0 and the value of the aging mode signal is 0, the operation mode of the chip is switched to the normal operation mode.

[0113] Reference Figure 7 The original aging test mode is only an aging mode that can realize chip testing. Therefore, the aging test mode of the chip can be turned on by the start signal of BURNIN_EN=1, and the aging test module of the chip can be turned off by the shutdown signal of BURNIN_EN=0.

[0114] Reference Figure 8 In some embodiments of the present application, the control signal logic for detecting the chip junction temperature mode is added, and the junction temperature mode signal RD_EN and the aging mode signal BURNIN_EN jointly control the aging mode of the circuit. When BURNIN_EN jumps from 0 to 1, the chip enters the aging test mode; when RD_EN jumps from 0 to 1, the chip enters the aging test mode. When the BURNIN_EN or RD_EN signal jumps from 1 to 0, the chip exits the test mode.

[0115] Specifically, refer to Fig. 9After the chip completes the power-on operation and enters the working mode, the BURNIN_EN signal is set to 0, the RD_EN signal is set to 0, and the chip enters the normal working mode. The operation in the normal working mode has nothing to do with the junction temperature reading. The normal working mode means that the chip operates according to its own established operating logic, which has nothing to do with the aging test and the junction temperature test. In other words, the chip does not actively heat, dissipate heat, control the aging speed, etc. The specific operation mode of the normal working mode can be determined according to the characteristics of the chip itself, and is not limited here.

[0116] After the chip is powered on, if you want to enter the chip junction temperature detection mode, the user needs to set the BURNIN_EN signal to 0 and the RD_EN signal to 1.

[0117] After entering the chip junction temperature detection mode, the BURNIN_EN signal can be set to 1 and the RD_EN signal can be set to 0 to enter the aging mode. Therefore, the aging mode, the chip junction temperature detection mode and other modes can be switched through the BURNIN_EN and RD_EN signals.

[0118] Fig.10 The present application schematically shows a flow chart of an aging test method provided by some embodiments of the present application, which is applied to the aging test circuit of the above-mentioned chip, and the method includes:

[0119] Step 1001, in response to a received test instruction, identifying the junction temperature of the chip;

[0120] Step 1002, heating or cooling the chip based on the junction temperature, and outputting a junction temperature output signal;

[0121] Step 1003, detecting the circuit aging degree of the chip and outputting an aging output signal.

[0122] The description of the steps and the achievable effects in the embodiment of the method can refer to the detailed description of the aging test circuit of the chip mentioned above, which will not be repeated here.

[0123] Some embodiments of the present application provide a chip, including the aging test circuit of the chip mentioned above.

[0124] It should be understood that, although the steps in the flowchart of the accompanying drawings are displayed in sequence as indicated by the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least a part of the steps in the flowchart of the accompanying drawings may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and their execution order is not necessarily sequential, but can be executed in turn or alternately with other steps or at least a part of the sub-steps or stages of other steps.

[0125] The term "one embodiment", "embodiment" or "one or more embodiments" herein means that a particular feature, structure or characteristic described in conjunction with the embodiment is included in at least one embodiment of the present application. In addition, please note that the examples of the term "in one embodiment" here do not necessarily all refer to the same embodiment.

[0126] In the description provided herein, a large number of specific details are described. However, it is understood that the embodiments of the present application can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0127] In the claims, any reference signs placed between brackets shall not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present application may be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In a unit claim enumerating several means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third etc. does not indicate any order. These words may be interpreted as names.

[0128] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. An aging test circuit, used in chip testing, characterized in that: The circuit includes: a test control module, a sensor control module, a temperature identification and control module, a heating and cooling module, an aging control module, a scan chain, an aging output and a sensor output indication module; The test control module is used to send a start signal to the test control module and the sensor control module respectively in response to a received test instruction; The sensor control module is used to send a sensor output signal to the temperature identification and control module in response to the start signal; The temperature identification and control module identifies the junction temperature of the chip in response to the sensor output signal, sends a junction temperature heating / heat dissipation enable signal to the heating and heat dissipation module based on the junction temperature, and sends a junction temperature output signal to the aging output and sensor output indication module; The heating and cooling module is used to heat or cool the chip in response to the junction temperature heating / cooling enable signal; The burn-in control module is used to send a burn-in control signal to the scan chain in response to the start signal; The scan chain is used to detect the circuit aging degree of the chip and send the obtained aging output signal to the aging output and sensor output indication module; The aging output and sensor output indication module is used to output the aging output signal and the junction temperature output signal.

2. The aging test circuit according to claim 1, characterized in that: The temperature identification and control module includes: a serial-parallel identification module, a serial-to-parallel conversion module, a parallel-to-parallel conversion module, and a serial-to-parallel analysis module; The serial-to-parallel identification module is used to identify the serial-to-parallel type of the sensor output signal; when the serial-to-parallel type of the sensor output signal is a serial type, the sensor output signal is sent to the serial-to-parallel module; when the serial-to-parallel type of the sensor output signal is a parallel type, the sensor output signal is sent to the parallel-to-parallel module; The serial-to-parallel module is used to convert the serial sensor output signal into a parallel display signal; The parallel-to-parallel module is used to convert the output signal of the parallel type sensor into a parallel display signal; The serial-parallel analysis module is used to send a junction temperature output signal to the aging output and sensor output indication module based on the parallel display signal.

3. The aging test circuit according to claim 2, characterized in that: The circuit also includes: a temperature display module; The serial-parallel analysis module is further used to send an internal temperature display signal to the temperature display module based on the parallel display signal; The temperature display module is used to output the internal temperature display signal.

4. The aging test circuit according to claim 3, characterized in that: The temperature display module includes: an internal temperature display control module and a display output control module; The internal temperature display control module is used to convert the temperature display signal into human-readable information and send the human-readable signal to the display output control module; The display output control module is used to select and output the human-readable information and provide a human-computer interaction function.

5. The aging test circuit according to claim 1, characterized in that: The sensor control module includes: a controller and a state analysis module. The controller is used to respond to the start signal, and the temperature sensor in the chip sends a trigger signal, wherein the trigger signal is used to instruct the temperature sensor to perform temperature detection on the chip; The state analysis module is used to receive the chip temperature data sent by the temperature sensor based on the trigger signal; A sensor output signal is sent to the temperature identification and control module based on the chip temperature data.

6. The aging test circuit according to claim 1, characterized in that: The aging output and sensor output indication module includes: an output selection control module and a display distribution module; The output selection control module is used to select and output the aging output signal and the junction temperature output signal; The display distribution module is used to distribute the aging output signal and the junction temperature output signal to a human-computer interaction device.

7. The aging test circuit according to claim 1, characterized in that: The circuit further includes: a mode allocation module, configured to send a start signal to the aging control module or the sensor control module in response to a received mode trigger signal.

8. The aging test circuit according to claim 7, characterized in that: The mode trigger signal includes: a junction temperature mode signal and an aging mode signal; The mode allocation module is further used to: switch the operation mode of the chip to the junction temperature mode in response to a received junction temperature mode signal, or switch the operation mode of the chip to the aging mode in response to a received aging mode signal.

9. The aging test circuit according to claim 8, characterized in that: The mode allocation module is further used for: When the junction temperature mode signal and the aging mode signal are not received, the operation mode of the chip is switched to a normal operation mode.

10. The aging test circuit according to claim 9, characterized in that: The mode allocation module is further used for: When the value of the junction temperature mode signal is 1 and the value of the aging mode signal is 0, switching the operation mode of the chip to the junction temperature mode; When the value of the junction temperature mode signal is 0 and the value of the aging mode signal is 1, switching the operation mode of the chip to the aging mode; When the value of the junction temperature mode signal is 0 and the value of the aging mode signal is 0, the operation mode of the chip is switched to the normal operation mode.

11. An aging test method, characterized in that: Applied to the aging test circuit according to claims 1 to 10, the method comprises: In response to the received test instruction, identifying a junction temperature of the chip; Heating or cooling the chip based on the junction temperature, and outputting a junction temperature output signal; The aging degree of the circuit is detected, and an aging output signal is output.

12. A chip, characterized in that: The aging test circuit comprises the aging test circuit described in any one of claims 1-10.

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