Voltage regulating module, electronic equipment and voltage regulating method

Abstract

The invention discloses a voltage regulation module, electronic equipment and a voltage regulation method. The voltage regulation module comprises a system-on-chip (SoC) chip, a power management integrated circuit (PMIC) module and a voltage regulation module, the first control end of the SoC chip is connected with the control end of the PMIC module through a first control line, and the voltage output end of the PMIC module is connected with the voltage input end of the SoC chip; the output end of the voltage adjusting module is connected with the control end of the PMIC module through a second control line.

Description

Technical Field

[0001] The present application belongs to the field of electronic technology, and specifically relates to a voltage regulating module, an electronic device and a voltage regulating method. Background Art

[0002] At present, in order to save power consumption, it is very important to use AVS (Adaptive Voltage Scaling) technology to adjust the output voltage of PMIC (Power Management Integrated Circuit) modules in electronic devices such as mobile phones and tablets.

[0003] In the related art, the power supply voltage in the SoC (System On Chip) is set by the platform vendor and cannot be modified by the user. As a result, it is difficult to meet actual usage requirements in many situations (such as when verifying the stability of the platform). Summary of the invention

[0004] The present application provides a voltage regulation module, an electronic device and a voltage regulation method to solve the problem in the related art that the power supply voltage in the SoC cannot be modified.

[0005] In a first aspect, an embodiment of the present application provides a voltage regulation module, including: a SoC chip, a PMIC module, and a voltage regulation module; The first control terminal of the SoC chip is connected to the control terminal of the PMIC module via a first control line, and the voltage output terminal of the PMIC module is connected to the voltage input terminal of the SoC chip; Wherein, the output end of the voltage adjustment module is connected to the control end of the PMIC module via a second control line.

[0006] In a second aspect, an embodiment of the present application provides an electronic device, comprising the voltage regulating module as described in the first aspect.

[0007] In a third aspect, an embodiment of the present application provides a voltage adjustment method, which is applied to the voltage adjustment module as described in the first aspect, and the method includes: The voltage adjustment module outputs a target voltage adjustment command to the PMIC module via a second control line; The PMIC module adjusts the output voltage provided to the voltage input terminal of the SoC chip based on the target voltage regulation command.

[0008] In the embodiment of the present application, the first control terminal of the SoC chip is connected to the control terminal of the PMIC module via a first control line, and the voltage output terminal of the PMIC module is connected to the voltage input terminal of the SoC chip; wherein the output terminal of the voltage adjustment module is connected to the control terminal of the PMIC module via a second control line. Since the control terminal of the PMIC module is not only connected to the first control terminal of the SoC chip via the first control line, but also connected to the output terminal of the voltage adjustment module via the second control line, after the SoC chip sets the voltage of the PMIC module via the first control line, the voltage adjustment module can further set the voltage of the PMIC module via the second control line, so that the voltage in the SoC can be adjusted through the voltage adjustment module, thereby solving the problem that the power supply voltage in the SoC cannot be modified in the related art. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which: Figure 1 A schematic diagram of an AVS voltage regulating system provided in the related art; Figure 2-1 A schematic diagram of a voltage regulating module provided in an embodiment of the present application; Figure 2-2 A schematic diagram of the master-slave relationship of a voltage regulating module provided in an embodiment of the present application; Figure 2-3 This is a schematic diagram showing the effect of the SPMI information of the voltage adjustment module overwriting the SPMI information of the SoC in the embodiment of the present application; Figure 2-4 This is a schematic diagram of the effect of directly configuring SPMI information in the voltage adjustment module in the embodiment of the present application; Figure 3 A schematic diagram of another voltage regulating module provided in an embodiment of the present application; Figure 4 A schematic diagram of another voltage regulating module provided in an embodiment of the present application; Figure 5-1 A schematic diagram of another voltage regulating module provided in an embodiment of the present application; Figure 5-2 A schematic diagram of the master-slave relationship of another voltage regulating module provided in an embodiment of the present application; Figure 6 A schematic diagram of another voltage regulating module provided in an embodiment of the present application; Figure 7 A schematic diagram of an electronic device provided in an embodiment of the present application; Figure 8 A flow chart of a voltage adjustment method provided in an embodiment of the present application; Figure 9-1 A flow chart of a voltage adjustment method provided in an embodiment of the present application; Figure 9-2 A flowchart of a specific voltage adjustment method provided in an embodiment of the present application; Fig.10 A flowchart of another voltage adjustment method provided in an embodiment of the present application.

[0010] Description of reference numerals: 700-electronic device; 10-voltage regulation module; 100-SoC chip; 110-first control line; 120-second control line; 130-third control line; 200-PMIC module; 300-voltage adjustment module; A1-first control end of SoC chip; A2-second control end of SoC chip; B-control end of PMIC module; C-voltage output end of PMIC module; D-voltage input end of SoC chip; E-output end of voltage adjustment module; 310-lookup table module; 320-first controller; 330-second controller. DETAILED DESCRIPTION

[0011] The embodiments of the present application will be described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and should not be construed as limitations on the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application.

[0012] The term "first" or "second" in the specification and claims of this application may include one or more of the features explicitly or implicitly. In the description of this application, unless otherwise specified, "plurality" means two or more. In addition, "and / or" in the specification and claims means at least one of the connected objects, and the character " / " generally means that the objects connected before and after are in an "or" relationship.

[0013] In the description of the present application, it should be understood that the terms "inside", "outside", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0014] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "connected" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0015] Figure 1 This is a schematic diagram of an AVS voltage regulation system provided in the related art. Figure 1 In the related art, the AVS voltage regulation system in the electronic device may include a SoC chip and a PMIC module. The SoC chip includes a central processor, a memory, an arbitrator, an AVS sensor and an AVS controller.

[0016] The voltage regulation scheme based on AVS in the related technology includes: the central processing unit reads the initial voltage value pre-stored in the memory and gives the initial voltage value to the arbitrator; the arbitrator can send a voltage regulation command to the PMIC module through the SPMI (Serial Peripheral Management Interface) bus, and the voltage regulation command includes a power-on instruction and an initial voltage value; the PMIC module outputs the power supply voltage VDD to the SoC chip according to the voltage regulation command; the AVS sensor on the SoC chip detects the current power supply voltage VDD, as well as the sensor data such as the load and temperature in the current SoC chip and outputs them to the AVS controller; the AVS controller comprehensively determines a more appropriate voltage value based on the value of the current power supply voltage VDD and the sensor data such as the load and temperature in the current SoC chip, and then outputs it to the arbitrator to update the voltage value; the arbitrator sends a voltage regulation command to the PMIC module again through the SPMI bus, and the voltage regulation command includes the updated voltage value information; the PMIC module adjusts the power supply voltage VDD currently output by the PMIC module according to the updated voltage value information, and then can adjust the voltage multiple times until the power supply voltage VDD output by the PMIC module reaches the expected voltage value.

[0017] The SoC chip in the embodiment of the present application may include Figure 1 The various components in the SoC chip, for example, include a central processing unit, a memory, an arbitrator, an AVS sensor, and an AVS controller. The workflow of each component in the SoC chip in the embodiment of the present application can refer to the above description of Figure 1 Described workflow.

[0018] The voltage regulation module, electronic device and voltage adjustment method provided in the embodiments of the present application can freely modify the subsystem voltage within the SoC without the platform provider providing a voltage modification node, verify the system stability of the new platform, and further achieve voltage reduction and power saving in some scenarios.

[0019] In an embodiment of the present application, a voltage adjustment module (the voltage adjustment module can be a custom chip) is connected (for example, connected in parallel) between the SoC chip and the PMIC module as the master device end, and the interface between the SoC chip, the PMIC module and the voltage adjustment module can be various control interfaces, such as SPMI. In the case where the interface between the SoC chip, the PMIC module and the voltage adjustment module is SPMI, since SPMI supports multiple master device ends, the control relationship between the SoC chip, the PMIC module and the voltage adjustment module can be: the SoC chip and the voltage adjustment module are the master device end 1 (Master1) and the master device end 2 (Master2), and the PMIC module is the slave device end, then the voltage setting value of the platform provider can be freely modified or overwritten by refreshing the SPMI instruction. It should be understood that the SPMI information mentioned in the embodiment of the present application is only a specific interface that supports the master-slave relationship mode, and it is not limited. Other interfaces that support the master-slave relationship mode are also possible. The SPMI information mentioned in the embodiment of the present application can be SPMI configuration information, and the SPMI configuration information can be SPMI voltage configuration information.

[0020] The voltage adjustment module provided in the embodiment of the present application may be in the form of a customized IC (or configured IC) chip, and this customized IC chip may be a multiplexed RF customized IC chip, which may include a flash memory (Flash), a controller, and a LUT (Look Up Table) module. The flash memory is the internal flash memory of the customized IC chip, and the firmware is downloaded to the IC chip through interfaces such as JTAG (Joint Test Action Group). The controller may be an SPMI controller. The number of controllers included in the customized IC chip may vary according to the actual scenario. In a specific scenario, the controller may include a first controller, and in another specific scenario, the controller may include a first controller and a second controller. In the case where the first controller and the second controller are included in the customized IC, the first controller may be connected to the PMIC module via the second control line, in which case the first controller may be the master device end, and the PMIC may be the slave device end. At the same time, the second controller may be connected to the SoC chip via the third control line, in which case the second controller may be the slave device end, and the SoC chip may be the master device end. The first controller in the voltage adjustment module may be used to send a voltage adjustment command to the PMIC module. The second controller in the voltage adjustment module may receive the SoC command and send it to the PMIC module through the first controller. The LUT module in the voltage adjustment module may include a truth table. The LUT module may determine the scenario, modify the voltage according to the scenario, and send it to the PMIC module via a voltage adjustment command (eg, an SPMI voltage adjustment command).

[0021] The voltage regulating module provided in the embodiment of the present application is further discussed below in conjunction with the accompanying drawings.

[0022] Figure 2-1 A schematic diagram of a voltage regulating module provided in an embodiment of the present application. Figure 2-1 , the embodiment of the present application provides a voltage regulation module 10, including: a SoC chip 100, a PMIC module 200 and a voltage regulation module 300; The first control terminal A1 of the SoC chip 100 is connected to the control terminal B of the PMIC module 200 via the first control line 110, and the voltage output terminal C of the PMIC module 200 is connected to the voltage input terminal D of the SoC chip 100; The output terminal E of the voltage adjustment module 300 is connected to the control terminal B of the PMIC module 200 via the second control line 120 .

[0023] The voltage output terminal C of the PMIC module 200 and the voltage input terminal D of the SoC chip 100 may be connected via a power line.

[0024] In the voltage regulating module provided in the embodiment of the present application, the first control end of the SoC chip is connected to the control end of the PMIC module via a first control line, and the voltage output end of the PMIC module is connected to the voltage input end of the SoC chip; wherein the output end of the voltage adjustment module is connected to the control end of the PMIC module via a second control line. Since the control end of the PMIC module is not only connected to the first control end of the SoC chip via the first control line, but also connected to the output end of the voltage adjustment module via the second control line, after the SoC chip sets the voltage of the PMIC module via the first control line, the voltage adjustment module can further set the voltage of the PMIC module via the second control line, so that the voltage in the SoC can be adjusted through the voltage adjustment module, thereby solving the problem that the power supply voltage in the SoC cannot be modified in the related art.

[0025] In the embodiment of the present application, the control end interface between the SoC chip, the PMIC module and the voltage adjustment module can be an interface supporting the master-slave mode. For example, the first control end of the SoC chip and the control end of the PMIC module are both SPMI control ends, and the first control line and the second control line are both SPMI control lines; the output end of the voltage adjustment module is an SPMI output end. Of course, the third control line mentioned later can also be an SPMI control line.

[0026] Figure 2-2 A schematic diagram of the master-slave relationship of a voltage regulating module provided in an embodiment of the present application. Figure 2-2 In a possible implementation, both the SoC chip and the voltage adjustment module can serve as the master device. Specifically, during the interaction between the SoC chip and the PMIC module, the SoC chip can serve as the master device and the PMIC module as the slave device; and during the interaction between the voltage adjustment module and the PMIC module, the voltage adjustment module can serve as the master device and the PMIC module as the slave device. The SoC chip can serve as the master device to control the PMIC module for power configuration through SPMI information. Similarly, the voltage adjustment module can also serve as the master device to control the PMIC module for power configuration through SPMI information.

[0027] In a specific embodiment, the voltage adjustment module (eg, in the form of a configuration IC chip) can output SPMI information (eg, SPMI voltage configuration information) as the master device end of the SPMI interface, overwriting the SPMI information output by the SoC chip end. Figure 2-3 This is a schematic diagram showing the effect of the SPMI information of the voltage adjustment module covering the SPMI information of the SoC chip in the embodiment of the present application. Figure 2-3, taking the SoC chip outputting SPMI1 information and SPMI2 information, and the voltage adjustment module outputting SPMI3 information and SPMI4 information as an example, the SPMI1 information and SPMI2 information will be overwritten by the SPMI3 information and SPMI4 information. Specifically, refer to Figure 2-3 , the SPMI1 information output by the SoC chip at time t1 will be overwritten by the SPMI3 information output by the voltage adjustment module at t2, and the SPMI2 output by the SoC chip at time t3 will be overwritten by the SPMI4 information output by the voltage adjustment module at t4.

[0028] In another specific embodiment, when the SPMI of the SoC chip is idle, the voltage adjustment module can directly configure the PMIC information according to the scenario. Figure 2-4 This is a schematic diagram of the effect of directly configuring SPMI information in the voltage adjustment module in the embodiment of the present application. Figure 2-4 When the SPMI of the SoC chip is in an idle state, the SPMI information may not be output, and the voltage adjustment module may output SPMI1 at t2 and output SPMI2 at t4 to adjust the voltage of the PMIC module.

[0029] In the embodiment of the present application, an example of the SPMI configuration information output by the SoC chip and the voltage adjustment module is shown in the following table:

[0030] As can be seen from the above table, the SPMI configuration information output by the voltage adjustment module is mostly the same as the SPMI configuration information output by the SoC chip, except that the voltages corresponding to the specific data in the SPMI configuration information are different. In this way, the SPMI configuration information output by the voltage adjustment module can be used to overwrite the SPMI configuration information output by the SoC, thereby adjusting the voltage of the PMIC module.

[0031] Figure 3 A schematic diagram of another voltage regulating module provided in an embodiment of the present application. Figure 3 The voltage regulator module shown in Figure 2-1 The voltage regulator module shown in the figure has been modified. The specific differences include: Figure 3In the voltage regulation module shown, the second control terminal A2 of the SoC chip 100 is connected to the voltage adjustment module 300, and the first control terminal A1 is different from the second control terminal A2. Among them, the second control terminal A2 of the SoC chip 100 can be an IIC (Inter-Integrated Circuit) interface, SPI (Serial Peripheral Interface), etc., and can be used to transmit information monitored by sensors in electronic devices (such as mobile phones, tablets, etc.), such as the temperature and load conditions in the SoC chip. In this way, the voltage adjustment module obtains the monitored information from the SoC chip through the second control terminal, so that the voltage adjustment module can determine the target voltage suitable for the current use scenario of the SoC chip, and then generate a target voltage adjustment command based on the target voltage and send it to the PMIC module. The PMIC module can adjust the output voltage provided to the voltage input terminal of the SoC chip based on the target voltage adjustment command. In the case where the platform provider reserves a large voltage margin for the SoC, the target voltage adjustment command output by the voltage adjustment module in the embodiment of the present application can achieve the effect of voltage reduction, thereby saving power consumption.

[0032] Figure 4 This is a schematic diagram of another voltage regulating module provided in an embodiment of the present application. Figure 4 As shown, the voltage adjustment module 300 in the voltage adjustment module provided in the embodiment of the present application may include a LUT (Look Up Table) module 310 and a first controller 320, the LUT module 310 is connected to the first controller 320; the first controller 320 is connected to the control terminal (B) of the PMIC module (200) via the output terminal E of the voltage adjustment module 300 and the second control line; wherein the LUT module (310) stores a mapping relationship between target information and a preset voltage, and the target information is information associated with voltage adjustment. Specifically, the target information may be temperature information, load information, etc. In the embodiment of the present application, since the voltage adjustment module 300 is connected to the second control terminal A2 of the SoC chip, the voltage adjustment module can obtain the target information monitored by the sensor in the electronic device via the second control terminal A2 of the SoC chip, and then determine the target voltage adjustment command based on the target information and the mapping relationship stored in the LUT module. The target voltage adjustment command includes a target voltage, and the target voltage is used to replace the voltage output by the SoC chip for the PMIC module.

[0033] In an embodiment of the present application, on the one hand, after the SoC chip outputs a voltage adjustment command to the PMIC module via the first control line, the voltage adjustment module can further output a target voltage adjustment command to the PMIC module via the second control line, so as to further adjust the voltage of the PMIC module on the basis of the voltage adjustment of the PMIC module by the SoC chip; on the other hand, the SoC chip can first send the voltage adjustment command for the PMIC module to the voltage adjustment module via the third control line, and then the voltage adjustment module further modifies the voltage value in the voltage adjustment command based on the voltage adjustment command to obtain the target voltage adjustment command. Subsequently, the target voltage adjustment command is output to the PMIC module via the second control line to further adjust the voltage of the PMIC module. Another voltage adjustment module is described below in conjunction with the accompanying drawings. The voltage adjustment module in this voltage adjustment module modifies the voltage for the PMIC module sent by the SoC chip to obtain the target voltage, and then sends the target voltage to the PMIC module through the target voltage adjustment command.

[0034] Figure 5-1 This is a schematic diagram of another voltage regulating module provided in an embodiment of the present application. Figure 5-1 As shown, the voltage regulating module 10 of the embodiment of the present application includes: a SoC chip 100, a PMIC module 200 and a voltage regulating module 300; the first control terminal A1 of the SoC chip 100 is connected to the control terminal B of the PMIC module 200 via a first control line 110; the voltage output terminal C of the PMIC module 200 is connected to the voltage input terminal D of the SoC chip 100; wherein, the output terminal E of the voltage regulating module 300 is connected to the control terminal B of the PMIC module 200 via a second control line 120, and the first control terminal A1 of the SoC chip 100 is also connected to the input terminal F of the voltage regulating module 300 via a third control line 130. wherein, the voltage output terminal C of the PMIC module 200 and the voltage input terminal D of the SoC chip 100 can be connected through a power line.

[0035] Figure 5-1 The voltage regulator module shown is Figure 3 The voltage regulator module shown in the figure has been modified. The specific differences include: Figure 5-1 In the voltage regulation module shown, the first control terminal A1 of the SoC chip 100 is also connected to the input terminal F of the voltage regulation module 300 via a third control line 130 .

[0036] In the voltage regulating module provided in the embodiment of the present application, since the control end of the PMIC module is not only connected to the first control end of the SoC chip via the first control line, but also connected to the output end of the voltage adjustment module via the second control line, after the SoC chip sets the voltage of the PMIC module via the first control line, the voltage adjustment module can further set the voltage of the PMIC module via the second control line. In this way, the voltage in the SoC can be adjusted through the voltage adjustment module, thereby solving the problem that the power supply voltage in the SoC cannot be modified in the related technology.

[0037] In addition, since the first control terminal A1 of the SoC chip 100 is also connected to the input terminal F of the voltage adjustment module 300 via the third control line 130, the voltage adjustment command sent by the SoC chip 100 to the PMIC module 200 may not be directly transmitted to the PMIC module via the first control line 110, but may be first transmitted to the voltage adjustment module 300 via the third control line, and the voltage adjustment module 300 further modifies the voltage value in the voltage adjustment command on the basis of the voltage adjustment command to obtain the target voltage adjustment command. Subsequently, the target voltage adjustment command is output to the PMIC module 200 via the second control line 120 to further adjust the voltage of the PMIC module 200. In this way, the voltage adjustment module 300 receives the voltage adjustment command from the SoC chip 100 and processes it before forwarding it, ensuring that the voltage adjustment module 300 configures the PMIC module 200 after the SoC chip 100 configures the PMIC module 200, thereby realizing the coverage process. In this way, it can be ensured that there is a certain time interval between the voltage regulation information (such as SPMI information) output by the SoC chip 100 and the voltage regulation information output by the voltage adjustment module 300 to the PMIC, thereby avoiding read and write errors (such as SPMI read and write errors) due to timing problems, and improving the accuracy of the voltage adjustment module 300 rewriting the voltage regulation data (such as SPMI data).

[0038] At the same time, since the voltage adjustment module 300 is connected to the second control terminal A2 of the SoC chip 100, the voltage adjustment module 300 can obtain the target information monitored by the sensor in the electronic device through the second control terminal A2 of the SoC chip 100. Therefore, in the process of modifying the voltage value, the voltage adjustment module 300 can rewrite the voltage configuration after comprehensive judgment based on the scene and monitoring conditions, which helps to improve the accuracy of the voltage configuration modification.

[0039] Figure 5-2 This is a schematic diagram of the master-slave relationship of the voltage regulating module provided in the embodiment of the present application. Figure 5-2 , Figure 5-1The voltage adjustment module shown can be used as both a master device and a Congo device. Specifically, during the interaction between the SoC chip and the PMIC module, the SoC chip can be used as the master device and the PMIC module as the slave device; during the interaction between the SoC chip and the voltage adjustment module, the SoC chip can be used as the master device and the voltage adjustment module as the slave device; and during the interaction between the voltage adjustment module and the PMIC module, the voltage adjustment module can be used as the master device and the PMIC module as the slave device. In this way, through this master-slave relationship setting, the interaction between the SoC chip, the PMIC module and the voltage adjustment module can be easily realized.

[0040] It is important to understand that Figure 5-1 The voltage regulator module shown is Figure 2-1 The difference between the voltage regulator modules shown is the way the voltage regulator module takes over the SPMI module. Figure 2-1 In the voltage regulation module shown, the voltage regulation module directly rewrites the SPMI data as the master device. Figure 5-1 In the voltage regulation module shown, the voltage adjustment module can act as an SPMI slave device to receive SPMI data from the SoC chip, rewrite the SPMI data according to the scenario, and then forward the rewritten data as a master device, thereby affecting the configuration of the PMIC module.

[0041] In the voltage regulation module provided in the embodiment of the present application, the voltage adjustment module can first receive the SPMI information from the SoC chip, and then forward it after processing, so as to ensure that the voltage adjustment module configures the PMIC module after the SoC chip configures the PMIC module, thereby achieving the coverage of the configuration information. It can also ensure that there is a certain interval between the SPMI information output by the SoC chip and the SPMI information output by the voltage adjustment module (Master) to the PMIC module, thereby avoiding SPMI read and write errors caused by timing problems, and improving the accuracy of the voltage adjustment module rewriting the SPMI data.

[0042] In addition, the voltage adjustment module can directly monitor the SPMI communication of the SoC chip. The voltage adjustment module can rewrite the configuration after comprehensive judgment based on the scenario and monitoring situation, which helps to improve the accuracy of modifying the SPMI information.

[0043] Figure 6 A schematic diagram of another voltage regulating module provided in an embodiment of the present application. In a specific embodiment, Figure 6As shown, the voltage adjustment module 300 in the voltage adjustment module provided in the embodiment of the present application may include a LUT (Look Up Table) module 310, a first controller 320 and a second controller 320, wherein the first controller 320 is connected to the LUT module 310, and the LUT module 310 is connected to the second controller 330; the first controller 320 is connected to the control terminal B of the PMIC module 200 via the output terminal E of the voltage adjustment module 300 and the second control line; the second controller 330 is connected to the first control terminal A1 of the SoC chip 100 via the input terminal F of the voltage adjustment module 300 and the third control line 130; wherein the LUT module 310 stores the mapping relationship between the target information and the preset voltage, and the target information is information associated with the voltage adjustment. Specifically, the target information may be temperature information, load information, etc. In the embodiment of the present application, since the voltage adjustment module 300 is connected to the second control terminal A2 of the SoC chip, the voltage adjustment module can obtain the target information monitored by the sensor in the electronic device through the second control terminal A2 of the SoC chip, and then determine the target voltage adjustment command based on the target information and the mapping relationship stored in the LUT module. The target voltage adjustment command includes a target voltage, which is used to replace the voltage output by the SoC chip for the PMIC module.

[0044] In the embodiment of the present application, both the first controller and the second controller may be SPMI controllers. The first controller may be used for SPMI interaction between the voltage adjustment module and the PMIC module, and the second controller may be used for SPMI interaction between the SoC chip and the voltage adjustment module.

[0045] From the above description, it can be seen that the voltage regulation module provided in the embodiment of the present application can realize the voltage regulation of the subsystem in the SoC, improve the system stability, and optimize the system power consumption; at the same time, the output voltage of the PMIC module can be optimized according to the scenario, so as to improve the system performance and optimize the user experience. In addition, in the voltage regulation module provided in the embodiment of the present application, the voltage adjustment module can be connected in parallel to the original circuit (for example, Figure 3 As shown, the control path of the voltage adjustment module is connected in parallel with the first control line), which has little impact on the circuit. In the event of a voltage adjustment module failure, the normal operation of the original system is not affected. In this way, the performance can be improved without affecting the original performance.

[0046] like Figure 7 As shown, an embodiment of the present application further provides an electronic device 700 , including a voltage regulating module 10 .

[0047] It should be noted that the electronic device 10 provided in the embodiment of the present application includes the voltage regulating module provided in any of the above embodiments. The specific structure of the voltage regulating module can be referred to the above description, and will not be repeated here to avoid repetition.

[0048] In the embodiment of the present application, the electronic device may be a terminal or other device other than a terminal. For example, the electronic device may be a smart watch, a mobile phone, a tablet computer, a laptop computer, a PDA, a vehicle-mounted electronic device, a mobile Internet device (MID), an augmented reality (AR) / virtual reality (VR) device, a robot, a wearable device, an ultra-mobile personal computer (UMPC), a netbook or a personal digital assistant (PDA), etc. It may also be a server, a network attached storage (NAS), a personal computer (PC), etc., which is not specifically limited in the embodiment of the present application.

[0049] Based on a concept similar to that of the voltage regulating module provided in any of the above embodiments, an embodiment of the present application further provides a voltage regulating method, which is applied to the voltage regulating module provided in any of the above embodiments.

[0050] Figure 8 This is a flow chart of a voltage adjustment method provided in an embodiment of the present application. Figure 8 As shown, the voltage adjustment method provided in the embodiment of the present application is applied to the voltage adjustment module provided in any of the above embodiments, and the voltage adjustment method may include: Step 810, the voltage adjustment module outputs a target voltage adjustment command to the PMIC module via the second control line; Step 820: The PMIC module adjusts the output voltage provided to the voltage input terminal of the SoC chip based on the target voltage regulation command.

[0051] In an embodiment of the present application, the target voltage adjustment command in step 810 may include a target voltage, which may be a voltage directly obtained by the voltage adjustment module, or a voltage obtained by the voltage adjustment module by modifying the voltage configured for the PMIC module of the SoC chip.

[0052] Among them, step 810 can be executed when the SoC chip is idle, or when the SoC chip has output a voltage adjustment command to the PMIC module via the first control line, or when the voltage adjustment module receives a voltage adjustment command for the PMIC module sent by the SoC chip.

[0053] In the embodiment of the present application, since the control end of the PMIC module is not only connected to the first control end of the SoC chip via the first control line, but also connected to the output end of the voltage adjustment module via the second control line, after the SoC chip sets the voltage of the PMIC module via the first control line, the voltage adjustment module can further set the voltage of the PMIC module via the second control line. In this way, the voltage in the SoC can be adjusted through the voltage adjustment module, thereby solving the problem that the power supply voltage in the SoC cannot be modified in the related technology.

[0054] In one embodiment of the present application, before the voltage adjustment module outputs the target voltage adjustment command to the PMIC module via the second control line in step 810, the voltage adjustment method provided in the embodiment of the present application may also include: the SoC chip sends a first voltage adjustment command to the PMIC module via the first control line, and the first voltage adjustment command includes a first voltage; wherein the target voltage adjustment command includes a target voltage, and the target voltage is used to replace the first voltage. In this embodiment, step 810 is performed when the SoC chip has output the first voltage adjustment command to the PMIC module via the first control line. In this case, the voltage adjustment module can use the target voltage included in the target voltage adjustment command to replace the first voltage included in the first voltage adjustment command, thereby achieving the effect of voltage adjustment on the PMIC module.

[0055] In another embodiment of the present application, before the voltage adjustment module outputs the target voltage adjustment command to the PMIC module via the second control line in step 810, the voltage adjustment method provided in the embodiment of the present application may also include: when the first control terminal of the SoC chip is connected to the input terminal of the voltage adjustment module via the third control line, the SoC chip sends a second voltage adjustment command for the PMIC module to the voltage adjustment module via the third control line, and the second voltage adjustment command includes a second voltage; the voltage adjustment module generates a target voltage adjustment command based on the second voltage adjustment command, and the target voltage adjustment command includes a target voltage, and the target voltage is used to replace the second voltage. In this embodiment, step 810 is performed when the voltage adjustment module receives the voltage adjustment command for the PMIC module sent by the SoC chip. In this case, the voltage adjustment module can modify the second voltage included in the second voltage adjustment command to the target voltage, and obtain the target voltage adjustment command, thereby achieving the effect of voltage adjustment on the PMIC module.

[0056] In another embodiment of the present application, before the voltage adjustment module outputs the target voltage adjustment command to the PMIC module via the second control line in step 810, the voltage adjustment method provided in the embodiment of the present application may also include: the voltage adjustment module obtains target information from the SoC chip, and the target information is information associated with voltage adjustment; the voltage adjustment module determines the target voltage adjustment command based on the target information and the mapping relationship between the target information and the preset voltage. In this way, the voltage adjustment module can more accurately determine the target voltage adjustment command based on the acquired target information, thereby achieving the effect of more accurately adjusting the voltage of the PMIC module. In particular, when the platform provider reserves a large voltage margin for the SoC, the target voltage adjustment command output by the voltage adjustment module in the embodiment of the present application can achieve the effect of voltage reduction, thereby saving power consumption.

[0057] Figure 9-1 This is a flow chart of a voltage adjustment method provided in an embodiment of the present application. Figure 9-1 As shown, the voltage adjustment method provided in the embodiment of the present application is applied to the voltage adjustment module provided in any of the above embodiments, and the voltage adjustment method may include: Step 910, the SoC chip sends a first voltage adjustment command to the PMIC module via a first control line, where the first voltage adjustment command includes a first voltage; Step 920, the voltage adjustment module obtains target information from the SoC chip, where the target information is information associated with voltage adjustment; Step 930: The voltage adjustment module determines a target voltage adjustment command based on the target information and a mapping relationship between the target information and a preset voltage; Step 940, the voltage adjustment module outputs a target voltage adjustment command to the PMIC module via the second control line; In step 950, the PMIC module adjusts the output voltage provided to the voltage input terminal of the SoC chip based on the target voltage adjustment command. In this way, the target voltage adjustment command can be used to overwrite the previous first voltage adjustment command to adjust the output voltage provided to the voltage input terminal of the SoC chip.

[0058] In the voltage adjustment method provided in the embodiment of the present application, after the SoC chip configures the voltage of the PMIC module through the first voltage adjustment command, the voltage adjustment module outputs a target voltage adjustment command to the PMIC module via the second control line to adjust the output voltage provided to the voltage input terminal of the SoC chip. In this way, the voltage adjustment module can be used to adjust the voltage in the SoC, thereby solving the problem that the power supply voltage in the SoC cannot be modified in the related art. At the same time, in the process of determining the target voltage adjustment command, the voltage adjustment module also considers the target information associated with the voltage adjustment obtained from the SoC chip, so that the determined target voltage adjustment command can be guaranteed to be more accurate.

[0059] Figure 9-2 This is a flowchart of a specific voltage adjustment method provided in an embodiment of the present application. Figure 9-2 As shown, the voltage adjustment method provided in the embodiment of the present application is applied to the voltage adjustment module provided in any of the above embodiments, and the voltage adjustment method may include the following steps: During the booting phase, the SoC reads the internal ROM to obtain the SPMI configuration information, which may be the SPMI voltage configuration information; SoC outputs PMIC configuration information to the arbitrator; The SoC internal arbitrator comprehensively judges and outputs the SPMI configuration information; The voltage adjustment module (configuration IC) selects the data type transmitted to the PMIC module according to the scenario: selects the SPMI from the SoC end or selects the SPMI data configured inside the voltage adjustment module; After receiving the SPMI configuration information, the PMIC module performs voltage configuration according to the SPMI configuration information and outputs the voltage value; The AVS sensor detects the current voltage value and obtains target information such as the current load and temperature in the SoC from the SoC and sends it to the AVS controller; After the AVS controller comprehensively determines a more appropriate voltage value, it sends it to the arbitrator to update the voltage value, and the arbitrator updates the SPMI information; The voltage adjustment module obtains the monitoring information of the AVS sensor from the SoC through interfaces such as JTAG, I2C, and SPI; The voltage adjustment module determines the appropriate SPMI configuration information by looking up the table according to the user scenario; The voltage adjustment module outputs the SPMI configuration information as the SPMI master device to achieve the effect of covering the SPMI information output by the SoC end. Figure 2-3, SPMI1 and SPMI2 signals are covered by SPMI3 and SPMI4 signals. For example, SPMI1 output by the SoC chip at time t1 will be covered by SPMI3 output by the voltage adjustment module at t2, and SPMI2 output by the SoC chip at time t3 will be covered by SPMI4 output by the voltage adjustment module at t4. Figure 2-4 As shown; the voltage adjustment module can also directly configure the PMIC according to the scene requirements when the SoC SPMI is idle, such as the voltage adjustment module can directly output the SPMI at t2 and t4.

[0060] The PMIC module re-outputs the voltage value to the SoC load.

[0061] The voltage adjustment method provided in the embodiment of the present application can adjust the voltage in the SoC through the voltage adjustment module, thereby solving the problem that the power supply voltage in the SoC cannot be modified in the related art. At the same time, in the process of determining the target voltage adjustment command, the voltage adjustment module also considers the target information associated with the voltage adjustment obtained from the SoC chip, so that the determined target voltage adjustment command can be more accurate.

[0062] Fig.10 This is a flow chart of a voltage adjustment method provided in an embodiment of the present application. Fig.10 As shown, the voltage adjustment method provided in the embodiment of the present application is applied to Figure 5-1 The target voltage regulating module shown in the figure, in which the first control terminal of the SoC chip is connected to the input terminal of the voltage regulating module via a third control line. The voltage regulating method may include: Step 1010: The SoC chip sends a second voltage adjustment command for the PMIC module to the voltage adjustment module via a third control line, where the second voltage adjustment command includes a second voltage. Step 1020, the voltage adjustment module obtains target information from the SoC chip, where the target information is information associated with voltage adjustment; Step 1030: The voltage adjustment module determines a target voltage based on the target information and a mapping relationship between the target information and a preset voltage; Step 1040: The voltage adjustment module rewrites the second voltage included in the second voltage adjustment command based on the target voltage to obtain a target voltage adjustment command, wherein the target voltage adjustment command includes a target voltage. Step 1050, the voltage adjustment module outputs a target voltage adjustment command to the PMIC module via the second control line; Step 1060: The PMIC module adjusts the output voltage provided to the voltage input terminal of the SoC chip based on the target voltage regulation command.

[0063] In step 1040, the voltage adjustment module may modify the second voltage included in the second voltage adjustment command into a target voltage, thereby obtaining a target voltage adjustment command.

[0064] The voltage adjustment method provided in the embodiment of the present application can adjust the voltage in the SoC through the voltage adjustment module, thereby solving the problem that the power supply voltage in the SoC cannot be modified in the related art. At the same time, in the process of determining the target voltage adjustment command, the voltage adjustment module also considers the target information associated with the voltage adjustment obtained from the SoC chip, so that the determined target voltage adjustment command can be more accurate.

[0065] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0066] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

Claims

1. A voltage regulating module, characterized in that: include: System on chip SoC chip, power management integrated circuit PMIC module and voltage adjustment module; The first control terminal of the SoC chip is connected to the control terminal of the PMIC module via a first control line, and the voltage output terminal of the PMIC module is connected to the voltage input terminal of the SoC chip; Wherein, the output end of the voltage adjustment module is connected to the control end of the PMIC module via a second control line.

2. The voltage regulating module according to claim 1, characterized in that: The second control end of the SoC chip is connected to the voltage adjustment module, and the first control end is different from the second control end.

3. The voltage regulating module according to claim 1 or 2, characterized in that: The voltage adjustment module includes a lookup table LUT module and a first controller, and the LUT module is connected to the first controller; The first controller is connected to the control end of the PMIC module via the output end of the voltage adjustment module and the second control line; The LUT module stores a mapping relationship between target information and a preset voltage, and the target information is information associated with voltage regulation.

4. The voltage regulating module according to claim 1 or 2, characterized in that: The first control end of the SoC chip is also connected to the input end of the voltage adjustment module via a third control line.

5. The voltage regulating module according to claim 4, characterized in that: The voltage adjustment module comprises a LUT module, a first controller and a second controller, wherein the first controller is connected to the LUT module, and the LUT module is connected to the second controller; The first controller is connected to the control end of the PMIC module via the output end of the voltage adjustment module and the second control line; The second controller is connected to the first control terminal of the SoC chip via the input terminal of the voltage adjustment module and the third control line; The LUT module stores a mapping relationship between target information and a preset voltage, and the target information is information associated with voltage regulation.

6. An electronic device, characterized in that: It comprises a voltage regulating module as described in any one of claims 1 to 5.

7. A voltage adjustment method, characterized in that: Applied to the voltage regulating module according to any one of claims 1 to 5, the method comprises: The voltage adjustment module outputs a target voltage adjustment command to the PMIC module via a second control line; The PMIC module adjusts the output voltage provided to the voltage input terminal of the SoC chip based on the target voltage regulation command.

8. The method according to claim 7, characterized in that Before the voltage adjustment module outputs the target voltage adjustment command to the PMIC module via the second control line, the method further includes: The SoC chip sends a first voltage adjustment command to the PMIC module via a first control line, wherein the first voltage adjustment command includes a first voltage; The target voltage regulation command includes a target voltage, and the target voltage is used to replace the first voltage.

9. The method according to claim 7, characterized in that: Before the voltage adjustment module outputs the target voltage adjustment command to the PMIC module via the second control line, the method further includes: In a case where the first control terminal of the SoC chip is connected to the input terminal of the voltage adjustment module via the third control line, the SoC chip sends a second voltage adjustment command for the PMIC module to the voltage adjustment module via the third control line, where the second voltage adjustment command includes a second voltage; The voltage adjustment module generates a target voltage adjustment command based on the second voltage adjustment command, wherein the target voltage adjustment command includes a target voltage, and the target voltage is used to replace the second voltage.

10. The method according to any one of claims 7 to 9, characterized in that: Before the voltage adjustment module outputs the target voltage adjustment command to the PMIC module via the second control line, the method further includes: The voltage adjustment module obtains target information from the SoC chip, wherein the target information is information associated with voltage adjustment; The voltage adjustment module determines a target voltage based on the target information and a mapping relationship between the target information and a preset voltage; The voltage adjustment module obtains a target voltage adjustment command based on the target voltage.

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