Updating method of GPU firmware

Abstract

The invention relates to the technical field of computers, and discloses a GPU firmware updating method which comprises the steps that a microprocessor starts a self-checking task; after the detection is passed, the host issues an update instruction, sends firmware data to a cache region of the microprocessor for temporary storage, reads and verifies the firmware data stored in the SPI FLASH, and confirms the firmware program as an effective program and marks the firmware program when a calculated verification value is consistent with a given verification value when the firmware program is issued; the microprocessor reads firmware data in the SPI FLASH and updates the data to an internal FLASH of the microprocessor; when the microprocessor is restarted next time, starting a new firmware program to complete updating of the GPU firmware; when the updating is abnormal, the starting source of the microprocessor is changed to be started from the ROM. According to the method and the device, the problem of GPU startup failure can be solved by changing the startup source when the updating is abnormal.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a method for updating GPU firmware. Background Art

[0002] Usually, there is a microprocessor at the front end of the GPU, which is responsible for managing and controlling the GPU's hardware resources, including computing units, memory, registers, etc., to ensure that the GPU can efficiently perform various computing tasks and provide efficient parallel computing capabilities. For GPUs, firmware is usually designed to be tightly integrated with the GPU hardware to perform necessary initialization and configuration when the device starts. These firmware codes may be stored in a specific area inside the GPU chip, or in an externally connected memory, such as video memory or dedicated firmware memory.

[0003] As mentioned above, most GPU firmware programs are stored in non-volatile static memory. When the data stored in the memory is damaged and cannot be restored, the program cannot be started, which in turn causes the GPU to fail to start.

[0004] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present application, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention

[0005] In order to provide a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. The summary is not an extensive review, nor is it intended to identify key / critical elements or delineate the scope of protection of these embodiments, but rather serves as a prelude to the detailed description that follows.

[0006] The GPU firmware update method provided by the embodiment of the present disclosure includes: Wake up the upgrade task after receiving the upgrade command from the host; The microprocessor starts the self-test task to test itself and the external SPI FLASH; After the detection is passed, the host sends an update command to send the firmware data to the microprocessor's cache for temporary storage. After the set cache is full, the data is transferred to the external SPI FLASH. After multiple cache transfers, all the firmware data is stored in the SPI FLASH. Read and verify the firmware data stored in SPI FLASH. When the calculated verification value is consistent with the verification value given when the firmware program is sent, the firmware program is confirmed as a valid program and marked. The microprocessor reads the firmware data in the SPI FLASH and updates the data to the internal FLASH of the microprocessor; The next time the microprocessor restarts, it will start from the new firmware program to complete the GPU firmware update; When the update encounters an exception, change the boot source of the microprocessor to boot from ROM.

[0007] In some embodiments, the SPI FLASH itself is detected, including: Check whether the internal FLASH of the microprocessor is normal and whether there are any unfinished tasks in the task queue currently communicating with the GPU.

[0008] In some embodiments, the external SPI FLASH is detected, including: Check whether the communication link with SPI FLASH is normal.

[0009] In some embodiments, after changing the boot source of the microprocessor to boot from the ROM, the method further comprises: The ROM program starts the firmware update task and receives the firmware update instruction from the host; The microprocessor starts the self-test task to test itself and the external SPI FLASH.

[0010] In some embodiments, the method further comprises: The host sends an update command to transfer the firmware data to the microprocessor's cache for temporary storage. After the set cache is full, the data is transferred to the external SPI FLASH and internal FLASH. After multiple cache transfers, all the firmware data is stored in the SPI FLASH and internal FLASH.

[0011] In some embodiments, the method further comprises: The ROM program reports the firmware update completion event; Change the boot source of the microprocessor to boot from the internal FLASH, and restart the microprocessor to complete the firmware update.

[0012] In some embodiments, the above update encounters an exception including: There is no program stored in the internal FLASH or the update process is interrupted, causing the stored firmware to be abnormal.

[0013] In some embodiments, the method further comprises: When the data in the internal FLASH is damaged, but the firmware is stored in the SPI FLASH, the firmware is restored from the SPI FLASH; The firmware is restored from the SPI FLASH, including: the ROM program receives the firmware restoration instruction from the host; the ROM program detects itself and the SPI FLASH, and replies to the host detection status after the detection passes; the host sends the firmware restoration instruction; the ROM reads the firmware data in the SPI FLASH and writes the data to the internal FLASH of the microprocessor; and reports the completion of the matter after the restoration is completed. The GPU firmware update method provided by the embodiment of the present disclosure can achieve the following technical effects: By changing the boot source when the update encounters an exception, the GPU boot failure problem can be overcome.

[0014] The above general description and the following description are exemplary and explanatory only and are not intended to limit the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] One or more embodiments are exemplarily described by corresponding drawings, which do not limit the embodiments. Elements with the same reference numerals in the drawings are shown as similar elements, and the drawings do not constitute a scale limitation, and wherein: Figure 1 It is a flowchart of a method for updating GPU firmware provided by an embodiment of the present disclosure; Figure 2 It is a flowchart of another GPU firmware update method provided by an embodiment of the present disclosure; Figure 3 It is a flowchart of another GPU firmware update method provided by an embodiment of the present disclosure; Figure 4 It is a structural diagram of a GPU firmware update system provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0016] In order to be able to understand the features and technical contents of the embodiments of the present disclosure in more detail, the implementation of the embodiments of the present disclosure is described in detail below in conjunction with the accompanying drawings. The attached drawings are for reference only and are not used to limit the embodiments of the present disclosure. In the following technical description, for the convenience of explanation, a full understanding of the disclosed embodiments is provided through multiple details. However, one or more embodiments can still be implemented without these details. In other cases, to simplify the drawings, well-known structures and devices can be simplified for display.

[0017] The terms "first", "second", etc. in the embodiments of the present disclosure are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchanged where appropriate, so as to describe the embodiments of the present disclosure described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions.

[0018] Unless otherwise stated, the term "plurality" means two or more.

[0019] In the embodiment of the present disclosure, the character " / " indicates that the preceding and following objects are in an "or" relationship. For example, A / B indicates: A or B.

[0020] The term "and / or" is a description of the association relationship between objects, indicating that three relationships can exist. For example, A and / or B means: A or B, or, A and B.

[0021] The term "correspondence" may refer to an association relationship or a binding relationship. The correspondence between A and B means that there is an association relationship or a binding relationship between A and B.

[0022] The following describes a dynamic frequency modulation method for a stream multiprocessor of a GPU and a storage medium provided by an embodiment of the present disclosure in conjunction with the accompanying drawings.

[0023] Figure 1 It is a flowchart of a GPU firmware update method provided by an embodiment of the present disclosure.

[0024] like Figure 1 As shown, the GPU firmware update method may include: S01, waking up the upgrade task after receiving an upgrade instruction sent from the host; S02, the microprocessor starts the self-test task to test itself and the external SPI FLASH; S03, after the detection is passed, the host sends an update command to send the firmware data to the cache area of ​​the microprocessor for temporary storage. After the set cache area is full, the data is transferred to the external SPI FLASH. After multiple cache transfers, all the firmware data is stored in the SPI FLASH; S04, reading and verifying the firmware data stored in the SPI FLASH, and when the calculated verification value is consistent with the verification value given when the firmware program is issued, confirming the firmware program as a valid program and marking it; S05, the microprocessor reads the firmware data in the SPI FLASH and updates the data to the internal FLASH of the microprocessor; S06, when the microprocessor is restarted next time, it will start from the new firmware program to complete the GPU firmware update; S07, when the update encounters an exception, the boot source of the microprocessor is changed to boot from ROM.

[0025] The present disclosure can overcome the problem of GPU startup failure by changing the startup source when an update encounters an exception.

[0026] In some embodiments, the above detection of the SPI FLASH itself may include: Check whether the internal FLASH of the microprocessor is normal and whether there are any unfinished tasks in the task queue currently communicating with the GPU.

[0027] In some embodiments, the above detection of the external SPI FLASH may include: Check whether the communication link with SPI FLASH is normal.

[0028] In some embodiments, after changing the boot source of the microprocessor to boot from ROM, Figure 1 The method may also include: The ROM program starts the firmware update task and receives the firmware update instruction from the host; The microprocessor starts the self-test task to test itself and the external SPI FLASH.

[0029] In some embodiments, Figure 1 The method may also include: The host sends an update command to transfer the firmware data to the microprocessor's cache for temporary storage. After the set cache is full, the data is transferred to the external SPI FLASH and internal FLASH. After multiple cache transfers, all the firmware data is stored in the SPI FLASH and internal FLASH.

[0030] In some embodiments, Figure 1 The method may also include: The ROM program reports the firmware update completion event; Change the boot source of the microprocessor to boot from the internal FLASH, and restart the microprocessor to complete the firmware update.

[0031] In some embodiments, the above update encounters an exception including: There is no program stored in the internal FLASH or the update process is interrupted, causing the stored firmware to be abnormal.

[0032] In some embodiments, Figure 1 The method may also include: When the data in the internal FLASH is damaged, but the firmware is stored in the SPI FLASH, the firmware is restored from the SPI FLASH; Restoring the firmware from SPI FLASH includes: the ROM program receives the firmware recovery instruction from the host; the ROM program detects itself and the SPI FLASH, and replies to the host detection status after the detection passes; the host sends a firmware recovery instruction; the ROM reads the firmware data in the SPI FLASH and writes the data to the internal FLASH of the microprocessor; and reports the completion after the recovery is completed.

[0033] Combined with the hardware part, Figure 1 The method is further described in .

[0034] 1. The hardware part may include a redesigned front-end microprocessor and SPI FLASH memory. The front-end processor reads data in the SPI FLASH and writes data to the SPI FLASH according to the instruction type.

[0035] 2. The storage area of ​​the microprocessor consists of three parts: one part is ROM, which is used to store the default program of the microprocessor; one part is RAM, which is used to run the program and store the data during the program running; and one part is internal FLASH, which is used to store executable programs. The microprocessor can determine whether to start from ROM or internal FLASH based on the recognized external input code, or it can start from the startup source required by the user by receiving user instructions.

[0036] 3. Start from the internal FLASH and move the running program from the internal FLASH to the RAM for execution. The firmware update process is as follows: a. The microprocessor receives the firmware update command from the host. b. The microprocessor detects itself and the SPI FLASH, and replies to the host detection status after the detection passes. c. The host sends an update command to transmit the firmware data to the microprocessor. d. The microprocessor stores the data in the SPI FLASH. e. Perform segment verification and overall verification on the received data. After the data verification passes, the program is confirmed as a valid firmware and marked. f. The microprocessor reads the SPI FLASH and moves the data to the program access area in the internal FLASH. g. The microprocessor reports the completion of the firmware update to the host and restarts to complete the firmware update.

[0037] 4. The program started from the internal FLASH is a complete firmware program, including all components such as the driver required for firmware operation and resource management and runtime required for GPU operation.

[0038] 5. Select the microprocessor to start from ROM. The firmware update process is as follows: a. The ROM program receives the firmware update command from the host. b. The ROM program detects itself and the SPI FLASH, and replies to the host detection status after the detection passes. c. The host issues a command to transfer the firmware program to the data temporary storage area specified by the ROM program. d. After completing the inspection of the received data, the ROM program writes the program to the internal FLASH and SPI FLASH of the microprocessor respectively. e. The ROM program reports the completion of the firmware update. The user can choose to change the startup source to the internal FLASH and run again.

[0039] 6. The program started from ROM only contains the drivers required for program firmware update and the programs required for the update process. The program cannot be modified and can only complete specific functions.

[0040] 7. The normal startup method of the microprocessor is to boot from the internal FLASH. The ROM startup method is only used when there is no program stored in the internal FLASH or the stored firmware is abnormal due to the interruption of the update process.

[0041] 8. Another function of the microprocessor booting from ROM is that when the data in the internal FLASH is damaged, but the firmware is stored in the SPIFLASH, the firmware can be restored from the SPI FLASH. The recovery process is: a. The ROM program receives the firmware recovery command from the host b. The ROM program detects itself and the SPI FLASH, and replies to the host detection status after the detection passes c. The host sends a firmware recovery command d. The ROM reads the firmware data in the SPI FLASH and writes the data to the internal FLASH of the microprocessor e. After completion, the update completion item is reported.

[0042] Figure 2 and Figure 3 is a flowchart of another GPU firmware update method. In a specific example, Figure 2 and Figure 3 ,right Figure 1 The GPU firmware update method is further described in the following. The GPU firmware update method may include S21 to S26, which are explained in detail as follows: S21, after the microprocessor is running, its firmware upgrade task is in a dormant state, and wakes up the upgrade task after receiving an upgrade instruction sent from the host.

[0043] S22, the microprocessor starts the self-test task and tests its own and external SPI FLASH. The self-test mainly includes whether the internal FLASH of the microprocessor is normal and whether there are any unfinished tasks in the task queue currently communicating with the GPU. The external SPI FLASH is mainly tested by sending a test command to check whether the communication link with the SPI FLASH is normal. After the test is completed, the test status is reported to the host, and if there is an abnormality, the relevant exception code is attached.

[0044] S23, the host sends an update command to transfer the firmware data to the cache area of ​​the microprocessor for temporary storage. After the set cache area is full, the data is transferred to the external SPI FLASH. After multiple cache transfers, all the firmware data is stored in the SPI FLASH.

[0045] S24, reading and verifying the firmware data stored in the SPI FLASH. When the calculated verification value is consistent with the verification value given when the firmware program is sent, the firmware program is confirmed as a valid program and marked.

[0046] S25, the microprocessor reads the firmware data in the SPI FLASH and updates the data to the internal FLASH of the microprocessor. The next time the microprocessor is restarted, it will start from the new firmware program.

[0047] S26, the microprocessor reports the host firmware update completion.

[0048] Further, the method for updating the GPU firmware when an exception is encountered may include steps S31 to S36, which are explained in detail as follows: S31, changes the boot source of the microprocessor to boot from ROM.

[0049] S32, the ROM program starts the firmware update task and receives a firmware update instruction from the host.

[0050] S33, the microprocessor starts the self-check task and checks its own and external SPI FLASH. The self-check mainly checks whether the internal FLASH of the microprocessor is normal. The external SPI FLASH is mainly checked by sending a test command to check whether the communication link with the SPI FLASH is normal. After the test is completed, the test status is reported to the host. If there is an abnormality, the relevant abnormality code is attached.

[0051] S34, the host sends an update instruction to transfer the firmware data to the cache area of ​​the microprocessor for temporary storage. After the set cache area is full, the data is transferred to the external SPI FLASH and the internal FLASH. After multiple cache transfers, all the firmware data is stored in the SPI FLASH and the internal FLASH.

[0052] S35, the ROM program reports a firmware update completion event.

[0053] S36, modifying the startup source of the microprocessor to start from the internal FLASH, and restarting the microprocessor to complete the firmware update.

[0054] The normal startup mode of the microprocessor is to boot from the internal FLASH. The ROM startup mode is used only when there is no program stored in the internal FLASH or the stored firmware is abnormal due to an interruption in the update process.

[0055] In addition, another function of the microprocessor booting from ROM is that when the data in the internal FLASH is damaged, but the firmware is stored in the SPI FLASH, the firmware can be restored from the SPI FLASH. The firmware recovery process is as follows: the ROM program receives the firmware recovery command from the host; the ROM program detects itself and the SPI FLASH, and replies to the host detection status after the detection passes; the host sends the firmware recovery command; the ROM reads the firmware data in the SPI FLASH and writes the data to the internal FLASH of the microprocessor; after the recovery is completed, the completion item is reported.

[0056] It should be noted that, for the aforementioned method embodiments, for the sake of simplicity of description, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the present disclosure is not limited by the order of the actions described, because according to the present disclosure, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all optional embodiments, and the actions and modules involved are not necessarily required by the present disclosure.

[0057] Combination Figure 4 As shown, the embodiment of the present disclosure provides a GPU firmware update system 400, including a processor 404 and a memory 401. Optionally, the system may also include a communication interface 402 and a bus 403. The processor 404, the communication interface 402, and the memory 401 may communicate with each other through the bus 403. The communication interface 402 may be used for information transmission. The processor 404 may call the logic instructions in the memory 401 to execute the GPU firmware update method in the above embodiment.

[0058] In addition, the logic instructions in the memory 401 described above may be implemented in the form of software functional units and when sold or used as independent products, may be stored in a computer-readable storage medium.

[0059] The memory 401 is a computer-readable storage medium that can be used to store software programs and computer executable programs, such as program instructions / modules corresponding to the method in the embodiment of the present disclosure. The processor 404 executes the function application and data processing by running the program instructions / modules stored in the memory 401, that is, the GPU firmware update method in the above embodiment is implemented.

[0060] The memory 401 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and an application required for at least one function; the data storage area may store data created according to the use of the terminal device, etc. In addition, the memory 401 may include a high-speed random access memory and may also include a non-volatile memory.

[0061] An embodiment of the present disclosure provides a computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are configured to execute a method for updating GPU firmware.

[0062] The computer-readable storage medium mentioned above may be a transient computer-readable storage medium or a non-transitory computer-readable storage medium.

[0063] The technical solution of the embodiment of the present disclosure can be embodied in the form of a software product, which is stored in a storage medium and includes one or more instructions for enabling a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method of the embodiment of the present disclosure. The aforementioned storage medium may be a non-transient storage medium, including: a USB flash drive, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a disk or an optical disk, and other media that can store program codes, or a transient storage medium.

[0064] The above description and the accompanying drawings fully illustrate the embodiments of the present disclosure so that those skilled in the art can practice them. Other embodiments may include structural, logical, electrical, process and other changes. The embodiments represent possible changes only. Unless explicitly required, individual components and functions are optional, and the order of operations may vary. Parts and features of some embodiments may be included in or replace parts and features of other embodiments. As used in the description of the embodiments, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms as well. Similarly, the term "and / or" as used in this application refers to any and all possible combinations of one or more associated listings. In addition, when used in this application, the term "comprise" and its variants "comprises" and / or including (comprising) refer to the existence of stated features, wholes, steps, operations, elements, and / or components, but do not exclude the existence or addition of one or more other features, wholes, steps, operations, elements, components and / or these groups. In the absence of further restrictions, the elements defined by the sentence "comprising a ..." do not exclude the existence of other identical elements in the process, method or device comprising the elements. In this article, each embodiment may focus on the differences from other embodiments, and the same or similar parts between the embodiments may refer to each other. For the methods, products, etc. disclosed in the embodiments, if they correspond to the method part disclosed in the embodiments, then the relevant parts can refer to the description of the method part.

[0065] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software may depend on the specific application and design constraints of the technical solution. Technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the embodiments of the present disclosure. Technicians can clearly understand that for the convenience and simplicity of description, the specific working process of the systems, devices and units described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0066] In the embodiments disclosed herein, the disclosed methods and products (including but not limited to devices, equipment, etc.) can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of units can be only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between each other shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms. The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to implement this embodiment. In addition, each functional unit in the embodiment of the present disclosure may be integrated in a processing unit, or each unit may exist physically alone, or two or more units may be integrated in one unit.

[0067] The flowchart and block diagram in the accompanying drawings show the possible architecture, functions and operations of the system, method and computer program product according to the embodiment of the present disclosure. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of the code, and a part of the module, program segment or code contains one or more executable instructions for realizing the specified logical function. In some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, which can depend on the functions involved. In the description corresponding to the flowchart and block diagram in the accompanying drawings, the operations or steps corresponding to different boxes can also occur in a different order from the order disclosed in the description, and sometimes there is no specific order between different operations or steps. For example, two consecutive operations or steps can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, which can depend on the functions involved. Each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented by a dedicated hardware-based system that performs the specified functions or actions, or may be implemented by a combination of dedicated hardware and computer instructions.

Claims

1. A method for updating GPU firmware, characterized in that: The method comprises: Wake up the upgrade task after receiving the upgrade command from the host; The microprocessor starts the self-test task to test itself and the external SPI FLASH; After the detection is passed, the host sends an update command to send the firmware data to the microprocessor's cache for temporary storage. After the set cache is full, the data is transferred to the external SPI FLASH. After multiple cache transfers, all the firmware data is stored in the SPI FLASH. The firmware data stored in the SPI FLASH is read and verified. When the calculated verification value is consistent with the verification value given when the firmware program is sent, the firmware program is confirmed as a valid program and marked; The microprocessor reads the firmware data in the SPI FLASH and updates the data to the internal FLASH of the microprocessor; The next time the microprocessor restarts, it will start from the new firmware program to complete the GPU firmware update; When the update encounters an exception, change the boot source of the microprocessor to boot from ROM.

2. The method according to claim 1, characterized in that Test its own SPI FLASH, including: Check whether the internal FLASH of the microprocessor is normal and whether there are any unfinished tasks in the task queue currently communicating with the GPU.

3. The method according to claim 1, characterized in that Detect the external SPI FLASH, including: Check whether the communication link with SPI FLASH is normal.

4. The method according to claim 1, characterized in that: After changing the boot source of the microprocessor to boot from the ROM, the method further includes: The ROM program starts the firmware update task and receives the firmware update instruction from the host; The microprocessor starts the self-test task to test itself and the external SPI FLASH.

5. The method according to claim 4, characterized in that The method further comprises: The host sends an update command to transfer the firmware data to the microprocessor's cache for temporary storage. After the set cache is full, the data is transferred to the external SPI FLASH and internal FLASH. After multiple cache transfers, all the firmware data is stored in the SPI FLASH and internal FLASH.

6. The method according to claim 5, characterized in that The method further comprises: The ROM program reports the firmware update completion event; Change the boot source of the microprocessor to boot from the internal FLASH, and restart the microprocessor to complete the firmware update.

7. The method according to claim 1, characterized in that The update encounters exceptions including: There is no program stored in the internal FLASH or the update process is interrupted, causing the stored firmware to be abnormal.

8. The method according to claim 1, characterized in that The method further comprises: When the data in the internal FLASH is damaged, but the firmware is stored in the SPI FLASH, the firmware is restored from the SPI FLASH; The firmware is restored from the SPI FLASH, including: the ROM program receives a firmware restoration instruction from the host; the ROM program detects itself and the SPI FLASH, and replies to the host detection status after the detection is passed; the host sends a firmware restoration instruction; the ROM reads the firmware data in the SPI FLASH and writes the data to the internal FLASH of the microprocessor; and reports the completion matters after the restoration is completed.

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