Low-leakage high-voltage selection circuit applied to multi-section series battery voltage sampling

By using two back-to-back series-connected P-LDMOS and N-LDMOS high-voltage switches in multi-cell lithium battery voltage sampling and a current compensation circuit, the problem of inconsistent battery power caused by the LDMOS switch is solved, thereby improving the battery efficiency and life.

CN119341167BActive Publication Date: 2025-10-24XIAN UNIV OF TECH
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Patent Information

Application Number
CN202411732545.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-11-29
Publication Date
2025-10-24
Estimated Expiration
2044-11-29

AI Technical Summary

Technical Problem

In the prior art, when LDMOS is used as a high-voltage selection switch for battery voltage sampling in a BCD process, there is a problem that the pull-down or pull-up current affects the consistency of the battery power, thereby affecting the battery efficiency and life.

Method used

Two back-to-back series-connected P-LDMOS and N-LDMOS are used as low-leakage current high-voltage switches. Through the current compensation circuit, the pull-down or pull-up current is provided by the highest battery cell voltage, avoiding affecting the consistency of the battery cell power.

Benefits of technology

Through current compensation, the power consistency of multiple lithium batteries connected in series is ensured, the safety hazards of overvoltage or undervoltage are avoided, and the battery efficiency and life are improved.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a low-leakage high-voltage selection circuit applied to voltage sampling of multi-section series connection batteries, comprising a battery voltage sampling high-voltage selection circuit, a high-voltage switch HSWITCH1 and a high-voltage switch HSWITCH2, wherein the battery voltage sampling high-voltage selection circuit is composed of multi-section series connection lithium batteries, the first and second battery voltages are selected by a group of high-voltage switches, the third battery voltage is selected by matching the battery positive and negative terminals with a matching circuit, and N battery sections correspond to N+4 sampling switches. The application solves the problem that, in the prior art, when LDMOS in the BCD process is used as a high-voltage selection switch for battery voltage sampling, a typical structure will exist, in which a pull-down or pull-up current provided by the battery voltage exists, thereby affecting the consistency of the battery capacity and further affecting the use efficiency and service life of the battery.
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Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of battery management chip, and particularly relates to a low-leakage-current high-voltage selection circuit applied to voltage sampling of multiple series-connected batteries. BACKGROUND

[0002] With the popularization and development of new energy technology, lithium ion batteries play an important role in applications such as automobile electronics, portable devices and intelligent logistics devices. Usually, several lithium batteries are connected in series as the power supply of these products, but overcharging and over-discharging of lithium batteries will cause irreversible serious damage to lithium batteries, affecting the normal use and service life of lithium batteries. In order to improve the use efficiency and prolong the service life of the battery, a battery management system (BMS) is needed to monitor whether overvoltage or undervoltage occurs in a single battery voltage and trigger the corresponding protection.

[0003] In order to save chip area and power consumption, the battery voltage sampling circuit usually selects the voltage of a single battery through a high-voltage selection circuit, then converts the voltage signal in the high-voltage domain into a voltage signal in the low-voltage domain with a certain conversion factor by using a level shift circuit, and finally sends the converted voltage signal into an analog-to-digital converter (ADC) for quantization.

[0004] Since multiple lithium batteries are used in series, the highest battery voltage can reach tens of volts. The battery management chip usually adopts Bipolar-CMOS-DMOS (BCD) process, in which the LDMOS has the characteristics of gate-drain voltage resistance and gate-source voltage resistance. Therefore, when the LDMOS is used as a high-voltage switch, a gate-source voltage bias circuit is needed to make it linearly conductive. Figure 1 The circuit diagram of a typical LDMOS as a high-voltage switch will generate a pull-down current when EN is high, and a voltage drop will occur on R1, so that the gate-source voltage of DM P1 is biased at a suitable value. However, this circuit has two problems: 1. Due to the existence of the substrate diode D1, the high-voltage switch cannot be used in cascade. 2. When the high-voltage switch is working normally, there will always be a pull-down current provided by Vbat_in. When the high-voltage switch selects different batteries, the consistency of the battery capacity will be affected due to the difference in Vbat_in, further affecting the use efficiency and service life of the battery. SUMMARY

[0005] The purpose of the application is to provide a low-leakage-current high-voltage selection circuit applied to voltage sampling of multiple series-connected batteries, which solves the problem in the prior art that when the LDMOS in the BCD process is used as a high-voltage selection switch for battery voltage sampling, a typical structure will have a pull-down or pull-up current provided by the battery voltage, thereby affecting the consistency of the battery capacity and further affecting the use efficiency and service life of the battery.

[0006] The technical solution adopted by the present invention is a low leakage current high voltage selection circuit applied to voltage sampling of multiple series-connected batteries, including a high voltage selection circuit for battery voltage sampling, a high voltage switch HSWITCH1 and a high voltage switch HSWITCH2.

[0007] The present invention is also characterized in that:

[0008] The high-voltage selection circuit for battery voltage sampling is composed of multiple lithium batteries connected in series. The voltages of the first and second batteries are selected by a group of high-voltage switches, and the voltage of the third battery is selected by the battery positive and negative terminal matching circuit. N batteries correspond to N+4 sampling switches.

[0009] Two back-to-back series-connected P-LDMOS are used as a low leakage current high voltage switch HSWITCH1. In the HSWITCH1, the P-LDMOS tube DM P1 The source of the DM is connected to the input battery voltage Vbat_in. P1 The drain of the P-LDMOS tube DM is connected P2 The drain of the DM P2 The source of the current source is connected to the output battery voltage Vbat_out; the current source generating circuit is R1, which is connected to the low voltage NMOS tube M N1 The gate-drain terminal and the low-voltage NMOS tube M N2 、M N3 、M N4 The gate of the resistor R2 is used as a current mirror to copy the current; one end of the resistor R2 is connected to the input battery voltage Vbat_in, and the other end is connected to the N-LDMOS tube DM N2 The drain, DM N2 The source connection M N3 The drain of DM P1 Bias circuit;

[0010] Current source I3 connects resistor R3 and P-LDMOS tube DM P5 The source, DM P5 The drain of R3 is grounded, and the other end of R3 is connected to the N-LDMOS tube DM N3 The drain and DM P2 Gate, DM N3 The source connection M N4 The drain of DM P2 Bias circuit of N-LDMOS tube DM N1 The source connection M N2 The drain, DM N1 The drain of the P-LDMOS tube DM is connected P3 The gate-drain and P-LDMOS tube DM P4 Gate, DM P3 The source of the low voltage PMOS tube MP1 gate of M P2 of M P2 of M P4 of M

[0011] HSWITCH1, let I BACK1 =I1, so that the pull-down current is provided by the highest battery voltage VCC instead of the input battery voltage Vbat_in;

[0012] two back-to-back series N-LDMOS as low leakage current high voltage switch HSWITCH2, said HSWITCH2, N-LDMOS DM N1 of M N1 of M N2 of M N2 of M N1 of M N2 of M N3 of M N2 of M N3 of M P1 of M P2 of M P1 of M P1 of M P2 of M P2 of M P2 of M P2 of M N1 of M N2 of M

[0013] of M N4 of M N1 of M N2 of M N4 of M N3 of M

[0014] HSWITCH2, let I BACK2 =I2, so that the pull-down current provided by VCC flows into the ground instead of the input.

[0015] The beneficial effect of the present application is that the low-leakage current high-voltage selection circuit applied to the voltage sampling of the multi-section series battery, compared with the conventional high-voltage switch applied to the voltage sampling of the multi-section series lithium battery, the present application generates a pull-up or pull-down current by the current compensation method when the LDMOS is used as a high-voltage switch, which is provided by the highest section battery voltage instead of each section input battery voltage, thereby avoiding the safety hazard problem of overvoltage or undervoltage of the battery caused by the inconsistent battery capacity of each section. And the designed high-voltage switches HSWITCH1 and HSWITCH2 are applied to the battery high-voltage selection circuit. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 It is a circuit diagram of a typical LDMOS as a high-voltage switch;

[0017] Figure 2 It is a high-voltage selection circuit applied to the voltage sampling of the multi-section series battery of the present application;

[0018] Figure 3 It is a low-leakage current high-voltage switch HSWITCH1 of two back-to-back series P-LDMOS of the present application;

[0019] Figure 4 It is a low-leakage current high-voltage switch HSWITCH2 of two back-to-back series N-LDMOS of the present application; Figure 5 It is a control signal schematic diagram applied to the low-leakage current high-voltage selection circuit of the voltage sampling of the multi-section series lithium battery. DETAILED DESCRIPTION

[0020] The present application will be described in detail below in combination with the drawings and specific embodiments.

[0021] The present application is a low-leakage current high-voltage selection circuit applied to the voltage sampling of the multi-section series battery, the structure is as shown in Figure 2 , including a battery voltage sampling high-voltage selection circuit, a high-voltage switch HSWITCH1 and a high-voltage switch HSWITCH2. The battery voltage sampling high-voltage selection circuit is composed of a multi-section series lithium battery, the first and second section battery voltages are selected by a group of high-voltage switches, the third section battery voltage is selected by matching the battery positive and negative end matching circuit, and the N section battery corresponds to N+4 sampling switches.

[0022] Two back-to-back series P-LDMOS are used as low-leakage current high-voltage switches HSWITCH1, in the HSWITCH1, the source of the P-LDMOS tube DM P1 is connected to the input battery voltage Vbat_in, the drain of the DM P1 is connected to the drain of the P-LDMOS tube DM P2 , which constitutes a back-to-back high-voltage switch, DM P2The source of the current source is connected to the output battery voltage Vbat_out; the current source generating circuit is R1, which is connected to the low voltage NMOS tube M N1 The gate-drain terminal and the low-voltage NMOS tube M N2 、M N3 、M N4 The gate of the resistor R2 is used as a current mirror to copy the current; one end of the resistor R2 is connected to the input battery voltage Vbat_in, and the other end is connected to the N-LDMOS tube DM N2 The drain, DM N2 The source connection M N3 The drain of DM P1 bias circuit.

[0023] Current source I3 connects resistor R3 and P-LDMOS tube DM P5 The source, DM P5 The drain of R3 is grounded, and the other end of R3 is connected to the N-LDMOS tube DM N3 The drain and DM P2 Gate, DM N3 The source connection M N4 The drain of DM P2 Bias circuit of N-LDMOS tube DM N1 The source connection M N2 The drain, DM N1 The drain of the P-LDMOS tube DM is connected P3 The gate-drain and P-LDMOS tube DM P4 Gate, DM P3 The source of the low voltage PMOS tube M P1 Gate drain and low voltage PMOS tube M P2 Gate, M P2 The drain connection DM P4 The source of forms a current compensation circuit.

[0024] In HSWITCH1, let I BACK1 =I1, so that the pull-down current is provided by the highest battery voltage VCC instead of the input battery voltage Vbat_in.

[0025] Two back-to-back series-connected N-LDMOS are used as a low leakage current high voltage switch HSWITCH2. In the HSWITCH2, the N-LDMOS tube DM N1 The drain of DM is connected to the input battery voltage Vbat_in. N1 The source of the N-LDMOS tube DM is connected N2 The source of the DM N2 The drain outputs the battery voltage Vbat_out; the current source generating circuit is R1, which is connected to the low voltage NMOS tube MN1 The gate-drain terminal and the low-voltage NMOS tube M N2 Gate of N-LDMOS tube DM N3 The source connection M N2 The drain, DM N3 The drain of the P-LDMOS tube DM is connected P1 The gate-drain and P-LDMOS tube DM P2 Gate, DM P1 The source of the low voltage PMOS tube M P1 The gate and drain of the PMOS tube M P2 Gate, M P2 The drain connection DM P2 The source, DM P2 The drain of the resistor R2 is connected, and the other end of R2 is connected to the DM N1 and DM N2 The source of the high voltage switch forms the bias circuit.

[0026] N-LDMOS tube DM N4 The drain of the DM N1 and DM N2 The source, DM N4 The source of the low voltage NMOS tube M is connected N3 The drain of the circuit forms a current compensation circuit.

[0027] In HSWITCH2, let I BACK2 =I2, so that the pull-down current provided by VCC flows into the ground instead of the input terminal.

[0028] Example 1

[0029] The present invention is applied to a low leakage current high voltage selection circuit for voltage sampling of multiple series-connected batteries, the structure of which is as follows: Figure 2 As shown, it includes a high-voltage selection circuit for battery voltage sampling, high-voltage switches HSWITCH1 and HSWITCH2. The high-voltage selection circuit for battery voltage sampling is composed of multiple lithium batteries connected in series. The voltages of the first and second batteries are selected by a set of high-voltage switches, and the voltage of the third battery is selected by the battery positive and negative terminal matching circuit. N batteries correspond to N+4 sampling switches.

[0030] Example 2

[0031] The present invention is applied to a low leakage current high voltage selection circuit for voltage sampling of multiple series-connected batteries, the structure of which is as follows: Figure 2As shown, it includes a high-voltage selection circuit for battery voltage sampling, high-voltage switches HSWITCH1 and HSWITCH2. The high-voltage selection circuit for battery voltage sampling is composed of multiple lithium batteries connected in series. The voltages of the first and second batteries are selected by a set of high-voltage switches, and the voltage of the third battery is selected by the battery positive and negative terminal matching circuit. N batteries correspond to N+4 sampling switches.

[0032] Two back-to-back series-connected P-LDMOS are used as a low leakage current high voltage switch HSWITCH1. In the HSWITCH1, the P-LDMOS tube DM P1 The source of the DM is connected to the input battery voltage Vbat_in. P1 The drain of the P-LDMOS tube DM is connected P2 The drain of the DM P2 The source of the current source is connected to the output battery voltage Vbat_out; the current source generating circuit is R1, which is connected to the low voltage NMOS tube M N1 The gate-drain terminal and the low-voltage NMOS tube M N2 、M N3 、M N4 The gate of the resistor R2 is used as a current mirror to copy the current; one end of the resistor R2 is connected to the input battery voltage Vbat_in, and the other end is connected to the N-LDMOS tube DM N2 The drain, DM N2 The source connection M N3 The drain of DM P1 bias circuit.

[0033] Example 3

[0034] The present invention is applied to a low leakage current high voltage selection circuit for voltage sampling of multiple series-connected batteries, the structure of which is as follows: Figure 2 As shown, it includes a high-voltage selection circuit for battery voltage sampling, high-voltage switches HSWITCH1 and HSWITCH2. The high-voltage selection circuit for battery voltage sampling is composed of multiple lithium batteries connected in series. The voltages of the first and second batteries are selected by a set of high-voltage switches, and the voltage of the third battery is selected by the battery positive and negative terminal matching circuit. N batteries correspond to N+4 sampling switches.

[0035] Two back-to-back series-connected P-LDMOS are used as a low leakage current high voltage switch HSWITCH1. In the HSWITCH1, the P-LDMOS tube DM P1 The source of the DM is connected to the input battery voltage Vbat_in. P1 The drain of the P-LDMOS tube DM is connected P2 The drain of the DM P2The source of the current source is connected to the output battery voltage Vbat_out; the current source generating circuit is R1, which is connected to the low voltage NMOS tube M N1 The gate-drain terminal and the low-voltage NMOS tube M N2 、M N3 、M N4 The gate of the resistor R2 is used as a current mirror to copy the current; one end of the resistor R2 is connected to the input battery voltage Vbat_in, and the other end is connected to the N-LDMOS tube DM N2 The drain, DM N2 The source connection M N3 The drain of DM P1 bias circuit.

[0036] Two back-to-back series-connected N-LDMOS are used as a low leakage current high voltage switch HSWITCH2. In the HSWITCH2, the N-LDMOS tube DM N1 The drain of DM is connected to the input battery voltage Vbat_in. N1 The source of the N-LDMOS tube DM is connected N2 The source of the DM N2 The drain outputs the battery voltage Vbat_out; the current source generating circuit is R1, which is connected to the low voltage NMOS tube M N1 The gate-drain terminal and the low-voltage NMOS tube M N2 Gate of N-LDMOS tube DM N3 The source connection M N2 The drain, DM N3 The drain of the P-LDMOS tube DM is connected P1 The gate-drain and P-LDMOS tube DM P2 Gate, DM P1 The source of the low voltage PMOS tube M P1 The gate and drain of the PMOS tube M P2 Gate, M P2 The drain connection DM P2 The source, DM P2 The drain of the resistor R2 is connected, and the other end of R2 is connected to the DM N1 and DM N2 The source of the high voltage switch forms the bias circuit.

[0037] N-LDMOS tube DM N4 The drain connection DM N1 and DM N2 The source, DM N4 The source of the low voltage NMOS tube M is connected N3 The drain of the circuit forms a current compensation circuit.

[0038] Example 4

[0039] The application is applied to a low-leakage current high-voltage selection circuit for voltage sampling of multi-section series battery, and the structure is as shown in the figure Figure 2 The application is applied to a low-leakage current high-voltage selection circuit for voltage sampling of multi-section series battery, and the structure is as shown in the figure

[0040] Two back-to-back series N-LDMOS as low-leakage current high-voltage switch HSWITCH2, in the HSWITCH2, the drain of N-LDMOS DM N1 is connected with the input battery voltage Vbat_in, the source of DM N1 is connected with the source of N-LDMOS DM N2 , the drain of DM N2 outputs the battery voltage Vbat_out; the current source generation circuit is R1, R1 is connected with the gate-drain end of low-voltage NMOS M N1 and the gate of low-voltage NMOS M N2 , the source of DM N3 is connected with the drain of M N2 , the drain of DM N3 is connected with the gate-drain of P-LDMOS DM P1 and the gate of P-LDMOS DM P2 , the source of DM P1 is connected with the gate-drain of low-voltage PMOS M P1 and the gate of PMOS M P2 , the drain of M P2 is connected with the source of DM P2 , the drain of DM P2 is connected with resistance R2, the other end of R2 is connected with the source of DM N1 and DM N2 , the source of DM

[0041] The drain of N-LDMOS DM N4 is connected with DM N1 and the source of DM N2 , the source of DM N4 is connected with the drain of low-voltage NMOS M N3 , which constitutes a current compensation circuit.

[0042] In HSWITCH2, let I BACK2 =I2, so that the pull-down current provided by VCC flows into the ground but not the input end.

[0043] Embodiment 5

[0044] The application is applied to a low-leakage-current high-voltage selection circuit for voltage sampling of a multi-section series battery, which has a structure as shown in the figure, and comprises a high-voltage selection circuit for battery voltage sampling, a high-voltage switch HSWITCH1 and a high-voltage switch HSWITCH2. The high-voltage selection circuit for battery voltage sampling is composed of multi-section series lithium batteries, the first and second battery voltages are selected by a group of high-voltage switches, the third battery voltage is selected in combination with a battery positive and negative terminal matching circuit, and the Nth battery corresponds to N+4 sampling switches. Figure 2

[0045] A P-LDMOS in a back-to-back series is used as the low-leakage-current high-voltage switch HSWITCH1, in which the source of the P-LDMOS DM P1 is connected to the input battery voltage Vbat_in, the drain of the P-LDMOS DM P1 is connected to the drain of the P-LDMOS DM P2 to form a back-to-back high-voltage switch, the source of the P-LDMOS DM P2 is connected to the output battery voltage Vbat_out; the current source generation circuit is R1, R1 is connected to the gate-drain terminal of the low-voltage NMOS M N1 , and the gate of the low-voltage NMOS M N2 , M N3 , M N4 is connected to the gate as a current mirror copying current; one end of the resistor R2 is connected to the input battery voltage Vbat_in, and the other end is connected to the drain of the N-LDMOS DM N2 , the source of the N-LDMOS DM N2 is connected to the drain of the low-voltage NMOS M N3 to form the bias circuit of the N-LDMOS DM P1 .

[0046] The current source I3 is connected to the resistor R3 and the source of the P-LDMOS DM P5 , the drain of the P-LDMOS DM P5 is grounded, and the other end of R3 is connected to the drain of the N-LDMOS DM N3 and the gate of the N-LDMOS DM P2 , the source of the N-LDMOS DM N3 is connected to the drain of the low-voltage NMOS M N4 to form the bias circuit of the N-LDMOS DM P2 ; the source of the N-LDMOS DM N1 is connected to the drain of the low-voltage NMOS M N2 , the drain of the N-LDMOS DM N1 is connected to the gate-drain of the P-LDMOS DM P3 and the gate of the P-LDMOS DM P4 , the source of the P-LDMOS DM P3 is connected to the low-voltage PMOS M P1 ​Gate drain and low voltage PMOS tube M P2 Gate, M P2 The drain of the DM P4 The source of forms a current compensation circuit.

[0047] Example 6

[0048] The present invention is applied to a low leakage current high voltage selection circuit for voltage sampling of multiple series-connected batteries, the structure of which is as follows: Figure 2 As shown, it includes a high-voltage selection circuit for battery voltage sampling, high-voltage switches HSWITCH1 and HSWITCH2. The high-voltage selection circuit for battery voltage sampling is composed of multiple lithium batteries connected in series. The voltages of the first and second batteries are selected by a set of high-voltage switches, and the voltage of the third battery is selected by the battery positive and negative terminal matching circuit. N batteries correspond to N+4 sampling switches.

[0049] Two back-to-back series-connected N-LDMOS are used as a low leakage current high voltage switch HSWITCH2. In the HSWITCH2, the N-LDMOS tube DM N1 The drain of DM is connected to the input battery voltage Vbat_in. N1 The source of the N-LDMOS tube DM is connected N2 The source of the DM N2 The drain outputs the battery voltage Vbat_out; the current source generating circuit is R1, which is connected to the low voltage NMOS tube M N1 The gate-drain terminal and the low-voltage NMOS tube M N2 Gate of N-LDMOS tube DM N3 The source connection M N2 The drain, DM N3 The drain of the P-LDMOS tube DM is connected P1 The gate-drain and P-LDMOS tube DM P2 Gate, DM P1 The source of the low voltage PMOS tube M P1 The gate and drain of the PMOS tube M P2 Gate, M P2 The drain of the DM P2 The source, DM P2 The drain of the resistor R2 is connected, and the other end of R2 is connected to the DM N1 and DM N2 The source of the high voltage switch forms the bias circuit.

[0050] N-LDMOS tube DM N4 The drain of the DM N1 and DM N2 The source, DM N4 The source of the low voltage NMOS tube M is connectedN3 The drain of the circuit forms a current compensation circuit.

[0051] In HSWITCH2, let I BACK2 =I2, so that the pull-down current provided by VCC flows into the ground instead of the input terminal.

[0052] Figure 1 This is a typical circuit diagram of LDMOS used as a high-voltage switch. Vbat_in is the input battery voltage. When the control signal EN is high, a pull-down current is generated and a voltage drop is generated on the resistor R1. In this way, the P-LDMOS tube DM P1 V SG It is biased in a certain range so that it can be turned on linearly. D1 is DM P1 However, the pull-down current generated is provided by the input battery voltage Vbat_in. When the high-voltage switch selects different batteries as input, the average pull-down current of each battery is unequal, which will lead to inconsistent voltages of each battery, thus affecting the battery efficiency and life.

[0053] Figure 2 This is a high-voltage selection circuit for voltage sampling of multiple series-connected lithium-ion batteries. In conjunction with the proposed battery voltage sampling method, this high-voltage sampling circuit is designed to minimize the number of switches used. The voltages of the first and second batteries are selected by a set of high-voltage switches, while the voltage of the third battery is selected using a matching circuit for the positive and negative terminals. While traditional high-voltage selection circuits require 2N sampling switches to sample N batteries, this method only requires N+4 sampling switches. For batteries with five or more series cells, this method can significantly reduce the number of switches.

[0054] Under normal circumstances, the voltage range of a single battery is 1.5V-4.5V. According to the different battery voltages, select the appropriate high-voltage switches HSWITCH1 and HSWITCH2. If the voltage of a single battery is 1.5V, then the positive terminal voltage of the second battery is 3V. If HSWITCH1 is used as the high-voltage selection switch for the second battery, it will be difficult to make M N3 It works in the saturation region, so the positive terminal voltage of the second battery selects HSWITCH2 as the high voltage switch. The positive terminal voltage of the second battery is also the negative terminal voltage of the third battery. When the third battery voltage is selected, the switch S B1 、S B2 conduction, where S B1 The negative terminal voltage of the third battery is selected, so HSWITCH2 is selected as the high-voltage switch. When the voltage of the fourteenth battery is selected (the highest battery voltage), the switch S 13 、S 14 、S A1, S A2 When the switch is on, HSWITCH1 is used as a high-voltage switch, so that VCC does not need an additional charge pump circuit to drive.

[0055] Figure 3 The two back-to-back series P-LDMOSs of the application are used as low-leakage high-voltage switches HSWITCH1. In order to increase the isolation degree between the high-voltage switches, two back-to-back series P-LDMOSs are used, and the substrate diodes D1 and D2 thereof are reverse-biased; R2 and DM N2 , M N3 , M N1 and R1 constitute the bias circuit of DM P1 ; M N4 , DM N3 , R3, DM P5 and current source I3 constitute the bias circuit of DM P2 ; M N2 , DM N1 , DM P3 , DM P4 , M P1 , M P2 constitute a current compensation circuit. The working principle is as follows: when the control signal EN is high, the current source I = 5V / R1, M N1 and M N3 constitute a current mirror, which copies the generated current I as current I1, R2 and I1 generate a voltage drop, so that V SG,DMP1 =Vbat_in-I1R2; M N2 and M N1 constitute a current mirror, which copies the current as I2, DM P5 and current source I3 constitute a source follower, and I3 is greater than I2, V SG,DMP2 =I2R3-V SG,DMP5 ; M N2 and M N1 constitute a current mirror, M P1 , M P2 , DM P3 and DM P4 constitute a common-source common-gate current mirror, which copies the current as I back1 , I back1 =I1, through current compensation, the current I2 is provided by the highest section battery voltage VCC, rather than the input battery voltage Vbat_in, which ensures the consistency of the battery capacity. When the highest section battery positive voltage is selected, at this time VCC=Vbat_in, although M P2 and DM P4 are short-circuited, making the current compensation circuit fail, but at this time the pull-down current is still provided by the highest section battery voltage, which will not affect the consistency.

[0056] Figure 4 As two back-to-back series N-LDMOS of the present application as low leakage current high voltage switch HSWITCH2. Also to increase the isolation between high voltage switches, two back-to-back series N-LDMOS are used, whose substrate diodes D1, D2 are reverse biased; M N2 , DM N3 , DM P1 , DM P2 , M P1 , M P2 and R2 constitute the bias circuit of DM N 1 and DM N2 ; DM N4 and M N3 constitute the current compensation circuit; the triode Q1 is used to protect the gate-source voltage of DM N1 and DM N2 from being broken down when the control signal EN is low. Its working principle is: when the control signal EN is high, the current I = 5V / R1 is generated, M N1 and M N2 constitute a current mirror, M P1 , M P2 , DM P1 and DM P2 constitute a common-source common-gate current mirror, the copy current is I2, R2 and I2 generate a voltage drop, so that V GS,DMN1 =V GS,DMN2 =I2R2, the bias voltage makes DM N1 and DM N2 can be linearly turned on; M N3 and M N1 constitute a current mirror, the copy current is I back2 , I back2 =I2, so that the current flows from VCC to ground without flowing into the input battery voltage, ensuring the consistency of the battery power.

[0057] Figure 5 The schematic diagram of the low leakage current high voltage selection circuit applied to the voltage sampling of multiple series lithium batteries. When S1 is high, S1-controlled HSWITCH2 is turned on to select the first battery voltage; when S1, S2 are high, S1-controlled HSWITCH2 is turned on, S2-controlled HSWITCH2 is turned on to select the second battery voltage; when S2, S B1 and S B2 are high, S2, S B1 controlled HSWITCH2 is turned on, S3, S B2 controlled HSWITCH1 is turned on; the rest of the battery selection is similar.

[0058] ​The application is applied to low-leakage high-voltage selection circuit for voltage sampling of multi-section series battery. The application improves the problem that when a typical LDMOS tube is used as a high-voltage switch, a gate-source clamping circuit thereof generates a pull-up or pull-down current provided by an input battery voltage, which affects the consistency of the battery capacity of each section, and further affects the battery use efficiency and service life. The application compensates for the use of two back-to-back series P-LDMOS as high-voltage switches and the use of two back-to-back parallel N-LDMOS as high-voltage switches through a current compensation circuit, so that the pull-down or pull-up current generated by the gate-source clamping circuit is entirely provided by the highest section battery voltage, thereby ensuring the consistency of the battery capacity. The two low-leakage high-voltage switches designed are applied to a specific high-voltage selection circuit for voltage sampling.

Claims

1. A low leakage current high voltage selection circuit for use in multi-cell series battery voltage sampling, characterized by, The high-voltage selection circuit including battery voltage sampling, high-voltage switch HSWITCH1 and high-voltage switch HSWITCH2, the high-voltage selection circuit including battery voltage sampling is constituted by multiple series lithium batteries, the first and second battery voltage is selected by a group of high-voltage switch HSWITCH2, the third battery voltage is selected in cooperation with the positive and negative terminal matching circuit, and N battery corresponds to N+4 sampling switches. Two P-LDMOSs in back-to-back connection are used as a low-leakage high-voltage switch HSWITCH1, in which the source of a P-LDMOS DM P1 is connected to an input battery voltage Vbat_in, the drain of the P-LDMOS DM P1 is connected to the drain of a P-LDMOS DM P2 to form a back-to-back high-voltage switch HSWITCH1, the source of the P-LDMOS DM P2 is connected to an output battery voltage Vbat_out; a current source generation circuit is R1, R1 is connected to the gate-drain end of a low-voltage NMOS M N1 , the gate of the low-voltage NMOS M N2 , M N3 , and M N4 is used as a current mirror copy current; one end of a resistor R2 is connected to the input battery voltage Vbat_in, and the other end is connected to the drain of an N-LDMOS DM N2 , the source of the N-LDMOS DM N2 is connected to the drain of M N3 to form a bias circuit for DM P1 ; Two back-to-back series-connected N-LDMOS are used as a low leakage current high voltage switch HSWITCH2. In the HSWITCH2, the N-LDMOS tube DM N1 The drain of DM is connected to the input battery voltage Vbat_in. N1 The source of the N-LDMOS tube DM is connected N2 The source of the back-to-back high voltage switch HSWITCH2, DM N2 The drain outputs the battery voltage Vbat_out; the current source generating circuit is R1, which is connected to the low voltage NMOS tube M N1 The gate-drain terminal and the low-voltage NMOS tube M N2 Gate of N-LDMOS tube DM N3 The source connection M N2 The drain, DM N3 The drain of the P-LDMOS tube DM is connected P1 The gate-drain and P-LDMOS tube DM P2 Gate, DM P1 The source of the low voltage PMOS tube M P1 The gate and drain of the PMOS tube M P2 Gate, M P2 The drain connection DM P2 The source, DM P2 The drain of the resistor R2 is connected, and the other end of R2 is connected to the DM N1 and DM N2 The source of constitutes a bias circuit of the high-voltage switch HSWITCH2.

2. The low leakage current high voltage selection circuit for multi-cell series battery voltage sampling according to claim 1, wherein, Current source I3 connects resistor R3 and P-LDMOS tube DM P5 The source, DM P5 The drain of R3 is grounded, and the other end of R3 is connected to the N-LDMOS tube DM N3 The drain and DM P2 Gate, DM N3 The source connection M N4 The drain of DM P2 Bias circuit; N-LDMOS transistor DM N1 source of DM N2 drain of DM N1 drain of DM P3 gate-drain of DM and P-LDMOS transistor DM P4 gate of DM P3 source of DM P1 gate-drain of DM and low-voltage PMOS transistor M P2 gate of M P2 drain of DM P4 source of DM 3. The low leakage high voltage selection circuit for multi-cell series battery voltage sampling according to claim 2, wherein, In the HSWITCH1, let I BACK1 =I1, so that the pull-down current is provided by the highest battery voltage VCC instead of the input battery voltage Vbat_in.

4. The low leakage high voltage selection circuit for multi-cell series battery voltage sampling according to claim 3, wherein, The drain of the N-LDMOS transistor DM N4 is connected to the drain of the low-voltage NMOS transistor M N1 and the source of the N-LDMOS transistor DM N2 is connected to the source of the low-voltage NMOS transistor M N4 , and the drain of the low-voltage NMOS transistor M N3 forms a current compensation circuit.

5. The low leakage high voltage selection circuit for multi-cell series battery voltage sampling according to claim 4, wherein, In the HSWITCH2, let I BACK2 = I2, so that the pull-down current supplied by VCC flows into the ground instead of the input.

Citation Information

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