Sealing integrated circuit, and control method and control system for bidirectional data transmission

Abstract

The invention discloses a sealed integrated circuit, and a control method and a control system for bidirectional data transmission. The sealed integrated circuit comprises an input / output pin, a first chip and a second chip. The first chip comprises a first voltage conversion circuit, a second voltage conversion circuit and a data transmission circuit. The first voltage conversion circuit, the second voltage conversion circuit and the data transmission circuit are connected in parallel between an internal pin and the input / output pin. The second chip enables one of the first voltage conversion circuit, the second voltage conversion circuit and the data transmission circuit according to an operation mode of the internal pin. According to the invention, the efficiency of the sealed integrated circuit can be greatly improved.

Description

Technical Field

[0001] The present invention relates to an integrated circuit, in particular to a packaged integrated circuit that packages a plurality of chips together. Background Art

[0002] In a general packaged integrated circuit, when a specific input / output pin of the packaged integrated circuit is used as an input pin or an output pin, the packaged integrated circuit can only perform unidirectional signal transmission through the specific input / output pin, and cannot transmit electrical signals of analog characteristics. Summary of the invention

[0003] An embodiment of the present invention provides a packaged integrated circuit, comprising an input / output pin, a first chip and a second chip. The first chip comprises a first internal pin, a second internal pin, a first voltage conversion circuit, a second voltage conversion circuit and a data transmission circuit. The first internal pin is electrically connected to the input / output pin. The first voltage conversion circuit converts the voltage level of the first internal pin to generate a first conversion level for the second internal pin. The second voltage conversion circuit converts the voltage level of the second internal pin to generate a second conversion level for the first internal pin. The data transmission circuit provides a transmission path between the first internal pin and the second internal pin. The second chip comprises a third internal pin, a storage circuit and a processing circuit. The third internal pin is electrically connected to the second internal pin. The storage circuit is used to store a program code. The processing circuit executes the program code to set the operation mode of the third internal pin, and enables one of the first voltage conversion circuit, the second voltage conversion circuit and the data transmission circuit according to the operation mode of the third internal pin.

[0004] The present invention further provides a control method for bidirectional data transmission, which is applicable to a packaged integrated circuit. The packaged integrated circuit has an input / output pin. The control method for bidirectional data transmission of the present invention includes executing a program code to generate an execution result; and setting an operation mode of an internal pin according to the execution result. The program code is stored in a storage circuit. When the operation mode of the internal pin is a first mode, a first voltage conversion circuit is enabled to convert the voltage level of the input / output pin. When the operation mode of the internal pin is a second mode, a second voltage conversion circuit is enabled to convert the voltage level of the internal pin. When the operation mode of the internal pin is a third mode, a data transmission circuit is enabled to form a transmission path between the internal pin and the input / output pin. The first voltage conversion circuit, the second voltage conversion circuit and the data transmission circuit are coupled between the internal pin and the input / output pin.

[0005] The present invention further provides a control system, including an external device and a packaged integrated circuit. The packaged integrated circuit is coupled to the external device and includes an input / output pin, a microcontroller chip, and a voltage conversion chip. The input / output pin is electrically connected to the external device. The microcontroller chip has an internal pin. The voltage conversion chip has a first path, a second path, and a third path. The first path, the second path, and the third path are connected in parallel between the internal pin and the input / output pin. When the internal pin is used as an input pin, the microcontroller chip conducts the first path. When the internal pin is used as an output pin, the microcontroller chip conducts the second path. When the internal pin is in a floating state, the microcontroller chip conducts the third path.

[0006] The control method of bidirectional data transmission of the present invention can be implemented through the microcontroller chip and packaged integrated circuit of the present invention, which is hardware or firmware that can execute specific functions, and can also be recorded in a recording medium in the form of program code and implemented in combination with specific hardware. When the program code is loaded and executed by an electronic device, processor, computer or machine, the electronic device, processor, computer or machine becomes a microcontroller chip and packaged integrated circuit for implementing the present invention.

[0007] In the present invention, since the path can perform bidirectional signal transmission, when the microcontroller chip sets the internal pin to a floating level or a high impedance state, the microcontroller chip can determine whether the external device is ready based on the voltage level of the internal pin. Therefore, the performance of the packaged integrated circuit is greatly improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to make the above and other objects, features, advantages and embodiments of the present invention more clearly understood, the accompanying drawings are described as follows:

[0009] Figure 1 FIG. 4 is a schematic diagram of a packaged integrated circuit of the present invention.

[0010] Figure 2 It is a flow chart of the control method of bidirectional data transmission of the present invention.

[0011] Figure 3 Schematic diagram of the control system of the present invention.

[0012] Explanation of symbols

[0013] 100, 310: Packaged integrated circuits

[0014] 110, 311: Microcontroller chip

[0015] 120, 312: Voltage conversion chip

[0016] 130, 313: Input and output pins

[0017] 111: Processing circuit

[0018] 112: Program code

[0019] 113~115, 124~127, 314: Internal pins

[0020] 116: Storage Circuit

[0021] 121, 122: Voltage conversion circuit

[0022] 123: Data transmission circuit

[0023] 128: Transmission Gate

[0024] 129: Voltage clamping circuit

[0025] VT1, VT2: Conversion level

[0026] S_CN: Control data

[0027] VDD: operating voltage

[0028] PA1~PA3、315~317:Path

[0029] EN1~EN3: Control bit

[0030] S210~S217: Steps

[0031] 300: Control system

[0032] 320: External device

[0033] 330: Upper resistor

[0034] VE: External voltage DETAILED DESCRIPTION

[0035] In order to make the purpose, features and advantages of the present invention more clearly understood, the following examples are specifically cited and described in detail with reference to the accompanying drawings. The present invention specification provides different examples to illustrate the technical features of different implementations of the present invention. Among them, the configuration of each element in the example is for illustrative purposes and is not intended to limit the present invention. In addition, some repetitions of the figure numbers in the examples are for the purpose of simplifying the description and do not mean the relevance between different examples.

[0036] Figure 1Schematic diagram of a packaged integrated circuit of the present invention. As shown in the figure, the packaged integrated circuit 100 includes a microcontroller chip 110, a voltage conversion chip 120, and an input / output pin 130. In this embodiment, the microcontroller chip 110 and the voltage conversion chip 120 are packaged together as the packaged integrated circuit 100. In addition, the microcontroller chip 110 and the voltage conversion chip 120 communicate with an external device (not shown) through the input / output pin 130. In one possible embodiment, the input / output pin 130 is a general purpose input / output (GPIO) pin.

[0037] The microcontroller chip 110 includes at least one internal pin 115. In the present embodiment, the microcontroller chip 110 executes a program code 112 to set the operation mode of the internal pin 115. In addition, the microcontroller chip 110 generates at least one control data S_CN according to the operation mode of the internal pin 115. In one possible embodiment, the microcontroller chip 110 further includes an internal pin 113 to output the control data S_CN. The present invention does not limit the format of the control data S_CN. In one possible embodiment, the control data S_CN is a serial data. In another possible example, the control data S_CN is a parallel data. In this example, the microcontroller chip 110 uses multiple internal pins to transmit the control data S_CN.

[0038] In other embodiments, the microcontroller chip 110 receives an operating voltage VDD. The present invention does not limit the source of the operating voltage VDD. In one possible embodiment, the packaged integrated circuit 100 has a power supply device (not shown) outside to provide the operating voltage VDD to the microcontroller chip 110. In this example, the packaged integrated circuit 100 further includes a second input-output pin (not shown) for receiving the operating voltage VDD. In addition, the microcontroller chip 110 further includes an internal pin (not shown) for receiving the operating voltage VDD from the second input-output pin. In other embodiments, the operating voltage VDD is provided by the voltage conversion chip 120. In this example, the voltage conversion chip 120 has a power supply device (not shown) inside to generate the operating voltage VDD. In this example, the microcontroller chip 110 further includes an internal pin 114 for receiving the operating voltage VDD from the voltage conversion chip 120.

[0039] The present invention does not limit the circuit architecture of the microcontroller chip 110. In one embodiment, the microcontroller chip 110 includes a processing circuit 111 and a storage circuit 116. The storage circuit 116 stores the program code 112. The present invention does not limit the architecture of the storage circuit 116. In one embodiment, the storage circuit 116 includes a non-volatile memory.

[0040] The processing circuit 111 reads the storage circuit 116 and executes the program code 112. After executing the program code, the processing circuit 111 sets the operation mode of the internal pin 115. In addition, the processing circuit 111 generates the control data S_CN according to the operation mode of the internal pin 115. In some embodiments, after the operating voltage VDD stabilizes (i.e., the operating voltage VDD reaches a target voltage), the processing circuit 111 and the storage circuit 116 start to operate. The present invention does not limit the number of internal pins of the microcontroller chip 110. The microcontroller chip 110 may include more internal pins for receiving signals from outside the packaged integrated circuit 100. In this example, the packaged integrated circuit 100 has more input and output pins for receiving external signals and providing external signals to the microcontroller chip 110.

[0041] In this embodiment, the voltage conversion chip 120 has paths PA1-PA3. The paths PA1-PA3 are connected in parallel between the internal pin 115 and the input / output pin 130. In this example, the voltage conversion chip 120 includes internal pins 126 and 127. The internal pin 126 is directly electrically connected to the internal pin 115 and the paths PA1-PA3. The internal pin 127 is directly electrically connected to the input / output pin 130 and the paths PA1-PA3.

[0042] When the processing circuit 111 sets the internal pin 115 to operate in an input mode, it means that the internal pin 115 is used as an input pin. Therefore, the processing circuit 111 turns on the path PA1 through the control data S_CN and receives the signal or voltage from the internal pin 126. In one embodiment, the control data S_CN includes control bits EN1-EN3.

[0043] In one possible embodiment, the path PA1 includes a voltage conversion circuit 121. The voltage conversion circuit 121 is coupled between the internal pins 126 and 127 and operates according to the control bit EN1. For example, when the control bit EN1 is a specific value (such as a value 1), the voltage conversion circuit 121 starts to convert the voltage level of the internal pin 127 (i.e., the voltage level of the input / output pin 130) to generate a conversion level VT1. The voltage conversion circuit 121 outputs the conversion level VT1 to the internal pin 126. When the control bit EN1 is not a specific value, the voltage conversion circuit 121 stops converting the voltage level of the internal pin 127.

[0044] The present invention does not limit the structure of the voltage conversion circuit 121. The voltage conversion circuit 121 converts the voltage level of the internal pin 127 into a voltage level suitable for the microcontroller chip 110, and then provides it to the internal pin 126. For example, the voltage conversion circuit 121 converts the voltage level of the input / output pin 130 from one logic level or voltage domain to another logic level or voltage domain.

[0045] When the processing circuit 111 sets the internal pin 115 to operate in an output mode, it means that the internal pin 115 serves as an output pin. Therefore, the processing circuit 111 turns on the path PA2 through the control data S_CN and outputs a signal or voltage to the internal pin 126 .

[0046] In one possible embodiment, the path PA2 includes a voltage conversion circuit 122. The voltage conversion circuit 122 operates according to the control bit EN2. For example, when the control bit EN2 is a specific value (such as a value 1), the voltage conversion circuit 122 converts the voltage level of the internal pin 126 (i.e., converts the voltage level of the internal pin 115) to generate a conversion level VT2. The voltage conversion circuit 122 outputs the conversion level VT2 to the internal pin 127. When the control bit EN2 is not a specific value, the voltage conversion circuit 122 suspends converting the voltage level of the internal pin 126.

[0047] The present invention does not limit the structure of the voltage conversion circuit 122. The voltage conversion circuit 122 converts the voltage level of the internal pin 115 into a voltage level suitable for an external device (not shown) and then provides it to the input / output pin 130. In one possible embodiment, the voltage conversion circuit 122 converts the voltage level of the internal pin 115 from one logic level or voltage domain to another logic level or voltage domain.

[0048] In some embodiments, the voltage conversion circuits 121 and 122 are a bridge, coupled to a high voltage component and a low voltage component (such as the microcontroller chip 110). Taking the voltage conversion circuit 121 as an example, the voltage conversion circuit 121 may convert the voltage level of the internal pin 127 from 20V to 5V, and then output 5V to the internal pin 126. In addition, the voltage conversion circuit 122 may convert the voltage level of the internal pin 126 from 5V to 20V, and then output 20V to the internal pin 127.

[0049] When the processing circuit 111 sets the internal pin 115 to operate in a bidirectional input / output mode, an open-drain mode, or a tri-state mode, the internal pin 115 may be in a floating state or a high impedance state. At this time, the microcontroller chip 110 turns on the path PA3. In a possible embodiment, the path PA3 includes a data transmission circuit 123.

[0050] The data transmission circuit 123 operates according to the control bit EN3. For example, when the control bit EN3 is a specific value (such as a value 1), the data transmission circuit 123 is turned on. Therefore, the data transmission circuit 123 transmits the voltage of the input / output pin 130 to the internal pin 115, or transmits the voltage of the internal pin 115 to the input / output pin 130. When the control bit EN3 is not a specific value, the data transmission circuit 123 is not turned on.

[0051] When the microcontroller chip 110 performs voltage conversion through the voltage conversion chip 120, although the paths PA1 and PA2 are unidirectional paths, bidirectional data transmission is provided through the path PA3, so the microcontroller chip 110 can communicate with an external device (not shown) coupled to the input / output pin 130. In this embodiment, the path PA3 is used as a transmission path. The present invention does not limit the type of communication protocol between the microcontroller chip 110 and the external device. In one possible embodiment, the microcontroller chip 110 uses an internal integrated circuit (Inter-Integrated Circuit; I2C) protocol to communicate with the external device coupled to the input / output pin 130.

[0052] The present invention does not limit the structure of the data transmission circuit 123. In one possible embodiment, the data transmission circuit 123 includes a transmission gate 128. The transmission gate 128 is coupled to the internal pins 126 and 127. When the processing circuit 111 enables the transmission gate 128 through the control bit EN3, the transmission gate 128 is turned on to provide the path PA3. When the processing circuit 111 does not enable the transmission gate 128, the transmission gate 128 stops providing the path PA3. At this time, the path PA3 is considered to be open.

[0053] In another possible embodiment, the data transmission circuit 123 further includes a voltage clamping circuit 129. The voltage clamping circuit 129 is coupled between the transmission gate 128 and the internal pin 127 to limit the voltage level entering the transmission gate 128 to be lower than a threshold value. For example, when the voltage level of the internal pin 127 is greater than a threshold value, the voltage clamping circuit 129 outputs a specific voltage to the transmission gate 128. When the voltage level of the internal pin 127 is not greater than the threshold value, the voltage clamping circuit 129 directly outputs the voltage level of the internal pin 127 to the transmission gate 128.

[0054] The present invention does not limit the structure of the voltage clamp circuit 129. In one possible embodiment, the voltage clamp circuit 129 includes a zener diode. In some embodiments, the voltage clamp circuit 129 is coupled to the internal pin 125 to receive the operating voltage VDD. In this example, the voltage clamp circuit 129 may use the operating voltage VDD as a threshold value. When the voltage level of the internal pin 127 is greater than the operating voltage VDD, the voltage clamp circuit 129 outputs a fixed specific voltage. The specific voltage may be equal to the operating voltage VDD, or slightly less than the operating voltage VDD.

[0055] In other embodiments, the voltage conversion chip 120 further includes a first power supply circuit (not shown). The first power supply circuit converts an external voltage (provided by an external power supply circuit outside the packaged integrated circuit 100) to generate an operating voltage VDD, and outputs the operating voltage VDD to the microcontroller chip 110 through the internal pin 125. In this example, the first power supply circuit directly provides the operating voltage VDD to the voltage clamping circuit 129.

[0056] In some embodiments, the voltage conversion chip 120 further includes a second power supply circuit (not shown). The second power supply circuit converts an external voltage (provided by an external power supply circuit outside the packaged integrated circuit 100) to generate a second operating voltage, and provides the second operating voltage to the voltage conversion circuits 121, 122 and the data transmission circuit 123. The second operating voltage is different from the operating voltage VDD. In one possible embodiment, the second operating voltage is greater than the operating voltage VDD. In other embodiments, an external power supply circuit (not shown) outside the packaged integrated circuit 100 provides the second operating voltage to the voltage conversion chip 120. In this case, the voltage conversion chip 120 receives the second operating voltage through another internal pin (not shown).

[0057] In some embodiments, the voltage conversion chip 120 further includes a storage circuit (not shown) for storing the control data S_CN. For example, the storage circuit may have three registers for storing the control bits EN1 to EN3 respectively. In other embodiments, the control data S_CN may have more or fewer control bits.

[0058] In this embodiment, when the internal pin 115 operates in an input mode, the processing circuit 111 enables the voltage conversion circuit 121 through the control bit EN1, and disables the voltage conversion circuit 122 and the data transmission circuit 123 through the control bits EN2 and EN3. Therefore, the internal pin 115 receives the signal of the input / output pin 130. When the internal pin 115 operates in an output mode, the processing circuit 111 enables the voltage conversion circuit 122 through the control bit EN2, and disables the voltage conversion circuit 121 and the data transmission circuit 123 through the control bits EN1 and EN3. Therefore, the internal pin 115 outputs the signal to the input / output pin 130. When the internal pin 115 operates in a bidirectional input / output mode, an open drain mode, or a tri-state mode, the processing circuit 111 enables the data transmission circuit 123 through the control bit EN3, and disables the voltage conversion circuits 121 and 122 through the control bits EN1 and EN2. Therefore, the internal pin 115 may receive a signal from the I / O pin 130 or output a signal to the I / O pin 130 .

[0059] Figure 2 The flow chart of the control method of bidirectional data transmission of the present invention is shown. The control method of bidirectional data transmission of the present invention can be present in the form of program code. When the program code is loaded and executed by a machine, the machine becomes a microcontroller chip for implementing the present invention. The control method of bidirectional data transmission of the present invention is applicable to a packaged integrated circuit. The packaged integrated circuit has an input and output pin.

[0060] First, a program code is executed to generate an execution result (step S211). In a possible embodiment, the program code is stored in a storage circuit and executed by a microcontroller chip.

[0061] According to the execution result of the program code, the operation mode of an internal pin of the microcontroller chip is set (step S212). Then, it is determined whether the operation mode of the internal pin is a first mode (step S213). In one possible embodiment, step S213 is to determine whether the operation mode of the internal pin is an input mode. When the operation mode of the internal pin is an input mode, a first voltage conversion circuit is enabled to convert the voltage level of the input-output pin (step S214). In one possible embodiment. The first voltage conversion circuit is coupled between the internal pin and the input-output pin. In this example, the first voltage conversion circuit provides the converted voltage level to the internal pin.

[0062] When the operation mode of the internal pin is not a first mode, determine whether the operation mode of the internal pin is a second mode (step S215). The second mode is different from the first mode. In one possible embodiment, step S215 is to determine whether the operation mode of the internal pin is an output mode. When the operation mode of the internal pin is an output mode, enable a second voltage conversion circuit to convert the voltage level of the internal pin (step S216). In one possible embodiment. The second voltage conversion circuit is coupled between the internal pin and the input / output pin. In this example, the second voltage conversion circuit provides the converted voltage level to the input / output pin.

[0063] When the operation mode of the internal pin is not the second mode, it indicates that the operation mode of the internal pin is a bidirectional input / output mode, an open drain mode, or a tri-state mode. Therefore, a data transmission circuit is enabled to form a transmission path between the internal pin and the input / output pin (step S217). In one possible embodiment, the data transmission circuit is coupled between the internal pin and the input / output pin. In this example, when the data transmission circuit is enabled, the data transmission circuit provides a transmission path between the internal pin and the input / output pin. At this time, the data transmission circuit may transmit the voltage level of the internal pin to the input / output pin, or transmit the voltage level of the input / output pin to the internal pin.

[0064] In some embodiments, the data transmission circuit includes a transmission gate and a voltage clamp circuit. When the data transmission circuit is enabled, the transmission gate is turned on. The voltage clamp circuit is used to ensure that the voltage level entering the transmission gate is lower than a threshold value. In one possible embodiment, the voltage clamp circuit compares the voltage level of the internal pin with a threshold value. When the voltage level of the internal pin is greater than the threshold value, the voltage clamp circuit outputs a specific voltage to the transmission gate. When the voltage level of the internal pin is not greater than the threshold value, the voltage clamp circuit directly outputs the voltage level of the internal pin to the transmission gate.

[0065] In other embodiments, Figure 2 The method further includes step S210. Step S210 provides a first operating voltage to the first and second voltage conversion circuits, and provides a second operating voltage to the storage circuit storing the program code. In one possible embodiment, the first operating voltage is greater than the second operating voltage. In another possible embodiment, when the data transmission circuit is enabled, the voltage clamping circuit in the data transmission circuit uses the second operating voltage as a threshold value. In some embodiments, the voltage clamping circuit sets the threshold value according to the second operating voltage. For example, the voltage clamping circuit may set the threshold value slightly higher than the second operating voltage.

[0066] In other embodiments, step S214 enables the first voltage conversion circuit, and does not enable the second voltage conversion circuit and the data transmission circuit. Therefore, when the first voltage conversion circuit is in operation, the second voltage conversion circuit and the data transmission circuit are suspended. In addition, step S216 enables the second voltage conversion circuit, and does not enable the first voltage conversion circuit and the data transmission circuit. Therefore, when the second voltage conversion circuit is in operation, the first voltage conversion circuit and the data transmission circuit are suspended. In addition, step S217 enables the data transmission circuit, and does not enable the first and second voltage conversion circuits. Therefore, when the data transmission circuit is in operation, the first and second voltage conversion circuits are suspended.

[0067] Figure 3 Schematic diagram of the control system of the present invention. As shown in the figure, the control system 300 includes a packaged integrated circuit 310 and an external device 320. The packaged integrated circuit 310 is coupled to the external device 320 and includes a microcontroller chip 311, a voltage conversion chip 312 and an input / output pin 313. The microcontroller chip 311 includes an internal pin 314. The voltage conversion chip 312 includes paths 315-317. Since the characteristics of the microcontroller chip 311, the voltage conversion chip 312 and the input / output pin 313 are similar to Figure 1 The microcontroller chip 110, the voltage conversion chip 120 and the input / output pins 130 are not described in detail.

[0068] When the internal pin 314 is used as an input pin, the microcontroller chip 311 turns on the path 316 through the control data S_CN. In this embodiment, the path 316 includes a first voltage conversion circuit (not shown). The first voltage conversion circuit converts the voltage level of the input / output pin 313 to generate a conversion level VT1, and provides the conversion level VT1 to the internal pin 314.

[0069] When the internal pin 314 is used as an output pin, the microcontroller chip 311 turns on the path 317 through the control data S_CN. In this embodiment, the path 317 includes a second voltage conversion circuit (not shown). The second voltage conversion circuit converts the voltage level of the internal pin 314 to generate a conversion level VT2, and outputs the conversion level VT2 to the input / output pin 313.

[0070] When the internal pin 314 operates in a bidirectional input / output mode, an open drain mode or a tri-state mode, the microcontroller chip 311 turns on the path 315 through the control data S_CN. In this embodiment, the path 315 includes a data transmission circuit (not shown). The data transmission circuit is used to transmit the voltage level of the input / output pin 313 to the internal pin 314, or transmit the voltage level of the internal pin 314 to the input / output pin 313.

[0071] In some embodiments, when the microcontroller chip 311 conducts path 316, the microcontroller chip 311 does not conduct paths 315 and 317. In this example, when the microcontroller chip 311 conducts path 317, the microcontroller chip 311 does not conduct paths 315 and 316. When the microcontroller chip 311 conducts path 315, the microcontroller chip 311 does not conduct paths 316 and 317.

[0072] The external device 320 is electrically connected to the input / output pin 313. The external device 320 may receive electrical characteristics, such as signals, voltage levels, and currents, from the input / output pin 313. In another possible embodiment, the external device 320 outputs corresponding electrical characteristics, such as signals, voltage levels, and currents, to the encapsulated integrated circuit 310. The present invention does not limit the type of the external device 320. In one possible embodiment, the external device 320 is a motor device.

[0073] In other embodiments, the control system 300 further includes an upper resistor 330. The upper resistor 330 couples the input / output pin 313 and the external device 320, and receives an external voltage VE. When the microcontroller chip 311 sets the input / output pin 313 to a bidirectional input / output mode, an open drain mode, or a tri-state mode, the external device 320 receives a high level through the upper resistor 330. In a possible embodiment, when the external device 320 is not ready, the external device 320 may pull down the voltage level of the input / output pin 313 to a low level. The microcontroller chip 311 knows that the external device 320 is not ready according to the voltage level of the input / output pin 313. Therefore, the microcontroller chip 311 may wait for a preset time, and then determine whether the external device 320 is ready according to the voltage level of the input / output pin 313.

[0074] Since the path 315 can perform bidirectional signal transmission, when the microcontroller chip 311 sets the internal pin 314 to a floating level or a high impedance state, the microcontroller chip 311 can determine whether the external device 320 is ready based on the voltage level of the internal pin 314. Therefore, the performance of the packaged integrated circuit 310 is greatly improved.

[0075] The control method of bidirectional data transmission of the present invention, or a specific form or part thereof, can exist in the form of program code. The program code can be stored in a physical medium, such as a floppy disk, a CD, a hard disk, or any other machine-readable (such as computer-readable) storage medium, or a computer program product that is not limited to an external form, wherein when the program code is loaded and executed by a machine, such as a computer, the machine becomes a microcontroller chip and a packaged integrated circuit for participating in the present invention. The program code can also be transmitted through some transmission media, such as wires or cables, optical fibers, or any transmission mode, wherein when the program code is received, loaded and executed by a machine, such as a computer, the machine becomes a microcontroller chip and a packaged integrated circuit for participating in the present invention. When implemented in a general-purpose processing unit, the program code combines with the processing unit to provide a unique device that operates similarly to an application-specific logic circuit.

[0076] Unless otherwise defined, all words (including technical and scientific words) herein are generally understood by those skilled in the art. In addition, unless expressly indicated, the definitions of words in general dictionaries should be interpreted as consistent with the meanings in articles in the relevant technical field, and should not be interpreted as ideal or overly formal. Although the terms "first", "second", etc. can be used to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element.

[0077] Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. For example, the system, device or method described in the embodiments of the present invention may be implemented in a physical embodiment of hardware, software or a combination of hardware and software. Therefore, the scope of protection of the present invention shall be determined by the above claims.

Claims

1. A packaged integrated circuit, characterized in that: include: an input / output pin; A first chip, comprising: a first internal pin electrically connected to the input / output pin; a second internal pin; a first voltage conversion circuit, converting the voltage level of the first internal pin to generate a first conversion level for the second internal pin; a second voltage conversion circuit, converting the voltage level of the second internal pin to generate a second conversion level for the first internal pin; and a data transmission circuit providing a transmission path between the first internal pin and the second internal pin; and A second chip, comprising: a third internal pin electrically connected to the second internal pin; a storage circuit for storing a program code; and A processing circuit executes the program code to set the operation mode of the third internal pin and enables one of the first voltage conversion circuit, the second voltage conversion circuit and the data transmission circuit according to the operation mode of the third internal pin.

2. The packaged integrated circuit according to claim 1, wherein: When the processing circuit sets the operation mode of the third internal pin to a first mode, the processing circuit enables the first voltage conversion circuit; When the processing circuit sets the operation mode of the third internal pin to a second mode, the processing circuit enables the second voltage conversion circuit.

3. The packaged integrated circuit according to claim 2, wherein: When the processing circuit sets the operation mode of the third internal pin to a third mode, the processing circuit enables the data transmission circuit.

4. The packaged integrated circuit according to claim 1, wherein: The data transmission circuit comprises: A transmission gate is coupled between the first internal pin and the second internal pin to provide the transmission path.

5. The packaged integrated circuit according to claim 4, wherein: The data transmission circuit also includes: A voltage clamping circuit is coupled between the transmission gate and the first internal pin, and is used to limit the voltage level entering the transmission gate to be lower than a threshold value.

6. The packaged integrated circuit according to claim 5, wherein: When the voltage level of the first internal pin is greater than a threshold value, the voltage clamping circuit outputs a specific voltage to the transmission gate. When the voltage level of the first internal pin is not greater than the threshold value, the voltage clamping circuit outputs the voltage level of the first internal pin to the transmission gate.

7. The packaged integrated circuit according to claim 5, wherein: The first chip also includes: a power supply circuit for generating a first operating voltage; and a fourth internal pin, providing the first operating voltage to the second chip; The first voltage conversion circuit and the second voltage conversion circuit receive a second operating voltage, the storage circuit and the processing circuit receive the first operating voltage, and the second operating voltage is greater than the first operating voltage.

8. A control method for bidirectional data transmission, applicable to a packaged integrated circuit, the packaged integrated circuit having an input and output pin, characterized in that: The control method for bidirectional data transmission includes: Executing a program code to generate an execution result, wherein the program code is stored in a storage circuit; According to the execution result, setting an operation mode of an internal pin; When the operation mode of the internal pin is a first mode, a first voltage conversion circuit is enabled to convert the voltage level of the input / output pin; When the operation mode of the internal pin is a second mode, enabling a second voltage conversion circuit to convert the voltage level of the internal pin; and When the operation mode of the internal pin is a third mode, enabling a data transmission circuit to form a transmission path between the internal pin and the input-output pin; The first voltage conversion circuit, the second voltage conversion circuit and the data transmission circuit are coupled between the internal pin and the input-output pin.

9. A control system, characterized in that: include: an external device; as well as A packaged integrated circuit is coupled to the external device and includes: an input / output pin electrically connected to the external device; a microcontroller chip having an internal pin; and A voltage conversion chip having a first path, a second path and a third path, wherein the first path, the second path and the third path are connected in parallel between the internal pin and the input / output pin; When the internal pin is used as an input pin, the microcontroller chip conducts the first path; when the internal pin is used as an output pin, the microcontroller chip conducts the second path; when the internal pin is in a floating state, the microcontroller chip conducts the third path.

10. The control system according to claim 9, characterized in that: The third path includes a data transmission circuit, and the data transmission circuit is used to transmit the voltage level of the input / output pin to the internal pin, or transmit the voltage level of the internal pin to the input / output pin.

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