Manufacturing method of heteroepitaxial wafer
By using the decompression CVD device and hydrogen roasting technology on the single crystal silicon-based plate, combined with specific pressure and temperature conditions for SIC nuclear formation and growth, the problem of low growth efficiency of 3C-SIC single crystal membrane on large diameter silicon-based plates. The growth of high -quality membranes and the expansion of process conditions.
Patent Information
- Application Number
- CN202380046231.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-06-14
- Filing Date
- 2023-05-09
- Publication Date
- 2025-01-21
AI Technical Summary
The prior art is difficult to efficiently grow a good quality 3C-SiC single crystal film on large diameter silicon substrates, and the process conditions are limited, resulting in low growth efficiency and increased cost.
Using a reduced pressure CVD device, the natural oxide film on the surface of the single crystal silicon substrate is removed by hydrogen baking, and SiC is carried out under specific conditions of pressure and temperature (above 13Pa, below 13332Pa, above 600℃ and below 1200℃, and above 800℃ and below 1200℃). nucleation and single crystal growth to form a 3C-SiC single crystal film.
A 3C-SIC single-crystal film with good efficient growth on single crystal silicon-based plates has expanded the scope of application of process conditions, reduced costs, and improved growth efficiency.
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Figure CN119343486A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a method for manufacturing a heteroepitaxial wafer by heteroepitaxially growing a 3C-SiC single crystal film on a single crystal silicon substrate. Background Art
[0002] Compared with Si's band gap of 1.1 eV, SiC has a wider band gap of 2.2 to 3.3 eV, so it has high dielectric breakdown strength and high thermal conductivity. Therefore, it is a material that is highly anticipated as a semiconductor material for various semiconductor devices such as power devices and high-frequency devices.
[0003] In addition, its application as a platform for gallium nitride (GaN) growth has also been promoted (for example, Patent Document 1 and Non-Patent Document 1). On the other hand, the mainstream of SiC wafers is small in diameter, and larger diameters are being sought for power devices and high-frequency devices. If a high-quality 3C-SiC single crystal film can be formed on a large-diameter substrate, in addition to utilizing the 3C-SiC single crystal film itself, it is also possible to produce large-diameter heteroepitaxial wafers with a high-quality GaN layer.
[0004] As a method for increasing the diameter, epitaxial growth on a silicon substrate having good compatibility with a device process has been studied (for example, Patent Documents 1 and 2).
[0005] The above patent document discloses that a 3C-SiC single crystal film can be grown on a silicon substrate and that a 3C-SiC single crystal film can be grown on a large-diameter substrate such as a 300 mm diameter substrate by selecting the type of reactor.
[0006] The formation of the 3C-SiC single crystal film in the above patent document is characterized in that two raw material gases, namely a gas containing a carbon source precursor and a gas containing a silicon source precursor, are introduced into a reactor together with a carrier gas, and the raw material gases are decomposed and grown by high temperature treatment (~1200°C) or a combination of high temperature treatment and plasma treatment.
[0007] When two raw material gases are simultaneously flowed in to form a film, the following problems arise: Since the thermal stability and diffusion coefficient of each gas species are different, it is very difficult to control them to grow a good quality 3C-SiC single crystal film, and the range of process conditions that can be used is narrowed (it must be carried out under conditions such as epitaxial growth does not occur and the decomposed raw material gas does not react in the gas phase and pollute the reactor, etc.). In addition, since high-temperature processing is required, the following problems arise: affinity with existing processes is reduced (if the diameter is increased to 300 mm, there will be problems such as sliding resistance, so it is desired to form a film at a low temperature). In addition, if the raw material gas species used increase, the cost of the device and ancillary equipment will increase and safety problems will arise (especially the gas that becomes the silicon source is mostly highly reactive), so it is preferred to use fewer raw material gas species.
[0008] As an example of a 3C-SiC single crystal film grown on a silicon substrate, Patent Document 3 discloses that: in order to further reduce the lattice mismatch between silicon and SiC, a single crystal silicon substrate with a plane orientation of (110) is used as a single crystal silicon substrate. Although it is more advantageous from the perspective of lattice mismatch, it is not appropriate to limit the plane orientation when considering the manufacture of heteroepitaxial wafers. In addition, although the formation of a 3C-SiC single crystal layer containing hydrogen is disclosed at the same time, it can be imagined that hydrogen is easily separated during the temperature rise process in the epitaxial growth sequence, and the desired conditions are conditions that are independent of the amount of hydrogen.
[0009] Furthermore, although Patent Document 4 mentions the off angle of the single crystal silicon substrate, the raw material gas species will still increase in order to utilize the carbonization of propane and the subsequent growth of propane + silane gas, which is not conducive to epitaxial growth.
[0010] In addition, Patent Document 5 discloses a method in which monomethylsilane is used as a raw material gas to grow a 3C-SiC single crystal layer on a single crystal silicon substrate with a plane orientation of (111) and a diameter of less than 8 inches (200 mm), but the film forming conditions at this time are that the temperature of the single crystal silicon substrate reaches the film forming conditions of 1050~1100°C for 5~12 hours and the pressure in the chamber is 2×10 -4 ~3×10 -4 The conditions carried out under the conditions of 0.02 to 0.03 Pa (0.02 to 0.03 Pa) have the problem of slow formation speed because the 3C-SiC single crystal layer is formed under extremely low pressure conditions.
[0011] Prior art literature
[0012] Patent Literature
[0013] Patent Document 1: Japanese Patent Application No. 2018-522412
[0014] Patent Document 2: Japanese Patent Application Publication No. 2021-020819
[0015] Patent Document 3: Japanese Patent Application Publication No. 2006-253617
[0016] Patent Document 4: Japanese Patent Application Publication No. 2008-184361
[0017] Patent Document 5: Japanese Patent Application Publication No. 2017-039622
[0018] Non-patent literature
[0019] Non-patent literature 1: Japanese Journal of Applied Physics 53, 05FL09 (2014) Summary of the invention
[0020] 1. Technical issues to be resolved
[0021] The present invention is completed in order to solve the above-mentioned problems, and its object is to provide a method for manufacturing a heteroepitaxial wafer, which can efficiently epitaxially grow a high-quality 3C-SiC single crystal film on a single crystal silicon substrate.
[0022] (II) Technical solution
[0023] In order to achieve the above object, the present invention provides a method for manufacturing a heteroepitaxial wafer, which is a method for manufacturing a heteroepitaxial wafer in which a 3C-SiC single crystal film is heteroepitaxially grown on a single crystal silicon substrate, and is characterized by comprising:
[0024] A first step of removing a natural oxide film on the surface of the single crystal silicon substrate by hydrogen baking using a reduced pressure CVD device;
[0025] A second step of forming SiC nuclei on the single crystal silicon substrate at a pressure of 13 Pa to 13332 Pa and a temperature of 600° C. to 1200° C. while supplying a source gas containing carbon into the reduced pressure CVD device; and
[0026] A third step is to supply a source gas containing carbon and silicon into the reduced pressure CVD apparatus while growing a SiC single crystal at a pressure of 13 Pa to 13332 Pa and a temperature of 800° C. to less than 1200° C. to form the 3C-SiC single crystal film.
[0027] By removing the natural oxide film on the surface of the single crystal silicon substrate in the first step as described above, SiC nuclei can be formed in the second step.
[0028] Furthermore, by combining the second step of supplying a source gas containing carbon with the third step of supplying a source gas containing carbon and silicon, a target heteroepitaxial wafer having a high-quality 3C-SiC single crystal film can be efficiently manufactured.
[0029] In addition, in the second step, by setting the temperature to 600° C. or higher, it is possible to prevent the SiC nucleus formation from becoming inefficient due to low temperature. In addition, by setting the temperature to 1200° C. or lower, it is possible to prevent the reaction between the single crystal silicon substrate and the source gas from proceeding due to high temperature, thereby preventing the SiC nucleus from being formed on the surface of the single crystal silicon substrate.
[0030] In addition, by setting the pressure to 13Pa (0.1Torr) or more, it is possible to prevent the SiC nucleus formation from becoming inefficient due to low pressure. In addition, by setting the pressure to 13332Pa (100Torr) or less, it is possible to prevent the reactive species from reacting with the source gas in the gas phase, such as secondary or higher reactions, and the efficiency is good.
[0031] In the third step, by setting the temperature to 800° C. or higher, it is possible to prevent the growth of the SiC single crystal from not proceeding due to the low temperature. In addition, by setting the temperature to less than 1200° C., it is possible to prevent the occurrence of slip dislocations.
[0032] In addition, by setting the pressure to 13Pa (0.1Torr) or more, it is possible to prevent the growth of SiC single crystal from not proceeding due to too low pressure. In addition, by setting the pressure to 13332Pa (100Torr) or less, it is possible to prevent the reactive species from reacting with the source gas in the gas phase, etc., from secondary or higher reactions, so that epitaxial growth can be made more reliable. Thus, polycrystallization of the 3C-SiC single crystal film can be prevented.
[0033] At this time, methane, ethylene, acetylene, or propane can be used as the source gas including carbon.
[0034] In addition, monomethylsilane or trimethylsilane can be used as the source gas containing carbon and silicon.
[0035] In the second step and the third step, if the source gas (raw material gas) described above is used respectively, the preparation can be relatively simple, and SiC nuclei can be formed and SiC single crystals can be grown under very simple conditions using one raw material gas.
[0036] Furthermore, the first step can be performed at a temperature of 1000° C. or higher and 1200° C. or lower.
[0037] By setting such a temperature condition, the natural oxide film on the surface of the single crystal silicon substrate can be removed more efficiently, and the occurrence of slip dislocation can be prevented.
[0038] Furthermore, the second step can be performed under the condition that the temperature is gradually increased from a range of 600° C. to 800° C. to a range of 900° C. to 1200° C.
[0039] If this is done, the SiC nucleus formation in the second step can be performed more efficiently.
[0040] (III) Beneficial effects
[0041] The heteroepitaxial wafer manufacturing method of the present invention can provide a heteroepitaxial wafer in which a 3C-SiC single crystal film is efficiently formed directly on a single crystal silicon substrate using a simple process. BRIEF DESCRIPTION OF THE DRAWINGS
[0042] Figure 1 is a diagram showing an example of the growth sequence of the first embodiment.
[0043] Figure 2 This is a graph showing the results of in-plane XRD analysis of 3C-SiC on Si(111) grown in Example 1.
[0044] Figure 3 This is a graph showing the results of in-plane XRD analysis of 3C-SiC on Si(111) grown in Comparative Example 1. DETAILED DESCRIPTION
[0045] Hereinafter, embodiments of the present invention will be described with reference to the drawings, but the present invention is not limited thereto.
[0046] As described above, a method for manufacturing a heteroepitaxial wafer capable of forming a 3C-SiC single crystal film on a single crystal silicon substrate has been sought. Therefore, the inventors of the present application conducted in-depth research and found that by combining the prescribed conditions for easily forming SiC nuclei while supplying source gas (including carbon) [pressure: 13Pa or more and 13332Pa or less, temperature: 600°C or more and 1200°C or less] (second process) on the basis of using a reduced pressure CVD device to remove the natural oxide film on the surface of the single crystal silicon substrate by hydrogen baking (first process), and the prescribed conditions for easily growing SiC single crystals while supplying source gas (including carbon and silicon) [pressure: 13Pa or more and 13332Pa or less, temperature: 800°C or more and less than 1200°C] (third process), a high-quality 3C-SiC single crystal film can be efficiently formed, thereby completing the present invention.
[0047] Specific examples of each step will be described below.
[0048] Figure 1 An example of the growth sequence of the embodiment is shown. The first step is hydrogen baking (hereinafter also referred to as H2 annealing); the second step is the SiC nucleus formation step; and the third step is the SiC single crystal growth step (3C-SiC single crystal film formation step). Each step is described below.
[0049] <First step>
[0050] First, a single crystal silicon substrate is placed in a reduced pressure CVD device (hereinafter also referred to as an RP-CVD [Reduced Pressure-Chemical Vapor Deposition] device), and hydrogen is introduced to remove the natural oxide film on the surface by hydrogen baking (H2 annealing). If an oxide film remains, SiC nucleus formation cannot be performed on the single crystal silicon substrate. At this time, it is preferred to set the H2 annealing to, for example, a condition where the temperature is above 1000°C and below 1200°C. By setting the temperature to above 1000°C, the processing time for preventing the natural oxide film from remaining can be prevented from becoming long, which is more efficient. In addition, if it is set to below 1200°C, slip dislocations caused by high temperatures can be effectively prevented. However, at this time, the pressure and time of the H2 annealing are not particularly limited as long as the natural oxide film can be removed.
[0051] exist Figure 1 In the example shown, H2 annealing is performed for 1 minute at 1080° C. In addition, the introduction of hydrogen gas can be continued after the first step, and can also be continued in the second and third steps (carrier gas).
[0052] <Second step>
[0053] Then, while supplying a source gas containing carbon into the RP-CVD device, a predetermined pressure and temperature are set to form the nuclei of SiC on the single crystal silicon substrate. In order to form the nuclei of 3C-SiC on the surface of the single crystal silicon substrate, hydrocarbon gas, for example, can be used as the above-mentioned source gas. For example, methane, ethylene, acetylene or propane can be introduced. If it is such a source gas, it can be easily prepared, and the conditions for the nuclei formation of SiC can be set to simple conditions with one source gas.
[0054] Furthermore, the SiC nuclei can be formed on the surface of the single crystal silicon substrate as long as the pressure is 13 Pa to 13332 Pa (0.1 Torr to 100 Torr) and the temperature is 600° C. to 1200° C.
[0055] In the SiC nucleation process, if the temperature is higher than 1200°C, the reaction between the single crystal silicon substrate and the raw material gas will proceed and the SiC nucleus cannot be formed on the surface of the single crystal silicon substrate. In addition, when the temperature is less than 600°C, the temperature is too low to efficiently form the SiC nucleus.
[0056] In addition, since the pressure is set to 13332Pa (100Torr) or less, it is possible to prevent the reactive species from reacting with the source gas in the gas phase, and thus the secondary or higher reactions can be prevented, so the efficiency is good. On the other hand, even if the pressure is too low, the nucleus formation of SiC is also inefficient, so the lower limit of the pressure is set to 13Pa (0.1Torr).
[0057] The method of changing the temperature from the first step to the second step is not particularly limited. For example, after the first step is performed at 1080°C as described above, the temperature is directly increased or decreased from 1080°C to a predetermined temperature to be maintained in the second step.
[0058] Alternatively, after the first step is performed at 1080°C, the temperature is temporarily lowered to a temperature range of 600°C to 800°C. In addition, the second step may gradually increase the temperature from the temperature range of 600°C to 800°C to a temperature range of 900°C to 1200°C. At this time, after the temperature is increased, the temperature can be maintained at the specified temperature after the temperature increase for, for example, 10 minutes. By performing the above-mentioned method, the nucleus formation of SiC can be performed more effectively.
[0059] In addition, the heating rate when heating from the temperature range of 600°C to 800°C is preferably about 1.0°C / second. If the heating rate is this degree, the heating rate will not be too fast, and it can effectively prevent the set temperature during and after heating from deviating from the actual temperature of the substrate and becoming difficult to control. In addition, the heating rate will not be too slow, and it can effectively prevent the passage time of the 3C-SiC nucleus formation temperature zone from becoming longer, which can easily cause uneven nucleus formation and defect formation in epitaxial growth.
[0060] Figure 1 In the example shown, the temperature is lowered to 700° C. after the first step, and the temperature is raised to 1100° C. at a heating rate of 1.0° C. / sec in the second step, and then maintained at 1100° C. for 10 minutes. The pressure is set to 13332 Pa (100 Torr).
[0061] <Third step>
[0062] While supplying a source gas containing carbon and silicon into the RP-CVD device, a SiC single crystal is grown under the conditions of a pressure of 13 Pa or more and 13332 Pa or less (0.1 Torr or more and 100 Torr or less) and a temperature of 800° C. or more and less than 1200° C. to form a 3C-SiC single crystal film. Under such conditions, a SiC single crystal can be efficiently grown to form a 3C-SiC single crystal film. For example, monomethylsilane or trimethylsilane can be introduced as the above-mentioned source gas. If it is such a source gas, it can be easily prepared, and the growth conditions of the SiC single crystal can be set to simple conditions with one source gas.
[0063] In addition, if the growth pressure is greater than 13332Pa (100Torr), the formed 3C-SiC will be polycrystalline. On the other hand, in the present invention, since the pressure is set to 13332Pa (100Torr) or less in the third step, it is possible to suppress secondary or higher-order reactions in the gas phase as described above, and a 3C-SiC single crystal film can be formed reliably and efficiently. Moreover, it can be set preferably to 1333Pa (10Torr) or less, and further preferably to 133Pa (1Torr) or less. Under such conditions, pores will be formed directly below the 3C-SiC single crystal film, and the effect of stress relaxation of the entire heteroepitaxial layer can be obtained. On the other hand, even if the pressure is too low, the growth of SiC single crystals is inefficient, so the lower limit of the pressure is set to 13Pa (0.1Torr).
[0064] In addition, regarding the temperature, if it is lower than 800° C., the growth of the SiC single crystal does not proceed as described above, and if it is higher than 1200° C., slip dislocation may occur. Therefore, as described above, it is set to be higher than 800° C. and lower than 1200° C.
[0065] Figure 1 In the example shown, the temperature is maintained at 1000° C. for 10 minutes in the third step. The pressure is set to 13332 Pa (100 Torr).
[0066] The above description has been given of the method for manufacturing the heteroepitaxial wafer of the present invention. By removing the natural oxide film on the surface of the single crystal silicon substrate and then performing the SiC nucleus formation process as described above, SiC nuclei can be reliably formed and even a 3C-SiC single crystal film can be formed.
[0067] Furthermore, by introducing a SiC nucleus formation step before the 3C-SiC single crystal film formation step, it is possible to suppress the deterioration of crystallinity caused by lattice mismatch between Si and 3C-SiC, and to form a 3C-SiC single crystal film of good quality.
[0068] Furthermore, under the above growth conditions, heteroepitaxial growth can be controlled by the delivery rate of the supply gas without being restricted by the plane orientation of the single crystal silicon substrate. In addition, there is no need to form such a layer containing hydrogen, and a 3C-SiC single crystal film can be grown. Furthermore, a 3C-SiC single crystal film can be formed on a single crystal silicon substrate with a large diameter of, for example, 300 mm or more.
[0069] Since the film thickness at this time depends on the pressure and the temperature, the film forming time is appropriately set according to the pressure and temperature conditions set so as to achieve the target film thickness.
[0070] In this case, the thickness of the 3C-SiC single crystal film can be formed from a thin film of about 4 nm to a thick film of several μm, for example.
[0071] In addition, since the surface of the 3C-SiC single crystal film grown in the above manner is flat, GaN can be further grown on the surface of the 3C-SiC single crystal film, thereby providing a method for manufacturing a heteroepitaxial wafer having a high-quality GaN layer on the 3C-SiC single crystal film. Alternatively, Si can be further grown on the surface of the 3C-SiC single crystal film, thereby providing a heteroepitaxial wafer having a high-quality Si layer on the 3C-SiC single crystal film.
[0072] Example
[0073] The present invention will be described in more detail below with reference to Examples and Comparative Examples of the present invention, but the present invention is not limited thereto.
[0074] (Example 1)
[0075] A single crystal silicon substrate with a diameter of 300 mm, a surface orientation of (111), and a high resistivity (1000 Ω·cm) doped with boron is prepared, the wafer is placed on a wafer carrier (susceptor) in the reactor of the RP-CVD device, and H2 annealing is performed at 1080°C for 1 minute (first step).
[0076] Then, the temperature in the furnace was lowered to 700° C. and then raised to 1100° C. at a heating rate of 1° C. / sec while introducing propane gas. After reaching 1100° C., the temperature was maintained for 10 minutes to form 3C—SiC nuclei (second step).
[0077] After the nucleus formation step, the temperature in the furnace is lowered to 1000° C., and then trimethylsilane gas is introduced to form a 3C-SiC single crystal film (third step).
[0078] The growth pressure was uniformly set to 13Pa and 13332Pa (0.1Torr and 100Torr).
[0079] The growth was performed for 10 minutes, and as a result, the film thickness became 80 nm and 115 nm in each pressure mode.
[0080] After film formation, the XRD (X-ray diffraction) spectrum was confirmed by in-plane configuration. The results showed that under any growth pressure condition, Figure 2 As shown in the graph of the XRD analysis results, a peak of 3C-SiC (220) parallel to Si (220) was confirmed, confirming that a single-crystalline 3C-SiC film had grown.
[0081] (Comparative Example 1)
[0082] A single crystal silicon substrate similar to that in Example 1 was prepared, the wafer was placed on a wafer carrier in a reactor of an RP-CVD device, and H2 annealing was performed at 1080° C. for 1 minute (first step).
[0083] Then, without performing the second step (3C-SiC nucleus formation step), the furnace temperature was set to 1000° C., trimethylsilane gas was introduced and maintained for 10 minutes, and a 3C-SiC single crystal film was formed (third step).
[0084] The growth pressure was set to 13332 Pa (100 Torr).
[0085] As a result, the film thickness became 45 nm.
[0086] The XRD spectrum was confirmed using the in-plane configuration. The results are as follows Figure 3 As shown in the graph of the XRD analysis results, in addition to the peak of 3C-SiC (220) parallel to Si (220), peaks of 3C-SiC (111) and 3C-SiC (311) were also confirmed, confirming that a polycrystalline 3C-SiC film had grown.
[0087] (Example 2)
[0088] A single crystal silicon substrate similar to that in Example 1 was prepared, the wafer was placed on a wafer carrier in a reaction furnace of an RP-CVD device, and H2 annealing was performed at 1080° C. for 1 minute (first step).
[0089] Then, the temperature in the furnace was set to 600° C., propane gas was introduced and maintained for 10 minutes, and 3C—SiC nuclei were formed (second step).
[0090] Then, after the temperature in the furnace was lowered to 800° C., trimethylsilane gas was introduced and maintained for 10 minutes to form a 3C-SiC single crystal film (third step).
[0091] The growth pressure was uniformly set to 13Pa and 13332Pa (0.1Torr and 100Torr).
[0092] As a result, the film thickness was 60 nm and 92 nm in each pressure mode.
[0093] The XRD spectrum was confirmed in an in-plane configuration. As a result, a peak of 3C-SiC (220) parallel to Si (220) was confirmed, confirming that a single-crystalline 3C-SiC film had grown.
[0094] (Example 3)
[0095] The growth of 3C-SiC single crystal film was carried out under the same conditions as in Example 2 (growth pressure was uniformly set to 13 Pa (0.1 Torr) and 13332 Pa (100 Torr)), except that the temperatures of the second step and the third step were set to 1200°C and 1190°C respectively.
[0096] As a result, the film thickness was 90 nm and 120 nm in each pressure mode.
[0097] The XRD spectrum was confirmed in an in-plane configuration. As a result, a peak of 3C-SiC (220) parallel to Si (220) was confirmed, confirming that a single-crystalline 3C-SiC film had grown.
[0098] (Comparative Example 2)
[0099] The growth of a 3C-SiC single crystal film was performed under the same conditions as those in Example 2 where the growth temperature was 13332 Pa (100 Torr), except that the temperature in the second step was 500°C.
[0100] Furthermore, growth of a 3C-SiC single crystal film was performed under the same conditions as in Example 2 where the growth temperature was 13332 Pa (100 Torr), except that the temperature in the second step was set to 1250°C.
[0101] As a result, the film thickness became 38 nm and 43 nm in the temperature patterns of the second step.
[0102] The film thickness thus formed was extremely thin compared to Example 2, and the efficiency was significantly poor. This is considered to be because the temperature in the second step was too low or too high, so SiC nuclei were not sufficiently formed, and thus heteroepitaxial growth was hardly performed in the third step.
[0103] (Comparative Example 3)
[0104] The growth of a 3C-SiC single crystal film was performed under the same conditions as those in Example 2 where the growth temperature was 13332 Pa (100 Torr), except that the temperature in the third step was 700°C.
[0105] Furthermore, growth of a 3C-SiC single crystal film was performed under the same conditions as in Example 2 where the growth temperature was 13332 Pa (100 Torr), except that the temperature in the third step was set to 1250°C.
[0106] As a result, in each of the temperature patterns of the third step, the film thickness was 40 nm and 130 nm.
[0107] As described above, at 700°C, the thickness of the film formed was extremely thin compared to Example 2, and the efficiency was significantly poor. In addition, at 1250°C, slip dislocation occurred.
[0108] (Comparative Example 4)
[0109] A 3C-SiC single crystal film was grown under the same conditions as in Example 2 except that the growth pressure in the second step and the third step was uniformly set to 1.3 Pa (0.01 Torr).
[0110] As a result, the film thickness became 18 nm.
[0111] When the growth pressure was 1.3 Pa (0.01 Torr) as described above, the thickness of the formed film was extremely thin compared to Example 2, and the efficiency was significantly poor.
[0112] (Comparative Example 5)
[0113] The growth of a 3C-SiC single crystal film was performed under the same conditions as in Example 2 except that the growth pressure in the second step and the third step was uniformly set to 19998 Pa (150 Torr).
[0114] As a result, the film thickness became 98 nm.
[0115] The XRD spectrum was confirmed in an in-plane configuration. In addition to the peak of 3C-SiC (220) parallel to Si (220), peaks of 3C-SiC (111) and 3C-SiC (311) were also confirmed, confirming that a polycrystalline 3C-SiC film had grown.
[0116] This specification contains the following protocols.
[0117] [1]: A method for manufacturing a heteroepitaxial wafer, which is a method for manufacturing a heteroepitaxial wafer in which a 3C-SiC single crystal film is heteroepitaxially grown on a single crystal silicon substrate, characterized in that it comprises:
[0118] A first step of removing a natural oxide film on the surface of the single crystal silicon substrate by hydrogen baking using a reduced pressure CVD device;
[0119] A second step of forming SiC nuclei on the single crystal silicon substrate at a pressure of 13 Pa to 13332 Pa and a temperature of 600° C. to 1200° C. while supplying a source gas containing carbon into the reduced pressure CVD device; and
[0120] A third step is to supply a source gas containing carbon and silicon into the reduced pressure CVD apparatus while growing a SiC single crystal at a pressure of 13 Pa to 13332 Pa and a temperature of 800° C. to less than 1200° C. to form the 3C-SiC single crystal film.
[0121] [2]: The method for manufacturing a heteroepitaxial wafer according to [1] above, wherein methane, ethylene, acetylene or propane is used as the source gas containing carbon.
[0122] [3]: The method for manufacturing a heteroepitaxial wafer according to [1] or [2] above, wherein monomethylsilane or trimethylsilane is used as the source gas containing carbon and silicon.
[0123] [4]: The method for producing a heteroepitaxial wafer according to any one of [1] to [3] above, wherein the first step is performed at a temperature of 1000° C. to 1200° C.
[0124] [5]: A method for manufacturing a heteroepitaxial wafer according to any one of [1] to [4] above, wherein the second step is performed under the condition of gradually increasing the temperature from a range of greater than 600°C and less than 800°C to a range of greater than 900°C and less than 1200°C.
[0125] The present invention is not limited to the above-mentioned embodiments. The above-mentioned embodiments are merely examples, and any technical solution having substantially the same structure and exerting the same function and effect as the technical concept described in the claims of the present invention is included in the technical scope of the present invention.
Claims
1. A method for manufacturing a heteroepitaxial wafer, which is a method for manufacturing a heteroepitaxial wafer in which a 3C-SiC single crystal film is heteroepitaxially grown on a single crystal silicon substrate, characterized in that: include: A first step of removing a natural oxide film on the surface of the single crystal silicon substrate by hydrogen baking using a reduced pressure CVD device; A second step of forming SiC nuclei on the single crystal silicon substrate at a pressure of 13 Pa to 13332 Pa and a temperature of 600° C. to 1200° C. while supplying a source gas containing carbon into the reduced pressure CVD device; and A third step is to supply a source gas containing carbon and silicon into the reduced pressure CVD apparatus while growing a SiC single crystal at a pressure of 13 Pa to 13332 Pa and a temperature of 800° C. to less than 1200° C. to form the 3C-SiC single crystal film.
2. The method for manufacturing a heteroepitaxial wafer according to claim 1, characterized in that: As the source gas containing carbon, methane, ethylene, acetylene or propane is used.
3. The method for manufacturing a heteroepitaxial wafer according to claim 1, characterized in that: As the source gas containing carbon and silicon, monomethylsilane or trimethylsilane is used.
4. The method for manufacturing a heteroepitaxial wafer according to claim 2, characterized in that: As the source gas containing carbon and silicon, monomethylsilane or trimethylsilane is used.
5. The method for manufacturing a heteroepitaxial wafer according to any one of claims 1 to 4, characterized in that: The first step is performed at a temperature of 1000° C. or higher and 1200° C. or lower.
6. The method for manufacturing a heteroepitaxial wafer according to any one of claims 1 to 4, characterized in that: The second step is performed under the condition that the temperature is gradually increased from a range of 600° C. to 800° C. to a range of 900° C. to 1200° C.
7. The method for manufacturing a heteroepitaxial wafer according to claim 5, characterized in that: The second step is performed under the condition that the temperature is gradually increased from a range of 600° C. to 800° C. to a range of 900° C. to 1200° C.
Citation Information
Patent Citations
SiC SEMICONDUCTOR AND ITS MANUFACTURING METHOD
JP2006253617A
METHOD FOR FORMING 3C-SiC SINGLE CRYSTAL FILM
JP2008184361A
Compound semiconductor substrate, and method for manufacturing compound semiconductor substrate
JP2017039622A
Growth of epitaxial 3c-sic on single crystal silicon
JP2018522412A
Method for manufacturing hetero epitaxial wafer and hetero epitaxial wafer
JP2021020819A