Lithium battery simulation dry battery voltage attenuation circuit

Abstract

The invention discloses a circuit for simulating dry battery voltage attenuation by a lithium battery. The circuit comprises an MOS tube Q1, an MOS tube Q2, an MOS tube Q3, an MOS tube Q4, an MOS tube Q5, an MOS tube Q6, an MOS tube Q7, an MOS tube Q8, a resistor R1, a resistor R2, a resistor R3, a resistor R4 and a resistor R5. The grid electrode of the MOS tube Q2 is used for accessing a reference voltage, the source electrode of the MOS tube Q2 is connected with the source electrode of the MOS tube Q1 and then accessed to an LDO output power supply, and the drain electrode of the MOS tube Q2 is connected with the drain electrode of the MOS tube Q3; one end of the resistor R1 is used for being connected with a lithium battery, and the other end of the resistor R1 is connected with the resistor R2; the other end of the resistor R2 is grounded, and the grid electrode of the MOS tube Q1 is connected to the common connection end of the resistor R1 and the resistor R2. According to the invention, the voltage attenuation process of converting the lithium battery into the dry battery becomes linear so as to completely simulate the actual electric quantity attenuation process of the dry battery.

Description

Technical Field

[0001] The present invention relates to the technical field of dry cell voltage attenuation, and in particular to a lithium battery simulating dry cell voltage attenuation circuit. Background Art

[0002] Common lithium battery simulation dry battery power management chip applications such as Figure 1 As shown (the present invention is suitable for this application), Figure 1 The BAT pin is the lithium battery voltage input pin, typically a 3.7V lithium battery; the ISET pin is the charging current setting pin; the LED is the charging indicator light; the NTC is the battery temperature detection input pin; the OUT is the dry battery voltage output pin, typically 1.5V; the VIN is the charging power input pin; and the SW is the power tube switch output, connected to the inductor.

[0003] and Figure 2 This is a common simulation circuit diagram of dry battery power failure. Figure 2 In the figure, VBAT is the lithium battery voltage, and VOUT is the simulated dry battery voltage output of the chip through the BUCK circuit. This circuit compares VBAT with the reference voltage Vref after voltage division by R1 and R2, and outputs a current after passing through the comparator COMP. After passing through a precise resistor R5, this current affects the voltage division point of the feedback resistors R3 and R4 of VOUT. In the feedback loop of BUCK, the reference voltage Vref of the error amplifier EA remains unchanged, and the voltage of VOUT is affected by changing the voltage division of the feedback resistor.

[0004] Figure 3 It is an existing AC-DC power supply voltage detection circuit. Figure 3 In the figure, VBAT is the lithium battery voltage, which is divided by R1 and R2 and compared with the reference voltage Vref. After passing through the comparator COMP, the result is reflected in the switch selector, affecting the positive input Vref_1 and Vref_2 of the error amplifier EA, and finally affecting the dry battery output voltage VOUT through the negative feedback loop of BUCK.

[0005] The detection circuit directly divides the power supply voltage VBAT through resistors R1 and R2, and the comparator COMP compares the divided voltage with Vref, and obtains the comparison result through the comparator output.

[0006] The power supply voltage detection judgment formula is:

[0007] When VBAT>Vref*(1+R2 / R1), EA positive input=Vref_1, corresponding to VOUT=1.5V;

[0008] When VBAT<Vref*(1+R2 / R1), EA positive input=Vref_2, corresponding to VOUT=1.1V.

[0009] This circuit selects the reference voltage of the error amplifier EA through the comparator result, thereby changing the output voltage. However, since the voltage is switched by a switch, the output voltage has only two states, which means that the power decay process of the dry cell battery cannot be fully simulated. The present invention solves this technical problem and realizes the linearization of the decay process of lithium batteries to dry cells. Summary of the invention

[0010] The purpose of the present invention is to provide a lithium battery simulating dry battery voltage decay circuit, which can make the voltage decay process of lithium battery to dry battery linear, so as to completely simulate the actual power decay process of dry battery.

[0011] In order to achieve the above purpose, the following technical solutions are adopted:

[0012] A lithium battery simulating dry cell voltage attenuation circuit comprises a MOS tube Q1, a MOS tube Q2, a MOS tube Q3, a MOS tube Q4, a MOS tube Q5, a MOS tube Q6, a MOS tube Q7, a MOS tube Q8, a resistor R1, a resistor R2, a resistor R3, a resistor R4, and a resistor R5; the gate of the MOS tube Q2 is used to access a reference voltage, the source of the MOS tube Q2 is connected to the source of the MOS tube Q1 and then connected to an LDO output power supply, and the drain of the MOS tube Q2 is connected to the drain of the MOS tube Q3; one end of the resistor R1 is used to access a lithium battery, and the other end of the resistor R1 is connected to the resistor R2; the other end of the resistor R2 is grounded, and the gate of the MOS tube Q1 is connected to the common connection end of the resistor R1 and the resistor R2; the drain of the MOS tube Q1 is connected to the drain of the MOS tube Q4, the gate of the MOS tube Q4 is connected to the gate of the MOS tube Q3, and both are connected to the drain of the MOS tube Q2; the MO The drain of the S transistor Q5 is connected to the gate of the MOS transistor Q5 and then connected to the common connection end of the MOS transistor Q1 and the MOS transistor Q4; the gate of the MOS transistor Q6 is connected to the gate of the MOS transistor Q5, and the source of the MOS transistor Q6 is connected to the source of the MOS transistor Q5, the source of the MOS transistor Q4, and the source of the MOS transistor Q3, and then connected to the ground; the source of the MOS transistor Q7 is connected to the source of the MOS transistor Q8 and then connected to the LDO output power supply, and the gate of the MOS transistor Q7 is connected to the drain of the MOS transistor Q7 and then connected to the drain of the MOS transistor Q6; the gate of the MOS transistor Q8 is connected to the gate of the MOS transistor Q7, and the drain of the MOS transistor Q8 is connected to one end of the resistor R5 and then connected to the negative end of the error amplifier; one end of the resistor R3 is connected to one end of the resistor R4, and the other end of the resistor R4 is grounded; the other end of the resistor R5 is connected to the common connection end of the resistor R3 and the resistor R4, and the other end of the resistor R3 is used to output voltage.

[0013] Furthermore, the MOS transistor Q1 , MOS transistor Q2 , MOS transistor Q7 , and MOS transistor Q8 are PMOS transistors.

[0014] Furthermore, the MOS transistor Q3 , MOS transistor Q4 , MOS transistor Q5 , and MOS transistor Q6 are NMOS transistors.

[0015] Furthermore, the resistance ratio of the resistor R1 to the resistor R2 is 8:5.

[0016] By adopting the above scheme, the beneficial effects of the present invention are:

[0017] 1) The present invention hardly increases the power consumption of the system. Only when the detection is performed, the maximum current is 0.6uA. In other cases, this function is disabled, does not consume current, and does not affect other detection functions;

[0018] 2) The present invention can make the voltage decay process of lithium batteries into dry batteries linear, so as to fully simulate the actual power decay process of dry batteries;

[0019] 3) The present invention can conveniently adjust the corresponding range of linear attenuation of the lithium battery, that is, different attenuation ranges can be obtained by simply adjusting the relationship between R1:R2. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 This is a schematic diagram of the application circuit of the existing lithium battery to dry cell battery;

[0021] Figure 2 It is the existing circuit diagram of simulating dry battery power failure;

[0022] Figure 3 The present invention is a circuit diagram of an existing AC-DC power supply voltage detection circuit;

[0023] Figure 4 A circuit diagram of the present invention;

[0024] Figure 5 FIG. 1 is a schematic diagram of a lithium battery simulating a dry cell attenuation process in an embodiment of the present invention. DETAILED DESCRIPTION

[0025] The present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0026] Reference Figure 4As shown, the present invention provides a lithium battery simulating dry battery voltage attenuation circuit. In one embodiment, the circuit comprises MOS tube Q1, MOS tube Q2, MOS tube Q3, MOS tube Q4, MOS tube Q5, MOS tube Q6, MOS tube Q7, MOS tube Q8, resistor R1, resistor R2, resistor R3, resistor R4, and resistor R5; the gate of the MOS tube Q2 is used to access the reference voltage, the source of the MOS tube Q2 is connected to the source of the MOS tube Q1 and then connected to the LDO output power supply, and the drain of the MOS tube Q2 is connected to the drain of the MOS tube Q3; one end of the resistor R1 is used to access the lithium battery, and the other end of the resistor R1 is connected to the resistor R2; the other end of the resistor R2 is grounded, and the gate of the MOS tube Q1 is connected to the common connection end of the resistor R1 and the resistor R2; the drain of the MOS tube Q1 is connected to the drain of the MOS tube Q4, and the gate of the MOS tube Q4 is connected to the gate of the MOS tube Q3, and both are connected to the drain of the MOS tube Q2. drain; the drain of the MOS tube Q5 is connected to the gate of the MOS tube Q5 and then connected to the common connection end of the MOS tube Q1 and the MOS tube Q4; the gate of the MOS tube Q6 is connected to the gate of the MOS tube Q5, and the source of the MOS tube Q6 is connected to the source of the MOS tube Q5, the source of the MOS tube Q4, and the source of the MOS tube Q3, and then connected to the ground; the source of the MOS tube Q7 is connected to the source of the MOS tube Q8 and then connected to the LDO output power supply, and the gate of the MOS tube Q7 is connected to the drain of the MOS tube Q7 and then connected to the drain of the MOS tube Q6; the gate of the MOS tube Q8 is connected to the gate of the MOS tube Q7, and the drain of the MOS tube Q8 is connected to one end of the resistor R5 and then connected to the negative end of the error amplifier; one end of the resistor R3 is connected to one end of the resistor R4, and the other end of the resistor R4 is grounded; the other end of the resistor R5 is connected to the common connection end of the resistor R3 and the resistor R4, and the other end of the resistor R3 is used to output voltage.

[0027] In this embodiment, the present invention combines the voltage dividing resistors R1 and R2, the comparator COMP and the reference voltage Vref to realize the lithium battery voltage (VBAT) simulating the dry battery voltage (VOUT) attenuation circuit. Figure 4 As shown, SVCC is the internal LDO output power supply, the resistance ratio of resistor R1 to resistor R2 is 8:5, Vref = 1.2V, Ibias = 0.15uA, FB is the negative terminal (inverting input terminal) of the error amplifier, which is virtually shorted to the positive terminal after passing through the loop to 1.2V, MOS tubes Q1, MOS tube Q2, MOS tube Q7 and MOS tube Q8 use PMOS tubes, while MOS tubes Q3, MOS tube Q4, MOS tube Q5 and MOS tube Q6 use NMOS tubes.

[0028] Reference Figure 4As shown, when VBAT is much greater than Vref*(1 + R2 / R1) = 3.12V, Vg_Q1 is much greater than Vg_Q2. According to the IV characteristics of the MOS transistor:

[0029] Id = (W / L)*K*(Vgs - Vth)^2, where K is the process constant, and W and L are the width and length of the transistor.

[0030] At this time, Q2 can be equivalently considered as conducting and Q1 as turned off. Ibias flows through Q2 to Q3. At this time, there is no current in Id_Q1, that is, no current flows through Q4 and Q5. From the current mirror structure, when there is no current in Q5, there is also no current in Q6, Q7, and Q8, that is, Ibias2 = 0A.

[0031] When the inputs at both ends of the comparator are in the critical state, that is, when VBAT = 3.12V, at this time Vg_Q1 = Vg_Q2, and the currents flowing through Q1 and Q2 are the same, both being Ibias / 2. According to the current mirror structure of Q3 and Q4, at this time Id_Q2 = Id_Q3 = Id_Q4 = Ibias / 2, and Id_Q1 = Id_Q4 + Id_Q5, so it can be obtained that Id_Q5 = 0A. From the derivation of the current mirror structure, Ibias is just 0 at this time.

[0032] When VBAT < 3.12V, from the above analysis, at this time Vg_Q1 < Vg_Q2, it can be known that Id_Q1 > Id_Q2, and Id_Q2 = Id_Q3 = Id_Q4. From Id_Q1 = Id_Q4 + Id_Q5, it can be known that Id_Q5 > 0A. At this time, Ibias2 = 4*Id_Q5. Given that Ibias = 0.15uA, the range of Ibias2 is 0 - 0.6uA.

[0033] At this time, the value of the R5 resistor also needs to be deduced based on the existing conditions. When Ibias2 = 0.6uA, the corresponding VOUT = 1.1V. At this time, assuming the voltage value at the middle node of R3, R4, and R5 is x, the following equations can be obtained:

[0034] 1) (1.2V - x) / R5 = Ibias2;

[0035] 2) [(x / R4) - Ibias2]*R3 = (VOUT - x);

[0036] In the above two equations, R3 and R4 are known. When Ibias2 = 0.6uA and VOUT is 1.1V, the voltage value of R5 can be obtained.

[0037] Refer to Figure 5 As shown, during the process of the lithium battery voltage dropping from 3.1V to the undervoltage lock - out UVLO voltage of 2.7V, the dry - cell voltage correspondingly drops from 1.5V to 1.1V. The specific changes are as Figure 5 shown.

[0038] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A lithium battery simulating dry battery voltage attenuation circuit, characterized in that: The invention comprises a MOS tube Q1, a MOS tube Q2, a MOS tube Q3, a MOS tube Q4, a MOS tube Q5, a MOS tube Q6, a MOS tube Q7, a MOS tube Q8, a resistor R1, a resistor R2, a resistor R3, a resistor R4, and a resistor R5; the gate of the MOS tube Q2 is used to access a reference voltage, the source of the MOS tube Q2 is connected to the source of the MOS tube Q1 and then connected to an LDO output power supply, and the drain of the MOS tube Q2 is connected to the drain of the MOS tube Q3; one end of the resistor R1 is used to access a lithium battery, and the other end of the resistor R1 is connected to the resistor R2; the other end of the resistor R2 is grounded, and the gate of the MOS tube Q1 is connected to the common connection end of the resistor R1 and the resistor R2; the drain of the MOS tube Q1 is connected to the drain of the MOS tube Q4, the gate of the MOS tube Q4 is connected to the gate of the MOS tube Q3, and both are connected to the drain of the MOS tube Q2; the drain of the MOS tube Q5 is connected to the The gate of the MOS transistor Q5 is connected to the common connection end of the MOS transistor Q1 and the MOS transistor Q4; the gate of the MOS transistor Q6 is connected to the gate of the MOS transistor Q5, and the source of the MOS transistor Q6 is connected to the source of the MOS transistor Q5, the source of the MOS transistor Q4, and the source of the MOS transistor Q3, and then grounded together; the source of the MOS transistor Q7 is connected to the source of the MOS transistor Q8 and then connected to the LDO output power supply, and the gate of the MOS transistor Q7 is connected to the drain of the MOS transistor Q7 and then connected to the drain of the MOS transistor Q6; the gate of the MOS transistor Q8 is connected to the gate of the MOS transistor Q7, and the drain of the MOS transistor Q8 is connected to one end of the resistor R5 and then connected to the negative end of the error amplifier; one end of the resistor R3 is connected to one end of the resistor R4, and the other end of the resistor R4 is grounded; the other end of the resistor R5 is connected to the common connection end of the resistor R3 and the resistor R4, and the other end of the resistor R3 is used to output voltage.

2. The lithium battery simulating dry cell voltage attenuation circuit according to claim 1, characterized in that: The MOS transistor Q1 , MOS transistor Q2 , MOS transistor Q7 , and MOS transistor Q8 are PMOS transistors.

3. The lithium battery simulating dry cell voltage attenuation circuit according to claim 1, characterized in that: The MOS transistor Q3 , MOS transistor Q4 , MOS transistor Q5 , and MOS transistor Q6 are NMOS transistors.

4. The lithium battery simulating dry cell voltage attenuation circuit according to claim 1, characterized in that: The resistance ratio of the resistor R1 to the resistor R2 is 8:5.

Images