Pseudo-continuous capacitance-voltage conversion circuit with low power consumption

Abstract

The invention discloses a low-power-consumption pseudo-continuous capacitance-voltage conversion circuit, which comprises a signal modulator module, a capacitance differentiator module, a switched capacitor resistor module, a C / V conversion core operational amplifier module and a demodulator module, and is characterized in that the signal modulator module is connected with a modulation port of a sensor; the output end of the sensor, the capacitance differentiator module, the switched capacitor resistor module and the C / V conversion core operational amplifier module are connected; and the C / V conversion core operational amplifier module is also connected with the demodulator module. The conversion circuit has the advantages of being low in noise, continuous in signal and low in power consumption at the same time. The method can be widely applied to the conversion field.

Description

Technical Field

[0001] The invention relates to the field of conversion circuits, and in particular to a low-power pseudo-continuous capacitance-voltage conversion circuit. Background Art

[0002] With the development of MEMS technology, the processable variable capacitance is getting smaller and smaller, which poses a challenge of low noise and low power consumption to the C / V (capacitance / voltage) conversion circuit of the MEMS capacitive accelerometer interface circuit. The traditional continuous C / V conversion circuit structure has the advantage of low noise, but does not use any auxiliary to solve the gain error charge problem caused by the gain error of the operational amplifier. Therefore, it can only achieve high gain to suppress the gain error problem of the operational amplifier by increasing the power consumption of the operational amplifier, resulting in high power consumption of the traditional continuous C / V conversion circuit. Summary of the invention

[0003] In view of this, in order to solve the technical problem of high power consumption of the existing capacitance-voltage conversion circuit, the present invention proposes a low-power pseudo-continuous capacitance-voltage conversion circuit, including a signal modulator module, a capacitance differentiator module, a switched capacitor resistor module, a C / V conversion core amplifier module and a demodulator module, wherein:

[0004] The signal modulator module is connected to the modulation port of the sensor; the output end of the sensor, the capacitance differentiator module, the switch capacitor resistor module and the C / V conversion core amplifier module are connected; the C / V conversion core amplifier module is also connected to the demodulator module.

[0005] In some embodiments, the signal modulator module is composed of switches, and the switch control signal includes a first control signal and a second control signal. The capacitor differentiator module is composed of switches, and the switch control signal includes a first control signal and a second control signal. The switch capacitor resistor module is composed of a capacitor and a switch, and the switch control signal includes a third control signal, a fourth control signal, a fifth control signal and a sixth control signal. The C / V conversion core amplifier module is composed of an operational amplifier, a feedback capacitor and an auxiliary path, wherein the first auxiliary path and the second auxiliary path are both composed of a voltage storage capacitor and a switch, and the switch control signal includes a first control signal and a second control signal; the third auxiliary path is composed of a gain error charge storage capacitor; the demodulator module is composed of switches, and the switch control signal includes a fifth control signal and a sixth control signal.

[0006] Based on the above scheme, the present invention provides a low-power pseudo-continuous capacitance-voltage conversion circuit, which adopts the idea of ​​modulation and demodulation to achieve the suppression of low-frequency noise; the use of switched capacitor resistors to replace actual resistors solves the problems of large temperature drift and large area of ​​actual resistors, and improves the accuracy of signals. The use of auxiliary paths solves the gain error charge problem caused by operational amplifier gain error, suppresses the dynamic error problem caused by parasitic effects, and reduces the power consumption of operational amplifiers. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 It is a circuit structure diagram of a low-power pseudo-continuous capacitance-voltage conversion circuit of the present invention;

[0008] Figure 2 is a schematic diagram of a clock control signal of a conversion circuit in a specific embodiment of the present invention;

[0009] Figure 3 It is a schematic diagram of the working process of the switched capacitor resistor according to a specific embodiment of the present invention;

[0010] Figure 4 It is a C / V conversion comparison schematic diagram of the conversion circuit of the present invention and the traditional conversion circuit;

[0011] Figure 5 It is a schematic diagram comparing the demodulated signal outputs of the conversion circuit of the present invention and the traditional conversion circuit;

[0012] Figure symbols: CLK_CV, system clock signal; VCLK1, first control signal; VCLK2, second control signal; CLK1, third control signal; CLK2, fourth control signal; CLK3, fifth control signal; CLK4, sixth control signal; K1, first switch; K2, second switch; K3, third switch; K4, fourth switch; K5, fifth switch; K6, sixth switch; K7, seventh switch; K8, eighth switch; K9, ninth switch; K10, tenth switch; K11, eleventh switch; K12, twelfth switch; K13, thirteenth switch; K14, fourteenth switch; K15, fifteenth switch; K16, sixteenth switch; K17, seventeenth switch; K18, eighteenth switch; K19, nineteenth switch; K20, twentieth switch; K21, twenty-first switch; K22, twenty-second switch; K23, twenty-third switch; K24, twenty-fourth switch. DETAILED DESCRIPTION

[0013] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0014] It should be noted that, for the convenience of description, only the parts related to the relevant invention are shown in the drawings. In the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other.

[0015] It should be understood that the "system", "device", "unit" and / or "module" used in this application is a method for distinguishing different components, elements, parts, portions or assemblies at different levels. However, if other words can achieve the same purpose, the word can be replaced by other expressions.

[0016] As shown in this application and claims, unless the context clearly indicates an exception, the words "a", "an", "a kind" and / or "the" do not refer to the singular, but also include the plural. Generally speaking, the terms "include" and "comprise" only indicate the inclusion of clearly identified steps and elements, and these steps and elements do not constitute an exclusive list. The method or device may also include other steps or elements. The elements defined by the sentence "includes a..." do not exclude the existence of other identical elements in the process, method, commodity or device that includes the elements.

[0017] In the description of the embodiments of the present application, "plurality" means two or more than two. The following terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features.

[0018] In addition, flow charts are used in the present application to illustrate the operations performed by the system according to the embodiments of the present application. It should be understood that the preceding or following operations are not necessarily performed accurately in order. On the contrary, the various steps may be processed in reverse order or simultaneously. At the same time, other operations may also be added to these processes, or a certain step or several steps of operations may be removed from these processes.

[0019] Reference Figure 1 , is a flow chart of an optional example of a low-power pseudo-continuous capacitance-to-voltage conversion circuit proposed in the present invention. The low-power conversion circuit proposed in this embodiment may include but is not limited to the following structure:

[0020] It includes a signal modulator module, a capacitor differentiator module, a switch capacitor resistor module, a C / V conversion core amplifier module and a demodulator module, wherein:

[0021] The signal modulator module is connected to the modulation port of the sensor;

[0022] The output end of the sensor, the capacitance differentiator module, the switch capacitor resistor module and the C / V conversion core amplifier module are connected;

[0023] The C / V conversion core amplifier module is also connected to the demodulator module.

[0024] In this embodiment, a MEMS accelerometer sensitive unit is used as a sensor;

[0025] The signal modulator module:

[0026] It comprises a first switch and a second switch, wherein a first end of the first switch and a first end of the second switch are connected to a modulation port of the sensor, a second end of the first switch is grounded, and a second end of the second switch is connected to a reference voltage; the first switch is controlled by a first control signal VCLK1, and the second switch is controlled by a second control signal VCLK2;

[0027] The switch control signal VCLK1 / VCLK2 generates a square wave modulation signal with a duty cycle of 1 / 2 by controlling the on and off of the switch, realizes high-frequency modulation of the signal of the MEMS accelerometer, and moves the low-frequency MEMS head capacitance signal to high frequency, effectively weakening the interference of low-frequency noise on useful signals.

[0028] The capacitor differentiator module:

[0029] The sensor comprises a Cm capacitor, a third switch and a fourth switch, wherein the first end of the third switch, the first end of the fourth switch and the first end of the Cm capacitor are connected, and the second end of the Cm capacitor is connected to the output end of the sensor; the second end of the third switch is connected to a reference voltage, and the second end of the fourth switch is grounded; the third switch is controlled by a first control signal VCLK1, and the fourth switch is controlled by a second control signal VCLK2.

[0030] The switch control signal VCLK2 / VCLK1 generates a differential square wave signal with a duty cycle of 1 / 2 and a phase difference of 180° with the carrier signal by controlling the switch. The capacitor differential module generates a common-mode charge signal in the opposite direction of the MEMS meter head, which is added to the signal generated by the MEMS meter head, eliminating the common-mode charge of the signal and retaining only the differential-mode charge signal. When VCLK2 is high, the MEMS accelerometer generates a single-ended signal under the action of the carrier signal. Cs, as shown in formula (1); under the action of the differential square wave signal, the charge generated by a single signal channel of the signal differentiator is As shown in formula (2). m In the case of , the charge flowing to the main op amp is Q, as shown in formula (3). Combining formulas (1), (2) and (3), we get the charge transferred to the main op amp is Q, which is equal to Q diff , as shown in formula (4). The signal differentiator module eliminates the common-mode charge in the signal and only retains the differential-mode charge.

[0031]

[0032] Q diff =(V REF -V bias )×ΔC (4)

[0033] The switched capacitor resistor module:

[0034] The sampling capacitor includes a fifth switch, a sixth switch, a seventh switch, an eighth switch, a ninth switch, a tenth switch, an eleventh switch and a twelfth switch; the sampling capacitor includes C sh and C sl The low duty cycle control signal CLK3 / CLK4 controls the switch to close after the high level and low level C / V conversion of each cycle is stable, and the capacitor C sh and C sl The low duty cycle control signal CLK1 / CLK2 controls the switch to close at the beginning of the next cycle, and the capacitor C sh and C sl The charge is released in the high and low level segments respectively, such as Figure 3 As shown. The average value of the current flowing from the output terminal VOP_CV to the input terminal VIP is defined as I av , the current is determined by the voltage V VOP_CV -V VIP The difference is generated, as shown in formula (5), which can also be regarded as V VOP_CV -V VIP The voltage value across the equivalent resistance R INT The current generated on the resistor is shown in formula (6). Combining formulas (5), (6) and (7), we can get the equivalent resistance R INT , as shown in formula (8).

[0035]

[0036] T=1 / f CLK1(CLK2) (7)

[0037]

[0038] It can be seen that the equivalent resistance value is only related to the control signals CLK1 and CLK2 and the capacitor C sh and C sl The capacitance of the capacitor is related to the capacitance of the resistor. Compared with the resistor, the capacitor is a temperature-insensitive device within a limited temperature range (-40℃-80℃). Therefore, the equivalent resistance value will change very little with temperature within a limited temperature range. In order to make the resistance of the switched capacitor meet the static operating point requirements, the capacitor resistance is generally selected to be smaller, within the fF range. According to the knowledge of chip layout, the fF capacitor area is extremely small. The actual MΩ-level resistor occupies a large chip area, so the use of switched capacitor resistors can greatly save chip area.

[0039] The C / V conversion core amplifier module:

[0040] Including operational amplifier A1, feedback capacitor C INT The "virtual short" and "virtual disconnect" effects of the op amp input allow the charge to pass through the feedback capacitor C INT It is transferred and converted into a voltage signal at the output. Since the input signal frequency satisfies 1R INT C INT Under this condition, the circuit feedback capacitor C INT The circuit is capacitive, so the output voltage is theoretically only proportional to the amount of charge ΔC that the system needs to transfer. INT And the reference voltage V REF As shown in formula (9).

[0041]

[0042] The first auxiliary path and the second auxiliary path: The first auxiliary path consists of a voltage storage capacitor C H The second auxiliary path is composed of the thirteenth switch, the fourteenth switch, the fifteenth switch, and the sixteenth switch, and the switch control signal is VCLK1. L The voltage storage capacitor C of the first auxiliary path is composed of the seventeenth switch, the eighteenth switch, the nineteenth switch and the twentieth switch, and the switch control signal VCLK2. H The charge is not cleared in each acceleration signal cycle, and the voltage of the nth high-level segment integration is stored. The voltage storage capacitor C of the second auxiliary path L The charge is not cleared in each acceleration signal cycle, and the voltage of the nth low-level segment integration is stored. Since the voltage storage capacitor C H and C L The charge on the capacitor C is not cleared during the signal cycle, so the voltage storage capacitor C H and C LIt only plays the role of voltage storage and does not affect the amplification factor of the circuit. The amplification factor of the circuit is only determined by C INT Determined by the charge storage capacitor C H and C L It is larger than other capacitors, which strengthens the transfer coefficient β of the C / V conversion circuit, as shown in formula (10). The increase in the transfer coefficient suppresses the influence of dynamic errors on the capacitor-voltage conversion.

[0043]

[0044] The third auxiliary path: The third auxiliary path consists of the gain error charge storage capacitor C ES Two gain error storage capacitors C ES The first end is connected to the operational amplifier input, which is equivalent to being connected to ground, and the second end is connected to the input VIP / VIN and the integral capacitor C INT Therefore, the error storage capacitor C ES It does not participate in the integration operation of the operational amplifier, but only plays the role of absorbing the gain error charge. ES In each carrier signal cycle, the high level segment absorbs the gain error charge of the high level segment. When the clock jumps to the low level, the voltage storage capacitor C ES Absorb the gain error charge of the low level segment. Because the gain error charge of the high level segment is almost equal to the gain error charge of the low level segment and flows in the opposite direction, the positive and negative charges cancel each other out, eliminating the gain error charge.

[0045] C / V conversion core working status description:

[0046] like Figure 4 As shown in the figure, signals (a) and (b) are the C / V conversion characteristics of the traditional continuous C / V conversion circuit and the proposed pseudo-continuous C / V conversion circuit under the action of the carrier modulation signal. As can be seen from the figure, under the action of the carrier signal, the C / V conversion circuit performs positive and negative alternating integration on the input charge signal. In the high level section of the nth carrier cycle, V VOP_CVn The integral is a positive voltage, V VON_CVn The integral is a negative voltage; in the low level section, V VOP_CVn The integral is a negative voltage, V VON_CVn The integral is a positive voltage. The traditional continuous C / V conversion circuit generates a positive voltage in each carrier cycle V VOP_CVn / V VON_CVn All of them are integrated from the bias voltage to the stable voltage. Therefore, a high-gain op amp is required to ensure that the output voltage can be quickly stabilized in a short time with small gain error and dynamic error. This leads to high power consumption of traditional continuous C / V conversion circuits.

[0047] The present invention adopts a switched capacitor auxiliary path. When CV_CLK is at a high level, the switch control signal VCLK1 is at a high level, the switch controlled by VCLK1 is closed, and the auxiliary path 1 is turned on. Two voltage storage capacitors C H Store the voltage of the n-1th high level segment integration When CV_CLK is at a low level, the switch VCLK2 is at a high level, the switch controlled by VCLK2 is closed, and the auxiliary path 2 is turned on. L Store the voltage of the n-1th low-level segment integration At the time of the nth integration, when CV_CLK is at a high level, the switch VCLK1 is at a high level, the switch controlled by VCLK1 is closed, the auxiliary path 1 is turned on, and the voltage storage capacitor C H Pull the voltage at the output of the op amp to Therefore, in the nth C / V conversion operation, the voltage at the output of operational amplifier A1 changes from Integrate to voltage The gain voltage of the operational amplifier is As shown in formula (11); when CV_CLK is at a low level, the switch VCLK2 is at a high level, the switch controlled by VCLK2 is closed, the auxiliary path 2 is turned on, and the voltage storage capacitor C L Pull the voltage at the output of the op amp to Therefore, in the nth C / V conversion operation, the voltage at the output of operational amplifier A1 changes from Integrate to voltage The gain voltage of the operational amplifier is As shown in formula (12). Gradually approaching the ideal value, When n is large enough, It is infinitely close to the ideal value, and the error is so small that it can be ignored.

[0048]

[0049] According to the above analysis, we know that the gain voltage of the high and low levels of each cycle of the op amp is Therefore, the gain error of the high and low levels of each cycle of the op amp is As shown in formulas (13) and (15). When CV_CLK is at a high level, the gain error charge storage capacitor C ES Absorbs gain error charge As shown in formula (14). When CV_CLK is low, the gain error storage capacitor C ES Absorbs gain error charge As shown in formula (16). According to the above analysis, the gain error charge and The charges are approximately equal in size and opposite in direction. Therefore, the positive and negative gain error charges are cancelled out once in each cycle. After n integrations, the gain voltage of the operational amplifier becomes smaller and smaller, and the gain error also becomes smaller and smaller, and is eventually completely eliminated. The operational amplifier that eliminates the gain error does not need a high gain to suppress the gain error. At the same time, the gain voltage becomes smaller and smaller each time, so the gain requirement of the operational amplifier is reduced, which further reduces the power consumption requirement of the operational amplifier.

[0050]

[0051] The demodulator circuit:

[0052] The demodulation module is composed of the twenty-first switch, the twenty-second switch, the twenty-third switch, and the twenty-fourth switch, and the switch control signals are the low duty cycle signals CLK3 / CLK4. In the function of the switch, the signal V output from the op amp VOP_CV and V VON_CV Under the action of the switch control signal CLK3 / CLK4, the signal is demodulated from the modulated signal, and the demodulated signal is V VOP and V VON The use of a low duty cycle clock can ensure that demodulation is performed after the signal is stable, thereby improving the signal-to-noise ratio of the demodulated signal. At the same time, through demodulation, the noise is left within the carrier frequency range, while the useful signal is moved back to the low frequency band. The signal diagram from the demodulation module is as follows Figure 5 As shown in the figure, both the high and low levels of the system clock CV_CLK can be used as useful signals to be input to the next level of processing, and can be used with continuous and discrete ADCs.

[0053] like Figure 2 As shown, it is the working timing diagram of the circuit of the present invention. CLK_CV is the input system clock signal of the overall C / V conversion circuit, and the period is T. The switch control signal VCLK1 / VCLK2 is a control signal that keeps the same frequency as the system clock signal CLK_CV and is non-overlapping. The switch control signals CLK1 and CLK2 are control signals that keep the same frequency as CLK_CV and have a duty cycle of T / 8. The switch control signal CLK1 keeps consistent with the rising edge of VCLK1, and the switch control signal CLK2 keeps consistent with the rising edge of VCLK2. The switch control signal CLK3 / CLK4 is a control signal that keeps the same frequency as CLK_CV and has a duty cycle of T / 8. The switch control signal CLK3 keeps consistent with the falling edge of VCLK1, and the switch control signal CLK4 keeps consistent with the falling edge of VCLK2.

[0054] Based on the above scheme, the present invention also provides relevant simulation data:

[0055] Simulation environment description: The proposed pseudo-continuous C / V conversion circuit: static capacitance is 3pF, variable capacitance is 60fF; the traditional continuous C / V conversion circuit: static capacitance is 3pF, variable capacitance is 30fF. The output amplitude change percentage and static operating point change of the traditional continuous C / V conversion circuit and the proposed pseudo-continuous C / V conversion circuit with temperature are shown in Table 1. The maximum amplitude change percentage of the traditional continuous C / V conversion circuit is 36.1% under the condition of temperature from -45℃ to 80℃. The maximum change percentage of the pseudo-continuous CV conversion circuit is 3%.

[0056] Table 1 The percentage change of output amplitude with temperature and the static operating point change of the traditional continuous C / V conversion circuit and the proposed pseudo-continuous C / V conversion circuit

[0057]

[0058] As shown in Table 2, when the power supply voltage of the proposed pseudo-continuous C / V conversion circuit structure is 3.3V, the static capacitance is 3pF, and the sensitivity is 10mV / Ff, the current of the core op amp is 240.2μA and the power consumption is 792.66μW.

[0059] Table 2 Basic performance indicators of the pseudo-continuous C / V conversion circuit proposed

[0060]

[0061] The above is a specific description of the preferred implementation of the present invention, but the invention is not limited to the embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of this application.

Claims

1. A low-power pseudo-continuous capacitance-to-voltage conversion circuit, characterized in that: It includes a signal modulator module, a capacitor differentiator module, a switch capacitor resistor module, a C / V conversion core amplifier module and a demodulator module, wherein: The signal modulator module is connected to the modulation port of the sensor; The output end of the sensor, the capacitance differentiator module, the switch capacitor resistor module and the C / V conversion core amplifier module are connected; The C / V conversion core amplifier module is also connected to the demodulator module.

2. A low-power pseudo-continuous capacitance-to-voltage conversion circuit according to claim 1, characterized in that: The signal modulator module includes a first switch and a second switch, wherein the first switch is controlled by a first control signal and the second switch is controlled by a second control signal.

3. A low-power pseudo-continuous capacitance-to-voltage conversion circuit according to claim 1, characterized in that: The capacitance differentiator module includes a third switch and a fourth switch, wherein the third switch is controlled by a first control signal, and the fourth switch is controlled by a second control signal.

4. A low-power pseudo-continuous capacitance-to-voltage conversion circuit according to claim 3, characterized in that: The switched capacitor resistor module includes a sampling capacitor, a fifth switch, a sixth switch, a seventh switch, an eighth switch, a ninth switch, a tenth switch, an eleventh switch and a twelfth switch, wherein: The sampling capacitor is used for voltage sampling; The fifth switch and the ninth switch are controlled by a third control signal; The sixth switch and the tenth switch are controlled by a fourth control signal; The seventh switch and the eleventh switch are controlled by a fifth control signal; The eighth switch and the twelfth switch are controlled by a sixth control signal.

5. A low-power pseudo-continuous capacitance-to-voltage conversion circuit according to claim 4, characterized in that: The C / V conversion core amplifier module includes an operational amplifier, a feedback capacitor, a first auxiliary path, a second auxiliary path and a third auxiliary path, wherein: The first auxiliary path includes a voltage storage capacitor, a thirteenth switch, a fourteenth switch, a fifteenth switch and a sixteenth switch, and the thirteenth switch, the fourteenth switch, the fifteenth switch and the sixteenth switch are all controlled by a first control signal; The second auxiliary path includes a voltage storage capacitor, a seventeenth switch, an eighteenth switch, a nineteenth switch and a twentieth switch, and the seventeenth switch, the eighteenth switch, the nineteenth switch and the twenty-third switch are all controlled by a second control signal; The third auxiliary path includes a gain error charge storage capacitor.

6. A low-power pseudo-continuous capacitance-to-voltage conversion circuit according to claim 5, characterized in that: The demodulator module includes a twenty-first switch, a twenty-second switch, a twenty-third switch, and a twenty-fourth switch, wherein: The twenty-first switch and the twenty-third switch are both controlled by a fifth control signal; The twenty-second switch and the twenty-fourth switch are both controlled by a sixth control signal.

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