Neural architecture generation method, device and system, computer equipment and storage medium

Abstract

The invention relates to the technical field of artificial intelligence, in particular to a neural architecture generation method, device and system, computer equipment and a storage medium. The method comprises the steps that in the current round, an optimization model is called to process m optimization measures, a candidate architecture list and design requirements, at least one optimization scheme output by the optimization model is obtained, and the optimization scheme comprises a target optimization measure and a to-be-modified model architecture; calling the modification model to execute a target optimization measure on the to-be-modified model architecture to obtain an optimized architecture, generating a network model corresponding to the optimized architecture, training the network model based on the training set, and determining an iterative architecture from the optimized architectures according to a training result; and under the condition that the current round is smaller than the preset round, executing the next round of iteration until the current round is the preset round, and determining that the iteration architecture in the current round is the target neural architecture corresponding to the design demand. By adopting the method, the neural architecture with better performance can be generated.

Description

Technical Field

[0001] The present application relates to the technical field of artificial intelligence, and specifically to the technical field of neural architecture design. Background Art

[0002] Neural architecture design is a key research area in deep learning, which aims to design and optimize neural network architectures to achieve efficient performance for specific tasks. In related technologies, mainstream neural architecture generation methods mainly rely on manual design by researchers.

[0003] In related technologies, when designing neural architectures, such as neural architectures of network models such as image classification, semantic segmentation, and target detection, researchers need to manually design the network architecture through experiments and experience. This design method requires multiple attempts and iterations by researchers; and the performance of the neural architecture finally designed depends entirely on the experience of the researchers; if the design route chosen in the early stage of the design is wrong, it will affect the overall design efficiency; and the experience of researchers is limited, so the performance of the neural architecture finally designed is often not ideal. Summary of the invention

[0004] In response to the above technical problems, the present application at least provides a neural architecture generation method, apparatus, system, computer device and storage medium.

[0005] In a first aspect, the present application provides a neural architecture generation method, comprising:

[0006] In one embodiment, in the current round, the optimization model is called to process m optimization measures, the candidate architecture list and the design requirements to obtain at least one optimization solution output by the optimization model, wherein the optimization solution includes a target optimization measure and a model architecture to be modified; wherein the candidate architecture list includes an initial model architecture and an iterative architecture determined in each completed round, the optimization measure is determined from an experience library based on the design requirements, and m is greater than 2;

[0007] For each of the optimization schemes, calling the modification model to execute the target optimization measures on the model architecture to be modified, obtaining an optimized architecture, generating a network model corresponding to the optimized architecture, training the network model based on a training set, and determining an iterative architecture from each of the optimized architectures according to the training results;

[0008] When the current round is less than the preset round, the current round is marked as a ended round, and the next round of iteration of the current round is executed until the current round is the preset round, and the iterative architecture in the current round is determined to be the target neural architecture corresponding to the design requirement.

[0009] By adopting the above technical solution, an iterative process includes: determining m optimization measures from the experience library based on design requirements, and using the analysis ability of the optimization model to determine at least one optimization scheme from the m optimization measures and the candidate architecture list; using the modified model to execute each optimization scheme to obtain the corresponding optimization architecture and generate the network model corresponding to each optimization architecture; training each network model through the training set, and determining the best-performing optimization architecture as the iterative architecture of the current iteration round according to the training results; in the entire neural architecture design process, multiple iterations are involved, and each iterative architecture determined in the completed round is updated to the candidate architecture list , which makes each iteration process not completely dependent on the iterative architecture obtained in the previous round of iterations, so that each round of iterations is independent, thus avoiding the impact of the initial wrong route selected in the early stage of design on the efficiency of subsequent iterations; and, compared with the limitations of designer experience, the solution of the present application uses the analytical ability of the optimization model to select the iteration scheme in each iteration, so that the performance of the iterative architecture obtained in each round of iteration is better than that of the previous round; therefore, after finally meeting the preset iteration rounds, the determined iterative architecture is used as the target neural architecture of the design requirements, and a target neural architecture with better performance can be obtained.

[0010] In one embodiment, the calling optimization model processes the m optimization measures, the candidate architecture list, and the design requirements, including:

[0011] When n=1, m optimization measures corresponding to the design requirements are obtained from the experience database, wherein the experience database is updated every update cycle; n is the iteration round;

[0012] The optimization model is called to process the m optimization measures, the candidate architecture list, and the design requirements.

[0013] By adopting the above technical solution, in the first round, m optimization measures are obtained from the experience library according to the design requirements, so that in subsequent rounds, optimization solutions can be obtained based on the m optimization measures; and the experience library is updated every update cycle, which enables the experience library to continuously supplement the optimization experience in the neural architecture, thereby providing better support for the design process of each subsequent neural architecture.

[0014] In one embodiment, the calling optimization model processes the optimization measures, the candidate architecture list, and the design requirements, including:

[0015] When n>1, determining that an optimization measure has been applied, and removing the applied optimization measure from the m optimization measures to obtain an optimization measure that has not been applied, wherein the applied optimization measure is an optimization measure in the optimization scheme of the finished round;

[0016] The optimization model is called to process the unapplied optimization measures, the candidate architecture list, and the design requirements.

[0017] By adopting the above technical solution, starting from the second round, for the optimization measures applied in the ended rounds, the applied optimization measures will be removed from the m optimization measures determined in the first round, so that they will not be used in subsequent iterative rounds, thereby avoiding the optimization model output overlapping with the optimization solution in the ended round, thereby avoiding redundancy in the iterative process and further improving the efficiency of generating neural architecture.

[0018] In one embodiment, updating the experience database every update period includes:

[0019] At each update cycle, reference information is retrieved from the target address, where the reference information is source information updated later than the last update cycle, and the source information includes at least papers, documents, and blogs;

[0020] Obtaining summary content of each of the reference information, and inputting the summary content of each of the reference information as first information to be analyzed into a text analysis model, to obtain a first analysis result output by the text analysis model, wherein the first analysis result includes target reference information associated with the design requirement;

[0021] Acquire the full text content of each target reference information, and input the full text content of each target reference information as the second information to be analyzed into the text analysis model to obtain a second analysis result output by the text analysis model, wherein the second analysis result includes at least one optimization measure;

[0022] Based on the at least one optimization measure, the experience database is updated.

[0023] By adopting the above technical solution, the summary content will usually summarize the core content of the source information; therefore, the summary content can be used to more accurately determine whether a reference information is the target reference information related to the neural architecture; this method does not need to be judged based on the full text content of the reference information, thereby reducing the amount of data that needs to be passed to the text analysis model, and thus reducing the computing tasks of the text analysis model, thereby improving the efficiency of the analysis.

[0024] In one embodiment, generating a network model corresponding to the optimized architecture includes:

[0025] For each of the optimized architectures, calling a verification model to verify the optimized architecture, obtaining a verification result and a modification measure output by the verification model, and classifying the model architecture into a correct architecture and an incorrect architecture according to the verification result;

[0026] Calling the modification model to execute the modification measure on the erroneous architecture to obtain a modified architecture corresponding to the erroneous architecture;

[0027] Generate network models corresponding to the modified architecture and the correct architecture respectively.

[0028] By adopting the above technical solution, before generating a network model with an optimized architecture for training, the optimized architecture can be checked in terms of architecture and data logic through a verification model to determine whether the optimized architecture is correct; thereby reducing the probability of errors in the generated network model, and therefore, in the subsequent training and testing of the network model, the performance of the network model can be better verified, thereby facilitating the accurate determination of an iterative architecture with better performance.

[0029] In one embodiment, the method further comprises:

[0030] For each round of iterative architecture, generating a directed acyclic graph of the iterative architecture;

[0031] The directed acyclic graph of the iterative architecture is stored in the candidate architecture list.

[0032] By adopting the above technical solution, in each iteration round, the directed acyclic graph of the iterative architecture generated in the current round is updated to the candidate architecture list, and in subsequent iteration rounds, the optimization plan is determined based on the candidate architecture list. This makes the iteration process of each round starting from the second round not completely dependent on the iterative architecture obtained by the previous round of iteration, so that the iteration process of each round is independent, thereby avoiding the impact of the initial wrong route selected in the early stage of design on the efficiency of subsequent iterations.

[0033] In one embodiment, the method further comprises:

[0034] In a current round, summary measures of the current round are generated based on the test results of the iterative architecture and the directed acyclic graph of the iterative architecture.

[0035] In one embodiment, the calling of the optimization model to execute the target optimization measure on the model architecture to be modified to obtain the optimized architecture includes:

[0036] The modification model is called to execute the target optimization measures and the summary measures of the previous round on the model architecture to be modified to obtain an optimized architecture.

[0037] By adopting the above technical solution, after determining the iterative architecture, the detection model's ability to understand relevant knowledge in the field of neural architecture can be used to analyze the reasons for the poor performance of the iterative architecture and provide summary measures; in the next round of iterations, the modified model is used to execute summary measures based on the optimization plan determined in the next round, so that the performance of the optimized architecture determined in the next round is better.

[0038] In one embodiment, the training result includes a test result, and the training of the network model based on the training set and determining the iterative architecture from each of the optimized architectures according to the training result include:

[0039] Training the network model based on the training set to obtain a trained network model;

[0040] The trained network model is tested based on the test set, and an iterative architecture is determined from each of the optimized architectures based on the test result, wherein the iterative architecture is the optimized architecture corresponding to the network model with the best performance among the trained network models.

[0041] By adopting the above technical solution, the network model trained by the training set in each cycle is tested through the test set, and the architecture corresponding to the network model with the best performance is selected as the optimized architecture based on the test results, so as to make the determined optimized architecture more accurate.

[0042] In a second aspect, the present application further provides a neural architecture generation device, the device comprising an optimization module, a modification module and a loop control module, wherein:

[0043] An optimization module, used to call the optimization model to process m optimization measures, the candidate architecture list and the design requirements, and obtain at least one optimization solution output by the optimization model, wherein the optimization solution includes a target optimization measure and a model architecture to be modified; wherein the candidate architecture list includes an initial model architecture and an iterative architecture determined in each completed round, the optimization measure is determined from an experience library based on the design requirements, and m is greater than 2;

[0044] A modification module, for each of the optimization schemes, calling a modification model to execute the target optimization measures on the model architecture to be modified, obtaining an optimized architecture, generating a network model corresponding to the optimized architecture, training the network model based on a training set, and determining an iterative architecture from each of the optimized architectures according to the training results;

[0045] A loop control module is used to mark the current round as a ended round when the current round is less than the preset round, and execute the next round of iteration of the current round until the current round is the preset round, and determine that the iterative architecture in the current round is the target neural architecture corresponding to the design requirement.

[0046] In one embodiment, when the optimization module calls the optimization model to process the m optimization measures, the candidate architecture list, and the design requirements, it is specifically used to:

[0047] When n=1, m optimization measures corresponding to the design requirements are obtained from the experience database, wherein the experience database is updated every update cycle; n is the iteration round;

[0048] The optimization model is called to process the m optimization measures, the candidate architecture list, and the design requirements.

[0049] In one embodiment, when the optimization module calls the optimization model to process the m optimization measures, the candidate architecture list, and the design requirements, it is specifically used to:

[0050] When n>1, it is determined that the optimization measures have been applied, and the applied optimization measures are eliminated from the m optimization measures to obtain non-applied optimization measures, wherein the applied optimization measures are the optimization measures in the optimization scheme of the finished round;

[0051] The optimization model is called to process the unapplied optimization measures, the candidate architecture list, and the design requirements.

[0052] In one embodiment, the neural architecture generation device further includes an experience library update module, and the experience library update module is specifically used to:

[0053] At each update cycle, reference information is retrieved from the target address, where the reference information is source information updated later than the last update cycle, and the source information includes at least papers, documents, and blogs;

[0054] Obtaining summary content of each of the reference information, and inputting the summary content of each of the reference information as first information to be analyzed into a text analysis model, to obtain a first analysis result output by the text analysis model, wherein the first analysis result includes target reference information associated with the design requirement;

[0055] Acquire the full text content of each target reference information, and input the full text content of each target reference information as the second information to be analyzed into the text analysis model to obtain a second analysis result output by the text analysis model, wherein the second analysis result includes at least one optimization measure;

[0056] Based on the at least one optimization measure, the experience database is updated.

[0057] In one embodiment, when generating the network model corresponding to the optimized architecture, the modification module is specifically used to:

[0058] For each of the optimized architectures, calling a verification model to verify the optimized architecture, obtaining a verification result and a modification measure output by the verification model, and classifying the model architecture into a correct architecture and an incorrect architecture according to the verification result;

[0059] Calling the modification model to execute the modification measure on the erroneous architecture to obtain a modified architecture corresponding to the erroneous architecture;

[0060] Generate network models corresponding to the modified architecture and the correct architecture respectively.

[0061] In one embodiment, the neural architecture generation device further includes a list updating module, and the list updating module is specifically used to:

[0062] For each round of iterative architecture, generating a directed acyclic graph of the iterative architecture;

[0063] The directed acyclic graph of the iterative architecture is stored in the candidate architecture list.

[0064] In one embodiment, the neural architecture generation device further includes a summary measure module, which is specifically used to:

[0065] In a current round, summary measures of the current round are generated based on the test results of the iterative architecture and the directed acyclic graph of the iterative architecture.

[0066] In one embodiment, when the modification module calls the optimization model to execute the target optimization measure on the model architecture to be modified to obtain the optimized architecture, it is specifically used to:

[0067] The modification model is called to execute the target optimization measures and the summary measures of the previous round on the model architecture to be modified to obtain an optimized architecture.

[0068] In one embodiment, the training result includes a test result, and the modification module trains the network model based on the training set, and when determining the iterative architecture from each of the optimized architectures according to the training result, is specifically used to:

[0069] Training the network model based on the training set to obtain a trained network model;

[0070] The trained network model is tested based on the test set, and an iterative architecture is determined from each of the optimized architectures based on the test result, wherein the iterative architecture is the optimized architecture corresponding to the network model with the best performance among the trained network models.

[0071] In a third aspect, the present application further provides a neural architecture generation system, the system comprising an optimization model, a modification model, and a logic control unit, wherein:

[0072] An optimization model, in the current round, for processing m optimization measures, a candidate architecture list, and a design requirement and outputting at least one optimization solution, wherein the optimization solution includes a target optimization measure and a model architecture to be modified; wherein the candidate architecture list includes an initial model architecture and an iterative architecture determined in each completed round, the optimization measure is determined from an experience library based on the design requirement, and m is greater than 2;

[0073] Modifying the model, for each of the optimization schemes, executing the target optimization measures on the model architecture to be modified to obtain an optimized architecture, generating a network model corresponding to the optimized architecture, training the network model based on a training set, and determining an iterative architecture from each of the optimized architectures according to the training results;

[0074] A logic control unit, configured to mark the current round as a finished round when the current round is less than a preset round, and execute the next round of iteration of the current round, until the current round is the preset round, and determine that the iteration architecture in the current round is the target neural architecture corresponding to the design requirement;

[0075] In one embodiment, the system further comprises a text analysis model, wherein:

[0076] The text analysis model is used to retrieve reference information from a target address every update cycle and obtain at least one optimization measure from the reference information, wherein the reference information is source information updated later than the previous update cycle, and the source information includes at least papers, documents and blogs.

[0077] In one embodiment, the system further comprises a verification model, wherein:

[0078] A verification model is used to call the verification model to verify each of the optimized architectures, obtain the verification results and modification measures output by the verification model, and classify the model architecture into a correct architecture and an incorrect architecture according to the verification results;

[0079] The logic control unit is further used to call the modification model to execute the modification measures on the erroneous architecture to obtain a modified architecture corresponding to the erroneous architecture;

[0080] The modified model is also used to generate network models corresponding to the modified architecture and the correct architecture respectively.

[0081] In a fourth aspect, the present application further provides a computer device, comprising a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, it implements any one of the methods described in the first aspect above.

[0082] In a fifth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements any one of the methods described in the first aspect above.

[0083] In a sixth aspect, the present application further provides a computer program product, comprising a computer program, which, when executed by a processor, implements any one of the methods described in the first aspect above.

[0084] The above-mentioned neural architecture generation method, device, system, computer equipment and storage medium, the process of one iteration includes: based on the design requirements, m optimization measures are determined from the experience library, and the analysis ability of the optimization model is used to determine at least one optimization scheme from the m optimization measures and the candidate architecture list; the modified model is used to execute each optimization scheme to obtain the corresponding optimization architecture and generate the network model corresponding to each optimization architecture; each network model is trained through the training set, so as to determine the best performance optimization architecture as the iterative architecture of the current iteration round according to the training results; in the entire neural architecture design process, multiple iterations are involved, and each iterative architecture determined in the completed round is updated. The new candidate architecture is added to the list of candidate architectures, which means that each iteration process does not completely rely on the iterative architecture obtained in the previous round of iterations, so that each round of iterative processes is independent of each other, thus avoiding the impact of the initial wrong route selected in the early design stage on the efficiency of subsequent iterations; and, compared with the limitations of designer experience, the solution of the present application utilizes the analytical ability of the optimization model to select the iterative scheme in each iteration, so that the performance of the iterative architecture obtained in each round of iteration is better than that of the previous round; therefore, after finally meeting the preset iteration rounds, the determined iterative architecture is used as the target neural architecture of the design requirements, and a target neural architecture with better performance can be obtained.

[0085] It should be understood that the above general description and the following detailed description are merely exemplary and explanatory, and are not intended to limit the technical solutions of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0086] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the related technical descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0087] The drawings herein are incorporated into the specification and constitute a part of the specification. These drawings illustrate embodiments consistent with the present disclosure and are used to illustrate the technical solutions of the present disclosure together with the specification.

[0088] Figure 1 A schematic diagram of a process of generating a neural architecture in one embodiment;

[0089] Figure 2 A schematic diagram of a process for updating an experience database in one embodiment;

[0090] Figure 3 A schematic diagram of a process for obtaining an optimized architecture in one embodiment;

[0091] Figure 4 A schematic diagram of a process for testing an optimized architecture in one embodiment;

[0092] Figure 5 A method for determining an iteration architecture in one embodiment;

[0093] Figure 6 A schematic diagram of the architecture of a neural architecture generation system in one embodiment;

[0094] Figure 7 It is a structural block diagram of a neural architecture generation device in one embodiment;

[0095] Figure 8 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0096] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0097] In one embodiment, a neural architecture generation method is provided. The embodiment of the present application uses the method applied to a computer device as an example; however, it is understandable that the computer device can be a terminal, a server, or a device system including a terminal and a server system. Among them, the terminal can be, but is not limited to, various personal computers, laptops, smart phones, tablet computers, Internet of Things devices, and portable wearable devices. The server can be implemented as an independent server or a server cluster consisting of multiple servers.

[0098] In an exemplary embodiment, Figure 1 As shown, the neural architecture generation method in the embodiment of the present application may specifically include steps 12 to 16, wherein:

[0099] Step 12: In the current round, the optimization model is called to process the m optimization measures, the candidate architecture list, and the design requirements to obtain at least one optimization solution output by the optimization model, wherein the optimization solution includes the target optimization measures and the model architecture to be modified; wherein the candidate architecture list includes the initial model architecture and the iterative architecture determined in each completed round, the optimization measures are determined from the experience library based on the design requirements, and m is greater than 2.

[0100] For the embodiments of the present application, optimization measures are measures used to improve a certain neural architecture; an exemplary optimization measure may be: adopting a multi-scale structure in the recognition module, using parallel branches with different incremental expansion rates, so that the model can effectively process data of various space-time scales. The candidate architecture list includes at least one candidate architecture, and the candidate architectures in the candidate architecture list are different in different rounds. In the current round, the candidate architecture list includes each iterative architecture determined in each previous completed round, and also includes the initial architecture input by the user. The design requirements are input by the user, and the design requirements are the requirements for improving at least one performance indicator of the network model corresponding to the initial architecture input by the user; for example, the design requirements may be: improving the efficiency of target detection; the design requirements may also be: improving the efficiency and accuracy of target detection.

[0101] The optimization model is a pre-trained LLM model (Large Language Model); for example, the optimization model may be a ChatGPT 4.0 model; it is understandable that the optimization model may also be a model of other versions, which is not specifically limited in the embodiments of the present application. For a fixed design requirement, multiple rounds of iterations may be required to determine the final target neural architecture. In the first round, the design requirements and various optimization measures in the experience library are input into the optimization model. Using the analysis capabilities of the large language model, the optimization model selects m optimization measures related to the design requirements and outputs them. In subsequent iterative rounds, the optimization measures are no longer determined from the experience library; that is, in subsequent iterative rounds, iterations are based on the m optimization measures determined in the first round.

[0102] Each round of iteration will determine an iterative architecture, and each round of iterative architecture determined will be stored as a candidate architecture in the candidate architecture list. For example, in the first round, the candidate architecture list only has the initial architecture A0 input by the user, and the iterative architecture A1 is obtained at the end of the first round; in the second round, there are two candidate architectures A0 and A1 in the candidate architecture list.

[0103] In a possible implementation, in the current round, the m optimization measures and each candidate architecture in the candidate list are directly input into the optimization model, and the optimization model selects and outputs at least one optimization solution with greater improvement potential or that best meets the design requirements by utilizing the analysis capability of the optimization model and combining the design requirements. The candidate optimization solution includes an optimization measure and a candidate architecture.

[0104] In another possible implementation, in the current round, m optimization measures are matched one-to-one with each candidate architecture in the candidate list to obtain multiple candidate optimization schemes; then the multiple candidate optimization schemes are input into the optimization model, and the analysis capability of the optimization model is used in combination with the design requirements, so that the optimization model selects and outputs at least one candidate optimization scheme with greater improvement potential or that best meets the design requirements from the multiple candidate optimization schemes as the target optimization scheme.

[0105] For example, the optimization measures input into the optimization model are m1, m2, and m3, and there are two candidate architectures A0 and A1 in the candidate list; the optimization model creates a total of six candidate optimization schemes, m1-A0, m2-A0, m3-A0, m1-A1, m2-A1, and m3-A1. Among them, the target optimization scheme determined in each round can be one or more. After determining the target optimization scheme, the optimization measures included in the target optimization scheme are marked as target optimization measures, and the candidate architecture is marked as the model architecture to be modified.

[0106] Step 14: For each optimization scheme, call the modified model to perform target optimization measures on the model architecture to be modified, obtain the optimized architecture, generate a network model corresponding to the optimized architecture, train the network model based on the training set, and determine the iterative architecture from each optimized architecture according to the training results.

[0107] For the embodiment of the present application, the modified model is a pre-trained LLM model (Large Language Model); for example, the modified model may be a ChatGPT 4.0 model; it is understandable that the modified model may also be a model of other versions, which is not specifically limited in the embodiment of the present application.

[0108] For each optimization scheme, the model architecture to be modified and the target optimization measures corresponding to the optimization scheme are input into the modification model, and the modification model is prompted to execute the target optimization measures on the model architecture to be modified, so as to obtain the modified optimization architecture output by the modification model. The optimization architecture is also the optimization result corresponding to the optimization scheme.

[0109] Furthermore, the optimized architecture is input into the modified model, and the modified model is prompted to generate a network model corresponding to the optimized architecture; the obtained optimized architecture is trained with a preset training set until the preset training requirements are met to obtain a training result; wherein the training result represents the quality of the performance of the trained network model.

[0110] If it is determined in step 12 that there are at least two optimization solutions, the modified model is modified to obtain an optimization architecture for each optimization solution, and a corresponding network model is generated based on each optimization architecture; each network model is trained to obtain each trained network model. At this time, based on the training results of each network model, a network model with the best performance is determined from each network model, and the optimization architecture corresponding to the network model is used as the iteration architecture of the current round.

[0111] If it is determined in step 12 that there is only one optimization solution, the modified model is only modified for one optimization solution to obtain an optimization architecture, and only one network model is generated based on one optimization architecture; the network model is trained to obtain a trained network model, and the network model corresponds to the iterative architecture of the current round.

[0112] Step 16: When the current round is less than the preset round, mark the current round as the ended round, and execute the next round of iteration of the current round until the current round is the preset round, and determine that the iterative architecture in the current round is the target neural architecture corresponding to the design requirements.

[0113] For the embodiment of the present application, in one possible implementation, the preset round may be a fixed value, or may be set by the user before the first round begins.

[0114] In another achievable manner, the preset round is positively correlated with m; that is, the more optimization measures m determined before the first round, the larger the value of the preset round; the specific correspondence between the preset round and m is not specifically limited in the embodiments of the present application.

[0115] After the current round completes step 14, if it is determined that the current round is less than the preset round, the current round is marked as a completed round, and the iterative architecture determined in the current round is updated as a candidate architecture to the candidate architecture list, and the next round is executed based on the updated candidate list architecture. If the current round is determined to be the preset round, the current round is marked as completed, and the iterative architecture corresponding to the current round is used as the target neural architecture corresponding to the design requirements.

[0116] For the embodiment of the present application, the process of one iteration includes: determining m optimization measures from the experience library based on the design requirements, and using the analysis capability of the optimization model to determine at least one optimization scheme from the m optimization measures and the list of candidate architectures; using the modified model to execute each optimization scheme to obtain the corresponding optimization architecture, and generating a network model corresponding to each optimization architecture; training each network model through a training set, and determining the optimization architecture with the best performance as the iterative architecture of the current iteration round according to the training results.

[0117] The entire neural architecture design process involves multiple iterations, and the iterative architecture determined in each completed round is updated to the candidate architecture list, so that each iterative process does not completely depend on the iterative architecture obtained in the previous round of iterations, so that each round of iterative processes is independent, thus avoiding the impact of the initial wrong route selected in the early stage of design on the efficiency of subsequent iterations; and, compared with the limitations of designer experience, the solution of the present application uses the analytical ability of the optimization model to select the iterative solution in each iteration, so that the performance of the iterative architecture obtained in each round of iteration is better than that of the previous round; therefore, after finally meeting the preset iterative rounds, the determined iterative architecture is used as the target neural architecture of the design requirements, and a target neural architecture with better performance can be obtained.

[0118] Further, in step 12, when the optimization model is called to process the m optimization measures, the candidate architecture list, and the design requirements:

[0119] If n=1, then m optimization measures corresponding to the design requirements are obtained from the experience library, where n is the iteration round; then the optimization model is called to process the m optimization measures, the candidate architecture list, and the design requirements.

[0120] If n>1, it is determined that the optimization measures have been applied, and the applied optimization measures are eliminated from the m optimization measures to obtain the unapplied optimization measures. The applied optimization measures are the optimization measures in the optimization scheme of the ended round; then the optimization model is called to process the unapplied optimization measures, the candidate architecture list and the design requirements. That is, the optimization measures applied in the ended round will not be used in the subsequent iteration rounds, so as to avoid the optimization model output overlapping with the optimization scheme in the ended round, thereby avoiding the redundancy in the iteration process and further improving the efficiency of generating neural architectures.

[0121] In one embodiment, the experience database is updated every update period, referring to Figure 2 The specific process of updating the experience database includes steps 101 to 104, wherein:

[0122] Step 101: every update cycle, retrieve reference information from the target address, the reference information is source information with an update date later than the previous update cycle, and the source information at least includes papers, documents and blogs.

[0123] Specifically, the duration of the update cycle can be set by the user, for example, the duration of the update cycle can be one month or 15 days; in the embodiment of the present application, the specific duration of the update cycle is not specifically limited. The target address is a set address that can index the source information, for example, the target address can include a certain paper database and a certain professional forum; the specific type of the target address is not specifically limited in the embodiment of the present application, as long as the user meets the indexing and citation permissions for the source information in the target address. Specifically, each time the experience library is updated, it is only necessary to index the source information whose update date is later than the previous update cycle, and use the indexed source information as reference information.

[0124] Step 102: Obtain summary content of each reference information, and input the summary content of each reference information as the first information to be analyzed into the text analysis model to obtain a first analysis result output by the text analysis model, wherein the first analysis result includes target reference information associated with the design requirement.

[0125] Specifically, the text analysis model is a pre-trained LLM model (Large Language Model); for example, the text analysis model may be a ChatGPT 4.0 model; it is understandable that the text analysis model may also be a text analysis model of other versions, which is not specifically limited in the embodiments of the present application.

[0126] Since the source information may involve multiple fields, it is necessary to determine the reference information related to the neural architecture from the indexed reference information as the target reference information; wherein, the specific implementation method of determining the target reference information is: obtaining the summary content of each reference information, and constructing a Prompt template with the summary of each reference information as the first prompt template, and the first prompt template is the first information to be analyzed. The first information to be analyzed is input into the text analysis model, and the text analysis model is used to parse and understand natural language, so that the text analysis model determines the target reference information related to the neural architecture from the summary content of each reference information, and outputs the first analysis result; wherein, the first analysis result contains the identity characteristics of the target reference information, and the identity characteristics of the target reference information can be the index identifier corresponding to the target reference information in the target address.

[0127] Usually, the summary content summarizes the core content of the source information; therefore, the summary content can be used to more accurately determine whether a reference information is the target reference information related to the neural architecture; this method does not need to be judged based on the full text content of the reference information, thereby reducing the amount of data that needs to be passed to the text analysis model, and thus reducing the computational tasks of the text analysis model, thereby improving the efficiency of the analysis.

[0128] Step 103: Obtain the full text content of each target reference information, and input the full text content of each target reference information as the second information to be analyzed into the text analysis model to obtain a second analysis result output by the text analysis model, wherein the second analysis result includes at least one optimization measure;

[0129] Step 104: Update the experience database based on at least one optimization measure.

[0130] Furthermore, after determining the target reference information, the full text content of each target reference information is obtained, and a Prompt template is constructed from the full text content of each target reference information as a second prompt template, and the second prompt template is the second information to be analyzed. The second information to be analyzed is input into the text analysis model, and the text analysis model uses its ability to parse natural language and its ability to understand relevant knowledge in the field of neural networks to enable the text analysis model to obtain at least one optimization measure from the full text content of each target reference information. Then, the obtained at least one optimization measure is added to the experience library, thereby realizing an update of the experience library.

[0131] In one embodiment, in step 14, for each optimization solution, calling the modification model to perform the target optimization measures on the model architecture to be modified to obtain the optimized architecture, which may specifically include steps 1401 and 1402, referring to Figure 3 ,in:

[0132] 1401. Construct a Prompt template with the target optimization measures corresponding to the optimization scheme and the model architecture to be modified as the first modification template;

[0133] 1402. Input the first modification template into the modification model, so that the modification model executes target optimization measures on the model architecture to be modified to obtain an optimized architecture.

[0134] Among them, the model architecture is a directed acyclic graph (DAG) built based on the structure of the network model; therefore, the optimization architecture generated by the modified model based on the optimization solution is also a directed acyclic graph. The directed acyclic graph representation is composed of nodes (or vertices) and edges. A directed acyclic graph refers to a directed graph without loops. In a directed acyclic graph, each edge has a clear direction, pointing from one node to another, and the edge represents the connection relationship between nodes or the direction of data flow; the edges in the directed acyclic graph represent the flow path of data in the neural network and the connection relationship between neurons. In the field of neural architecture, in a directed acyclic graph, each node can represent a neuron, a feature, a state of a hidden layer, or a value of the output layer; nodes usually contain certain information or data, which are transmitted and processed through calculations in the network model.

[0135] Further, in step 14, after obtaining the optimized architecture and before generating the network model corresponding to the optimized architecture, steps 1403 and 1405 are also included, referring to Figure 4 ,in:

[0136] Step 1403: For each optimized architecture, call the verification model to verify the optimized architecture, obtain the verification results and modification measures output by the verification model, and classify the model architecture into a correct architecture and an incorrect architecture according to the verification results.

[0137] Specifically, the verification model can be a pre-trained normative verification model for directed acyclic graphs, or it can be a pre-trained LLM model (Large Language Model), such as the ChatGPT 4.0 model; the specific type of the verification model is not specifically limited in the embodiments of the present application.

[0138] Specifically, each optimized architecture (directed acyclic graph) generated by the modification model is input into the verification model, and the analysis and verification capabilities of the verification model are used to verify each optimized architecture to obtain a verification result, wherein the verification result represents the correctness of the optimized architecture. For a correct architecture, the verification model only outputs the verification result; for an incorrect architecture, the verification model also outputs the modification measures for the incorrect architecture.

[0139] Step 1404: call the modification model to execute modification measures on the error architecture, and obtain a modified architecture corresponding to the error architecture;

[0140] Step 1405: Generate network models corresponding to the modified architecture and the correct architecture.

[0141] Specifically, for the correct architecture, the modification model is directly used to generate a network model corresponding to the correct architecture; for the incorrect architecture, the incorrect architecture and the modification measures corresponding to the incorrect architecture are used to generate a Prompt template as a second modification template, and then the second modification template is input into the modification model, so that the modification model executes the modification measures on the incorrect architecture to obtain the modified architecture generated by the modification model; then the modification model is used to generate a network model corresponding to the modified architecture.

[0142] In one embodiment, in step 14, the network model is trained based on the training set, and the iterative architecture is determined from each optimized architecture according to the training result, which may specifically include steps 1406 and 1407. Figure 5 ,in:

[0143] Step 1406: training the network model based on the training set to obtain a trained network model;

[0144] Step 1407: Test the trained network model based on the test set, and determine the iterative architecture from the optimized architectures based on the test results. The iterative architecture is the optimized architecture corresponding to the network model with the best performance among the trained network models.

[0145] Specifically, the training results include test results, and the test results characterize the performance of the network model. It should be noted that the test results correspond to the design requirements. For example, if the design requirement is to improve the accuracy of target detection, the test results should also characterize the accuracy of target detection by the network model. Similarly, for different types of initial architectures, the corresponding test sets and verification sets are different. For example, for a network model whose initial architecture is for target detection, the training set can be multiple images with target candidate boxes; the training set is images without candidate boxes. For a speech recognition model, the test set can be multiple speech segments and the text content corresponding to each speech segment; the test set is a speech segment. For the case where its initial architecture is the architecture of other types of models, no examples are given one by one in the embodiments of this application.

[0146] After obtaining the test results of each trained network model, the network model with the best performance is selected as the iterative model for local iteration, and the optimization architecture corresponding to the iterative model is the iterative architecture. Through the solution of the embodiment of the present application, before the network model of the generated optimized architecture is trained, the optimized architecture can be structurally and data logically verified through the verification model to determine whether the optimized architecture is correct; thereby reducing the probability of errors in the generated network model, and thus, in the subsequent training and testing of the network model, the performance of the network model can be better verified, thereby facilitating the accurate determination of the iterative architecture with better performance.

[0147] In one embodiment, the verification model is a pre-trained LLM model (Large Language Model), which has the ability to analyze relevant knowledge in the field of neural architecture. In each iteration round, based on the test results of the iteration architecture and the directed acyclic graph of the iteration architecture, the summary measures of the current round are generated. The specific implementation steps are: in each round, the test results of the determined iteration architecture and the iteration architecture (directed acyclic graph) are used to construct a Prompt template as a summary template. The summary template is input into the verification model, and the analysis ability of the verification model on the relevant knowledge in the field of neural architecture is used to summarize the reasons why the performance of the iteration architecture is lower than that of the initial architecture, and the summary measures are output.

[0148] The network model corresponding to the initial architecture can be pre-trained with a training set, and the trained network architecture can be tested with a test set to obtain a test result of the network model corresponding to the initial architecture.

[0149] In one possible implementation, for each iteration round, the iteration architecture determined for the first time is the initial iteration architecture; the summary measures are used to modify the initial iteration architecture determined in the current round; that is, the summary measures and the initial iteration architecture are used to construct a Prompt template as a third modification template, so that the modification model executes the summary measures on the initial iteration architecture, thereby obtaining the target iteration architecture generated by the modification model, and the target iteration architecture is used as the iteration architecture finally determined in the corresponding round.

[0150] By adopting the embodiments of the present application, after determining the initial iterative architecture, the detection model's ability to understand relevant knowledge in the field of neural architecture can be used to analyze the reasons for the poor performance of the initial iterative architecture and provide summary measures; the modification model is then used to execute summary measures based on the initial iterative architecture to achieve the modification of the initial iterative architecture, thereby enabling the performance of the iterative architecture finally determined in each round to be better.

[0151] In another possible implementation, the summary measure is used to modify the model architecture to be modified in the next iteration round optimization scheme. For each iteration round (excluding the first round), the modification model is called to execute the target optimization measure and the summary measure determined in the previous round on the model architecture to be modified to obtain the optimized architecture.

[0152] By adopting the embodiments of the present application, after determining the iterative architecture, the detection model's ability to understand relevant knowledge in the field of neural architecture can be used to analyze the reasons for the poor performance of the iterative architecture and provide summary measures; in the next round of iterations, the modified model is used to execute summary measures based on the optimization plan determined in the next round, so that the performance of the optimized architecture determined in the next round is better.

[0153] In an exemplary embodiment, a neural architecture generation system is provided, referring to Figure 6 , wherein the neural architecture generation system may specifically include a text analysis model, an optimization model, a modification model, a verification model and a logic control unit.

[0154] In one of the embodiments, the functions of each model in the system are first described:

[0155] Agent 1 (text analysis model) is responsible for providing design experience (optimization measures). Agent 1 will first automatically crawl the latest papers in the target address, and then extract the text content in each paper (reference information) to obtain design experience (optimization measures); the specific implementation method is: Agent 1 (text analysis model) selects target papers (target reference information) related to neural architecture by reading the paper abstracts, and then Agent 1 (text analysis model) reads the full text of each target paper and summarizes the design experience (optimization measures) that can provide guidance for neural architecture design, and finally stores all the summarized experience in the experience library.

[0156] Agent 2 (optimization model) is responsible for proposing neural architecture design suggestions (optimization solutions). Agent 2 first retrieves 10 design experiences (optimization measures) from the experience library, and then selects design suggestions (optimization solutions) based on the neural architecture optimization tree (candidate architecture list: including multiple candidate architectures). The design suggestions include the model architecture to be modified and the target design experience (target optimization measures).

[0157] Agent 3 (modified model) is responsible for implementing the design recommendations. Agent 3 follows the design recommendations (optimization solution) output by Agent 2 to design a new neural architecture (optimized architecture) for training and update the neural architecture optimization tree.

[0158] Agent 4 (verification model) is responsible for providing guidance for the implementation process of Agent 3 (modification model). Agent 4 provides two types of guidance to Agent 3: (1) immediate feedback, which is to report errors in the neural architecture (optimization architecture) designed by Agent 3; (2) reflection on experience, where Agent 4 (verification model) tracks the operation process of Agent 3 (modification model), reflects on the reasons why it designed an incorrect neural architecture or a neural architecture with reduced efficiency, and summarizes the design experience (modification measures and / or summary measures) to guide Agent 3 (optimization plan) to better implement the design in the next step.

[0159] The data processing processes of the above-mentioned Agent 1, Agent 2, Agent 3 and Agent 4 all need to be configured to input corresponding question and answer templates (Prompt templates), so that the corresponding agents output corresponding results based on the input question and answer templates. In the neural architecture generation system of the embodiment of the present application, the generation of each question and answer template is realized by a logical control unit, and the generated question and answer template is input into the corresponding agent at each node, thereby realizing the transmission and processing of data between each agent.

[0160] Furthermore, in one of the embodiments, the specific implementation steps of each model are described in detail:

[0161] A text analysis model is used to retrieve reference information from a target address every update cycle, where the reference information is source information with an update date later than the previous update cycle, and the source information includes at least papers, documents, and blogs; obtain the summary content of each reference information, and input the summary content of each reference information into the text analysis model as the first information to be analyzed, to obtain a first analysis result output by the text analysis model, and the first analysis result includes target reference information associated with the design requirements; obtain the full text content of each target reference information, and input the full text content of each target reference information into the text analysis model as the second information to be analyzed, to obtain a second analysis result output by the text analysis model, and the second analysis result includes at least one optimization measure; based on the at least one optimization measure, the experience library is updated.

[0162] Specifically, the logic control unit generates a Prompt template as the first prompt template, and inputs the first prompt template into the text analysis model. An example of the first prompt template is shown in Table (1):

[0163] Table (1):

[0164]

[0165] After the text analysis model selects the target reference information related to the neural architecture design, the logic control unit generates a Prompt template as the second prompt template, and inputs the second prompt template into the text analysis model, wherein an example of the second prompt template is shown in Table (2).

[0166] Table (2):

[0167]

[0168] The optimization model is used to process m optimization measures, candidate architecture lists, and design requirements in the current round and output at least one optimization solution, wherein the optimization solution includes the target optimization measures and the model architecture to be modified; wherein the candidate architecture list includes the initial model architecture and the iterative architecture determined in each completed round, the optimization measures are determined from the experience library based on the design requirements, and m is greater than 2.

[0169] The logic control unit generates a Prompt template as a question-answer template input to the optimization model, and obtains an optimization solution output by the optimization model, wherein an example of the question-answer template input to the optimization model is shown in Table (3).

[0170] Table (3):

[0171]

[0172] Modify the model. For each optimization scheme, perform target optimization measures on the model architecture to be modified to obtain the optimized architecture, generate a network model corresponding to the optimized architecture, train the network model based on the training set, and determine the iterative architecture from each optimized architecture according to the training results.

[0173] The logic control unit generates a Prompt template as a first modification template, and inputs the first modification template into the modification model to obtain an optimized architecture generated by the modification model; wherein an example of the first modification template is shown in Table (4).

[0174] Table (4):

[0175]

[0176] Furthermore, in one round, the modification model may be called multiple times to modify the model architecture, thereby generating a modified model architecture. Each time the modification model is called, a modification template, such as a second modification template or a third modification template, needs to be input. The format of each modification template is the same as the example of the first modification template, but the content in the corresponding template needs to be generated based on the actual situation; this will not be repeated in the embodiments of the present application.

[0177] The network model corresponding to the initial architecture can be pre-trained with a training set, and the trained network architecture can be tested with a test set to obtain the test results of the network model corresponding to the initial architecture. The detection model generates a Prompt template as a summary template based on the test results of the network model corresponding to the initial architecture, the test results of the iterative architecture, and the directed acyclic graph of the iterative architecture. The summary template is then input into the modification model to obtain the summary measures output by the modified model; an example of the summary template is shown in Table (5).

[0178] Table (5):

[0179]

[0180] The logic control unit is also used to mark the current round as a ended round when the current round is less than the preset round, and execute the next round of iteration of the current round, until the current round is the preset round, and determine that the iterative architecture in the current round is the target neural architecture corresponding to the design requirements.

[0181] It should be understood that, although the steps in the flowcharts involved in the above embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above embodiments may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0182] Based on the same inventive concept, the embodiment of the present application also provides a neural architecture generation device for implementing the neural architecture generation method involved above. The implementation scheme for solving the problem provided by the device is similar to the implementation scheme recorded in the above method, so the specific limitations in one or more neural architecture generation device embodiments provided below can refer to the limitations of the neural architecture generation method above, and will not be repeated here.

[0183] In an exemplary embodiment, Figure 7 As shown, a neural architecture generation device is provided, the device includes an optimization module 701, a modification module 702 and a loop control module 703, wherein:

[0184] The optimization module 701 is used to call the optimization model to process m optimization measures, the candidate architecture list and the design requirements to obtain at least one optimization solution output by the optimization model, wherein the optimization solution includes the target optimization measure and the model architecture to be modified; wherein the candidate architecture list includes the initial model architecture and the iterative architecture determined in each completed round, the optimization measure is determined from the experience library based on the design requirements, and m is greater than 2.

[0185] The modification module 702 is used to call the modification model to perform target optimization measures on the model architecture to be modified for each optimization scheme, obtain the optimized architecture, and generate a network model corresponding to the optimized architecture, train the network model based on the training set, and determine the iterative architecture from each optimized architecture according to the training results.

[0186] The loop control module 703 is used to mark the current round as a ended round when the current round is less than the preset round, and execute the next round of iteration of the current round until the current round is the preset round, and determine that the iterative architecture in the current round is the target neural architecture corresponding to the design requirements.

[0187] The neural architecture generation device in the embodiment of the present application performs an iterative process including: determining m optimization measures from the experience library based on the design requirements, and using the analysis capability of the optimization model to determine at least one optimization scheme from the m optimization measures and the candidate architecture list; using the modified model to execute each optimization scheme to obtain the corresponding optimization architecture and generate a network model corresponding to each optimization architecture; training each network model through the training set, thereby determining the optimization architecture with the best performance as the iterative architecture of the current iteration round according to the training results; in the entire neural architecture design process, multiple iterations are involved, and each iterative architecture determined in the completed round is updated to the candidate architecture. In the architecture selection list, each iteration process does not completely rely on the iterative architecture obtained in the previous round of iterations, so that each round of iteration processes is independent, thus avoiding the impact of the initial wrong route selected in the early design stage on the efficiency of subsequent iterations; and, compared with the limitations of designer experience, the solution of the present application uses the analytical ability of the optimization model to select the iteration scheme in each iteration, so that the performance of the iterative architecture obtained in each round of iteration is better than that of the previous round; therefore, after finally meeting the preset iteration rounds, the determined iterative architecture is used as the target neural architecture of the design requirements, and a target neural architecture with better performance can be obtained.

[0188] In one embodiment, when the optimization module 701 calls the optimization model to process the m optimization measures, the candidate architecture list, and the design requirements, it is specifically used to:

[0189] When n=1, m optimization measures corresponding to the design requirements are obtained from the experience database, where the experience database is updated every update cycle; n is the iteration round;

[0190] The optimization model is called to process the m optimization measures, the candidate architecture list, and the design requirements.

[0191] In one embodiment, when the optimization module 701 calls the optimization model to process the m optimization measures, the candidate architecture list, and the design requirements, it is specifically used to:

[0192] When n>1, it is determined that the optimization measures have been applied, and the applied optimization measures are eliminated from the m optimization measures to obtain the unapplied optimization measures. The applied optimization measures are the optimization measures in the optimization scheme of the finished round;

[0193] The optimization model is invoked to process the unapplied optimization measures, the candidate architecture list, and the design requirements.

[0194] In one embodiment, the neural architecture generation device further includes an experience library update module, and the experience library update module is specifically used to:

[0195] At each update cycle, reference information is retrieved from the target address, and the reference information is source information with an update date later than the previous update cycle, and the source information at least includes papers, documents and blogs;

[0196] Obtaining summary content of each reference information, and inputting the summary content of each reference information as first information to be analyzed into a text analysis model to obtain a first analysis result output by the text analysis model, wherein the first analysis result includes target reference information associated with the design requirement;

[0197] Acquire the full text content of each target reference information, and input the full text content of each target reference information as the second information to be analyzed into the text analysis model to obtain a second analysis result output by the text analysis model, wherein the second analysis result includes at least one optimization measure;

[0198] Based on at least one optimization measure, the experience database is updated.

[0199] In one embodiment, when the modification module 702 generates the network model corresponding to the optimization architecture, it is specifically used to:

[0200] For each optimized architecture, the verification model is called to verify the optimized architecture, the verification results and modification measures output by the verification model are obtained, and the model architecture is classified into a correct architecture and an incorrect architecture according to the verification results;

[0201] Call the modification model to perform modification measures on the error architecture and obtain the modified architecture corresponding to the error architecture;

[0202] Generate network models corresponding to the modified architecture and the correct architecture.

[0203] In one embodiment, the neural architecture generation device further includes a list updating module, and the list updating module is specifically used to:

[0204] For each round of iterative architecture, a directed acyclic graph of the iterative architecture is generated;

[0205] Store the directed acyclic graph of the iterated architecture into the candidate architecture list.

[0206] In one embodiment, the neural architecture generation device further includes a summary measure module, which is specifically used to:

[0207] In the current round, summary measures of the current round are generated based on the test results of the iteration architecture and the directed acyclic graph of the iteration architecture.

[0208] In one embodiment, when the modification module 702 calls the optimization model to perform target optimization measures on the model architecture to be modified to obtain the optimized architecture, it is specifically used to:

[0209] Call the modified model to execute the target optimization measures and the summary measures of the previous round on the model architecture to be modified to obtain the optimized architecture.

[0210] In one embodiment, the training result includes a test result, and the modification module 702 trains the network model based on the training set, and when determining the iterative architecture from each optimized architecture according to the training result, is specifically used to:

[0211] Train the network model based on the training set to obtain a trained network model;

[0212] The trained network model is tested based on the test set, and the iterative architecture is determined from each optimized architecture based on the test results. The iterative architecture is the optimized architecture corresponding to the network model with the best performance among the trained network models.

[0213] Each module in the above neural architecture generation device can be implemented in whole or in part by software, hardware, or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute the operations corresponding to each module.

[0214] In an exemplary embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as shown in FIG. Figure 8As shown. The computer device includes a processor, a memory, an input / output interface, a communication interface, a display unit and an input device. Among them, the processor, the memory and the input / output interface are connected through a system bus, and the communication interface, the display unit and the input device are connected to the system bus through the input / output interface. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and the external device. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be implemented through WIFI, a mobile cellular network, NFC (near field communication) or other technologies. When the computer program is executed by the processor, a neural architecture generation method is implemented. The display unit of the computer device is used to form a visually visible picture, which can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device can be a touch layer covering the display screen, or a button, trackball or touchpad set on the computer device shell, or an external keyboard, touchpad or mouse.

[0215] Those skilled in the art will understand that Figure 8 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0216] In an exemplary embodiment, a computer device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, any program step disclosed in the above-mentioned neural architecture generation method embodiment is implemented.

[0217] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, any program step disclosed in the above-mentioned neural architecture generation method embodiment is implemented.

[0218] In one embodiment, a computer program product is provided, including a computer program, which, when executed by a processor, implements any program step disclosed in the above-mentioned neural architecture generation method embodiment.

[0219] The above description of various embodiments tends to emphasize the differences between the various embodiments. The same or similar aspects can be referenced to each other, and for the sake of brevity, they will not be repeated herein.

[0220] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant regulations.

[0221] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., but are not limited to this.

[0222] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0223] The above embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A neural architecture generation method, characterized in that: The method comprises: In the current round, the optimization model is called to process m optimization measures, the candidate architecture list and the design requirements to obtain at least one optimization solution output by the optimization model, wherein the optimization solution includes a target optimization measure and a model architecture to be modified; wherein the candidate architecture list includes an initial model architecture and an iterative architecture determined in each completed round, the optimization measure is determined from an experience library based on the design requirements, and m is greater than 2; For each of the optimization schemes, calling the modification model to execute the target optimization measures on the model architecture to be modified, obtaining an optimized architecture, generating a network model corresponding to the optimized architecture, training the network model based on a training set, and determining an iterative architecture from each of the optimized architectures according to the training results; When the current round is less than the preset round, the current round is marked as a ended round, and the next round of iteration of the current round is executed until the current round is the preset round, and the iterative architecture in the current round is determined to be the target neural architecture corresponding to the design requirement.

2. The method according to claim 1, characterized in that The calling optimization model processes the m optimization measures, the candidate architecture list, and the design requirements, including: When n=1, m optimization measures corresponding to the design requirements are obtained from the experience database, wherein the experience database is updated every update cycle; n is the iteration round; The optimization model is called to process the m optimization measures, the candidate architecture list and the design requirements.

3. The method according to claim 2, characterized in that The calling optimization model processes the optimization measures, the candidate architecture list, and the design requirements, including: When n>1, it is determined that the optimization measures have been applied, and the applied optimization measures are eliminated from the m optimization measures to obtain non-applied optimization measures, wherein the applied optimization measures are the optimization measures in the optimization scheme of the finished round; The optimization model is called to process the unapplied optimization measures, the candidate architecture list, and the design requirements.

4. The method according to claim 2, characterized in that: The updating of the experience database at every update period includes: At each update cycle, reference information is retrieved from the target address, where the reference information is source information updated later than the last update cycle, and the source information includes at least papers, documents, and blogs; Obtaining summary content of each of the reference information, and inputting the summary content of each of the reference information as first information to be analyzed into a text analysis model to obtain a first analysis result output by the text analysis model, wherein the first analysis result includes target reference information associated with the design requirement; Acquire the full text content of each target reference information, and input the full text content of each target reference information as the second information to be analyzed into the text analysis model to obtain a second analysis result output by the text analysis model, wherein the second analysis result includes at least one optimization measure; Based on the at least one optimization measure, the experience database is updated.

5. The method according to any one of claims 1 to 4, characterized in that: The generating a network model corresponding to the optimized architecture includes: For each of the optimized architectures, calling a verification model to verify the optimized architecture, obtaining a verification result and a modification measure output by the verification model, and classifying the model architecture into a correct architecture and an incorrect architecture according to the verification result; Calling the modification model to execute the modification measure on the erroneous architecture to obtain a modified architecture corresponding to the erroneous architecture; Generate network models corresponding to the modified architecture and the correct architecture respectively.

6. The method according to claim 5, characterized in that The method further comprises: For each round of iterative architecture, generating a directed acyclic graph of the iterative architecture; The directed acyclic graph of the iterative architecture is stored in the candidate architecture list.

7. The method according to claim 6, characterized in that The method further comprises: In a current round, summary measures of the current round are generated based on the test results of the iterative architecture and the directed acyclic graph of the iterative architecture.

8. The method according to claim 7, characterized in that The calling optimization model executes the target optimization measure on the model architecture to be modified to obtain the optimized architecture, including: The modification model is called to execute the target optimization measures and the summary measures of the previous round on the model architecture to be modified to obtain an optimized architecture.

9. The method according to any one of claims 6 to 8, characterized in that: The training result includes a test result, and the network model is trained based on the training set, and an iterative architecture is determined from each of the optimized architectures according to the training result, including: Training the network model based on the training set to obtain a trained network model; The trained network model is tested based on the test set, and an iterative architecture is determined from each of the optimized architectures based on the test result, wherein the iterative architecture is the optimized architecture corresponding to the network model with the best performance among the trained network models.

10. A neural architecture generation device, characterized in that: The device comprises an optimization module, a modification module and a loop control module, wherein: An optimization module, used to call the optimization model to process m optimization measures, the candidate architecture list and the design requirements, and obtain at least one optimization solution output by the optimization model, wherein the optimization solution includes a target optimization measure and a model architecture to be modified; wherein the candidate architecture list includes an initial model architecture and an iterative architecture determined in each completed round, the optimization measure is determined from an experience library based on the design requirements, and m is greater than 2; A modification module, for each of the optimization schemes, calling a modification model to execute the target optimization measures on the model architecture to be modified, obtaining an optimized architecture, generating a network model corresponding to the optimized architecture, training the network model based on a training set, and determining an iterative architecture from each of the optimized architectures according to the training results; A loop control module is used to mark the current round as a ended round when the current round is less than the preset round, and execute the next round of iteration of the current round until the current round is the preset round, and determine that the iterative architecture in the current round is the target neural architecture corresponding to the design requirement.

11. A neural architecture generation system, characterized in that: The system comprises an optimization model, a modification model and a logic control unit, wherein: An optimization model, in the current round, for processing m optimization measures, a candidate architecture list, and a design requirement and outputting at least one optimization solution, wherein the optimization solution includes a target optimization measure and a model architecture to be modified; wherein the candidate architecture list includes an initial model architecture and an iterative architecture determined in each completed round, the optimization measure is determined from an experience library based on the design requirement, and m is greater than 2; Modifying the model, for each of the optimization schemes, executing the target optimization measures on the model architecture to be modified to obtain an optimized architecture, generating a network model corresponding to the optimized architecture, training the network model based on a training set, and determining an iterative architecture from each of the optimized architectures according to the training results; A logic control unit is used to mark the current round as a ended round when the current round is less than a preset round, and execute the next round of iteration of the current round, until the current round is the preset round, and determine that the iterative architecture in the current round is the target neural architecture corresponding to the design requirement.

12. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 9 are implemented.

13. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 9 are implemented.

14. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 9 are implemented.

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