Wafer storage device
By designing a wafer storage device that includes an airtight container, a carrier and an elastic airbag, the problem of fragile substrates during the transportation and processing of large-size packaged wafers is solved, and the risk of substrate fragmentation and handling costs are reduced.
Patent Information
- Application Number
- CN202310910355.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-24
- Publication Date
- 2025-01-24
AI Technical Summary
During the transportation and processing of large-sized packaged wafers, the packaged wafer substrate is fragile due to gravity, vibration and friction, and the prior art is difficult to effectively solve this problem.
A wafer storage device is designed, which includes an airtight container, a carrier and at least one first elastic air bag. The carrier plate on the carrier frame includes a receiving groove and a positioning part, and the first elastic airbag is limited to the positioning part. When the accommodating space is evacuated to form a negative pressure environment, the volume of the first elastic air bag increases and directly abuts the packaged chip, reducing the risk of the substrate being broken.
Through this device, even during the transportation and processing of large-size packaged wafers, the risk of packaged wafers being broken can be effectively reduced, thereby reducing the handling cost of packaged wafers.
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Figure CN119361490A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a storage device, in particular to a wafer storage device. Background Art
[0002] Generally speaking, since large-sized packaged chips are heavy, during the transportation / handling of a large number of packaged chips, gravity, vibration and friction between the packaged chips often exert pressure on the substrate of the packaged chips, thereby increasing the risk of the substrate of the packaged chips being broken.
[0003] It can be seen that the above technology still has inconveniences and defects, and needs to be further improved. Therefore, how to effectively solve the above inconveniences and defects is one of the current important research and development topics, and has also become a goal that urgently needs to be improved in the current related fields. Summary of the invention
[0004] An object of the present invention is to provide a wafer storage device to solve the difficulties mentioned in the above prior art.
[0005] One embodiment of the present invention provides a chip storage device. The chip storage device includes an airtight container, a carrier and at least one first elastic airbag. The carrier includes a first carrier. The first carrier includes a first plate body, at least one first receiving groove and at least one positioning portion. The first receiving groove is formed on a top surface of the first plate body for receiving a first packaged chip. The positioning portion is located in the first receiving groove. The first elastic airbag is limited on the positioning portion. The airtight container has a receiving space. The carrier and the first elastic airbag are completely located in the receiving space. Therefore, when the receiving space is evacuated to become a negative pressure environment, the volume of the first elastic airbag increases, so that the first elastic airbag directly abuts against the first packaged chip in the first receiving groove.
[0006] According to one or more embodiments of the present invention, in the above-mentioned wafer storage device, the carrier further includes at least one cover plate and at least one elastic body. The cover plate removably covers the first packaged wafer. The elastic body is fixed to a side of the cover plate facing the first packaged wafer. The first packaged wafer is used to be sandwiched between the elastic body and the first elastic airbag.
[0007] According to one or more embodiments of the present invention, in the above-mentioned wafer storage device, the cover plate is completely located in the first receiving groove, or the cover plate covers the top surface of the first tray and the first receiving groove.
[0008] According to one or more embodiments of the present invention, in the wafer storage device, the carrier further includes a second carrier. The second carrier includes a second tray, at least one second receiving groove and at least one through portion. The second tray is stacked on the top surface of the first tray and covers the first receiving groove. The second receiving groove is formed on the top surface of the second tray to receive a second packaged wafer. The through portion passes through the second receiving groove and is respectively connected to the bottom of the second receiving groove and the bottom surface of the second tray.
[0009] According to one or more embodiments of the present invention, the wafer storage device further comprises at least one second elastic airbag, at least one third elastic airbag and at least one connecting portion. A portion of the second elastic airbag is located in the penetration portion, and another portion thereof extends from the penetration portion into the second receiving groove. A portion of the third elastic airbag is located in the penetration portion, and another portion thereof extends from the penetration portion to the bottom surface of the second disk body. The connecting portion directly connects the second elastic airbag and the third elastic airbag. When the receiving space is evacuated to become a negative pressure environment, the volumes of the second elastic airbag and the third elastic airbag increase, so that the second elastic airbag directly abuts against the second packaged wafer in the second receiving groove, and the third elastic airbag directly abuts against the cover plate in the first receiving groove.
[0010] According to one or more embodiments of the present invention, in the wafer storage device, the elastic body is one of a solid sphere and an elastic air bag.
[0011] According to one or more embodiments of the present invention, in the wafer storage device, the bottom of the first receiving slot includes a plurality of corner portions, and the positioning portion includes a plurality of positioning portions, and the positioning portions are respectively located on the corner portions.
[0012] According to one or more embodiments of the present invention, in the wafer storage device, the positioning portion is a groove. Before the accommodation space becomes a negative pressure environment, the first elastic airbag is completely located in the groove.
[0013] According to one or more embodiments of the present invention, in the wafer storage device, the airtight container is one of a soft airtight bag and a hard box.
[0014] According to one or more embodiments of the present invention, in the wafer storage device described above, a surface of the first elastic airbag is coated with an electrostatic discharge layer.
[0015] One embodiment of the present invention provides a wafer storage device. The wafer storage device includes an airtight container, a carrier and at least one buffer. The airtight container includes a storage space. The carrier includes a plurality of carriers. These carriers are stacked on top of each other and are completely located in the storage space. Each carrier includes a tray body, at least one storage groove, at least one penetration portion and at least one cover plate. The storage groove is formed on the top surface of the tray body for accommodating a packaged wafer. The penetration portion is located at the bottom of the storage groove, and includes a first groove and a second groove connected to each other. The first groove is connected to the storage groove, and the second groove is formed on the bottom surface of the tray body, and the cover plate removably covers the packaged wafer. The buffer includes a first elastic airbag and a second elastic airbag connected to each other. The first elastic airbag is limited to the first groove of one of the carriers, and the second elastic airbag is limited to the second groove of the carrier. Therefore, when the accommodating space is evacuated to form a negative pressure environment, the volumes of the first elastic airbag and the second elastic airbag increase, so that the first elastic airbag directly abuts against the packaged wafer in the carrier, and the second elastic airbag directly abuts against the cover plate of another carrier.
[0016] According to one or more embodiments of the present invention, in the above-mentioned wafer storage device, the carrier further comprises at least one elastic body. The elastic body is fixed to a side of the cover plate facing the packaged wafer. The packaged wafer is sandwiched between the elastic body and the first elastic airbag.
[0017] According to one or more embodiments of the present invention, in the wafer storage device, the elastic body is one of a solid sphere and an elastic air bag.
[0018] According to one or more embodiments of the present invention, in the above-mentioned wafer storage device, the cover plate is completely located in the receiving groove, or the cover plate covers the top surface of the tray body and the receiving groove.
[0019] According to one or more embodiments of the present invention, in the above-mentioned wafer storage device, the second elastic airbag is directly connected to the first elastic airbag via a connecting portion.
[0020] According to one or more embodiments of the present invention, in the wafer storage device described above, the bottom of the accommodating groove includes a plurality of corner portions, the through portion includes a plurality of through portions, and the through portions are respectively located on the corner portions.
[0021] According to one or more embodiments of the present invention, in the wafer storage device described above, before the accommodation space becomes a negative pressure environment, the first elastic airbag is completely located in the first groove, and the second elastic airbag is completely located in the second groove.
[0022] According to one or more embodiments of the present invention, in the wafer storage device, the airtight container is one of a soft airtight bag and a hard box.
[0023] According to one or more embodiments of the present invention, in the wafer storage device, a surface of the first elastic airbag and a surface of the second elastic airbag are respectively coated with an electrostatic discharge layer.
[0024] Thus, through the above structure, even in the transportation / handling process of large-sized packaged chips, the present invention can still reduce the risk of packaged chips being broken, thereby reducing the transportation cost of the packaged chips.
[0025] The above description is only used to illustrate the problems to be solved by the present invention, the technical means to solve the problems, and the effects produced, etc. The specific details of the present invention will be introduced in detail in the following implementation methods and related drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] In order to make the above and other objects, features, advantages and embodiments of the present invention more clearly understood, the accompanying drawings are described as follows:
[0027] Figure 1 A top view of a wafer storage device according to an embodiment of the present invention;
[0028] Figure 2 for Figure 1 A partial cross-sectional view of the wafer storage device along line segment AA;
[0029] Figure 3A and Figure 3B They are Figure 2 A schematic diagram of continuous operation of a wafer storage device;
[0030] Figure 4A and Figure 4B They are respectively schematic diagrams of continuous operation of a local area of a wafer storage device according to an embodiment of the present invention;
[0031] Figure 5A and Figure 5B They are respectively schematic diagrams of continuous operation of a local area of a wafer storage device according to an embodiment of the present invention;
[0032] Fig. 6A and Figure 6B They are schematic diagrams of continuous operations of a local area of a wafer storage device according to an embodiment of the present invention.
[0033]
Explanation of symbols
[0034] 10: Wafer storage device
[0035] 100,101:Carrying frame
[0036] 200: First loading plate
[0037] 210: First Plate
[0038] 211: Top
[0039] 212: Bottom
[0040] 220: first receiving tank
[0041] 221: Bottom of the groove
[0042] 222: Corner
[0043] 230: Positioning unit
[0044] 300: Second carrier
[0045] 310: Second Plate
[0046] 311: Top
[0047] 312: Bottom surface
[0048] 320: Second receiving slot
[0049] 321: Bottom of the groove
[0050] 330: penetration
[0051] 331: First groove
[0052] 332: Second groove
[0053] 333: Channel
[0054] 400: The third carrier
[0055] 510: first cover plate
[0056] 520: Elastomer
[0057] 530: Second cover
[0058] 540: Elastomer
[0059] 550: The third cover
[0060] 600: Airtight container
[0061] 610:Container body
[0062] 611: Accommodation Space
[0063] 620: Air extraction port
[0064] 700,700A,700B: First elastic airbag
[0065] 710: Electrostatic discharge layer
[0066] 720: Buffer
[0067] 721,721A: Second elastic airbag
[0068] 722,722A: Third elastic airbag
[0069] 723:Connection
[0070] 800: First packaging chip
[0071] 810:Substrate
[0072] 820: Grain
[0073] 830: Solder ball
[0074] 900: Second packaging chip
[0075] AA: Line segment
[0076] M1, M2, M3: local area DETAILED DESCRIPTION
[0077] The following will disclose multiple embodiments of the present invention with the accompanying drawings. For the purpose of clear description, many practical details will be described together in the following description. However, it should be understood that these practical details should not be used to limit the present invention. In other words, in each embodiment of the present invention, these practical details are not necessary. In addition, in order to simplify the drawings, some conventional structures and elements will be depicted in a simple schematic manner in the drawings.
[0078] Figure 1 FIG. 1 is a top view of a wafer storage device 10 according to an embodiment of the present invention. Figure 2 for Figure 1 A partial cross-sectional view of the wafer storage device along line segment AA. Figure 1 and Figure 2 As shown, in this embodiment, the wafer storage device 10 includes a carrier 100, an airtight container 600 and a plurality of first elastic airbags 700. The carrier 100 includes a first carrier 200. The first carrier 200 includes a first plate body 210 and a plurality of first receiving slots 220. The first plate body 210 includes a top surface 211 and a bottom surface 212 opposite to each other. The first receiving slots 220 are distributed on the top surface 211 of the first plate body 210. In this embodiment, the first receiving slots 220 are arranged on the top surface 211 of the first plate body 210 in an array. Each first receiving slot 220 is used to receive a first packaged wafer 800. For example, the first packaged wafer 800 includes a substrate 810, a die 820 and a solder ball 830. The solder ball 830 and the die 820 are respectively located on two opposite surfaces of the substrate 810, however, the present invention is not limited to the structure of the first packaged wafer 800. Each first receiving groove 220 further includes a plurality of positioning portions 230. More specifically, the positioning portions 230 are spaced apart and distributed on the groove bottom 221 of the first receiving groove 220. Each positioning portion 230 is used to limit a first elastic airbag 700.
[0079] The airtight container 600 has a accommodating space 611. The above-mentioned carrier 100 and the first elastic airbag 700 are completely accommodated in the accommodating space 611. More specifically, the airtight container 600 includes a container body 610 and an air suction port 620. The container body 610 has an accommodating space 611 sufficient to accommodate the above-mentioned carrier 100. The air suction port 620 is located on one side of the container body 610 and is connected to the accommodating space 611. The air suction port 620 serves as the air suction port 620 of the container body 610. When the air suction port 620 is closed, the accommodating space 611 is an airtight space. However, the present invention does not limit the airtight container 600 to have the air suction port 620.
[0080] Figure 3A and Figure 3B They are Figure 2 Schematic diagram of the continuous operation of the wafer storage device 10. Figure 3A and Figure 3B As shown, under the condition of constant temperature, when the airtight container 600 is drawn from the air outlet 620 ( Figure 1 ) is evacuated or vacuumed, so that the accommodating space 611 gradually changes from the standard air pressure (such as 760 mmHg) to a negative pressure environment (such as 160 mmHg), the first elastic airbag 700 gradually increases its volume in the negative pressure environment, and finally enables the enlarged first elastic airbag 700A to directly abut against and lift the substrate 810 of the first packaging chip 800, thereby allowing the first packaging chip 800 to stay away from the bottom 221 of the first accommodating groove 220, reducing the risk of wear of the substrate 810 of the first packaging chip 800.
[0081] It should be understood that the positioning portion 230 can limit the enlarged or unenlarged first elastic airbag 700. In this embodiment, each positioning portion 230 is, for example, a groove, however, the present invention is not limited thereto, and in other embodiments, the positioning portion 230 may also be a hook or a magnetic portion or other similar tool.
[0082] More specifically, if Figure 1 and Figure 3B As shown, the bottom 221 of the first receiving groove 220 is, for example, rectangular, and the bottom 221 of the first receiving groove 220 includes a plurality of (for example, four) corner portions 222. The positioning portions 230 are respectively located on the corner portions 222. In this way, the enlarged first elastic airbag 700A can lift the substrate 810 of the first packaged chip 800 in a balanced manner, so that the first packaged chip 800 is away from the bottom 221 of the first receiving groove 220.
[0083] In addition, the carrier 100 further includes a plurality of first cover plates 510. The first cover plates 510 are respectively removably covered on the first packaged chips 800. More specifically, each first cover plate 510 is completely located in one of the first receiving slots 220, removably covers the top of the corresponding first packaged chip 800 in each first receiving slot 220, and is disposed opposite to the slot bottom 221 in the first receiving slot 220. However, the present invention is not limited to considering the first cover plate 510 as a necessary element.
[0084] In addition, if Figure 2 As shown, the surfaces of the first elastic airbags 700 are respectively covered with an electrostatic discharge (ESD) layer 710. Figure 3B As shown, when the accommodating space 611 is evacuated to form a negative pressure environment, the electrostatic discharge layer 710 of each of the first elastic airbags 700A can discharge static electricity to the first packaging chip 800, thereby reducing the chance of the first packaging chip 800 being damaged by static electricity.
[0085] In this embodiment, the airtight container 600 is a soft airtight bag, such as an aluminum foil bag. However, the present invention is not limited thereto, and the airtight container 600 may also be a hard box or the like.
[0086] Figure 4A and Figure 4B They are schematic diagrams of continuous operation of a local area M1 of a wafer storage device according to an embodiment of the present invention. Figure 4A and Figure 4B As shown, the present embodiment is substantially the same as the wafer storage device 10 of the above-mentioned embodiment, and the difference is that each first cover plate 510 has a plurality of elastic bodies 520 on one side facing the first packaged wafer 800. These elastic bodies 520 are respectively fixed on the first cover plate 510 and are distributed on the first cover plate 510 at intervals. It should be understood that each elastic body 520 directly abuts against the substrate 810 of the first packaged wafer 800, so that the first packaged wafer 800 is sandwiched between the elastic body 520 and the first elastic airbag 700. For example, the elastic body 520 may be an elastic airbag similar to the above-mentioned first elastic airbag 700. However, the present invention is not limited thereto, and in other embodiments, the elastic body 520 may be a rubber pad, foam or solid sphere whose volume does not change with air pressure.
[0087] So, like Figure 4A and Figure 4BAs shown, when the accommodating space 611 gradually becomes the above-mentioned negative pressure environment, the elastomer 520 and the first elastic airbag 700 gradually increase their volumes, and eventually the first packaging chip 800 is directly clamped between the enlarged elastomer 520 and the enlarged first elastic airbag 700, thereby reducing the risk of the substrate 810 of the first packaging chip 800 being worn by the first cover plate 510.
[0088] In addition, if Figure 4A As shown, although each of the above-mentioned elastic airbags partially protrudes out of the corresponding groove, the present invention is not limited to this. In this embodiment, it is also possible to change the above-mentioned first elastic airbag 700B to be completely located in the corresponding positioning portion 230 before the accommodating space 611 becomes a negative pressure environment.
[0089] Figure 5A and Figure 5B They are schematic diagrams of continuous operation of a local area M2 of a wafer storage device according to an embodiment of the present invention. Figure 5A and Figure 5B As shown, the wafer storage device 10 of this embodiment is substantially the same as the wafer storage device 10 of the above embodiment, except that the wafer storage device 10 of this embodiment has a single second cover plate 530 to replace the above first cover plates 510 ( Figure 4A ). The second cover plate 530 covers the top surface 211 of the first plate body 210 and all the first receiving grooves 220. In addition, the second cover plate 530 has a plurality of elastic bodies 540. These elastic bodies 540 are respectively fixed to a side of the second cover plate 530 facing the first plate body 210, and these elastic bodies 540 are distributed on the second cover plate 530 at intervals.
[0090] It should be understood that each elastic body 540 extends into the first receiving groove 220 and directly abuts against the substrate 810 of the first packaged chip 800, so that the first packaged chip 800 is sandwiched between the elastic body 540 and the first elastic airbag 700. For example, the elastic body 540 is a rubber pad, foam or solid sphere whose volume does not change with air pressure. However, the present invention is not limited to this. In other embodiments, the elastic body 540 can be an elastic airbag similar to the first elastic airbag 700 described above.
[0091] So, like Figure 5A and Figure 5B As shown, when the accommodation space 611 gradually becomes the negative pressure environment, the first elastic airbag 700 gradually increases its volume, and finally the first packaged chip 800 is directly sandwiched between the elastic body 540 and the enlarged first elastic airbag 700A ( Figure 5B ), thereby reducing the risk of the substrate 810 of the first packaging chip 800 being worn by the second cover plate 530.
[0092] Fig. 6A and Figure 6B They are respectively schematic diagrams of continuous operation of a local area M3 of a wafer storage device according to an embodiment of the present invention. Figure 4A The embodiments are substantially the same, except that Fig. 6A and Figure 6B As shown, the carrier 101 further includes a second carrier 300 and a third carrier 400. The first carrier 200, the second carrier 300 and the third carrier 400 are stacked one on top of the other and are completely located in the receiving space 611. The second carrier 300 includes a second tray body 310, a plurality of second receiving slots 320 and a plurality of third cover plates 550. The second tray body 310 includes a top surface 311 and a bottom surface 312 that are opposite to each other.
[0093] More specifically, the second tray 310 is stacked on the first tray 210 so that the bottom surface 312 of the second tray 310 contacts the top surface 211 of the first tray 210 ( Figure 4A ), and the second tray 310 covers all the first receiving slots 220 of the first tray 210. The third carrier 400 is stacked on the top surface 311 of the second tray 310 and covers all the second receiving slots 320 of the second tray 310. These second receiving slots 320 are distributed on the top surface 311 of the second tray 310.
[0094] In the present embodiment, the second receiving slots 320 are arranged on the top surface 311 of the second tray 310 in an array. Each second receiving slot 320 is used to receive a second packaged chip 900. The second packaged chip 900 may be the same as or different from the first packaged chip 800. The third cover plate 550 removably covers the second packaged chip 900. The description of the third cover plate 550 is the same as that of the first cover plate 510, and the description of the third carrier 400 is the same as that of the second carrier 300, so they are not repeated here.
[0095] Each second receiving groove 320 further includes a plurality of through-portions 330. These through-portions 330 are spaced apart and distributed at the groove bottom 321 of the second receiving groove 320. For example, these through-portions 330 are respectively located at the corners of the groove bottom 321 of the second receiving groove 320 (refer to Figure 1The corner portion 222 of the second tray body 310). Each through portion 330 is used to limit a buffer member 720. In the present embodiment, each through portion 330 includes a first groove 331 and a second groove 332 connected to each other. The first groove 331 is connected to the corresponding second receiving groove 320, and the second groove 332 is formed on the bottom surface 312 of the second tray body 310 and faces the first receiving groove 220. The buffer member 720 includes a second elastic airbag 721 and a third elastic airbag 722 that are circumscribed to each other. The second elastic airbag 721 and the third elastic airbag 722 are independent airbags, and their interiors are not connected to each other. The second elastic airbag 721 is limited in the first groove 331 of the through portion 330 of the second carrier 300, and the third elastic airbag 722 is limited in the second groove 332 of the through portion 330 of the second carrier 300. The second plate body 310 further defines a channel 333 . The channel 333 is located between the first groove 331 and the second groove 332 , and connects the first groove 331 and the second groove 332 .
[0096] In addition, the second elastic airbag 721 is directly connected to the third elastic airbag 722 via a connecting portion 723, and the connecting portion 723 is located in the channel 333. Thus, since the connecting portion 723 directly connects the second elastic airbag 721 and the third elastic airbag 722 in the through portion 330, the enlarged second elastic airbag 721 and the enlarged third elastic airbag 722 will not be completely separated from the corresponding first groove 331 and the second groove 332.
[0097] In this way, when the above-mentioned accommodating space 611 is evacuated to become a negative pressure environment, the first elastic airbag 700, the second elastic airbag 721 and the third elastic airbag 722 gradually increase their volumes in the negative pressure environment, so that the enlarged second elastic airbag 721A can directly abut against and lift the second packaging chip 900 in the second carrier 300, and the enlarged third elastic airbag 722A can directly abut against and push down the first cover plate 510 of the first carrier 200, so that the first cover plate 510 and the first packaging chip 800 are tightly clamped together between the first elastic airbag 700 and the third elastic airbag 722.
[0098] It should be understood that in other embodiments, the positioning portion 230 and the first elastic airbag 700 on the first carrier 200 of this embodiment may also be replaced by the penetration portion 330 and the buffer member 720 according to needs or limitations.
[0099] Thus, through the above structure, even in the transportation / handling process of large-sized packaged chips, the present invention can still reduce the risk of packaged chips being broken, thereby reducing the transportation cost of the packaged chips.
[0100] Finally, the above disclosed embodiments are not intended to limit the present invention. Anyone skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, and all of them can be protected by the present invention. Therefore, the scope of protection of the present invention shall be determined by the definition of the attached claims.
Claims
1. A wafer storage device, characterized in that: Include: A carrier frame includes a first carrier plate, the first carrier plate includes a first plate body, at least one first receiving groove and at least one positioning portion, the first receiving groove is formed on a top surface of the first plate body for receiving a first packaged wafer, and the positioning portion is located in the first receiving groove; At least one first elastic airbag, limited on the positioning portion; and An airtight container has a containing space, and the supporting frame and the first elastic airbag are completely located in the containing space, When the accommodation space is evacuated to form a negative pressure environment, the volume of the first elastic airbag increases, so that the first elastic airbag directly abuts against the first packaged chip in the first accommodation groove.
2. The wafer storage device according to claim 1, wherein: The carrier frame also includes: at least one cover plate, removably covering the first packaged chip; and At least one elastic body is fixed to a side of the cover plate facing the first package chip, The first packaging chip is used to be sandwiched between the elastic body and the first elastic airbag.
3. The wafer storage device according to claim 2, wherein: wherein the cover plate is completely located in the first receiving groove; or The cover plate covers the top surface of the first disk and the first containing groove.
4. The wafer storage device according to claim 2, wherein: The carrier frame also includes: A second carrier includes a second tray body, at least one second receiving groove and at least one through portion. The second tray body is stacked on the top surface of the first tray body and covers the first receiving groove. The second receiving groove is formed on a top surface of the second tray body to receive a second packaged chip. The through portion passes through the second receiving groove and is respectively connected to the bottom of the second receiving groove and a bottom surface of the second tray body.
5. The wafer storage device according to claim 4, wherein: Also includes: At least one second elastic airbag, a portion of which is located in the through-hole, and another portion of which extends from the through-hole into the second accommodating groove; at least one third elastic airbag, a portion of which is located in the through-hole and another portion of which extends out from the through-hole to the bottom surface of the second disk; and At least one connecting portion directly connects the second elastic airbag and the third elastic airbag, When the accommodating space is evacuated to form the negative pressure environment, the volumes of the second elastic airbag and the third elastic airbag increase, so that the second elastic airbag directly abuts against the second packaging chip in the second accommodating groove, and the third elastic airbag directly abuts against the cover plate in the first accommodating groove.
6. The wafer storage device according to claim 2, wherein: The elastic body is one of a solid sphere and an elastic air bag.
7. The wafer storage device according to claim 1, wherein: A groove bottom of the first containing groove includes a plurality of corner portions, the positioning portion includes a plurality of positioning portions, and the plurality of positioning portions are respectively located on the plurality of corner portions.
8. The wafer storage device according to claim 1, wherein: The positioning portion is a groove, and before the accommodating space becomes the negative pressure environment, the first elastic airbag is completely located in the groove.
9. The wafer storage device according to claim 1, wherein: The airtight container is one of a soft airtight bag and a hard box.
10. The wafer storage device according to claim 1, wherein: The surface of the first elastic airbag is coated with an electrostatic discharge layer.
11. A wafer storage device, characterized in that: Include: An airtight container comprising a containing space; A carrier rack, comprising a plurality of carriers, the plurality of carriers are stacked and completely located in the accommodation space, each of the plurality of carriers comprises a plate body, at least one accommodation groove, at least one through portion and at least one cover plate, the accommodation groove is formed on a top surface of the plate body for accommodating a packaged chip, the through portion is located at the bottom of the accommodation groove and comprises a first groove and a second groove connected to each other, the first groove is connected to the accommodation groove, the second groove is formed on the bottom surface of the plate body, and the cover plate removably covers the packaged chip; and At least one buffer member includes a first elastic airbag and a second elastic airbag connected to each other, the first elastic airbag is limited to the first groove of one of the plurality of carriers, and the second elastic airbag is limited to the second groove of the one of the carriers, When the accommodating space is evacuated to form a negative pressure environment, the negative pressure environment increases the volume of the first elastic airbag and the second elastic airbag, so that the first elastic airbag directly abuts against the packaged chip in one of the carriers, and the second elastic airbag directly abuts against the cover plate of another of the multiple carriers.
12. The wafer storage device according to claim 11, wherein: The carrier frame also includes: At least one elastic body is fixed on a side of the cover plate facing the packaging chip, wherein the packaging chip is used to be sandwiched between the elastic body and the first elastic airbag.
13. The wafer storage device according to claim 12, wherein: The elastic body is one of a solid sphere and an elastic air bag.
14. The wafer storage device according to claim 11, wherein: wherein the cover plate is completely located in the receiving groove; or The cover plate covers the top surface of the disk body and the containing groove.
15. The wafer storage device according to claim 11, wherein: The second elastic airbag is directly connected to the first elastic airbag via a connecting portion.
16. The wafer storage device according to claim 11, wherein: A groove bottom of the accommodating groove includes a plurality of corner portions, the through portion includes a plurality of through portions, and the plurality of through portions are respectively located on the plurality of corner portions.
17. The wafer storage device according to claim 11, wherein: Before the accommodating space becomes the negative pressure environment, the first elastic airbag is completely located in the first groove, and the second elastic airbag is completely located in the second groove.
18. The wafer storage device according to claim 11, wherein: The airtight container is one of a soft airtight bag and a hard box.
19. The wafer storage device according to claim 11, wherein: The surface of the first elastic airbag and the surface of the second elastic airbag are respectively covered with an electrostatic discharge layer.