Boost type PFC circuit control method based on dual-bandwidth voltage loop control

Abstract

The invention relates to the technical field of power factor correction, and discloses a Boost type PFC circuit control method based on dual-bandwidth voltage loop control. Firstly, the voltage error and the current change rate of two state variables are monitored in real time; and then dividing the voltage loop bandwidth into a high bandwidth mode and a low bandwidth mode, then setting thresholds of a voltage error and a current change rate, and according to whether the voltage error and the current change rate exceed the thresholds or not or return to the thresholds, performing bandwidth switching in a self-adaptive manner by the system. And finally, delay switching is added, and bandwidth switching is performed only when the actual Tdelay meets switching conditions all the time within the delay time, otherwise, judgment is performed again.

Description

Technical Field

[0001] The present invention relates to the technical field of power factor correction, and in particular to a control method of a Boost type PFC circuit. Background Art

[0002] In power electronic equipment, power factor correction (PFC) technology has become a key means to improve power quality and equipment efficiency, and is widely used in industrial and consumer electronic products. However, while optimizing the input power factor, the PFC circuit must also ensure the stability and rapid response of the output voltage, which places higher requirements on the control method. Traditional PFC control methods usually adopt a single-bandwidth voltage loop design, but there are obvious limitations when facing actual complex working conditions, mainly reflected in the difficulty in balancing dynamic response and steady-state accuracy.

[0003] First, the bandwidth setting of the voltage loop in the PFC circuit directly affects the dynamic response and steady-state accuracy of the system. When the voltage loop bandwidth is high, the system can respond to input voltage changes faster under conditions such as startup or load mutation, quickly adjust the output voltage, and reduce voltage errors. However, this high bandwidth setting often introduces high-frequency jitter after the system enters steady state, affecting the stability of the output voltage and thus reducing steady-state accuracy. Therefore, in order to suppress jitter and improve steady-state accuracy, a lower voltage loop bandwidth is usually selected, but this will cause the system to have insufficient response speed under dynamic conditions, and there will be a lag in voltage adjustment, which cannot meet the rapidly changing load requirements.

[0004] Secondly, the actual operating environment of the PFC circuit is often complex and changeable, with frequent load fluctuations or sudden changes, which puts higher adaptability requirements on the voltage loop's regulation ability. The traditional single-bandwidth voltage loop design cannot adaptively adjust the bandwidth, and cannot take into account the dynamic response and steady-state performance under different working conditions, resulting in the system not being able to adjust in time when the load changes suddenly, and the accuracy is insufficient in steady state, making it difficult to meet the needs of different application scenarios. Therefore, how to design a voltage loop control method that adapts to both dynamic and steady-state requirements to improve the overall performance of the PFC circuit under complex working conditions has become a key technical problem in the current field. Summary of the invention

[0005] In view of the above problems, the present invention proposes a Boost-type PFC circuit control method based on dual-bandwidth voltage loop control to solve the contradiction between dynamic response and steady-state accuracy of traditional PFC control. The method designs an adaptive bandwidth switching strategy so that the voltage loop can automatically switch to a high-bandwidth mode under dynamic conditions to achieve rapid response; and switches to a low-bandwidth mode under steady-state conditions to suppress high-frequency jitter and improve the stability of the output voltage. Specifically, the control system of the present invention monitors the output voltage error and current change rate in real time, and determines the working state of the system by setting a threshold. If a large voltage error or a rapidly changing current is detected, the system enters a high-bandwidth mode to speed up the regulation speed; when the voltage error and the current change rate are small, the system switches to a low-bandwidth mode to ensure steady-state accuracy.

[0006] The technical solution adopted by the present invention to solve its technical problem is:

[0007] A Boost type PFC circuit control method based on dual bandwidth voltage loop control comprises the following steps:

[0008] Step 1: Real-time monitoring of state variables. The process is as follows:

[0009] The control system (such as MCU) monitors the two key parameters of output voltage error and inductor current change rate in real time to identify the current working state of the system. The output voltage error is used to measure the deviation between the actual output voltage and the target value, and the current change rate reflects the rapid change of the load. When the load changes suddenly or the system starts, the changes of these two parameters will be relatively drastic, while in steady-state conditions, the values ​​of both will tend to be stable. Therefore, by continuously monitoring these two indicators, it is possible to accurately determine whether the system is in a dynamic or steady-state condition.

[0010] Step 2: Bandwidth mode division, the process is as follows:

[0011] The present invention divides the control mode of the voltage loop into a high-bandwidth mode and a low-bandwidth mode, so as to realize adaptive adjustment of the bandwidth under different working conditions:

[0012] High bandwidth mode: When the system is in a dynamic condition (such as startup, load mutation), the output voltage error is large or the current change rate is high. At this time, the voltage loop switches to high bandwidth mode. The higher bandwidth enables the system to quickly adjust the output voltage, quickly track the set value, and reduce dynamic errors.

[0013] Low bandwidth mode: When the system enters a steady-state condition (such as a constant load and the output voltage is close to the target value), the output voltage error and current change rate tend to stabilize, and the system switches to low bandwidth mode. Low bandwidth helps suppress high-frequency jitter and improves the accuracy and stability of the steady-state voltage.

[0014] Step 3: Adaptive bandwidth switching strategy. The process is as follows:

[0015] The present invention designs an adaptive switching logic to realize automatic switching of the voltage loop bandwidth under different working conditions. The thresholds of voltage error and current change rate are set as the basis for switching between high bandwidth and low bandwidth modes. When the voltage error or current change rate exceeds the preset threshold, the system automatically switches to high bandwidth mode; when the voltage error and current change rate are both less than the preset value, the system switches to low bandwidth mode.

[0016] Step 4: Switch the delay mechanism. The process is as follows:

[0017] In order to avoid system instability caused by frequent switching, the present invention designs a delayed judgment mechanism. That is, when the system meets the switching conditions of high-bandwidth or low-bandwidth mode, the mode switching is performed only after the condition persists for a certain period of time to ensure the stability of the switching. The delayed judgment mechanism can effectively suppress the impact of rapid operating condition fluctuations on bandwidth switching and improve the robustness of the system.

[0018] Furthermore, in step 3, the voltage loop bandwidth adaptive switching strategy process is as follows:

[0019] 3.1) First, according to the performance requirements of the system, two key thresholds are set: the output voltage error threshold and the current change rate threshold. These thresholds are used to determine the current working condition of the system and are the conditions for determining bandwidth switching. When the output voltage error exceeds the output voltage error threshold, the system is identified as being in a dynamic working condition. When the current change rate exceeds the current change rate threshold, it means that the load changes rapidly and the system is also in a dynamic working condition.

[0020] 3.2) The system monitors the output voltage error and current change rate in real time. Once any value exceeds the preset threshold (output voltage error threshold or current change rate threshold), the system determines that it is currently in a dynamic condition and switches to high-bandwidth mode. At this time, the control bandwidth of the voltage loop increases, enhancing the system's response speed to voltage and current changes, enabling the system to quickly adjust the output voltage, reduce voltage errors, and adapt to rapidly changing load requirements.

[0021] 3.3) When the system gradually approaches a steady state, the output voltage approaches the set value and the load changes slightly, the output voltage error and current change rate will be lower than the set threshold (output voltage error threshold or current change rate threshold). In this case, the system determines that it has entered a steady state and switches to a low bandwidth mode. The low bandwidth mode reduces the voltage loop response speed, thereby reducing steady-state high-frequency jitter and improving the stability and accuracy of the output voltage.

[0022] Furthermore, in step 4, the switching delay mechanism process is as follows:

[0023] 4.1) According to the dynamic response requirements of the system, set a delay time T delay This time is the shortest time that the control system needs to maintain the state after the switching conditions are met. The setting of the delay time needs to strike a balance between fast response and jitter suppression. It is generally set to several milliseconds to ensure the reliability of the switching.

[0024] 4.2) The system continuously monitors the output voltage error and current change rate. When any parameter is detected to exceed the preset threshold (such as the voltage error exceeds the set value or the current change rate is large), the bandwidth mode is not switched immediately, but the timer is started to enter the delay judgment stage. Only when the system meets the switching condition and the state is maintained until T delay The system switches bandwidth mode only when

[0025] 4.3) If during the delay time T delay The internal system state remains unchanged, and when the switching conditions of high bandwidth or low bandwidth are met, the system will perform bandwidth switching and switch the voltage loop to the corresponding mode. This ensures that the system will not trigger bandwidth switching under frequent fluctuations or short-term disturbances, avoiding the instability caused by switching.

[0026] 4.4) If the system state changes during the delay time and no longer meets the switching condition (such as the output voltage error or current change rate returns to the threshold range), the timer is reset, the system cancels the current switching judgment and maintains the current bandwidth mode. Only when the next state meets the condition again and lasts for T delay The switching mechanism will be retriggered only when

[0027] The design idea of ​​the present invention is as follows: First, the two state variables voltage error and current change rate are monitored in real time. Then the voltage loop bandwidth is divided into two modes of high and low bandwidth. Then the thresholds of voltage error and current change rate are set. Then, according to whether the threshold is exceeded or returned, the system adaptively switches the bandwidth. Finally, a delay is added to switch the actual T delay Bandwidth switching is performed only if the switching conditions are met within the delay time, otherwise the decision will be made again.

[0028] The beneficial effects of the present invention are: (1) faster dynamic response, the system can quickly adjust the voltage under dynamic conditions; (2) improved steady-state accuracy, switching to low-bandwidth mode in steady state to reduce voltage ripple; (3) delayed switching mechanism effectively avoids instability caused by frequent switching; (4) adaptive bandwidth design enhances the system's ability to adapt to complex conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 This is the topology diagram of the Boost PFC circuit. In the figure, L is the inductor, S is the switch tube, D is the diode, and C is the capacitor.

[0030] Figure 2 It is the dual bandwidth voltage loop control flow chart. DETAILED DESCRIPTION

[0031] The present invention is further described below.

[0032] A Boost type PFC circuit control method based on dual bandwidth voltage loop control comprises the following steps:

[0033] Step 1: Real-time monitoring of state variables. The process is as follows:

[0034] In this embodiment, refer to Figure 1 , the output voltage of Boost PFC is V out , the voltage reference value is V ref , so V err =V ref -V out , the inductor current is i L , the inductor current change rate is di L / dt. By continuously monitoring these two indicators, it is possible to accurately determine whether the system is in a dynamic or steady-state condition. The output voltage error is used to measure the degree of deviation between the actual output voltage and the target value, and the current change rate reflects the rapid change of the load. When the load changes suddenly or the system starts, the changes of these two parameters will be relatively drastic, while in a steady-state condition, the values ​​of the two will tend to be stable.

[0035] Step 2: Bandwidth mode division, the process is as follows:

[0036] In the division of bandwidth modes, the present invention designs two modes, high bandwidth and low bandwidth, to adapt to different requirements under dynamic and steady-state conditions. In this embodiment, the specific settings are as follows:

[0037] 2.1) The goal of high bandwidth mode is to improve the system's response speed to voltage deviations, and quickly adjust the output voltage to the set value under dynamic conditions with sudden load changes or significant voltage deviations. In this mode, the bandwidth frequency is set to 10Hz, which is suitable for the system's rapid response requirements under dynamic conditions. With a higher bandwidth, the system can detect and adjust the output voltage more quickly, shorten the response time, and reduce dynamic errors.

[0038] 2.2) The goal of low bandwidth mode is to reduce high-frequency jitter in steady state and improve the steady-state accuracy of output voltage. When the system reaches steady state and maintains a stable load, switch to low bandwidth mode to reduce the frequency range and suppress high-frequency noise. The low bandwidth frequency is set to 1Hz or lower. Low bandwidth mode not only reduces jitter caused by high-frequency components, but also improves the stability of steady-state output.

[0039] Step 3: Adaptive bandwidth switching strategy and switching delay mechanism. The process is as follows:

[0040] 3.1) In this embodiment, refer to Figure 2 The controller determines whether the system is in a dynamic state based on the real-time monitoring results. If the voltage error V err Exceeds the voltage error threshold V th Or the current change rate (di / dt) exceeds ((di / dt) th ), the system determines that the current working condition is dynamic and is ready to switch to high-bandwidth mode, but the delay condition must be met; if both do not exceed the threshold, it will remain in low-bandwidth mode.

[0041] 3.2) After the dynamic working condition is met, the controller will not switch the bandwidth immediately, but start the delay timer. If the dynamic working condition persists and exceeds the set delay time T delay , the controller switches to high-bandwidth mode; if the conditions change during the delay time, the voltage error and current change rate return to within the threshold, the timer is reset, and the system remains in low-bandwidth mode to avoid frequent bandwidth switching.

[0042] 3.3) The system always executes the above steps in a loop during operation to ensure that the bandwidth is dynamically adjusted according to different working conditions, so that the control strategy can respond quickly under dynamic conditions and maintain accurate output under steady state. Specific embodiment:

[0044] based on Figure 1 As shown in the circuit topology diagram, the parameters are set as follows: input voltage is 220V, frequency is 50Hz, boost inductor is 1mH, capacitor is 2000μF, load resistance is 64Ω, switch frequency is 65kHz, and output voltage reference value is 400V.

[0045] Combination Figure 2 Voltage loop control flow chart, threshold setting: voltage error threshold V th Set to 5% of the reference value (i.e. 20V), the current change rate threshold (di / dt) th Set to 0.1A / s; Delay setting: No delay when switching to high bandwidth mode, T delay Set to 0 to switch to low bandwidth mode. delay Set to 100ms.

[0046] This specific embodiment uses MCU (such as TI's C2000 series) to implement real-time monitoring, switching strategy and delay link modules. The real-time monitoring module includes the ADC module and registers in the MCU, and completes the sampling of voltage and current by configuring the ADC channel to connect to the voltage divider circuit and the current sampling circuit, and performs conversion calculations in the CPU to obtain the voltage error and current change rate. The switching strategy and delay link modules include a logic judgment program, a timer module and registers, and are implemented by software code running inside the CPU.

[0047] The contents described in the embodiments of this specification are merely enumerations of implementation forms of the inventive concept and are for illustrative purposes only. The protection scope of the present invention should not be considered to be limited to the specific forms described in this embodiment, and the protection scope of the present invention also extends to equivalent technical means that can be thought of by ordinary technicians in this field based on the inventive concept.

Claims

1. A Boost type PFC circuit control method based on dual bandwidth voltage loop control, characterized in that: The following steps are involved: Step 1: Real-time monitoring of state variables. The process is as follows: The current working state of the system can be identified by real-time monitoring of the output voltage error and the inductor current change rate. The output voltage error is used to measure the deviation between the actual output voltage and the target value, and the current change rate reflects the rapid change of the load. Step 2: Bandwidth mode division, the process is as follows: The control mode of the voltage loop is divided into high-bandwidth mode and low-bandwidth mode to achieve adaptive adjustment of bandwidth under different working conditions: High-bandwidth mode: When the system is in dynamic working condition, the voltage loop switches to high-bandwidth mode, enabling the system to quickly adjust the output voltage, quickly track the set value, and reduce dynamic errors; The dynamic working conditions include system startup or load mutation; Low bandwidth mode: When the system enters a steady-state condition, the voltage loop switches to a low bandwidth mode. Low bandwidth helps suppress high-frequency jitter and improves the accuracy and stability of the steady-state voltage. The steady-state condition includes a constant load or an output voltage close to the target value. Step 3: Adaptive bandwidth switching strategy. The process is as follows: Set the thresholds of voltage error and current change rate as the basis for switching between high-bandwidth and low-bandwidth modes; when the voltage error or current change rate exceeds the preset threshold, the system automatically switches to high-bandwidth mode; when the voltage error and current change rate are both less than the preset value, the system switches to low-bandwidth mode; Step 4: Switch the delay mechanism. The process is as follows: When the system meets the switching conditions of high-bandwidth or low-bandwidth mode, the mode will be switched after a set period of time to ensure the stability of the switching.

2. The Boost PFC circuit control method based on dual-bandwidth voltage loop control according to claim 1, characterized in that: In step 3, the voltage loop bandwidth adaptive switching strategy process is as follows: 3.1) First, according to the performance requirements of the system, the output voltage error threshold and the current change rate threshold are set; when the output voltage error exceeds the output voltage error threshold, the system is identified as being in a dynamic working condition; When the current change rate exceeds the current change rate threshold, it means that the load changes rapidly and the system is in a dynamic condition; 3.2) The system monitors the output voltage error and current change rate in real time. If any value exceeds the preset threshold, the system determines that it is currently in a dynamic working condition and switches to a high-bandwidth mode. The control bandwidth of the voltage loop is increased, which enhances the system's response speed to voltage and current changes, enabling the system to quickly adjust the output voltage, reduce voltage errors, and adapt to rapidly changing load requirements. 3.3) When the system gradually approaches a steady state, the output voltage error and current change rate will be lower than the set threshold value. The system judges that it has entered a steady state condition and the voltage loop switches to a low-bandwidth mode. The low-bandwidth mode reduces the voltage loop response speed, thereby reducing steady-state high-frequency jitter and improving the stability and accuracy of the output voltage.

3. The Boost PFC circuit control method based on dual-bandwidth voltage loop control according to claim 1, characterized in that: In step 4, the switching delay mechanism process is as follows: 4.1) According to the dynamic response requirements of the system, set a delay time T delay ; The delay time is the shortest time the control system needs to maintain the state after the switching conditions are met; 4.2) The system continuously monitors the output voltage error and current change rate; when any parameter is detected to exceed the preset threshold, the timer is started and the delay judgment phase is entered; when the system meets the switching condition, the state is maintained until T delay The system will switch the bandwidth mode only when 4.3) If the delay time T delay The internal system state remains unchanged. When the high bandwidth or low bandwidth switching conditions are met, the system will perform bandwidth switching and switch the voltage loop to the corresponding mode. 4.4) If the system status changes during the delay time and no longer meets the switching conditions, the timer is reset, the system cancels the current switching judgment and maintains the current bandwidth mode; the next time the status meets the conditions again and lasts for T delay The switching mechanism will be retriggered only when

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