Equipment clock synchronization method and device, computer program product and electronic equipment

Abstract

The invention discloses an equipment clock synchronization method and device, a computer program product and electronic equipment. Relates to the technical field of engineering or other related fields, and the method comprises the steps: obtaining M devices arranged in a pipe gallery, determining a host device and M-1 slave devices from the M devices, and connecting the host device with the M-1 slave devices to obtain a device looped network; controlling a host device in the device ring network to perform clock synchronization processing on each slave device to obtain M-1 synchronized slave devices; receiving pulse signals of the host device and the M-1 synchronized slave devices to obtain M pulse signals; and calculating (M-1) clock errors according to the M pulse signals, and when each clock error is less than or equal to an error threshold, ending the clock synchronization operation. According to the invention, the problems of low synchronization efficiency and low synchronization accuracy during clock synchronization of the equipment in the pipe gallery in the prior art are solved.

Description

Technical Field

[0001] The present application relates to the field of engineering technology or other related fields, and in particular, to a method, apparatus, computer program product and electronic device for synchronizing a device clock. Background Art

[0002] With the acceleration of urbanization, urban integrated pipe corridors are increasingly used as a kind of urban infrastructure. By centrally arranging various pipelines such as power, communication, water supply and drainage, and gas underground, the pipe corridor realizes the unified management and maintenance of these pipelines, thereby improving the operation efficiency and safety of the city. However, the complex environment of the pipe corridor puts higher requirements on the real-time monitoring and fault diagnosis of pipelines. The operation status monitoring and fault diagnosis of power cables and other pipelines in the pipe corridor are important means to ensure their safe and efficient operation. The traditional monitoring method mainly relies on manual inspection, which is not only inefficient, but also unable to realize real-time monitoring of pipelines in the pipe corridor. In addition, it is limited by the frequency and scope of manual inspection, and it is impossible to obtain the operation status data in the pipe corridor in real time. For this reason, the automatic monitoring and fault diagnosis system is introduced to improve the monitoring efficiency and accuracy.

[0003] Clock synchronization, as the basis of automated monitoring systems, ensures that data between different devices can be collected and analyzed under a unified time reference, thereby improving the accuracy and reliability of the system. However, in the special environment of the tunnel, traditional clock synchronization technologies such as the network time protocol and the global positioning system synchronization system face multiple problems, and the underground environment has an electromagnetic shielding effect, which makes it impossible to use the above synchronization technologies normally: the precision time protocol (IEEE 1588PTP) based on the traditional star network is limited to the operating environment, and the switching equipment cannot be deployed normally. In the complex network environment of the tunnel, the network delay and uncertainty are large, which will affect the time synchronization accuracy. Since the protocol is sensitive to electromagnetic interference, it is easy to be interfered with, resulting in a decrease in time synchronization accuracy; the network time protocol can usually provide millisecond-level synchronization accuracy, but the monitoring system of the tunnel has higher requirements for time synchronization accuracy, and the network time protocol is difficult to meet the microsecond-level synchronization requirements. In addition, the tunnel environment is complex and the network conditions are unstable. The network time protocol is prone to time drift when the network fluctuates greatly, resulting in unstable time synchronization. The protocol is sensitive to network delay, and in a multi-hop network environment, the accuracy of its time synchronization will be significantly affected; the global positioning system signal is difficult to penetrate the ground, resulting in unstable or unreceivable signal reception, and a high-precision synchronization system needs to be configured with highly sensitive antennas and receiving equipment, which are expensive and increase the overall cost of the system.

[0004] In view of the problems of low synchronization efficiency and low synchronization accuracy when performing clock synchronization on equipment in a pipe gallery in the related technology, no effective solution has been proposed so far. Summary of the invention

[0005] The main purpose of the present application is to provide a method, device, computer program product and electronic device for synchronizing the device clock, so as to solve the problems of low synchronization efficiency and low synchronization accuracy when synchronizing the clock of the equipment in the pipe gallery in the related technology.

[0006] In order to achieve the above-mentioned purpose, according to one aspect of the present application, a method for synchronizing a device clock is provided. The method includes: obtaining M devices set in the corridor, determining a host device and M-1 slave devices from the M devices, connecting the host device and the M-1 slave devices to obtain a device ring network, wherein M is a positive integer; controlling the host device in the device ring network to perform clock synchronization processing on each slave device to obtain M-1 synchronized slave devices; receiving pulse signals from the host device and the M-1 synchronized slave devices to obtain M pulse signals, wherein the M pulse signals include a host pulse signal and M-1 slave pulse signals; calculating M-1 clock errors according to the M pulse signals, and ending the clock synchronization operation when each clock error is less than or equal to the error threshold.

[0007] Furthermore, the host device and M-1 slave devices are connected to obtain a device ring network, including: obtaining communication interfaces of the host device and M-1 slave devices to obtain M groups of communication interfaces, wherein each group of communication interfaces includes a first communication interface and a second communication interface; sorting the M-1 slave devices to obtain a device sequence; for the i-th slave device in the device sequence, connecting the first communication interface of the i-th slave device with the second communication interface of the i-1-th slave device, and connecting the second communication interface of the i-th slave device with the first communication interface of the i+1-th slave device, wherein i is a positive integer greater than or equal to two; connecting the first communication interface of the host device with the first communication interface of the first slave device in the device sequence, and connecting the second communication interface of the host device with the second communication interface of the M-1-th slave device in the device sequence to obtain a device ring network.

[0008] Further, the host device in the control device ring network performs clock synchronization processing on each slave device, including: for a slave device, controlling the host device to send a clock synchronization request message to the slave device, and recording the sending time of the host device to obtain a first time; generating a follow-up message according to the first time, and after the host device sends the clock synchronization request message to the slave device, controlling the host device to send a follow-up message to the slave device; in the case where the slave device receives the clock synchronization request message, recording the receiving time of the slave device to obtain a second time; in the case where the slave device receives the follow-up message, generating a delay request message according to the follow-up message, controlling the slave device to send a delay request message to the host device, and recording the sending time of the slave device to obtain a third time; in the case where the host device receives the delay request message, recording the receiving time of the host device to obtain a fourth time; calculating the path delay data of each slave device according to the first time of each slave device, the second time of each slave device, the third time of each slave device and the fourth time of each slave device, and obtaining M-1 synchronized slave devices based on the path delay data configuration of each slave device.

[0009] Furthermore, calculating the path delay data of each slave device according to the first moment of each slave device, the second moment of each slave device, the third moment of each slave device and the fourth moment of each slave device includes: for a slave device, calculating the difference between the second moment of the slave device and the first moment of the slave device to obtain a first difference, and calculating the difference between the fourth moment of the slave device and the third moment of the slave device to obtain a second difference; calculating the sum of the first difference and the second difference to obtain moment sum data, calculating the ratio of the moment sum data to a preset parameter to obtain the path delay data of the slave device.

[0010] Furthermore, based on the path delay data configuration of each slave device, M-1 synchronized slave devices are obtained, including: for one slave device, controlling the host device to send a time query message to the slave device, and recording the receiving time of the slave device when the slave device receives the time query message to obtain a first receiving time; generating a time message according to the first receiving time, controlling the slave device to send a time message to the host device, and recording the receiving time of the host device when the host device receives the time message to obtain a second receiving time; calculating the difference between the second receiving time and the first receiving time to obtain a third difference, calculating the difference between the third difference and the path delay data to obtain the time deviation data of the slave device; configuring each slave device according to each time deviation data to obtain M-1 synchronized slave devices.

[0011] Furthermore, each slave device is configured according to each time deviation data to obtain M-1 synchronized slave devices, including: calculating the mean of the time deviation data of the M-1 slave devices to obtain the deviation time period; updating the timing device associated with each slave device with the deviation time period to obtain M-1 synchronized slave devices.

[0012] Furthermore, the communication interface of each slave device includes a first switch and a second switch, and the method also includes: when each slave device receives a follow-up message, turning on the second switch and executing the step of generating a delay request message according to the follow-up message, wherein the first switch is used to reject the message sent by the host device, and the second switch is used to respond to the message sent by the host device.

[0013] In order to achieve the above-mentioned purpose, according to another aspect of the present application, a device for synchronizing the clock of an equipment is provided. The device includes: an acquisition unit, which is used to acquire M devices set in the corridor, determine a host device and M-1 slave devices from the M devices, connect the host device and the M-1 slave devices to obtain a device ring network, wherein M is a positive integer; a control unit, which is used to control the host device in the device ring network to perform clock synchronization processing on each slave device to obtain M-1 synchronized slave devices; a receiving unit, which is used to receive pulse signals from the host device and the M-1 synchronized slave devices to obtain M pulse signals, wherein the M pulse signals include a host pulse signal and M-1 slave pulse signals; a calculation unit, which is used to calculate M-1 clock errors according to the M pulse signals, and when each clock error is less than or equal to the error threshold, the clock synchronization operation is terminated.

[0014] According to another aspect of an embodiment of the present invention, a computer storage medium is provided. The computer storage medium is used to store a program. When the program is executed, the device where the computer storage medium is located is controlled to execute a method for synchronizing a device clock.

[0015] According to another aspect of an embodiment of the present invention, an electronic device is provided, comprising one or more processors and a memory; the memory stores computer-readable instructions, and the processor is used to execute the computer-readable instructions, wherein a method for synchronizing a device clock is executed when the computer-readable instructions are executed.

[0016] According to another aspect of an embodiment of the present invention, a computer program product is provided, including a computer program. When the computer program is executed by a processor, a method for synchronizing a device clock is executed.

[0017] Through the present application, the following steps are adopted: obtain M devices set in the corridor, determine a host device and M-1 slave devices from the M devices, connect the host device and the M-1 slave devices to obtain a device ring network, where M is a positive integer; control the host device in the device ring network to perform clock synchronization processing on each slave device to obtain M-1 synchronized slave devices; receive pulse signals from the host device and the M-1 synchronized slave devices to obtain M pulse signals, where the M pulse signals include a host pulse signal and M-1 slave pulse signals; calculate according to the M pulse signals M-1 clock errors, when each clock error is less than or equal to the error threshold, the clock synchronization operation is terminated, which solves the problems of low synchronization efficiency and low synchronization accuracy in the clock synchronization of equipment in the tunnel in the related technology. By determining the host device and slave device in the tunnel, the host device is used to perform clock synchronization processing on each slave device, and then the clock is checked through the pulse signal of the host device and the synchronized slave device. When each clock error is less than or equal to the error threshold, the clock synchronization operation is terminated, thereby achieving the effect of improving the efficiency and accuracy of the clock of the synchronization device. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0019] Figure 1 is a flowchart of a method for synchronizing a device clock according to an embodiment of the present application;

[0020] Figure 2 is a schematic diagram of a method for constructing a device ring network according to an embodiment of the present application;

[0021] Figure 3 It is a schematic diagram of a message transmission method provided according to an embodiment of the present application;

[0022] Figure 4 The following is a schematic diagram of an optional device clock synchronization method provided in accordance with an embodiment of the present application. Figure 1 ;

[0023] Figure 5 The following is a schematic diagram of an optional device clock synchronization method provided in accordance with an embodiment of the present application. Figure 2 ;

[0024] Figure 6 is a schematic diagram of a device clock synchronization apparatus provided according to an embodiment of the present application;

[0025] Figure 7 is a schematic diagram of an electronic device provided according to an embodiment of the present application. DETAILED DESCRIPTION

[0026] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0027] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0028] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0029] It should be noted that the relevant information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for display, data for analysis, etc.) involved in this disclosure are all information and data authorized by the user or fully authorized by all parties. For example, an interface is set between this system and the relevant user or organization. Before obtaining relevant information, it is necessary to send an acquisition request to the aforementioned user or organization through the interface, and obtain relevant information after receiving the consent information fed back by the aforementioned user or organization.

[0030] It should be noted that the collected information used in this application is information and data authorized by the user or fully authorized by all parties, and the collection, storage, use, processing, transmission, provision, disclosure and application of the relevant data comply with the relevant laws, regulations and standards of the relevant regions, take necessary confidentiality measures, do not violate public order and good morals, and provide corresponding operation entrances for users to choose to authorize or refuse to use it.

[0031] The present invention is described below in conjunction with preferred implementation steps. Figure 1is a flowchart of a method for synchronizing a device clock according to an embodiment of the present application, such as Figure 1 As shown, the method comprises the following steps:

[0032] Step S101, obtain M devices set in the corridor, determine a host device and M-1 slave devices from the M devices, connect the host device and the M-1 slave devices to obtain a device ring network, where M is a positive integer.

[0033] Specifically, the pipeline gallery may be an underground pipeline gallery, in which a variety of pipelines are arranged, for example, power cables, communication optical cables, water supply and drainage pipelines, gas pipelines, etc. are arranged. In order to conduct safety inspections on the underground pipeline gallery, it is first necessary to synchronize the clocks of the devices in the underground pipeline gallery. Therefore, after obtaining multiple devices associated with the underground pipeline gallery, one device may be randomly selected as the host device, and the remaining devices may be used as slave devices. The host device and the slave device may be fixed in a polling manner to form a half-duplex data link ring network, that is, a device ring network is obtained.

[0034] Step S102: The master device in the control device ring network performs clock synchronization processing on each slave device to obtain M-1 synchronized slave devices.

[0035] Specifically, after the host device and all slave devices form a device ring network, the host device can be used to synchronize the clock of each slave device. At this time, the delay between the host device and the slave device can be calculated, and then the clock of the slave device can be adjusted based on the delay data, that is, the synchronized slave device is obtained.

[0036] Step S103, receiving pulse signals from the host device and M-1 synchronized slave devices to obtain M pulse signals, wherein the M pulse signals include one host pulse signal and M-1 slave pulse signals.

[0037] Specifically, the pulse signal can be a 1PPS clock pulse signal, that is, a clock signal that sends out a pulse signal every second. After all slave devices are clock synchronized based on the host device, in order to determine the effect of synchronization, these devices can be clock-checked. At this time, the pulse signals output by the host device and the above-mentioned synchronized slave devices through the GPIO interface can be collected, and then these pulse signals can be analyzed using an oscilloscope to determine the synchronization effect. Among them, the GPIO (General Purpose Input / Output) interface is a digital input / output interface used to connect the communication between external devices and microprocessors. Signals can be input to the microprocessor or output from the microprocessor through the GPIO interface to achieve interaction with external devices.

[0038] Step S104, calculating M-1 clock errors according to the M pulse signals, and ending the clock synchronization operation when each clock error is less than or equal to an error threshold.

[0039] Specifically, when using an oscilloscope for analysis, the error of the pulse signal of the slave device can be calculated separately according to the pulse signal of the host device to obtain multiple clock errors. If the values ​​of all clock errors are less than or equal to the set error threshold, it means that the purpose of clock synchronization has been achieved and the clock synchronization operation can be terminated; on the contrary, if there are one or more clock errors greater than the error threshold, the clock synchronization operation needs to be performed again.

[0040] The device clock synchronization method provided in the embodiment of the present application obtains M devices set in the corridor, determines a host device and M-1 slave devices from the M devices, connects the host device and the M-1 slave devices to obtain a device ring network, wherein M is a positive integer; controls the host device in the device ring network to perform clock synchronization processing on each slave device to obtain M-1 synchronized slave devices; receives pulse signals from the host device and the M-1 synchronized slave devices to obtain M pulse signals, wherein the M pulse signals include a host pulse signal and M-1 slave pulse signals; according to the M pulse signals The signal calculates M-1 clock errors, and when each clock error is less than or equal to the error threshold, the clock synchronization operation is terminated, which solves the problems of low synchronization efficiency and low synchronization accuracy in the clock synchronization of equipment in the tunnel in the related technology. By determining the host device and slave devices in the tunnel, the host device is used to perform clock synchronization processing on each slave device, and then the clock is checked through the pulse signal of the host device and the synchronized slave device. When each clock error is less than or equal to the error threshold, the clock synchronization operation is terminated, thereby achieving the effect of improving the efficiency and accuracy of the clock of the synchronization device.

[0041] Before performing clock synchronization, it is necessary to use a host device and a slave device to build a device ring network. Optionally, in the device clock synchronization method provided in an embodiment of the present application, the host device and M-1 slave devices are connected to obtain a device ring network, including: obtaining communication interfaces of the host device and M-1 slave devices to obtain M groups of communication interfaces, wherein each group of communication interfaces includes a first communication interface and a second communication interface; sorting the M-1 slave devices to obtain a device sequence; for the i-th slave device in the device sequence, connecting the first communication interface of the i-th slave device to the second communication interface of the i-1-th slave device, and connecting the second communication interface of the i-th slave device to the first communication interface of the i+1-th slave device, wherein i is a positive integer greater than or equal to two; connecting the first communication interface of the host device to the first communication interface of the first slave device in the device sequence, and connecting the second communication interface of the host device to the second communication interface of the M-1-th slave device in the device sequence to obtain a device ring network.

[0042] When building a device ring network, you can first obtain the communication interfaces of the randomly selected host device and the remaining slave devices, and then use the communication interfaces to connect the ring network. Figure 2 is a schematic diagram of a method for constructing a device ring network according to an embodiment of the present application, such as Figure 2 As shown, for example, if the underground pipe gallery includes four devices, one device is randomly selected as the host device, and the remaining three devices are used as slave devices. When connecting them, the three slave devices can be sorted first, and the first communication interface of the second slave device in the device sequence is connected to the second communication interface of the first slave device, and the second communication interface of the second slave device is connected to the first communication interface of the last slave device, and then the first communication interface of the host device is connected to the first communication interface of the first slave device, and the second communication interface of the host device is connected to the second communication interface of the last slave device, so as to obtain a device ring network. This embodiment can effectively avoid the disadvantage that each slave device must be connected to the switch by connecting each device in sequence, and can also reduce the construction difficulty and system construction and maintenance costs.

[0043] The device clock can be implemented based on message transmission. Optionally, in the device clock synchronization method provided in the embodiment of the present application, the host device in the device ring network is controlled to perform clock synchronization processing on each slave device, including: for a slave device, controlling the host device to send a clock synchronization request message to the slave device, and recording the sending time of the host device to obtain a first time; generating a follow-up message according to the first time, and after the host device sends a clock synchronization request message to the slave device, controlling the host device to send a follow-up message to the slave device; in the case where the slave device receives the clock synchronization request message, recording the receiving time of the slave device to obtain a first time. second moment; when the slave device receives the follow message, a delay request message is generated according to the follow message, the slave device is controlled to send the delay request message to the host device, and the sending time of the slave device is recorded to obtain a third moment; when the host device receives the delay request message, the receiving time of the host device is recorded to obtain a fourth moment; according to the first moment of each slave device, the second moment of each slave device, the third moment of each slave device and the fourth moment of each slave device, the path delay data of each slave device is calculated, and M-1 synchronized slave devices are obtained based on the path delay data configuration of each slave device.

[0044] Specifically, after the devices in the pipe corridor are connected to obtain a device ring network, clock synchronization operations can be performed based on the host device in the device ring network. At this time, a polling method can be used to fix the positions of the host device and the slave device, thereby forming a half-duplex data link communication path for clock synchronization. It should be noted that when performing clock synchronization, the PTP time synchronization protocol can be used for operation. The PTP protocol (Precision Time Protocol) is a protocol for achieving high-precision time synchronization in computer networks. It can provide dedicated timing hardware and hardware-level timestamps for each port based on a symmetric network link, and achieve sub-microsecond accuracy.

[0045] When performing clock synchronization operations, the messages between the master and slave devices can be transmitted and analyzed, and corrected with the local clock. The master device generates a message and transmits it to the slave device. The slave device extracts the timestamp information of the message and then corrects the local clock. Specifically, Figure 3 is a schematic diagram of a message transmission method provided in an embodiment of the present application, such as Figure 3 As shown, firstly, the host device is controlled to send a clock synchronization request message to a communication interface of a slave device through a communication interface, and the sending time of the host device is recorded to obtain a first time t1. After the host device sends the clock synchronization request message, a follow-up message is generated based on the timestamp information of the first time, and then the host device sends the follow-up message to the slave device.

[0046] In the case where the slave device receives the clock synchronization request message from the host device, the second moment t2 when the slave device receives the message is recorded. After the slave device receives the follow-up message, the slave device generates a delay request message according to the follow-up message, and the communication interface of the slave device sends the delay request message to the communication interface of the host device, and records the sending time of the slave device to obtain the third moment t3. The host device receives the delay request message and records the receiving time to obtain the fourth moment t4. Finally, the path delay data can be calculated according to t1 to t4, and then the path delay data is used to adjust the clock of the slave device to obtain the synchronized slave device. This embodiment can not only meet the requirements of improving accuracy, but also improve the reliability of the system of the pipe gallery by using multiple receiving messages and sending messages to adjust the clock.

[0047] Optionally, in the device clock synchronization method provided in an embodiment of the present application, the path delay data of each slave device is calculated according to the first moment of each slave device, the second moment of each slave device, the third moment of each slave device and the fourth moment of each slave device, including: for a slave device, calculating the difference between the second moment of the slave device and the first moment of the slave device to obtain a first difference, and calculating the difference between the fourth moment of the slave device and the third moment of the slave device to obtain a second difference; calculating the sum of the first difference and the second difference to obtain the moment sum data, calculating the ratio of the moment sum data to a preset parameter, and obtaining the path delay data of the slave device.

[0048] Specifically, since different devices have time errors when transmitting messages, the path delay data can be calculated based on multiple moments. Since the second moment t2 refers to the moment when the slave device receives the clock synchronization request message, it is assumed that the bidirectional link delays of the host device and the slave device are equal, and the path delay data is set to T delay , then when performing point-to-point clock synchronization adjustment, t2-T delay =t1+T offset 、t4+T offset =t3+T delay , where T offset Represents the time deviation data, and then based on the above formula, the path delay data T can be obtained delay :T delay =[(t2-t1)+(t4-t3)] / 2.

[0049] Optionally, in the device clock synchronization method provided in the embodiment of the present application, obtaining M-1 synchronized slave devices based on the path delay data configuration of each slave device includes: for one slave device, controlling the host device to send a time query message to the slave device, and recording the receiving time of the slave device when the slave device receives the time query message to obtain a first receiving time; generating a time message according to the first receiving time, controlling the slave device to send a time message to the host device, and recording the receiving time of the host device when the host device receives the time message to obtain a second receiving time; calculating the difference between the second receiving time and the first receiving time to obtain a third difference, calculating the difference between the third difference and the path delay data to obtain the time deviation data of the slave device; configuring each slave device according to each time deviation data to obtain M-1 synchronized slave devices.

[0050] Specifically, after obtaining the path delay data, the slave device can be processed based on the path delay data, and when calculating the path delay data, the host device can first be controlled to send a time query message to the slave device, and record the first receiving time when the slave device receives the message. After the slave device determines the first receiving time, a time message is generated based on the first receiving time, and the time message is sent to the host device, and then the second receiving time when the host device receives the message is recorded.

[0051] Furthermore, the difference between the second receiving time t2 and the first receiving time t1 is calculated, and the difference between the difference and the path delay data is calculated, so as to obtain the time deviation data of the slave device, that is, it is calculated by the following formula: offset =t2-t1-T delay ,Finally, the time of the slave device can be synchronized based on the time deviation data.

[0052] Optionally, in the device clock synchronization method provided in an embodiment of the present application, each slave device is configured according to each time deviation data to obtain M-1 synchronized slave devices, including: calculating the mean of the time deviation data of the M-1 slave devices to obtain the deviation time period; updating the timing device associated with each slave device according to the deviation time period to obtain M-1 synchronized slave devices.

[0053] Specifically, when configuring the slave device, the time deviation data of all slave devices can be obtained first, and their average can be calculated to obtain the overall deviation time period, and then the timing device associated with each slave device can be updated according to the deviation time period. By adjusting the time of these timing devices, the synchronization of the slave devices can be achieved, so that they can maintain the consistency of time during operation, thereby improving the operating efficiency and accuracy of the entire system, and improving the stability and reliability of the system.

[0054] Optionally, in the device clock synchronization method provided in an embodiment of the present application, the communication interface of each slave device includes a first switch and a second switch, and the method further includes: when each slave device receives a follow-up message, turning on the second switch, and executing the step of generating a delay request message based on the follow-up message, wherein the first switch is used to reject the message sent by the host device, and the second switch is used to respond to the message sent by the host device.

[0055] Specifically, since each slave device is an independent device, in order to ensure that each slave device can achieve the purpose of clock synchronization, two switches can be set at each communication interface of the slave device. When moving to the first switch, the slave device can reject the relevant messages sent by the host device. When moving to the second switch, the slave device can receive and respond to the messages sent by the host device, thereby ensuring the data security of the slave device.

[0056] It should be noted that the steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and that, although a logical order is shown in the flowcharts, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0057] The present application also provides a method for synchronizing a device clock. Figure 4 The following is a schematic diagram of an optional device clock synchronization method provided in accordance with an embodiment of the present application. Figure 1 , Figure 5 The following is a schematic diagram of an optional device clock synchronization method provided in accordance with an embodiment of the present application. Figure 2 ,like Figure 4 , Figure 5 As shown, the method includes:

[0058] When the underground tunnel contains four devices, one device is randomly selected as the host device, and the remaining three devices are used as slave devices. When connecting them, the three slave devices can be sorted first, and the first communication interface of the second slave device in the device sequence is connected to the second communication interface of the first slave device, and the second communication interface of the second slave device is connected to the first communication interface of the last slave device. Then, the first communication interface of the host device is connected to the first communication interface of the first slave device, and the second communication interface of the host device is connected to the second communication interface of the last slave device, so as to obtain a device ring network.

[0059] After the host device and all slave devices form a device ring network, the host device can be used to synchronize the clock of each slave device, that is, the clock synchronization operation is realized by sending a request message through the host device and the slave device sending a response message. Specifically, the host device is first controlled to send a clock synchronization request message to a communication interface of a slave device through a communication interface, and the sending time of the host device is recorded to obtain a first time t1. After the host device sends the clock synchronization request message, a follow-up message is generated based on the timestamp information of the first time, and then the host device sends the follow-up message to the slave device.

[0060] In the case where the slave device receives the clock synchronization request message from the host device, the second time t2 when the slave device receives the message is recorded. After the slave device receives the follow-up message, the slave device generates a delay request message according to the follow-up message, and the communication interface of the slave device sends the delay request message to the communication interface of the host device, and records the sending time of the slave device to obtain the third time t3. The host device receives the delay request message and records the receiving time to obtain the fourth time t4. Finally, the path delay data can be calculated according to t1 to t4, and then the clock of the slave device is adjusted using the path delay data to obtain the synchronized slave device. Finally, the slave device also needs to send a clock synchronization completion message and the transmission path delay between the two devices to the host device, and the transmission path delay is recorded by the host device. In addition, clock synchronization can also be performed by means of messages. First, the host device sends a time query message to the slave device. After receiving the message, the slave device sends the current time to the host device. The host device calculates the time deviation based on the time, and then the host device performs clock synchronization adjustment with the slave device with the largest absolute value of the time deviation until the absolute value of the time deviation of all slave devices is less than a preset threshold.

[0061] After the host device synchronizes the clocks of all slave devices, in order to determine the effect of synchronization, the clocks of these devices can be checked. At this time, all devices can be connected to the oscilloscope through the GPIO (General Purpose Input / Output) interface, and then the host device and the synchronized slave device output a signal representing a pulse signal per second. Finally, the oscilloscope is used to analyze these pulse signals to determine the synchronization effect.

[0062] This embodiment determines the host device and slave devices in the tunnel, uses the host device to perform clock synchronization processing on each slave device, and then performs clock verification through the pulse signals of the host device and the synchronized slave device. When each clock error is less than or equal to the error threshold, the clock synchronization operation is terminated, thereby achieving the effect of improving the efficiency and accuracy of the clock of the synchronization device.

[0063] The embodiment of the present application also provides a device clock synchronization apparatus. It should be noted that the device clock synchronization apparatus of the embodiment of the present application can be used to execute the device clock synchronization method provided in the embodiment of the present application. The device clock synchronization apparatus provided in the embodiment of the present application is introduced below.

[0064] Figure 6 is a schematic diagram of a device clock synchronization apparatus provided according to an embodiment of the present application, such as Figure 6 As shown, the device includes: an acquisition unit 60, a control unit 61, a receiving unit 62, and a calculation unit 63.

[0065] The acquisition unit 60 is used to acquire M devices set in the pipe gallery, determine a host device and M-1 slave devices from the M devices, connect the host device and the M-1 slave devices to obtain a device ring network, wherein M is a positive integer;

[0066] A control unit 61 is used to control the master device in the device ring network to perform clock synchronization processing on each slave device to obtain M-1 synchronized slave devices;

[0067] A receiving unit 62, configured to receive pulse signals from a host device and M-1 synchronized slave devices, and obtain M pulse signals, wherein the M pulse signals include a host pulse signal and M-1 slave pulse signals;

[0068] The calculation unit 63 is used to calculate M-1 clock errors according to the M pulse signals, and terminate the clock synchronization operation when each clock error is less than or equal to the error threshold.

[0069] The device clock synchronization apparatus provided in the embodiment of the present application obtains M devices set in the pipe gallery through the acquisition unit 60, determines a host device and M-1 slave devices from the M devices, connects the host device and the M-1 slave devices to obtain a device ring network, wherein M is a positive integer; the control unit 61 controls the host device in the device ring network to perform clock synchronization processing on each slave device to obtain M-1 synchronized slave devices; the receiving unit 62 receives pulse signals from the host device and the M-1 synchronized slave devices to obtain M pulse signals, wherein the M pulse signals include a host pulse signal and M-1 slave pulse signals; The calculation unit 63 calculates M-1 clock errors based on M pulse signals, and terminates the clock synchronization operation when each clock error is less than or equal to the error threshold, thereby solving the problems of low synchronization efficiency and low synchronization accuracy in the related art when performing clock synchronization on equipment in the tunnel. By determining the host device and slave device in the tunnel, the host device is used to perform clock synchronization processing on each slave device, and then the clock is checked through the pulse signals of the host device and the synchronized slave device. When each clock error is less than or equal to the error threshold, the clock synchronization operation is terminated, thereby achieving the effect of improving the efficiency and accuracy of the clock of the synchronization device.

[0070] Optionally, in the device clock synchronization device provided in the embodiment of the present application, the acquisition unit 60 includes: an acquisition module, used to acquire the communication interfaces of the host device and M-1 slave devices, and obtain M groups of communication interfaces, wherein each group of communication interfaces includes a first communication interface and a second communication interface; a sorting module, used to sort the M-1 slave devices to obtain a device sequence; a first connection module, used to connect the first communication interface of the i-th slave device with the second communication interface of the i-1-th slave device, and connect the second communication interface of the i-th slave device with the first communication interface of the i+1-th slave device for the i-th slave device in the device sequence, wherein i is a positive integer greater than or equal to two; a second connection module, used to connect the first communication interface of the host device with the first communication interface of the first slave device in the device sequence, and connect the second communication interface of the host device with the second communication interface of the M-1-th slave device in the device sequence, to obtain a device ring network.

[0071] Optionally, in the device clock synchronization device provided in the embodiment of the present application, the control unit 61 includes: a first control module, which is used to control the host device to send a clock synchronization request message to the slave device for a slave device, and record the sending time of the host device to obtain a first time; a first generation module, which is used to generate a follow-up message according to the first time, and after the host device sends the clock synchronization request message to the slave device, control the host device to send a follow-up message to the slave device; a first recording module, which is used to record the reception time of the slave device when the slave device receives the clock synchronization request message, and obtain a second time; a second generation module, which is used to generate a follow-up message according to the first time, and control the host device to send a follow-up message to the slave device after the host device sends the clock synchronization request message to the slave device; When a follow-up message is received, a delay request message is generated according to the follow-up message, the slave device is controlled to send the delay request message to the host device, and the sending time of the slave device is recorded to obtain a third time; a second recording module is used to record the receiving time of the host device when the host device receives the delay request message to obtain a fourth time; a first calculation module is used to calculate the path delay data of each slave device according to the first time of each slave device, the second time of each slave device, the third time of each slave device and the fourth time of each slave device, and obtain M-1 synchronized slave devices based on the path delay data configuration of each slave device.

[0072] Optionally, in the device clock synchronization device provided in the embodiment of the present application, the control unit 61 includes: a second calculation module, which is used to calculate the difference between the second moment of a slave device and the first moment of the slave device to obtain a first difference, and calculate the difference between the fourth moment of the slave device and the third moment of the slave device to obtain a second difference; a third calculation module, which is used to calculate the sum of the first difference and the second difference to obtain moment sum data, calculate the ratio of the moment sum data to a preset parameter, and obtain the path delay data of the slave device.

[0073] Optionally, in the device clock synchronization device provided in the embodiment of the present application, the control unit 61 includes: a second control module, used for controlling the host device to send a time query message to a slave device, and recording the receiving time of the slave device when the slave device receives the time query message to obtain a first receiving time; a third generation module, used for generating a time message according to the first receiving time, controlling the slave device to send a time message to the host device, and recording the receiving time of the host device when the host device receives the time message to obtain a second receiving time; a fourth calculation module, used for calculating the difference between the second receiving time and the first receiving time to obtain a third difference, calculating the difference between the third difference and the path delay data to obtain the time deviation data of the slave device; a configuration module, used for configuring each slave device according to each time deviation data to obtain M-1 synchronized slave devices.

[0074] Optionally, in the device clock synchronization device provided in the embodiment of the present application, the control unit 61 includes: a fifth calculation module, used to calculate the mean of the time deviation data of M-1 slave devices to obtain the deviation time period; an update module, used to update the deviation time period for the timing device associated with each slave device to obtain M-1 synchronized slave devices.

[0075] Optionally, in the device clock synchronization device provided in an embodiment of the present application, the control unit 61 includes: an on-module, used to turn on the second switch when each slave device receives a follow-up message, and execute the step of generating a delay request message according to the follow-up message, wherein the first switch is used to reject the message sent by the host device, and the second switch is used to respond to the message sent by the host device.

[0076] The synchronization device for the above-mentioned device clock includes a processor and a memory. The above-mentioned acquisition unit 60, control unit 61, receiving unit 62, calculation unit 63, etc. are all stored in the memory as program units, and the processor executes the above-mentioned program units stored in the memory to realize corresponding functions.

[0077] The processor includes a kernel, which calls the corresponding program unit from the memory. One or more kernels can be set, and the kernel parameters can be adjusted to solve the problems of low synchronization efficiency and low synchronization accuracy in the clock synchronization of the equipment in the pipe gallery in the related technology.

[0078] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM, and the memory includes at least one memory chip.

[0079] An embodiment of the present invention provides a computer storage medium, which is used to store a program. When the program is running, the device where the computer storage medium is located is controlled to execute a method for synchronizing a device clock.

[0080] Figure 7 is a schematic diagram of an electronic device provided according to an embodiment of the present application, such as Figure 7 As shown, an embodiment of the present invention provides an electronic device, the electronic device 70 includes a processor, a memory, and a program stored in the memory and executable on the processor, the processor is used to execute computer-readable instructions, wherein the computer-readable instructions execute a method for synchronizing a device clock when they are executed. The device in this article can be a server, a PC, a PAD, a mobile phone, etc.

[0081] The present application also provides a computer program product, including a computer program, which, when executed by a processor, implements the steps of a device clock synchronization method in each embodiment of the present application.

[0082] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.

[0083] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0084] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0085] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0086] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0087] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0088] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0089] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0090] The above are only embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included within the scope of the claims of the present application.

Claims

1. A method for synchronizing a device clock, characterized in that: include: Obtain M devices set in the pipe gallery, determine a host device and M-1 slave devices from the M devices, connect the host device and the M-1 slave devices to obtain a device ring network, where M is a positive integer; Control the master device in the device ring network to perform clock synchronization processing on each slave device to obtain M-1 synchronized slave devices; Receiving pulse signals from the host device and the M-1 synchronized slave devices to obtain M pulse signals, wherein the M pulse signals include one host pulse signal and M-1 slave pulse signals; M-1 clock errors are calculated according to the M pulse signals, and when each clock error is less than or equal to an error threshold, the clock synchronization operation is terminated.

2. The method according to claim 1, characterized in that Connecting the host device and the M-1 slave devices to obtain a device ring network includes: Acquire the communication interfaces of the host device and the M-1 slave devices to obtain M groups of communication interfaces, wherein each group of communication interfaces includes a first communication interface and a second communication interface; Sort the M-1 slave devices to obtain a device sequence; For the i-th slave device in the device sequence, connect the first communication interface of the i-th slave device to the second communication interface of the i-1-th slave device, and connect the second communication interface of the i-th slave device to the first communication interface of the i+1-th slave device, where i is a positive integer greater than or equal to 2; The first communication interface of the host device is connected to the first communication interface of the first slave device in the device sequence, and the second communication interface of the host device is connected to the second communication interface of the M-1th slave device in the device sequence to obtain the device ring network.

3. The method according to claim 1, characterized in that Controlling the master device in the device ring network to perform clock synchronization processing on each slave device includes: For a slave device, controlling the host device to send a clock synchronization request message to the slave device, and recording the sending time of the host device to obtain a first time; generating a follow-up message according to the first moment, and controlling the host device to send the follow-up message to the slave device after the host device sends a clock synchronization request message to the slave device; When the slave device receives the clock synchronization request message, recording the receiving time of the slave device to obtain a second time; When the slave device receives the follow-up message, a delay request message is generated according to the follow-up message, the slave device is controlled to send the delay request message to the host device, and the sending time of the slave device is recorded to obtain a third time; When the host device receives the delay request message, recording the receiving time of the host device to obtain a fourth time; The path delay data of each slave device is calculated according to the first moment of each slave device, the second moment of each slave device, the third moment of each slave device and the fourth moment of each slave device, and the M-1 synchronized slave devices are obtained based on the path delay data configuration of each slave device.

4. The method according to claim 3, characterized in that: Calculating the path delay data of each slave device according to a first moment of each slave device, a second moment of each slave device, a third moment of each slave device, and a fourth moment of each slave device includes: For a slave device, calculating a difference between a second moment of the slave device and a first moment of the slave device to obtain a first difference, and calculating a difference between a fourth moment of the slave device and a third moment of the slave device to obtain a second difference; The sum of the first difference and the second difference is calculated to obtain the time sum data, and the ratio of the time sum data to a preset parameter is calculated to obtain the path delay data of the slave device.

5. The method according to claim 3, characterized in that: The M-1 synchronized slave devices are obtained based on the path delay data configuration of each slave device, including: For a slave device, controlling the host device to send a time query message to the slave device, and when the slave device receives the time query message, recording a receiving time of the slave device to obtain a first receiving time; generating a time message according to the first receiving time, controlling the slave device to send the time message to the host device, and recording the receiving time of the host device when the host device receives the time message to obtain a second receiving time; Calculate the difference between the second receiving time and the first receiving time to obtain a third difference, calculate the difference between the third difference and the path delay data to obtain the time deviation data of the slave device; Each slave device is configured according to each time deviation data to obtain the M-1 synchronized slave devices.

6. The method according to claim 5, characterized in that Each slave device is configured according to each time deviation data, and the M-1 synchronized slave devices are obtained, including: Calculate the mean of the time deviation data of the M-1 slave devices to obtain the deviation time period; The timing device associated with each slave device is updated with the deviation time period to obtain the M-1 synchronized slave devices.

7. The method according to claim 3, characterized in that The communication interface of each slave device includes a first switch and a second switch, and the method further includes: When each slave device receives the follow message, the second switch is turned on to execute the step of generating the delay request message according to the follow message, wherein the first switch is used to reject the message sent by the host device, and the second switch is used to respond to the message sent by the host device.

8. A device for synchronizing a device clock, characterized in that: include: An acquisition unit is used to acquire M devices set in the pipe gallery, determine a host device and M-1 slave devices from the M devices, connect the host device and the M-1 slave devices to obtain a device ring network, wherein M is a positive integer; A control unit, used to control the master device in the device ring network to perform clock synchronization processing on each slave device to obtain M-1 synchronized slave devices; A receiving unit, configured to receive pulse signals from the host device and the M-1 synchronized slave devices to obtain M pulse signals, wherein the M pulse signals include a host pulse signal and M-1 slave pulse signals; The calculation unit is used to calculate M-1 clock errors according to the M pulse signals, and terminate the clock synchronization operation when each clock error is less than or equal to an error threshold.

9. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the method for synchronizing a device clock as claimed in any one of claims 1 to 7 is implemented.

10. An electronic device, characterized in that: It includes one or more processors and a memory, wherein the memory is used to store one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the device clock synchronization method described in any one of claims 1 to 7.

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