Method for processing semiconductor wafer and single wafer processing system

Abstract

Improved processing systems and methods for wet and dry processing of semiconductor wafers are provided. A closed chamber for processing a semiconductor wafer within a processing space and a discharge system for directing a processing fluid out of the processing space are provided. The closed chamber includes a top plate and a bottom plate that physically confine the process fluid within a relatively small closed process volume. This forces the process fluid to flow radially across the wafer surface (s) without rotating the wafer. The discharge system includes a conduit downstream of the treatment space and configured to retain a portion of the treatment fluid dispensed within the treatment space. This portion remaining within the conduit provides pressure resistance against the processing fluid (s) distributed within the processing space to improve wet and dry processing of the wafer surface.

Description

[0001] This application claims priority to U.S. Provisional Patent Application Serial No. 63 / 351,922, filed on June 14, 2022, entitled “METHOD AND SINGLE WAFER PROCESSING SYSTEM FOR PROCESSING OF SEMICONDUCTOR WAFERS” and U.S. Non-Provisional Patent Application Serial No. 18 / 192,279, filed on March 29, 2023, entitled “METHOD AND SINGLE WAFER PROCESSING SYSTEM FOR PROCESSING OF SEMICONDUCTOR WAFERS”; the disclosures of these patent applications are expressly incorporated herein by reference in their entirety. Technical Field

[0002] The present invention relates generally to the processing and surface preparation of semiconductor wafers, and in particular to a method and processing system for both wet and dry processing of such wafers. Background Art

[0003] Integrated circuits are formed using planar processes in which ultra-clean, flat silicon wafers are used as substrates on which large numbers of identical devices are built through various oxidation, photolithography, removal, ion bombardment, and deposition processes. Surface preparation before and after these processes is critical to the patterning of microelectronic devices, as device performance, reliability, and product yield of silicon circuits are severely affected by the presence of chemical contaminants and particulate impurities on the wafer surface.

[0004] A variety of dry and wet processes are currently used to clean semiconductor wafer surfaces. Dry cleaning processes include steps for wafer cleaning and wafer drying using gas exposure. Wet cleaning processes include a series of steps for immersing or spraying the wafer with various liquids, including chemical solutions and rinse solutions. These wet and dry processes can be performed in a variety of processing chambers and systems.

[0005] The spin chamber is used to clean one or more surfaces of a semiconductor wafer using wet and dry processes. The spin chamber uses a spin chuck and a drive mechanism (e.g., a stepper motor) to rotate or spin a semiconductor wafer mounted on the spin chuck, uses at least one liquid nozzle for dispensing one or more liquids onto the wafer surface(s) while the semiconductor wafer is spinning, and uses a large cup for capturing liquids ejected from the wafer surface(s) by centrifugal force generated during the rotation of the spin chuck.

[0006] Various cleaning processes can be performed in the spin chamber. In an example cleaning process, a chemical solution is dispensed onto the surface of the semiconductor wafer while the semiconductor wafer is spinning to clean the wafer surface. After the cleaning step, a rinsing solution is dispensed onto the wafer surface while the semiconductor wafer is spinning to remove the chemical solution and rinse the wafer surface. After the rinsing step, the wafer rotation can continue to spin-dry the wafer surface. In some cases, a puddle process can be performed between the wafer cleaning step and the rinsing step. In the puddle process, a chemical solution is dispensed onto the wafer surface when the wafer rotation stops (or significantly slows down) so that a puddle of the chemical solution can be formed on the wafer surface. In some cases, puddle immersion can reduce the amount of chemicals required to clean the wafer surface.

[0007] Conventional wet cleaning processes and processing chambers have several disadvantages. For example, due to the need for a spin chuck, a drive mechanism, and a large liquid capture cup, the spin chamber is often large and complex. In addition, current wet cleaning processes utilized in spin chambers typically require large amounts of ultrapure chemicals. The high cost and large amounts of ultrapure chemicals required in current wet cleaning processes, as well as the handling of hazardous waste generated by such processes, along with their incompatibility with advanced concepts of integrated processing (e.g., cluster tools), require new processing chambers and methods that are less affected by these limitations.

[0008] There is a strong need for an improved processing system and method to reduce chemical consumption, reduce processing steps, and increase equipment utilization without sacrificing process effectiveness. In particular, there is a need for an improved processing system and method for ultra-clean surface preparation that can perform both wet and dry processes. Summary of the invention

[0009] The present disclosure provides an improved processing system and method for wet and dry processing of semiconductor wafers. The processing system and method disclosed herein provide various advantages over conventional systems and methods for processing semiconductor wafers. For example, the disclosed processing system and method provide a closed chamber for wet and dry processing of semiconductor wafers. The closed chamber includes a top plate and a bottom plate, which physically confine (multiple) processing fluids to a relatively small closed processing space (PS). This forces (multiple) processing fluids to flow radially across (multiple) wafer surfaces without rotating the wafer, and results in a more compact chamber design. The top plate and bottom plate of the closed chamber also: (a) reduce the amount of (multiple) processing fluids required to perform the process, (b) isolate the wafer from the environment, and (c) enable the use of additional features and functions (e.g., acoustic transducers, heating elements, additional nozzles and / or sensors).

[0010] In addition to the enclosed chamber, the disclosed processing system and method also provide an exhaust system for improving wet and dry processing of semiconductor wafers. The exhaust system includes a conduit positioned downstream of the processing space and configured to temporarily capture or retain at least a portion of the processing fluid that is distributed in the processing space and directed through the conduit. The portion of the processing fluid retained in the conduit provides a pressure resistance against the (multiple) processing fluids distributed in the processing space. This pressure resistance improves wet processing by providing a more uniform fluid flow rate of the processing fluid as the processing fluid diffuses radially across the wafer surface. During dry processing, the pressure resistance provided by the processing fluid captured in the conduit provides a more uniform radial removal of the processing fluid from the wafer surface.

[0011] According to one embodiment, a processing system for processing a semiconductor wafer is provided herein. The processing system described herein generally includes a chamber in which the semiconductor wafer is processed. The chamber includes: a bottom plate having a portion of a lower working surface defining an interior of the chamber; and a top plate having a portion of an upper working surface defining an interior of the chamber. The upper working surface is spaced above the lower working surface.

[0012] The chamber further includes a processing space between the upper working surface and the lower working surface, at least one opening through the lower working surface, and at least one opening through the upper working surface. The at least one opening through the lower working surface is configured to guide the processing fluid into the processing space above the lower working surface for processing the bottom surface of the semiconductor wafer. The at least one opening through the upper working surface is configured to guide the processing fluid into the processing space below the upper working surface for processing the top surface of the semiconductor wafer.

[0013] The chamber further includes an exhaust system having a conduit downstream of the processing space for directing the processing fluid out of the processing space. As described in more detail below, the conduit is configured to retain a portion of the processing fluid within the conduit to provide pressure resistance against the processing fluid directed into the processing space.

[0014] In some embodiments, the at least one opening through the lower working surface is centered in the bottom plate and the at least one opening through the upper working surface is centered in the top plate for directing the process fluid into the process volume near the center of the semiconductor wafer. In such embodiments, the pressure resistance provided by the portion of the process fluid that remains within the conduit enables the process fluid to flow through the top and bottom surfaces of the semiconductor wafer at a uniform fluid velocity, from the center of the semiconductor wafer to the edge of the semiconductor wafer.

[0015] In some embodiments, the at least one opening through the lower working surface and the at least one opening through the upper working surface each include one or more nozzles that are coupled to distribute the processing fluid into the processing space. For example, the at least one opening through the lower working surface may include a first backside nozzle centered in the bottom plate, and a second backside nozzle positioned between the center of the bottom plate and the edge of the semiconductor wafer. Similarly, the at least one opening through the upper working surface may include a first frontside nozzle centered in the top plate, and a second frontside nozzle positioned between the center of the top plate and the edge of the semiconductor wafer.

[0016] In some embodiments, the upper working surface and the lower working surface are substantially flat planar surfaces. In other embodiments, the upper working surface and the lower working surface are non-planar surfaces. These non-planar surfaces can be configured to provide a more uniform fluid velocity of the processing fluid radially across the top and bottom surfaces of the semiconductor wafer compared to substantially flat planar surfaces.

[0017] In some embodiments, the upper working surface and the lower working surface each include a non-wetting coating that provides a contact angle of substantially 90 degrees between the processing fluid and the upper working surface and the lower working surface. In some embodiments, the non-wetting coating can be used with an exhaust system to provide uniform drying of the semiconductor wafer surface(s).

[0018] In some embodiments, additional features may be added to the top and / or bottom of the chamber. For example, an acoustic transducer, a heating element, or a sensor may be coupled to or embedded in the top and / or bottom of the chamber.

[0019] The chamber may further include an upper gap between the upper working surface and the top surface of the semiconductor wafer, and a lower gap between the lower working surface and the bottom surface of the semiconductor wafer. The range of the upper gap and the lower gap may generally be between about 0.01 mm and about 10.0 mm. In some embodiments, the processing system described herein may further include at least one lifting mechanism and a controller. The at least one lifting mechanism may be coupled to at least one of the top plate and the bottom plate for adjusting the vertical position of the at least one of the top plate and the bottom plate. The controller may be coupled to the at least one lifting mechanism to adjust the vertical position of the at least one of the top plate and the bottom plate and change at least one of the upper gap and the lower gap.

[0020] As noted above, the exhaust system includes a conduit downstream of the processing space for directing the processing fluid out of the processing space. In some embodiments, the conduit may include a first portion that is coupled to the processing space and positioned below the lower working surface. The first portion of the conduit may be a U-shaped conduit configured to temporarily capture or retain this portion of the processing fluid to provide pressure resistance against the processing fluid directed into the processing space.

[0021] In some embodiments, the conduit may further include: a second portion positioned above the lower working surface; and a third portion positioned below the lower working surface. The second portion of the conduit is coupled between the first portion of the conduit and the third portion of the conduit. The third portion of the conduit is coupled to the first portion of the conduit, the second portion of the conduit, and an outlet of the exhaust system.

[0022] In some embodiments, the conduit may further include: a first valve positioned between the first portion of the conduit and the second portion of the conduit; and a second valve positioned between the first portion of the conduit and the third portion of the conduit. When the first valve is opened and the second valve is closed, the conduit is configured to guide the treatment fluid out of the treatment space and sequentially guide it through the first portion, the second portion, and the third portion of the conduit to the outlet of the exhaust system. In other words, the second portion of the conduit is configured to increase the pressure resistance against the treatment fluid guided into the treatment space when the first valve is opened and the second valve is closed. On the other hand, when the first valve is closed and the second valve is opened, the conduit is configured to guide the treatment fluid out of the treatment space and sequentially guide it through the first portion and the third portion of the conduit to the outlet of the exhaust system.

[0023] According to another embodiment, a method for processing a semiconductor wafer is provided herein. In some embodiments, the method may include: inserting a semiconductor wafer into a processing space between a bottom plate and a top plate, the bottom plate having a portion of a lower working surface defining a closed chamber, and the top plate having a portion of an upper working surface defining a closed chamber; and supporting the semiconductor wafer substantially parallel to the upper working surface and the lower working surface. The method may further include processing at least one surface of the semiconductor wafer by the following steps: (a) injecting at least one processing fluid into the processing space through at least one opening in the top plate, the bottom plate, or both the top plate and the bottom plate; (b) forcing the at least one processing fluid to pass over at least one surface of the semiconductor wafer; and (c) directing the at least one processing fluid from the processing space through an exhaust system having a conduit downstream of the processing space, wherein the directing retains a portion of the at least one processing fluid in the conduit to provide pressure resistance against the at least one processing fluid injected into the processing space.

[0024] In some embodiments, the injecting the at least one processing fluid may include injecting a liquid into the processing space to process the at least one surface of the semiconductor wafer. In such embodiments, the directing may retain a portion of the liquid within the conduit to provide pressure resistance against the liquid injected into the processing space. In doing so, the pressure resistance may provide a uniform fluid velocity of the liquid radially across the at least one surface of the semiconductor wafer.

[0025] In some embodiments, the method may include one or more additional steps before injecting the liquid into the processing space. For example, the method may further include: injecting a low surface tension liquid into the processing space to pre-wet the at least one surface, the upper working surface, and the lower working surface of the semiconductor wafer. The low surface tension liquid injected into the processing space prevents bubbles from forming on the at least one surface of the semiconductor wafer when the liquid is subsequently injected into the processing space.

[0026] In some embodiments, the injecting of the at least one processing fluid may further include: injecting a gas into the processing space after injecting the liquid to dry the at least one surface of the semiconductor wafer. In such embodiments, the guiding may retain a portion of the liquid within the conduit to provide pressure resistance against the gas injected into the processing space. In doing so, the pressure resistance may provide uniform drying of the at least one surface of the semiconductor wafer.

[0027] In some embodiments, the method may include one or more additional steps after performing the injection of liquid into the processing space. For example, the method may further include: (a) injecting a rinsing solution into the processing space to remove the liquid and rinse the at least one surface of the semiconductor wafer; (b) injecting a low surface tension liquid into the processing space to remove the rinsing solution from the at least one surface of the semiconductor wafer; and (c) and treating the at least one surface of the semiconductor wafer with a supercritical fluid. In some embodiments, the method may further include: before treating the at least one surface of the semiconductor wafer with the supercritical fluid, adjusting the vertical position of the top plate and the bottom plate to reduce the gap between the top plate and the bottom plate and reduce the amount of the low surface tension liquid on the at least one surface of the semiconductor wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] A more complete description of the present invention and its advantages can be obtained by referring to the following description in conjunction with the accompanying drawings.

[0029] It will be appreciated that in the drawings, like reference numerals indicate like features. However, it will be noted that the drawings illustrate only exemplary embodiments of the disclosed concepts and are therefore not to be considered limiting of scope, as the disclosed concepts may admit to other equally effective embodiments.

[0030] Figure 1A is a cross-sectional view showing one embodiment of a processing system for wet and dry processing of semiconductor wafers according to the present disclosure;

[0031] Figure 1B It passes through Figure 1A A cross-sectional view of a portion of the chamber shown in , which shows adjustments to the top plate and the bottom plate to increase the gap between the top plate and the bottom plate (g);

[0032] Figure 1C It passes through Figure 1A A cross-sectional view of a portion of the chamber shown in , which shows the adjustment of the top plate and the bottom plate to reduce the gap between the top plate and the bottom plate (g);

[0033] Figure 1D is a cross-sectional view showing another embodiment of a processing system for wet and dry processing of semiconductor wafers according to the present disclosure;

[0034] Figure 2A-2C It passes through Figure 1A a cross-sectional view of a portion of a chamber shown in , showing a top plate and a bottom plate having non-planar working surfaces;

[0035] Figure 2D is a front view of a working surface having a plurality of ribs and a plurality of recesses;

[0036] Figure 3A and Figure 3B Demonstrates the problems that occur when injecting a processing fluid onto a wafer surface in a conventional processing system that does not utilize the techniques described herein;

[0037] Figure 3C demonstrated improved wetting of wafer surfaces using the techniques described herein;

[0038] Figure 4A-4B Demonstrates the problems that occur when injecting gas onto the wafer surface to remove processing liquid from the wafer surface in conventional processing systems that do not utilize the techniques described herein;

[0039] Figure 4C demonstrated improved drying of wafer surfaces using the techniques described herein;

[0040] Figure 5 is with Figure 1A a cross-sectional view of a chamber similar to that shown in but having an alternative exhaust system;

[0041] Figure 6 is a flow chart showing one embodiment of a method for processing a semiconductor wafer according to the present disclosure;

[0042] Figures 7A-7DOne embodiment of a method for processing a semiconductor wafer within the processing system shown and described herein is presented; and

[0043] Figure 8 is with Figure 1A A cross-sectional view of a chamber similar to the chamber shown in but having additional features that enable supercritical processing to be performed within the chamber. DETAILED DESCRIPTION

[0044] The present disclosure provides an improved processing system and method for wet and dry processing of semiconductor wafers. The processing system and method disclosed herein provide various advantages over conventional systems and methods for processing semiconductor wafers. For example, the disclosed processing system and method provide a closed chamber for wet and dry processing of semiconductor wafers. The closed chamber includes a top plate and a bottom plate, which physically confine (multiple) processing fluids to a relatively small closed processing space (PS). This forces (multiple) processing fluids to flow radially across (multiple) wafer surfaces without rotating the wafer, and results in a more compact chamber design. The top plate and bottom plate of the closed chamber also: (a) reduce the amount of (multiple) processing fluids required to perform the process, (b) isolate the wafer from the environment, and (c) enable the use of additional features and functions (e.g., acoustic transducers, heating elements, additional nozzles and / or sensors).

[0045] In addition to the enclosed chamber, the disclosed processing system and method also provide an exhaust system for improving wet and dry processing of semiconductor wafers. The exhaust system includes a conduit positioned downstream of the processing space and configured to temporarily capture or retain at least a portion of the processing fluid that is distributed in the processing space and directed through the conduit. The portion of the processing fluid retained in the conduit provides a pressure resistance against the (multiple) processing fluids distributed in the processing space. This pressure resistance improves wet processing by providing a more uniform fluid flow rate of the processing fluid as the processing fluid diffuses radially across the wafer surface. During dry processing, the pressure resistance provided by the processing fluid captured in the conduit provides a more uniform radial removal of the processing fluid from the wafer surface.

[0046] Figure 1A A single wafer processing system 100 for wet and dry processing of semiconductor wafers according to one embodiment of the present disclosure is schematically illustrated. Figure 1AThe processing system 100 shown in the figure includes a chamber 105 in which a semiconductor wafer (W) is processed. The chamber 105 includes: a bottom plate 110 having a portion defining a lower working surface 120 inside the chamber 105; and a top plate 115 having a portion defining an upper working surface 125 inside the chamber 105. The upper working surface 125 inside the chamber 105 is spaced above the lower working surface 120 and separated by a gap (g). A processing space (PS) is formed between the upper working surface 125 and the lower working surface 120 of the chamber 105.

[0047] The chamber 105 further includes a device for supporting the semiconductor wafer (W) in the processing space (PS). In some embodiments, the device for supporting the wafer may include a plurality of pins 123 extending through the base plate 110 into the processing space and supporting the wafer from the bottom, such as Figure 1A In one example, the wafer can be supported by at least three circumferentially spaced pins 123 that protrude from the base plate 110 and extend above the lower working surface 120. In other embodiments, the plurality of pins 123 can support the wafer by contacting the edge of the wafer, such as Figure 1D Although any embodiment may be utilized, the plurality of pins 123 supporting the wafer from the bottom may prevent the wafer from sagging and, therefore, prevent uneven gaps from forming between the upper / lower working surfaces of the chamber 105 and the top / bottom surfaces of the wafer.

[0048] When a semiconductor wafer (W) to be processed is inserted and mounted in the processing space (PS), an upper gap (g) exists between the upper working surface 125 of the chamber 105 and the top surface of the wafer. U ), and there is a lower gap (g) between the lower working surface 120 of the chamber 105 and the bottom surface of the wafer L ). It is usually expected that the upper gap (g U ) and lower clearance (g L ) are substantially equal to maintain a similar distance (or uniform gap) between the upper working surface 125 and the top surface of the wafer (W) and between the lower working surface 120 and the bottom surface of the wafer (W). U ) and lower clearance (g L ) can range between about 0.01 mm and about 10.0 mm.

[0049] In some embodiments, the upper gap (g) can be adjusted before or during the process. U ) and lower clearance (g L ), to increase the gap (g) between the upper working surface 125 and the lower working surface 120, and thus increase the internal volume of the processing space (PS), such as Figure 1BIn other embodiments, the upper gap (g) can be adjusted before or during the process. U ) and lower clearance (g L ), so as to reduce the gap (g) between the upper working surface 125 and the lower working surface 120, and thus reduce the internal volume of the processing space (PS), such as Figure 1C as shown in .

[0050] like Figure 1A As shown in , the base plate 110 may have at least one opening 130 passing through the lower working surface 120 of the chamber 105. When processing a semiconductor wafer (W) mounted in the processing space (PS), the at least one opening 130 passing through the lower working surface 120 may be in fluid flow communication with at least one processing fluid (e.g., liquid and / or gas), and may be configured to guide the at least one processing fluid into the processing space (PS) above the lower working surface 120 for processing the bottom surface of the semiconductor wafer (W).

[0051] In some embodiments, the at least one opening 130 through the lower working surface 120 may include one or more backside nozzles for distributing the process fluid into the process volume (PS) above the lower working surface 120. In one embodiment, the at least one opening 130 may include a backside nozzle centered in the base plate 110 for distributing the process fluid into the process volume (PS) near the center of the semiconductor wafer (W), such as Figure 1A As shown in . In some embodiments, the at least one opening 130 may optionally include one or more auxiliary back side nozzles, which are positioned between the center of the base plate 110 and the edge of the wafer for distributing the processing fluid (or different processing fluids) to other areas of the wafer. Regardless of the number of back side nozzles utilized, the (multiple) processing fluids distributed from the (multiple) back side nozzles are directed onto the bottom surface of the semiconductor wafer (W) and thereafter flow radially toward the edge of the wafer. According to one embodiment, the (multiple) back side nozzles may be connected to a controller (e.g., controller 160) that is configured to select a first processing fluid (e.g., a liquid or a gas) to be introduced into the processing space.

[0052] The top plate 115 may also have at least one opening 135 through the upper working surface 125 of the chamber 105. When processing a semiconductor wafer (W) mounted in the processing space (PS), the at least one opening 135 through the upper working surface 125 may be in fluid flow communication with at least one processing fluid (e.g., liquid and / or gas), and may be configured to direct the at least one processing fluid into the processing space (PS) below the upper working surface 125 for processing the top surface of the semiconductor wafer (W).

[0053] In some embodiments, the at least one opening 135 through the upper working surface 125 may include one or more front side nozzles for distributing the process fluid into the process volume (PS) below the upper working surface 125. In one embodiment, the at least one opening 135 may include a front side nozzle centered in the top plate 115 for distributing the process fluid into the process volume (PS) near the center of the semiconductor wafer (W), such as Figure 1A As shown in . The at least one opening 135 may optionally include one or more auxiliary front side nozzles, which are positioned between the center of the top plate 115 and the edge of the wafer for distributing the processing fluid (or different processing fluids) to other areas of the wafer. Regardless of the number of front side nozzles utilized, the (multiple) processing fluids distributed from the (multiple) front side nozzles are directed onto the top surface of the semiconductor wafer (W) and thereafter flow radially toward the edge of the wafer. Similar to the (multiple) back side nozzles, the (multiple) front side nozzles can be connected to a controller (e.g., controller 160) that is configured to select a second processing fluid (e.g., a liquid or a gas) to be introduced into the processing space.

[0054] According to one embodiment, Figure 1A The processing system 100 shown in can be configured to wet process a semiconductor wafer (W) in a processing space (PS). The wet processing can include: introducing a first liquid into the processing space through the at least one opening 130 in the lower working surface 120, introducing a second liquid into the processing space through the at least one opening 135 in the upper working surface 125, or both. The first liquid and the second liquid can be the same liquid, or can be different liquids. In one example, the wet processing is a cleaning process in which the top surface of the wafer, the bottom surface of the wafer, or both are cleaned to remove residues and contaminants.

[0055] According to one embodiment, Figure 1A The processing system 100 shown in can be configured for dry processing of semiconductor wafers (W) in a processing space (PS). Dry processing can include: introducing a first gas into the processing space through the at least one opening 130 in the lower working surface 120, introducing a second gas into the processing space through the at least one opening 135 in the upper working surface 125, or both. The first gas and the second gas can be the same gas, or can be different gases. In one example, dry processing is a drying process in which the top surface of the wafer, the bottom surface of the wafer, or both are dried to remove liquid.

[0056] According to one embodiment, Figure 1AThe processing system 100 shown in can be configured to perform wet processing followed by dry processing on a semiconductor wafer (W) in a processing space (PS). In one example, the wet processing can be a cleaning process in which the top surface of the wafer, the bottom surface of the wafer, or both are cleaned to remove residues and contaminants by injecting one or more liquids onto the surface of the wafer (multiple). The dry processing can be a drying process in which the top surface of the wafer, the bottom surface of the wafer, or both are dried by injecting one or more gases onto the surface of the wafer (multiple) to remove liquids from the surface of the wafer (multiple).

[0057] According to one embodiment, the semiconductor wafer (W) is not rotated during wet or dry processing. According to another embodiment, the processing system 100 includes a device for rotating the wafer (not shown), and the wafer is rotated during wet processing, dry processing, or both wet and dry processing.

[0058] In some embodiments, the at least one opening 130 through the upper working surface 125 of the chamber 105 and the at least one opening 135 through the lower working surface 120 of the chamber 105 can be in fluid flow communication with one or more liquids 140 and / or one or more gases 150 via one or more supply lines and valves 145 / 155, such as Figure 1A In some embodiments, the processing system 100 may include a controller 160 coupled to the liquid and gas supply valves 145 / 155 for selectively providing the one or more liquids 140 and / or the one or more gases 150 to a processing volume (PS) defined within the chamber 105. Depending on the process or process steps performed within the chamber 105, a variety of liquids and gases may be selectively provided to the processing volume (PS).

[0059] During the cleaning process, for example, the controller 160 can supply a control signal to the liquid and gas supply valve 145 / 155 to selectively provide a cleaning solution and / or a rinsing solution to the processing space (PS) to clean and / or rinse at least one surface of the semiconductor wafer (W). Examples of cleaning solutions include, but are not limited to, ammonia / peroxide mixtures (APM), hydrochloric acid / peroxide mixtures (HPM) and sulfuric acid peroxide mixtures (SPM). Examples of rinsing solutions include, but are not limited to, deionized (DI) water and isopropyl alcohol (IPA). Other cleaning solutions and rinsing solutions can also be used. After cleaning and / or rinsing (multiple) wafer surfaces, the controller 160 can supply a control signal to the liquid and gas supply valve 145 / 155 to selectively provide a gas (such as, but not limited to, air or nitrogen) to the processing space (PS) to remove any remaining liquid on the (multiple) wafer surfaces, thereby drying the (multiple) wafer surfaces.

[0060] In some embodiments, the controller 160 may supply control signals to the liquid and gas supply valves 145 / 155 to selectively provide a low surface tension liquid (e.g., IPA) to the processing volume (PS) prior to performing a cleaning step in order to pre-wet the wafer surfaces and the upper and lower working surfaces 125, 120 of the chamber 105. As described in more detail below, in some embodiments, pre-wetting may be utilized to improve fluid flow across the wafer surface(s) and prevent bubbles from forming on the wafer surface(s) when liquid (e.g., cleaning solution) is subsequently dispensed into the processing volume.

[0061] In some embodiments, controller 160 (or another controller included in processing system 100) can be configured to adjust the vertical position of top plate 115, the vertical position of bottom plate 110, and / or the gap (g) between the top plate and the bottom plate. Figure 1A In the embodiment shown in FIG. 1 , controller 160 is coupled to supply control signals to lift mechanism 170 coupled to bottom plate 110 and lift mechanism 175 coupled to top plate 115. The placement and configuration of lift mechanisms 170 / 175 are exemplary and are provided herein for explanatory purposes only.

[0062] The control signal supplied from the controller 160 to the lifting mechanism 170 / 175 may be used to adjust the vertical position of the top plate 115 and / or the vertical position of the bottom plate 110. In some embodiments, for example, the controller 160 may supply a control signal to the lifting mechanism 175 to raise the top plate 115 so that the semiconductor wafer (W) may be inserted together with the processing space (PS), such as, for example Fig. 7A In other embodiments, the controller 160 may supply a control signal to the lifting mechanism 170 / 175 to adjust the upper gap (g) between the upper working surface 125 of the chamber 105 and the top surface of the wafer (W). U ) and / or adjusting the lower gap (g) between the lower working surface 120 of the chamber 105 and the bottom surface of the wafer (W) L ), such as Figure 1B and Figure 1C It should be appreciated that the controller 160 and the lifting mechanism 170 / 175 represent only one means for adjusting the vertical position of the top plate 115, the vertical position of the bottom plate 110, and / or the gap (g) between the top plate and the bottom plate. Other means for adjustment may also be used.

[0063] The upper clearance (g) can be adjusted for a variety of purposes U ) and lower clearance (g L ). In some embodiments, Figure 1C As shown in the figure, the upper gap (g U ) and lower clearance (gL ) to reduce the internal volume of the processing space (PS), increase the fluid velocity of the (multiple) processing fluids spreading radially across the (multiple) wafer surfaces, and / or reduce the amount of (multiple) processing fluids required to perform a particular process or process step. On the other hand, as Figure 1B As shown in the figure, the upper clearance (g U ) and lower clearance (g L ) to increase the internal volume of the processing space (PS), reduce the fluid velocity of the (multiple) processing fluids spreading radially across the (multiple) wafer surfaces, and / or increase the amount of (multiple) processing fluids required to perform a particular process or process step. In some embodiments, the upper gap (g U ) and lower clearance (g L ) can be adjusted together or independently for different processes (e.g., different cleaning processes) or different steps within the same process (e.g., a cleaning step and a rinsing step).

[0064] In some embodiments, (multiple) additional features 180 may be added to the top plate 115 and / or the bottom plate 110 of the chamber 105. For example, an acoustic transducer may be added to the top plate 115 and / or the bottom plate 110 to improve a wet (e.g., cleaning) process. The acoustic transducer may be embedded in the entire top plate / bottom plate, or only in a portion of the top plate / bottom plate. In another example, the top plate 115 and / or the bottom plate 110 may include a heating element to heat the liquid / gas dispensed onto the wafer surface. Alternatively, an additional nozzle may be embedded in the top plate 115 and / or the bottom plate 110 to inject steam into the processing space to heat the liquid / gas dispensed onto the wafer surface. In yet another example, the top plate 115 and / or the bottom plate 110 may include one or more sensors for inspecting the wafer and / or the liquid dispensed onto the wafer surface(s). For example, a conductivity meter may be added to the top plate / bottom plate to monitor the liquid dispensed onto the wafer surface.

[0065] Figure 1D An alternative embodiment of the processing system 100 is shown in which additional feature(s) 180 are coupled to the top plate 115 and / or the bottom plate 110 of the chamber 105. The additional feature(s) 180 (e.g., acoustic transducers, heating elements, additional nozzles, and / or sensors) may be disposed anywhere within the top plate 115 and / or the bottom plate 110 and are not limited to Figure 1D The example placement shown in .

[0066] Figures 1A-1DThe processing system 100 shown in provides several advantages over conventional processing chambers for wet / dry processing of semiconductor wafers. Unlike conventional spin chambers, for example, the top plate 115 and the bottom plate 110 define the upper working surface 125 and the lower working surface 120 of the enclosed chamber 105, respectively. During wet / dry processing, the top plate 115 and the bottom plate 110 physically confine the (multiple) processing fluids used to process the semiconductor wafer (W) within a relatively small enclosed processing volume (PS). This provides several advantages that are not achieved in conventional spin chambers.

[0067] For example, the top plate 115 and the bottom plate 110 reduce the amount of process fluid(s) required to perform a particular process or process step (compared to a conventional process chamber that does not utilize a top plate and a bottom plate) by physically confining the process fluid(s) dispensed onto the wafer(s) surface and preventing the dispensed process fluid(s) from escaping. Figure 7C and Fig.7D Described in more detail, the process fluid(s) dispensed onto the wafer(s) surface fills the enclosed process volume (PS) defined between the upper working surface 125 and the lower working surface 120 of the chamber 105. This provides additional fluid savings by eliminating the need to dispense additional fluid onto the wafer surface during the spin-on immersion process. In addition to the fluid savings, the top plate 115 and the bottom plate 110 isolate the wafer from the environment and thus minimize environmental effects on the wafer (such as, for example, oxygen or defects caused by exposure to ambient air, liquid splashing back from a drain cup, etc.).

[0068] The relatively small enclosed processing volume (PS) defined between the upper working surface 125 and the lower working surface 120 of the chamber 105 forces the process fluid(s) to flow radially across the wafer(s) surface without spinning the wafers. This results in a more compact chamber design compared to conventional spin chambers by eliminating the need for a spin chuck and motor.

[0069] In some embodiments, the upper working surface 125 and the lower working surface 120 of the chamber 105 may be substantially flat planar surfaces, such as Figures 1A-1D When implemented with a substantially flat planar working surface, the upper gap (g U ) and lower clearance (g L ) can be substantially equal across the wafer surface.

[0070] In other embodiments, the upper working surface 125 and the lower working surface 120 of the chamber 105 may not be substantially flat, but may be implemented with a variety of non-planar surfaces. In some embodiments, non-planar working surfaces may be utilized to provide a more uniform fluid velocity of the processing fluid(s) radially across the wafer(s) surface. Figures 2A-2DAn example of a non-planar working surface is schematically shown in FIG.

[0071] In some embodiments, the upper working surface 125 and the lower working surface 120 of the chamber 105 may have an inverted V shape, such as Figure 2A The inverted V shape can be used to steadily reduce the upper gap (g) in the radial direction (from the center of the semiconductor wafer (W) to the edge of the wafer). U ) and lower clearance (g L ) to provide uniform fluid velocity of the process fluid(s) radially across the top and bottom surfaces of the wafer. A similar effect can be achieved by providing curved surfaces to the upper working surface 125 and the lower working surface 120 of the chamber 105, such as Figure 2B As shown in . Like an inverted V shape, Figure 2B The curved surface shown in FIG. 1 gradually reduces the upper gap (g) in the radial direction (from the center of the wafer to the edge of the wafer). U ) and lower clearance (g L ).

[0072] In other embodiments, the upper working surface 125 and the lower working surface 120 of the chamber 105 may be ribbed or grooved. For example, the upper working surface 125 and the lower working surface 120 may each be implemented with a plurality of radial ribs 127 extending from the working surface, such as Figure 2C As shown in Figure 2D As shown in FIG. 1 , the plurality of ribs 127 are concentrically formed around the central axis of the upper working surface 125 and the lower working surface 120. A plurality of recesses 129 are formed between the plurality of ribs 127, wherein each recess 129 is formed between two adjacent ribs 127. Although for illustrative purposes only, the plurality of ribs 127 are concentrically formed around the central axis of the upper working surface 125 and the lower working surface 120. Figure 2C-2D Five ribs are shown in the example shown in FIG. 1 , but the upper working surface 125 and the lower working surface 120 of the chamber 105 may include a greater or lesser number of ribs.

[0073] In some embodiments, the Figure 2C-2D The plurality of radial ribs 127 and recesses 129 shown in the figure are used to provide uniform fluid velocity of (multiple) processing fluids radially across the top and bottom surfaces of the semiconductor wafer (W) by causing them to act as fluid buffers. When a processing fluid (e.g., a cleaning solution, a rinsing solution, or another liquid) is distributed into the processing space (PS) and distributed onto the (multiple) wafer surfaces, the distributed fluid can first fill the innermost recess 129a and then diffuse radially outward across the (multiple) wafer surfaces to each adjacent recess 129. In this way, the processing fluid diffuses radially across the (multiple) wafer surfaces in stages, with substantially equal fluid velocity within each stage.

[0074] Figures 1A-1DThe processing system 100 shown in further includes an exhaust system 190 for directing the processing fluid out of the chamber 105. According to one embodiment, the exhaust system 190 includes a conduit 195 that is in fluid communication with and downstream of the processing space (PS). The conduit 195 is generally configured to temporarily capture or retain at least a portion of the (multiple) processing fluids distributed within the processing space during wet / dry processing. The portion of the (multiple) processing fluids retained within the conduit 195 provides pressure resistance against the (multiple) processing fluids distributed within the processing space during the wet and dry processing steps.

[0075] During wet processing, for example, liquid can be dispensed in a processing space above and / or below a semiconductor wafer (W) for processing the top and / or bottom surface of the wafer. The liquid diffuses radially across the (multiple) wafer surfaces and overflows into the conduit 195. The conduit 195 includes a first portion 192 that is coupled to the processing space (PS) and positioned below the lower working surface 120 of the chamber 105. At least a portion of the liquid can be at least temporarily retained in the first portion 192 of the conduit 195. The retained portion of the liquid provides a pressure resistance against the processing fluid dispensed in the processing space.

[0076] According to one embodiment, the first portion 192 of the conduit 195 is implemented with a U-shape, such as Figures 1A-1D . The bottom of the U-shaped conduit is positioned below the lower working surface 120 of the chamber 105. This positioning, together with the shape of the conduit, enables the U-shaped conduit to temporarily capture or retain a portion of the liquid overflowing from the processing space. The liquid temporarily captured in the U-shaped conduit separates the atmosphere in the processing space from the atmosphere downstream of the U-shaped conduit. Any additional liquid entering the U-shaped conduit from the processing space will replace the liquid already in the U-shaped conduit.

[0077] The inventors have recognized that the U-shaped duct in the exhaust system 190 provides many advantages over other duct designs. One of these advantages arises from the fact that the U-shaped duct captures liquid from the process space to seal the atmosphere in the process space from the atmosphere downstream of the U-shaped duct. This provides advantages in both wet and dry processing.

[0078] During wet processing, the liquid in the U-shaped conduit of the exhaust system 190 provides pressure resistance against the liquid introduced into the processing space above and / or below the wafer. The pressure resistance enables the liquid dispensed within the processing space to completely fill the processing space and causes the liquid to flow smoothly and evenly from the center of the wafer across the wafer surface(s) to the edge of the wafer. The uniform fluid flow of liquid across the wafer surface(s) results in more efficient and uniform processing of the wafers.

[0079] Similarly, during dry processing, the liquid in the U-shaped conduit of the exhaust system 190 provides pressure resistance against the gas introduced into the processing space above and / or below the wafer. The pressure resistance provided by the liquid retained in the U-shaped conduit increases the gas pressure within the processing space and causes the gas to flow smoothly and evenly from the center of the wafer to the edge of the wafer across the wafer surface(s).

[0080] Figure 3A and Figure 3B A problem that occurs during wet processing in a conventional processing system that does not include the exhaust system 190 shown and described herein is presented. When liquid (L) is dispensed from a central opening or nozzle onto the surface of a semiconductor wafer (W), the liquid spreads radially across the wafer surface from the center of the wafer to the edge of the wafer. However, without the pressure resistance provided by the exhaust system 190, the liquid may spread radially across the wafer surface at a non-uniform fluid flow rate, such as Figure 3A In some cases, uneven fluid flow rates can lead to bubble formation on the wafer surface, such as Figure 3B as shown in .

[0081] Figure 3C Improved wetting of the wafer surface using the techniques described herein is demonstrated. The pressure resistance provided by the liquid temporarily trapped or retained within the U-shaped conduit of the exhaust system 190 enables the liquid to spread radially across the wafer surface at a uniform fluid flow rate. In some embodiments, the fluid flow rate of the liquid can be further improved by providing the chamber 105 with non-planar upper / lower working surfaces, such as, for example Figures 2A-2D In other embodiments, uniform fluid flow rate of the liquid can be improved by pre-wetting the wafer surface and the upper / lower working surface of the chamber 105 with a low surface tension liquid (e.g., IPA), as described in more detail below. Non-planar working surfaces, pre-wetting, and / or both can be utilized with the exhaust system 190 to improve wetting of the wafer surface and provide uniform fluid flow rate of the liquid across the wafer surface.

[0082] In one example, after wet processing, there is a thin liquid film on the surface of the wafer. During dry processing, the thin liquid film needs to be removed uniformly from the center of the wafer to the edge of the wafer. However, in conventional processing systems that do not include the exhaust system 190 shown and described herein, problems often occur when injecting gas onto the wafer surface during dry processing.

[0083] Figure 4AA problem is shown that occurs when a gas (G) is injected onto the surface of a semiconductor wafer (W) to remove a processing liquid (L) from the wafer surface in a conventional processing system that does not include an exhaust system 190. Without the pressure resistance provided by the exhaust system 190, non-uniform removal of the thin film of liquid (L) is observed, resulting in complete radial removal of the thin film in some areas but incomplete radial removal in other areas. Figure 4A This situation is schematically shown in . Once the gas (e.g., air or nitrogen N2) is able to completely radially remove the thin liquid film in one area (e.g., area A), the gas escapes and stops pushing the thin liquid film in other areas, resulting in uneven drying of the wafer surface.

[0084] Figure 4B Another problem that occurs when a gas (G) is injected onto the surface of a semiconductor wafer (W) to remove a processing liquid (L) from the wafer surface in a processing system that does not include an exhaust system 190 is shown. When the liquid contacts the surface, the liquid can spread along the surface (i.e., wet the surface) or form beads on the surface, depending on the properties of the liquid and the surface. The angle at which the liquid contacts the surface is called the "contact angle." The contact angle is a measure of the ability of a liquid to spread along a solid surface or "wet" a solid surface. When the contact angle is less than 90°, the low surface tension between the liquid and the surface enables the liquid to spread across the surface. When this occurs, the surface is described as being hydrophilic (in the case of water) or having good wettability. When the contact angle is greater than 90°, the higher surface tension between the liquid and the surface causes the liquid to form beads on the surface. When this occurs, the surface is described as being hydrophobic (in the case of water) or non-wetting.

[0085] When there is a contact angle substantially greater than 90° or substantially less than 90° between the process liquid (L) and the upper and / or lower working surface of the chamber, problems may occur during dry processing. For example, the inventors have recognized that when a gas (G) is injected into the chamber to remove the process liquid (L) from the wafer surface, when the contact angle between the process liquid (L) and the upper and / or lower working surface of the process chamber is substantially less than or greater than 90°, uneven drying occurs. Specifically, in the case where the contact angle is substantially less than 90°, fingering of the process liquid (L) is observed, such as Figure 4B as shown in .

[0086] Figure 4C Improved drying of the wafer surface using the techniques described herein is demonstrated. In some embodiments, the pressure resistance provided by the liquid temporarily trapped or retained within the U-shaped conduit of the exhaust system 190 can address Figure 4A and Figure 4B, and enables uniform radial removal of thin liquid films across the entire wafer. In some embodiments, a non-wetting coating may be provided on the upper / lower working surfaces of the chamber 105 to provide a substantially 90° contact angle between the process liquid (L) and the upper / lower working surfaces of the chamber 105. In some embodiments, the non-wetting coating may be used with a U-shaped conduit of the exhaust system 190 to provide uniform drying of the wafer surface, such as Figure 4C as shown in .

[0087] The non-wetting coating is preferably a coating that provides a contact angle of substantially 90° between the processing liquid (L) and the upper / lower working surfaces of the chamber 105. Since the contact angle depends on the specific processing liquid(s) dispensed within the chamber 105 and the coating material applied to the upper / lower working surfaces of the chamber 105, a wide variety of coating materials may be utilized. In some embodiments, the non-wetting coating may be a Teflon-type material, a hydrophobic material, or a wide variety of other non-wetting materials compatible with semiconductor processing.

[0088] Figure 5 Shown with Figure 1A A chamber design similar to the chamber design shown in FIG. 1 but with an alternative exhaust system 190 . In some embodiments, significantly higher pressure resistance may be required during the drying process to completely remove the processing liquid from the wafer(s) surface and to uniformly dry the wafers. Figure 5 An alternative exhaust system 190 is shown that meets this need.

[0089] Like the previous embodiment, Figure 5 The exhaust system 190 shown in FIG. 1 includes a conduit 195 including a first portion 192 coupled to the processing space (PS) and positioned below the lower working surface 120 of the chamber 105. The first portion 192 of the conduit 195 can be a substantially U-shaped conduit, as shown and described above. In addition to the first portion 192, Figure 5 The conduit 195 shown in FIG. 1 also includes a second portion 194 and a third portion 196. The second portion 194 of the conduit 195 is coupled between the first portion 192 and the third portion 196 of the conduit 195 and is positioned above the lower working surface 120 of the chamber 105. The third portion 196 of the conduit 195 is coupled to the first portion 192 of the conduit 195, the second portion 194 of the conduit 195, and an outlet 198 of the exhaust system 190. The third portion 196 of the conduit 195 is positioned below the lower working surface 120 of the chamber 105. Figure 5The conduit 195 shown in FIG. 1 further includes a first valve 193 positioned between the first portion 192 and the second portion 194 of the conduit 195 , and a second valve 197 positioned between the first portion 192 and the third portion 196 of the conduit 195 .

[0090] When a process fluid (e.g., a cleaning solution or a rinsing solution) is dispensed into the process space (PS) during wet processing, the first valve 193 may be closed and the second valve 197 may be opened to direct the process fluid out of the process space and sequentially through the first portion 192 and the third portion 196 of the conduit 195 to the outlet 198 of the exhaust system 190. When a gas (e.g., air or nitrogen) is dispensed into the process space (PS) during a subsequent drying process, the first valve 193 may be opened and the second valve 197 may be closed to direct the remaining portion of the process fluid out of the process space and sequentially through the first portion 192, the second portion 194, and the third portion 196 of the conduit 195 to the outlet 198 of the exhaust system 190. Opening the first valve 193 and closing the second valve 197 directs the process fluid through the second portion 194 of the conduit 195, which is positioned above the lower working surface 120 of the chamber 105. This forces the process fluid to flow upward into the second portion 194 of the conduit 195 and increases the pressure resistance against the process fluid, thereby ensuring that the process liquid must overcome a higher back pressure to exit the exhaust system 190. The higher back pressure helps provide a more uniform drying of the wafer surface(s). After the wafer surface(s) are dried, the first valve 193 and the second valve 197 can each be opened to allow any remaining liquid in the conduit 195 to drain out through the outlet 198 via gravity.

[0091] Can be Figures 1A-1D , Figures 2A-2D and Figure 5 A variety of wet and / or dry processes may be performed within the processing system 100 and chamber 105 embodiments shown in the drawings. For example, a cleaning process may be performed within the processing system 100 and chamber 105 shown and described herein to clean one or more surfaces of a semiconductor wafer and / or remove contaminants or residues from one or more surfaces of a semiconductor wafer. An example cleaning process is described below. However, it should be appreciated that the processing system 100 and chamber 105 shown and described herein are not limited to cleaning processes and may be utilized to perform other wet and dry processes.

[0092] Example Cleaning Process

[0093] like Figures 1A-1D , Figures 2A-2D and Figure 5As shown in , the wafer processing in the processing system 100 and the chamber 105 may include wet processing followed by dry processing to clean one or more surfaces of the semiconductor wafer. In some embodiments, the wet processing may include: 1) pre-wetting the wafer and the inner surface of the chamber with isopropyl alcohol (IPA). The wet processing may further include: 2) treating the wafer with a chemical liquid to clean the (multiple) wafer surfaces, and 3) treating the wafer with deionized (DI) water to remove the chemical liquid from the wafer and rinse the (multiple) wafer surfaces. In one example, the chemical liquid removes chemical contaminants and particulate impurities from the earlier wafer processing from the wafer surface. Thereafter, the dry processing includes: 3) rinsing the wafer with IPA to remove DI water from the wafer surface, and 4) drying the wafer using air or nitrogen (N2). IPA has low surface tension and achieves efficient wafer drying. In some embodiments, the drying process may further include: treating the wafer with a supercritical fluid after rinsing the wafer with IPA and before drying the wafer with air or nitrogen.

[0094] Figure 6 as well as Figures 7A-7D One embodiment of a processing system 100 and method 600 for processing a semiconductor wafer utilizing the techniques described herein is shown. Figures 7A-7D The processing system 100 shown in FIG. 1 may be used in Figures 1A-1D , Figures 2A-2D and Figure 5 In any of the embodiments shown and described above. It will be appreciated that Figure 6 as well as Figures 7A-7D The embodiments shown in are merely exemplary, and additional methods may utilize the techniques described herein. Further, additional processing steps may be added to Figure 6 as well as Figures 7A-7D The method shown in the figure is not limited to the method shown in the figure, because the steps described are not intended to be exclusive. In addition, the order of the steps is not limited to the order shown in the figure, because different orders may occur and / or various steps can be performed in combination or simultaneously.

[0095] Figure 6 The method 600 shown in begins by inserting a semiconductor wafer into a processing space between a bottom plate having a portion defining a lower working surface of an enclosed chamber and a top plate having a portion defining an upper working surface of the enclosed chamber (in step 610). Next, the method 600 includes supporting the semiconductor wafer substantially parallel to the upper working surface and the lower working surface of the enclosed chamber (in step 620).

[0096] Fig. 7A and Figure 7BA manner is shown in which a semiconductor wafer (W) can be inserted into a processing space (PS) (in step 610) and supported substantially parallel to the upper and lower working surfaces of the enclosed chamber 105 (in step 620). Fig. 7A In the example embodiment shown in , a control signal is supplied to the lifting mechanism 175 to raise the top plate 115, thereby enabling the semiconductor wafer (W) to be inserted into the processing space (PS) formed between the bottom plate 110 and the top plate 115 of the chamber 105. Once inserted, the semiconductor wafer (W) is supported substantially parallel to the upper working surface 125 and the lower working surface 120 of the chamber 105. Figure 7B In the example embodiment shown in , the semiconductor wafer (W) is supported on a plurality of pins 123 extending from the lower working surface 120 of the enclosed chamber 105 to support the wafer from the bottom of the wafer. In other embodiments, the wafer can be supported (in step 620) by a plurality of pins 123 that support the wafer by contacting the edge of the wafer, such as Figure 1D as shown in .

[0097] After the semiconductor wafer (W) is inserted into the processing space (PS) and mounted on the plurality of pins 123, a control signal may be supplied to the lifting mechanism 175 to lower the top plate 115 and close the chamber 105. In some embodiments, additional control signals may be supplied to the lifting mechanism 170 / 175 to adjust the upper gap (g) between the upper working surface 125 of the chamber 105 and the top surface of the wafer. U ) and the lower gap (g) between the lower working surface 120 of the chamber 105 and the bottom surface of the wafer L ).

[0098] Figure 6 The method 600 shown in further includes treating at least one surface of the semiconductor wafer by the following steps: (a) injecting at least one treatment fluid into the treatment space through at least one opening in the top plate, the bottom plate, or both the top plate and the bottom plate of the closed chamber (in step 630); (b) forcing the at least one treatment fluid over at least one surface of the semiconductor wafer (in step 640); and (c) directing the at least one treatment fluid from the treatment space through an exhaust system having a conduit downstream of the treatment space (in step 650). The treatment fluid is directed through the conduit as shown and described herein. Thus, the directing can retain a portion of the at least one treatment fluid within the conduit to provide pressure resistance against the at least one treatment fluid injected into the treatment space.

[0099] Figure 7C and Fig.7DVarious ways are presented in which the at least one surface of the semiconductor wafer can be processed using wet and dry processing. Figure 7C In the example embodiment shown in , the top and bottom surfaces of the wafer are processed by injecting a liquid (L) into a processing space (PS) above / below the semiconductor wafer (W) (in step 630). In some embodiments, a control signal may be supplied from the controller 160 to the liquid and gas supply valve 145 / 155 to selectively provide the liquid (L) into the processing space (PS). In one embodiment, the liquid (L) injected into the processing space (in step 630) may be a cleaning solution and / or a rinsing solution for cleaning and / or rinsing at least one surface of the semiconductor wafer (W), as described above. However, other liquids may also be injected into the processing space (in step 630).

[0100] In some embodiments, before injecting the liquid (L) into the processing space (in step 630), a Figure 6 (multiple) additional processing steps not shown in the process. For example, the method 600 may further include: injecting a low surface tension liquid (e.g., IPA) into the processing space to pre-wet the wafer surface, the upper working surface 125 and the lower working surface 120 of the chamber 105. The low surface tension liquid injected into the processing space can prevent bubbles from forming on the wafer surface when the liquid is subsequently injected into the processing space (in step 630).

[0101] exist Figure 7C In the embodiment shown in , the liquid (L) injected into the processing space (PS) is forced over the top and bottom surfaces of the semiconductor wafer (in step 640) and spreads radially across the wafer surface from the center of the wafer (when a center nozzle is used) to the edge of the wafer. The liquid (L) is then directed through the conduit 195 downstream of the processing space (in step 650). Fig. 7A As shown in FIG. 1 , directing the liquid through conduit 195 retains a portion of the liquid within conduit 195 to provide pressure resistance against the liquid injected into the processing volume. This pressure resistance improves wetting of the wafer surface by providing a uniform flow velocity of the liquid radially across the top and bottom surfaces of the wafer.

[0102] exist Fig.7DIn the example embodiment shown in , the top and bottom surfaces of the wafer are processed by injecting gas (G) into the processing space (PS) above / below the semiconductor wafer (W) (in step 630). The gas (G) is injected into the processing space after the liquid (L) is injected to remove the liquid from the top and bottom surfaces of the wafer and dry the wafer surface. In some embodiments, a control signal can be supplied from the controller 160 to the liquid and gas supply valve 145 / 155 to selectively provide the gas (G) into the processing space (PS). In one embodiment, air, nitrogen or other inert gas can be injected into the processing space (in step 630) to dry the wafer surface.

[0103] exist Fig.7D In the embodiment shown in , the gas (G) injected into the processing space (PS) is forced to cross the top and bottom surfaces of the semiconductor wafer (in step 640) and diffuse radially across the wafer surface from the center of the wafer (when a center nozzle is used) to the edge of the wafer. The portion of the liquid (L) retained in the conduit 195 provides pressure resistance against the gas (G) injected into the processing space by filling at least a portion of the conduit 195. The liquid-filled portion of the conduit 195 seals the atmosphere in the processing space from the atmosphere downstream of the liquid-filled portion of the conduit 195. This increases the gas pressure in the processing space, causing the gas to flow smoothly and evenly from the center of the wafer across the (multiple) wafer surfaces to the edge of the wafer. This improves the drying of the wafer surface by providing a more uniform radial removal of the liquid (L) from the wafer surface.

[0104] In some embodiments, the conduit 195 may include a first portion 192, a second portion 194, a third portion 196, a first valve 193, and a second valve 197, as in Figure 5 In such embodiments, Figure 6 The method 600 shown in FIG. 6 can further include controlling the position of the first valve 193 and the second valve 197 during one or more processing steps to direct the at least one processing fluid through the exhaust system 190 (in step 640).

[0105] During the first processing step, for example, method 600 may include: (a) injecting liquid (L) into the processing volume (PS) to clean or rinse the at least one surface of the semiconductor wafer; (b) closing the first valve 193 and opening the second valve 197 to direct the liquid out of the processing volume and through the first portion 192 and the third portion 196 of the conduit 195 to the outlet 198 of the exhaust system 190; and (c) retaining a portion of the liquid (L) within the first portion 192 of the conduit 195 to provide pressure resistance against the liquid injected into the processing volume. This pressure resistance improves wetting of the surface of the wafer (s) by providing a uniform flow velocity of the liquid radially across the surface of the wafer (s).

[0106] During a second processing step performed after the first processing step, the method 600 may further include: (a) injecting a gas (G) into the processing space (PS) to dry the at least one surface of the semiconductor wafer; and (b) opening the first valve 193 and closing the second valve 197 to direct the liquid out of the processing space and through the first portion 192, the second portion 194, and the third portion 196 of the conduit 195 to the outlet 198 of the exhaust system 190. The portion of the liquid remaining in the first portion 192 of the conduit 195 provides a pressure resistance against the gas injected into the processing space. This pressure resistance improves the drying of the surface of the wafer (s) by providing a more uniform radial removal of the liquid (L) from the surface of the wafer (s).

[0107] In some embodiments, after injecting the liquid (L) into the processing space to treat the wafer surface and before injecting the gas (G) into the processing space to dry the wafer surface, a Figure 6 (multiple) additional processing steps not shown in the figure. In one embodiment, the liquid (L) injected into the processing space can be a cleaning solution for cleaning the surface of the wafer. Examples of cleaning solutions are provided above. After the cleaning solution is injected into the processing space, a rinsing solution can be injected into the processing space to remove the cleaning solution and rinse the wafer surface. In one embodiment, the rinsing solution can be deionized water. Next, before injecting a gas (G) into the processing space to dry the wafer surface, a low surface tension liquid (such as For example In the process, IPA is injected into the processing space to remove the rinsing solution from the wafer surface. IPA has a relatively low surface tension, which enables more efficient wafer drying.

[0108] In some embodiments, additional processing step(s) may be utilized to improve wafer drying and avoid pattern collapse that sometimes occurs when using IPA to dry the wafer surface. For example, after injecting a low surface tension liquid into the processing space (PS), the wafer surface may be treated with a supercritical fluid, such as, for example, supercritical carbon dioxide (CO2), before drying the wafer surface. Since supercritical fluids have zero surface tension, pattern collapse does not occur when drying the wafer in a supercritical fluid environment.

[0109] Figure 8 Shown with Figure 1A The chamber design shown in FIG. 1 is similar to the chamber design shown in FIG. 1 but has additional features that enable supercritical processing to be performed within chamber 105. Figure 8 In the embodiment shown in FIG. 1 , the first set of valves 200 is disposed within the chamber 105 between the process volume (PS) and the exhaust system 190. The first set of valves 200 can be closed to seal the process fluid(s) (e.g., Figure 8 ), or open to allow the process fluid(s) to be discharged out of the process space through the conduit 195 contained in the exhaust system 190. The second set of valves 202 is disposed within the chamber 105 between the gas inlet 204 and the conduit 195 contained in the exhaust system 190. The second set of valves 202 may be closed (as shown) when the process fluid(s) are injected into the process space (PS). Figure 8 ), or open to allow gas (such as, for example, air or nitrogen) injected into gas inlet 204 to push any remaining process fluid(s) through conduit 195 and out of exhaust system 190.

[0110] In some embodiments of the methods described herein, a low surface tension liquid (e.g. For example After IPA is injected into the processing space to remove the rinse solution from the wafer surface, Figure 8 The wafer surface is treated with a supercritical fluid in the chamber 105 shown in FIG. In some embodiments, before the supercritical fluid (eg, supercritical CO 2 ) is injected into the processing space (PS), the chamber 105 may be closed. Figure 8 105 to seal the low surface tension liquid within the chamber 105. In some embodiments of the methods described herein, before treating the wafer surface with the supercritical fluid, the vertical position of the top plate 115 and the bottom plate 110 can be adjusted to reduce the gap (g) between the top plate and the bottom plate and reduce the amount of low surface tension liquid on the wafer surface. Reducing the amount of low surface tension liquid on the wafer surface provides the advantage of reducing or eliminating defects that may otherwise occur when the low surface tension liquid is combined with the supercritical fluid.

[0111] Systems and methods for processing semiconductor wafers (e.g., substrates) are described in various embodiments. A substrate may include any material portion or structure of a device (particularly a semiconductor or other electronic device), and may be, for example, a base substrate structure (e.g., a semiconductor substrate) or a layer on or overlying a base substrate structure. Thus, the term "substrate" is not intended to be limited to any particular base structure, underlying or overlying layer, patterned layer or unpatterned layer, but is contemplated to include any such layer or base structure, and any combination of layers and / or base structures.

[0112] As used herein, the term "substrate" means and includes a base material or structure on which a material is formed. It will be appreciated that a substrate may include a single material, multiple layers of different materials, one or more layers of regions with different materials or different structures, etc. These materials may include semiconductors, insulators, conductors, or combinations thereof. For example, a substrate may be a semiconductor substrate, a base semiconductor layer on a support structure, a metal electrode, or a semiconductor substrate on which one or more layers, structures, or regions are formed. The substrate may be a conventional silicon substrate or other bulk substrates including a semiconductor material layer. As used herein, the term "bulk substrate" means and includes not only silicon wafers, but also silicon on insulator ("SOI") substrates (e.g., silicon on sapphire ("SOS") substrates and silicon on glass ("SOG") substrates), silicon epitaxial layers on base semiconductor bases, and other semiconductor or optoelectronic materials (e.g., silicon germanium, germanium, gallium arsenide, gallium nitride, and indium phosphide). The substrate may be doped or tantalum doped.

[0113] It should be noted that references throughout this specification to "one embodiment" or "an embodiment" mean that a particular feature, structure, material, or characteristic described in conjunction with that embodiment is included in at least one embodiment of the invention, but does not imply that they are present in every embodiment. Thus, the appearance of the phrase "in one embodiment" or "in an embodiment" in various places throughout this specification does not necessarily refer to the same embodiment of the invention. Furthermore, particular features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments. In other embodiments, various additional layers and / or structures may be included, and / or described features may be omitted.

[0114] Those skilled in the relevant art will recognize that various embodiments can be practiced without one or more of the specific details or with other replacement and / or additional methods, materials or components. In other cases, well-known structures, materials, or operations are not shown or described in detail to avoid blurring the aspects of the various embodiments of the present invention. Similarly, for the purpose of explanation, specific numbers, materials and configurations are set forth to provide a thorough understanding of the present invention. Nevertheless, the present invention can be practiced without the specific details. In addition, it should be understood that the various embodiments shown in the drawings are illustrative representations and are not necessarily drawn to scale.

[0115] In view of this description, further modifications and alternative embodiments of the systems and methods described herein will be apparent to those skilled in the art. Therefore, it will be appreciated that the described systems and methods are not limited by these example arrangements. It will be understood that the forms of the systems and methods shown and described herein will be considered as example embodiments. Various changes can be made in the embodiments. Therefore, although the present invention is described herein with reference to specific embodiments, various modifications and changes can be made without departing from the scope of the present invention. Therefore, the description and the accompanying drawings will be viewed in an illustrative rather than a restrictive sense, and such modifications are intended to be included within the scope of the present invention. Further, any benefit, advantage, or solution to the problem described herein with respect to a specific embodiment is not intended to be interpreted as a key, required, or essential feature or element of any or all claims.

Claims

1. A processing system for processing a semiconductor wafer, the processing system comprising: A chamber in which the semiconductor wafer is processed, the chamber comprising: a base plate having a portion defining a lower working surface within the chamber; a top plate having a portion defining an upper working surface within the chamber, wherein the upper working surface is spaced above the lower working surface; a processing space between the upper working surface and the lower working surface; at least one opening through the lower working surface, wherein the at least one opening through the lower working surface is configured to direct a processing fluid into a processing volume above the lower working surface for processing a bottom surface of the semiconductor wafer; at least one opening through the upper working surface, wherein the at least one opening through the upper working surface is configured to direct the processing fluid into a processing volume below the upper working surface for processing the top surface of the semiconductor wafer; and An exhaust system has a conduit downstream of the processing space for directing the processing fluid out of the processing space, wherein the conduit is configured to retain a portion of the processing fluid within the conduit to provide pressure resistance against the processing fluid directed into the processing space.

2. The processing system of claim 1, wherein: The at least one opening through the lower working surface is centered in the bottom plate and the at least one opening through the upper working surface is centered in the top plate for directing the processing fluid into the processing volume near the center of the semiconductor wafer.

3. The processing system of claim 2, wherein: The pressure resistance provided by the portion of the process fluid retained within the conduit enables the process fluid to flow across the top and bottom surfaces of the semiconductor wafer from the center to the edge of the semiconductor wafer at a uniform fluid velocity.

4. The processing system of claim 1, wherein: The at least one opening through the lower working surface and the at least one opening through the upper working surface each include one or more nozzles coupled to distribute the treatment fluid into the treatment volume.

5. The processing system of claim 1, wherein: The upper working surface and the lower working surface are substantially flat planar surfaces.

6. The processing system of claim 1, wherein: The upper working surface and the lower working surface are non-planar surfaces, and wherein the non-planar surfaces are configured to provide a more uniform fluid velocity of the processing fluid radially across the top and bottom surfaces of the semiconductor wafer compared to substantially flat planar surfaces.

7. The processing system of claim 1, wherein: The upper working surface and the lower working surface each include a non-wetting coating that provides a contact angle of substantially 90 degrees between the treatment fluid and the upper working surface and the lower working surface.

8. The processing system of claim 1, further comprising an acoustic transducer, a heating element, or a sensor coupled to or embedded in the top plate or the bottom plate.

9. The processing system of claim 1, wherein: The chamber further comprises: an upper gap between the upper working surface and a top surface of the semiconductor wafer; and a lower gap between the lower working surface and a bottom surface of the semiconductor wafer; The upper gap and the lower gap range from about 0.01 mm to about 10.0 mm.

10. The processing system of claim 9, further comprising: at least one lifting mechanism coupled to at least one of the top plate and the bottom plate for adjusting a vertical position of the at least one of the top plate and the bottom plate; as well as A controller is coupled to the at least one lifting mechanism to adjust a vertical position of the at least one of the top plate and the bottom plate and to change at least one of the upper gap and the lower gap.

11. The processing system of claim 1, wherein: The conduit includes a first portion that is connected to the processing space and positioned below the lower working surface, and wherein the first portion of the conduit includes a U-shaped conduit that is configured to retain this portion of the processing fluid to provide pressure resistance against the processing fluid introduced into the processing space.

12. The processing system of claim 11, wherein: The catheter further comprises: a second portion positioned above the lower working surface; and a third portion positioned below the lower working surface; wherein the second portion of the conduit is coupled between the first portion of the conduit and the third portion of the conduit; and Wherein, the third portion of the conduit is coupled to the first portion of the conduit, the second portion of the conduit, and an outlet of the exhaust system.

13. The processing system of claim 12, wherein: The catheter further comprises: a first valve positioned between the first portion of the conduit and the second portion of the conduit; and a second valve positioned between the first portion of the conduit and a third portion of the conduit; Wherein, when the first valve is open and the second valve is closed, the conduit is configured to direct the process fluid out of the process space and sequentially through the first portion, the second portion and the third portion of the conduit to the outlet of the exhaust system.

14. The processing system of claim 13, wherein: The second portion of the conduit is configured to increase pressure resistance against a process fluid directed into the process volume when the first valve is open and the second valve is closed.

15. The processing system of claim 13, wherein: When the first valve is closed and the second valve is open, the conduit is configured to direct the process fluid out of the process volume and sequentially through the first and third portions of the conduit to an outlet of the exhaust system.

16. A method for processing a semiconductor wafer, the method comprising: inserting the semiconductor wafer into a processing space between a bottom plate and a top plate, the bottom plate having a portion defining a lower working surface of the closed chamber, and the top plate having a portion defining an upper working surface of the closed chamber; supporting the semiconductor wafer substantially parallel to the upper working surface and the lower working surface; as well as At least one surface of the semiconductor wafer is processed by the following steps: injecting at least one processing fluid into the processing space through at least one opening in the top plate, the bottom plate, or both the top plate and the bottom plate; forcing the at least one processing fluid across at least one surface of the semiconductor wafer; as well as The at least one treatment fluid is directed from the treatment space through an exhaust system having a conduit downstream of the treatment space, wherein the directing retains a portion of the at least one treatment fluid within the conduit to provide pressure resistance against injection of the at least one treatment fluid into the treatment space.

17. The method of claim 16, wherein: The injecting of the at least one processing fluid includes injecting a liquid into the processing space to process the at least one surface of the semiconductor wafer.

18. The method of claim 17, wherein: The directing retains a portion of the liquid within the conduit to provide pressure resistance against liquid injected into the processing volume, and wherein the pressure resistance provides a uniform flow velocity of the liquid radially across the at least one surface of the semiconductor wafer.

19. The method of claim 17, wherein: Before injecting the liquid into the processing space, the method further comprises: injecting a low surface tension liquid into the processing space to pre-wet the at least one surface of the semiconductor wafer, the upper working surface, and the lower working surface; Wherein, the low surface tension liquid injected into the processing space prevents bubbles from forming on the at least one surface of the semiconductor wafer when the liquid is subsequently injected into the processing space.

20. The method of claim 17, wherein: The injecting of the at least one processing fluid further includes: injecting a gas into the processing space after injecting the liquid to dry the at least one surface of the semiconductor wafer.

21. The method of claim 20, wherein: The directing retains a portion of the liquid within the conduit to provide pressure resistance against gas injected into the processing volume, and wherein the pressure resistance provides uniform drying of the at least one surface of the semiconductor wafer.

22. The method of claim 17, wherein: After performing said injecting of the liquid into the processing space, the method further comprises: injecting a rinsing solution into the processing volume to remove the liquid and rinse the at least one surface of the semiconductor wafer; injecting a low surface tension liquid into the processing volume to remove the rinsing solution from the at least one surface of the semiconductor wafer; adjusting the vertical positions of the top plate and the bottom plate to reduce the gap between the top plate and the bottom plate and reduce the amount of low surface tension liquid on the at least one surface of the semiconductor wafer; and The at least one surface of the semiconductor wafer is treated with a supercritical fluid.

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