Light detection device and electronic apparatus

Abstract

[Problem] To acquire gradation information and detect an event without increasing a circuit area. [Solution] A light detection device includes a first substrate and a second substrate stacked on each other. The first substrate has a pixel group including a first pixel that generates a pixel signal according to an amount of incident light and a second pixel that detects a brightness change of the incident light. The second substrate has an event detection circuit that detects an event based on a brightness change of the second pixel, in which at least a portion of the event detection circuit is disposed in a region other than a region of the same size facing the pixel group on the second substrate.

Description

Technical Field

[0001] The present disclosure relates to a photoelectric detection device and an electronic device. Background Art

[0002] There is known an imaging device that detects an event when an event occurs in an imaging scene where the absolute value of the amount of brightness change exceeds a predetermined threshold value (see Patent Document 1). This type of imaging device may be referred to as an event-based vision sensor (EVS).

[0003] Furthermore, an imaging device has been proposed in which each pixel can acquire grayscale information and detect an event (Patent Document 1).

[0004] Furthermore, an imaging device is proposed in which pixels for acquiring grayscale information (hereinafter, grayscale pixels) and pixels for detecting events (hereinafter, EVS pixels) are separately provided.

[0005] Reference List

[0006] Patent Literature

[0007] Patent document 1: Japanese Patent Application Publication No. 2020-88724. Summary of the invention

[0008] Problems to be solved by the present invention

[0009] In an imaging device, in order to generate a high-resolution captured image, the number of pixels needs to be increased, and as the number of pixels increases, the circuit scale of peripheral circuits such as an analog-to-digital (AD) converter and a signal processing circuit that processes a pixel signal output from each pixel increases.

[0010] Therefore, for example, an imaging device in which two chips are stacked has been put into practical use. In this type of imaging device, for example, a pixel array unit is provided on an upper chip, and peripheral circuits such as an AD converter and a signal processing circuit are provided on a lower chip.

[0011] The above-mentioned EVS pixel requires an event detection circuit in addition to the pixel circuit. The event detection circuit is usually arranged on the lower chip. When the number of EVS pixels as many as the number of grayscale pixels is arranged in the pixel array unit, the event detection circuit needs to be arranged in almost all areas of the lower chip facing the pixel array unit, and other peripheral circuits must be arranged outside the event detection circuit, and the chip size increases.

[0012] Therefore, the present disclosure provides a photodetection device and an electronic device capable of acquiring grayscale information and detecting an event without increasing a circuit area.

[0013] Solution to the problem

[0014] In order to solve the above problems, according to the present disclosure, a photoelectric detection device is provided, comprising:

[0015] a first substrate and a second substrate stacked on each other,

[0016] The first substrate has a pixel group, which includes a first pixel that generates a pixel signal according to the amount of incident light and a second pixel that detects a change in the brightness of the incident light.

[0017] The second substrate has an event detection circuit that detects an event based on a change in brightness of the second pixel, and

[0018] At least a portion of the event detection circuit is disposed in a region on the second substrate other than a region of the same size facing the pixel group.

[0019] The first substrate may have a plurality of pixel groups including a plurality of first pixels and a plurality of second pixels,

[0020] The second substrate may have a plurality of event detection circuits disposed adjacent to each other, and

[0021] At least a portion of the plurality of event detection circuits may be disposed in a region other than a region of the same size facing the plurality of pixel groups on the second substrate.

[0022] The first substrate may have a pixel array unit including a plurality of pixel groups, and

[0023] The event detection circuit may be disposed on the second substrate in an area of ​​the same size as that facing the pixel array unit.

[0024] The event detection circuit may output a signal indicating whether each of the plurality of second pixels has detected an event in synchronization with a predetermined frame period.

[0025] The event detection circuit may include a first differentiator and a second differentiator which respectively perform time differentiation on the electrical signals photoelectrically converted by two second pixels having different directions of brightness change.

[0026] The event detection circuit may output an event signal indicating that an event has been detected whenever the event detection circuit detects an event, regardless of the frame cycle.

[0027] At least a portion of the second pixel may be disposed on the second substrate.

[0028] The second pixel may have:

[0029] Photoelectric conversion element;

[0030] a charge-voltage conversion unit that generates a voltage signal obtained by logarithmically converting the charge photoelectrically converted by the photoelectric conversion element; and

[0031] The buffer circuit buffers the voltage signal.

[0032] The photoelectric conversion element, the charge-voltage conversion unit, and a portion of the buffer circuit may be disposed on the first substrate, and

[0033] A portion other than a portion of the buffer circuit may be disposed on the second substrate.

[0034] The second pixel may have:

[0035] a photoelectric conversion element; and

[0036] a charge-voltage conversion unit that converts the charge photoelectrically converted by the second pixel into a voltage signal that is subjected to logarithmic conversion, and

[0037] The charge-voltage conversion unit may have a diode connected between a cathode of the photoelectric conversion element and a power supply voltage node.

[0038] The second pixel may have:

[0039] a photoelectric conversion element; and

[0040] a charge-voltage conversion unit that converts the charge photoelectrically converted by the second pixel into a voltage signal that is subjected to logarithmic conversion, and

[0041] The charge-to-voltage conversion unit may have:

[0042] an amplifier connected to the cathode of the photoelectric conversion element; and

[0043] Bias circuit, provides bias current to the amplifier.

[0044] The charge-voltage conversion unit may include a bias circuit and have a plurality of transistors of the same conductivity type.

[0045] The charge-voltage conversion unit includes a plurality of transistors of a first conductivity type in addition to the bias circuit, and

[0046] The bias circuit may have transistors of the second conductivity type.

[0047] The event detection circuit may have a first circuit portion disposed on the first substrate and a second circuit portion disposed on the second substrate.

[0048] The event detection circuit may have:

[0049] a differentiator for performing time differentiation on a voltage signal output from the second pixel;

[0050] a source follower circuit connected to the output node of the differentiator; and

[0051] a comparator connected to an output node of the source follower circuit and detecting an event based on a result of comparing an output signal of the source follower circuit with a predetermined reference signal,

[0052] The first circuit portion may have a differentiator and a source follower circuit, and

[0053] The second circuit unit may include a comparator.

[0054] The event detection circuit may have:

[0055] a differentiator for performing time differentiation on a voltage signal output from the second pixel;

[0056] a source follower circuit connected to the output node of the differentiator; and

[0057] a comparator connected to an output node of the source follower circuit and detecting an event based on a result of comparing an output signal of the source follower circuit with a predetermined reference signal,

[0058] The first circuit portion may have a differentiator, a source follower circuit, and a portion of a comparator, and

[0059] The second circuit portion may have a portion other than a portion of the comparator.

[0060] Two or more first circuit portions connected to two or more second pixels may share one second circuit portion.

[0061] may further include a switch connected to the output nodes of the two or more first circuit parts, and

[0062] The switch may connect any one output node of two or more first circuit portions to an input node of a second circuit portion.

[0063] The switch may be disposed on the first substrate or the second substrate.

[0064] An event detection circuit may be provided for each of the plurality of second pixels, and

[0065] A plurality of event detection circuits may be disposed close to each other in a partial region on the second substrate.

[0066] According to the present disclosure, there is provided an electronic device, comprising:

[0067] a photoelectric detection device; and

[0068] a signal processing section that performs signal processing based on the pixel signal and the event signal output from the photodetection device,

[0069] Wherein, the photoelectric detection device comprises:

[0070] a first substrate and a second substrate stacked on each other,

[0071] The first substrate has a pixel group including a first pixel that generates a pixel signal according to the amount of incident light and a second pixel that detects a change in brightness of the incident light.

[0072] The second substrate has an event detection circuit that detects an event based on a change in brightness of the second pixel, and

[0073] At least a portion of the event detection circuit is disposed in a region on the second substrate other than a region of the same size facing the pixel group. BRIEF DESCRIPTION OF THE DRAWINGS

[0074] Figure 1 is a block diagram showing a schematic configuration of a photodetection device according to a first embodiment.

[0075] Figure 2 is a diagram schematically showing a chip configuration of the photodetection device according to the first embodiment.

[0076] Figure 3 is a circuit diagram showing the circuit configuration of a grayscale pixel.

[0077] Figure 4 is a circuit diagram showing the internal configuration of an EVS pixel and an event detection circuit.

[0078] Figure 5 : is a diagram showing the driving timing of the photodetection device according to the first embodiment.

[0079] Figure 6 It is shown Figure 2 A diagram of a modification of the chip configuration.

[0080] Figure 7 yes Figure 4 A modified circuit diagram of an event detection circuit.

[0081] Figure 8 It is shown that Figure 7 FIG. 1 is a diagram showing the driving timing of the photodetection device 1 of the event detection circuit.

[0082] Fig. 9 is a diagram showing a chip configuration of a photodetection device according to a comparative example.

[0083] Fig.10 It is shown Fig. 9Circuit diagram of the internal configuration of the EVS pixel, event detection circuit, readout circuit, and EVS digital circuit.

[0084] Fig.11 is a diagram showing a chip configuration of a photodetection device according to a second embodiment.

[0085] Fig.12 is a circuit diagram showing the internal configuration of an EVS pixel and an event detection circuit according to the second embodiment.

[0086] Fig.13A is a circuit diagram showing a first separation between the EVS pixel and the event detection circuit.

[0087] Fig. 13B is a circuit diagram showing a second separation between the EVS pixel and the event detection circuit.

[0088] Fig. 13C is a circuit diagram showing a third separation between EVS pixels and event detection circuitry.

[0089] Fig.13D is a circuit diagram showing a fourth separation between EVS pixels and event detection circuitry.

[0090] Fig.13E is a circuit diagram showing a fifth separation between EVS pixels and event detection circuitry.

[0091] Fig.14 is a circuit diagram illustrating an example in which at least a portion of an event detection circuit is shared by a plurality of EVS pixels.

[0092] Fig.15 is a diagram showing a chip configuration in which switches are provided on an upper chip.

[0093] Fig.16 is corresponding to Fig.15 Circuit diagram of the .

[0094] Fig.17 is a circuit diagram showing a circuit arrangement example of an upper chip and a lower chip.

[0095] Fig.18 is a circuit diagram showing an example of a photodetection device having a three-layer structure.

[0096] Fig.19 is a diagram showing that a plurality of event detection circuits are arranged in the column direction.

[0097] Fig. 20 is a block diagram showing an example of a schematic configuration of a vehicle control system.

[0098] Fig.211 is an explanatory diagram showing an example of the installation positions of the vehicle exterior information detection section and the imaging section. DETAILED DESCRIPTION

[0099] Hereinafter, embodiments of the photoelectric detection device and the electronic device will be described with reference to the accompanying drawings. Hereinafter, the main components of the photoelectric detection device and the electronic device will be mainly described, but the photoelectric detection device and the electronic device may have components and functions that are not shown or described. The following description does not exclude components and functions that are not shown or described.

[0100] (First Embodiment)

[0101] Figure 1 is a block diagram showing a schematic configuration of a photodetection device 1 according to the first embodiment. Figure 1 The photoelectric detection device 1 includes a pixel array unit 2, a grayscale analog-to-digital converter (ADC) 3, an event detection circuit 4, an EVS digital circuit 5, a control circuit 6 and a bias circuit 7.

[0102] The pixel array unit 2 has a plurality of grayscale pixels 8 and a plurality of EVS pixels 9. It is assumed that the number of grayscale pixels 8 in the pixel array unit 2 is greater than the number of EVS pixels 9, but the ratio between the number of grayscale pixels 8 and the number of EVS pixels 9 is arbitrary.

[0103] A plurality of grayscale pixels 8 and a plurality of EVS pixels 9 are arranged in the row direction x and the column direction y of the pixel array unit 2 . Figure 1 An example is shown in which the pixel array unit 2 is divided into a plurality of pixel groups 13. Each pixel group 13 has two or more grayscale pixels 8 and one EVS pixel 9. Note that the number of pixel groups 13 in the pixel array unit 2 is not particularly limited.

[0104] Each of the grayscale pixel 8 and the EVS pixel 9 has a photoelectric conversion element 14 (photodiode) and a pixel circuit. The pixel circuit for the grayscale pixel 8 converts the charge photoelectrically converted by the photoelectric conversion element 14 of the grayscale pixel 8 into a voltage to generate a pixel signal. The pixel signal includes grayscale information. The pixel circuit for EVS generates a voltage signal corresponding to the charge photoelectrically converted by the photoelectric conversion element 14 of the EVS pixel 9. The voltage signal is used to detect the amount of brightness change. The specific circuit configuration of the grayscale pixel 8 and the EVS pixel 9 will be described later.

[0105] The pixel signal photoelectrically converted by the grayscale pixel 8 is sent to the grayscale ADC 3 via a signal line extending in the column direction y. The voltage signal corresponding to the charge photoelectrically converted by the EVS pixel 9 is sent to the event detection circuit 4.

[0106] The grayscale ADC 3 performs AD conversion on pixel signals on a plurality of signal lines arranged at predetermined intervals in the row direction x to generate digital pixel signals.

[0107] Although in Figure 1 An event detection circuit 4 is shown in the figure, but in practice, the event detection circuit 4 is provided for each individual EVS pixel 9, and detects whether an event has occurred by comparing a voltage signal corresponding to the charge photoelectrically converted by the corresponding EVS pixel 9 with a threshold voltage. More specifically, the event detection circuit 4 outputs an event signal indicating whether an event has occurred. The event signal includes, for example, a turn-on event signal and a turn-off event signal. The turn-on event signal is a signal for detecting a turn-on event indicating that the amount of brightness change of the EVS pixel 9 exceeds a predetermined threshold. For example, when the turn-on event signal becomes a high logic, it indicates that a turn-on event has occurred. The turn-off event signal is a signal for detecting a turn-off event indicating that the amount of brightness change of the EVS pixel 9 is lower than a predetermined threshold. For example, when the turn-off event signal becomes a high logic, it indicates that a turn-off event has occurred.

[0108] In this embodiment, the on event signal detected by all EVS pixels 9 in the pixel array unit 2 is output simultaneously, and the off event signal detected by all EVS pixels 9 in the pixel array unit 2 is output simultaneously at another timing. In this specification, the on event signal and the off event signal are collectively referred to as event signals.

[0109] The event detection circuit 4 can detect the on event and the off event at the same time, and output the on event signal and the off event signal at the same time. In this case, the event signal will be two bits, one bit represents the on event signal, and the other bit represents the off event signal.

[0110] The EVS digital circuit 5 generates a digital signal obtained by performing AD conversion on a plurality of event signals detected by a plurality of EVS pixels 9 in the pixel array unit 2 .

[0111] The control circuit 6 generates Figure 1 The bias circuit 7 generates various control signals used by each unit in the photodetection device 1 and provides these control signals to each unit. Figure 1 Various bias signals used by each unit in the photodetection device 1.

[0112] Figure 2 Schematically shows the chip configuration of the photodetection device 1 according to the first embodiment. Figure 2 As shown, the photodetection device 1 according to the first embodiment can be configured by stacking a plurality of chips. Figure 2An example is shown in which the photodetection device 1 is configured by stacking an upper chip (first substrate) 11 and a lower chip (second substrate) 12 .

[0113] It is assumed that the upper chip 11 is disposed on the light incident side. Therefore, Figure 1 The pixel array unit 2 is arranged on the upper chip 11. On the lower chip 12, Figure 1 The grayscale ADC 3, event detection circuit 4, EVS digital circuit 5, control circuit 6 and bias circuit 7 in the Figure 2 A part of the circuit on the lower chip 12 in the embodiment may be arranged on the upper chip 11. In addition, as described later, Figure 1 The photodetection device 1 may be configured by stacking three or more chips.

[0114] Figure 2 An example is shown in which the pixel array unit 2 has four pixel groups 13 and each pixel group 13 has a plurality of grayscale pixels 8 and one EVS pixel 9 , but the number of pixel groups 13 included in the pixel array unit 2 is arbitrary. Figure 2 The lower chip 12 is provided with four event detection circuits 4 corresponding to the four EVS pixels 9 in the upper chip 11. For example, the four event detection circuits 4 are arranged adjacent to each other along a line in the row direction x.

[0115] As mentioned above, Figure 2 At least a portion of the event detection circuit 4 in the lower chip 12 is disposed in an area other than an area of ​​the same size facing the pixel group 13. Therefore, in the area directly below the pixel group 13 in the lower chip 12, circuits other than the event detection circuit 4 (e.g., grayscale ADC 3, control circuit 6, bias circuit 7, EVS digital circuit 5, etc.) can be disposed, and the size of the lower chip 12 can be reduced. Figure 2 In the example of , the event detection circuits 4 are commonly provided in a partial region of the region of the lower chip 12 directly below the pixel array unit 2 on the upper chip 11 .

[0116] exist Figure 2 , the grayscale ADC 3, the bias circuit 7, the control circuit 6, the event detection circuit 4, and the EVS digital circuit 5 are arranged along the column direction y of the lower chip 12, but this is an example and may be arbitrarily changed.

[0117] The upper chip 11 and the lower chip 12 are joined by Cu-Cu bonding, vias, bumps, etc. to perform signal transmission. Figure 2A wiring path 17 is shown connecting four EVS pixels 9 and four event detection circuits 4. The wiring path 17 extends from each EVS pixel 9 to the lower chip 12 in the vertical direction, for example via Cu-Cu bonding, and is directly connected to the corresponding event detection circuit 4, or is connected to the corresponding event detection circuit 4 via a wiring pattern 18 on the lower chip 12.

[0118] Figure 3 is a circuit diagram showing the circuit configuration of the grayscale pixel 8. Figure 3 As shown, the grayscale pixel 8 has a photoelectric conversion element 14 and a pixel circuit 15. The pixel circuit 15 of the grayscale pixel 8 has a transfer transistor Q1, a reset transistor Q2, an amplification transistor Q3 and a selection transistor Q4. All transistors Q1 to Q4 in the pixel circuit 15 are NMOS transistors.

[0119] The anode of the photoelectric conversion element 14 is set to a reference voltage node, and the cathode is connected to the source of the transfer transistor Q1. The drain of the transfer transistor Q1 is connected to the floating diffusion, the source of the reset transistor Q2, and the gate of the amplifier transistor Q3. The drain of the amplifier transistor Q3 is connected to the power supply voltage node, and the source of the amplifier transistor Q3 is connected to the drain of the selection transistor Q4. The source of the selection transistor Q4 is connected to the signal line.

[0120] Notice, Figure 3 is an example of a circuit configuration of a pixel circuit 15 of a grayscale pixel 8, and can be adopted in the same manner as Figure 3 The circuit configurations in the various circuit configurations are different.

[0121] Figure 4 is a circuit diagram showing the internal configuration of the EVS pixel 9 and the event detection circuit 4. The EVS pixel 9 has a logarithmic response section 21 and a buffer 22. The logarithmic response section 21 generates a voltage signal obtained by logarithmic conversion of the charge photoelectrically converted by the photoelectric conversion element 14. By logarithmic conversion, the dynamic range at the time of photoelectric conversion of the EVS pixel 9 can be expanded, and the sensitivity can be improved.

[0122] The logarithmic response section 21 has NMOS transistors Q21 to Q23 and a PMOS transistor Q24. The transistor Q22 has a gate and a drain connected, and functions as a diode. The drain of the transistor Q21 is connected to the power supply voltage node, and the source of the transistor Q21 is connected to the gate and drain of the transistor Q22. The gate of the transistor Q21 is connected to the drain of the transistor Q23 and the drain of the transistor Q24, and the connection node is the output node of the logarithmic response section 21. The source of the transistor Q24 is connected to the power supply voltage node, and a predetermined bias voltage Vlog is applied to the gate of the transistor Q24.

[0123] The buffer 22 has NMOS transistors Q25 and Q26 connected in cascode between a power supply voltage node and a ground voltage node. The output node of the logarithmic response section 21 is connected to the gate of the transistor Q25. The reference voltage SF is applied to the gate of the transistor Q26. The source of the transistor Q25 and the drain of the transistor Q26 are output nodes of the buffer 22. The transistor Q26 functions as a source follower circuit, and a voltage signal having a waveform corresponding to the source voltage of the transistor Q24 is output from the source of the transistor Q25.

[0124] Figure 4 An example is shown in which the logarithmic response section 21 in the EVS pixel 9 and the transistor Q25 in the buffer 22 are provided on the upper chip 11, and the transistor Q26 in the buffer 22 is provided on the lower chip 12. This is an example, and for example, the transistor Q26 in the buffer 22 may be provided on the upper chip 11, or the transistors Q25 and Q26 configuring the buffer 22 may be provided on the lower chip 12.

[0125] Figure 4 The event detection circuit 4 has a synchronous configuration, and outputs an event signal indicating whether each of the plurality of EVS pixels 9 has detected an event in synchronization with a predetermined frame period. Figure 4 The event detection circuit 4 in FIG. 2 has a differentiating circuit 23, a comparator 24, and an output circuit 25. The differentiating circuit 23 has a capacitor C1, NMOS transistors Q27 and Q28, and a PMOS transistor Q29.

[0126] Capacitor C1 is connected between the output node of buffer 22 and the gate of transistor Q29. Capacitor C1 provides a current corresponding to the amount of change of voltage signal Vp, which is the time derivative of voltage signal Vp output from buffer 22, to the gate of transistor Q29. Transistors Q29 and Q28 are connected between the power supply voltage node and the ground voltage node by cascode. A switch 26 for selecting three types of bias voltages is connected to the gate of transistor Q28. Switch 26 selects any one of bias voltage AZ for automatic zeroing, bias voltage POS for positive event detection, and bias voltage NEG for negative event detection based on the switching control signal BIAS_SW output from control circuit 6. Through the switching control of switch 26, the gate of transistor Q28 is set to the optimal bias voltage.

[0127] The differentiating circuit 23 outputs a differential signal from the drain of the transistor Q28 and the source of the transistor Q29 . The differential signal is input to the comparator 24 .

[0128] The comparator 24 has a PMOS transistor Q31 and an NMOS transistor Q30 connected in cascode between a power supply voltage node and a ground voltage node. The threshold signal 2NDCOMP is applied to the gate of the transistor Q30. The gate of the transistor Q31 is connected to the source of the transistor Q29, and the differential signal output from the differential circuit 23 is input to the gate of the transistor Q31. When the voltage level of the differential signal is higher than the voltage level of the threshold signal 2NDCOMP, the comparator 24 outputs a high-level event signal indicating that an event has been detected.

[0129] Figure 4 The comparator 24 can switch and output a turn-on event signal or a turn-off event signal from the source of the transistor Q31 by switching the gate voltage of the transistor Q28 with the switch 26 .

[0130] The output circuit 25 has a logic circuit (logic) 27 including a logic gate, a flip-flop, etc. The control signals LATCH_EN and POLARITY output from the control circuit 6 are input to the logic circuit 27. The control signal LATCH_EN is a signal that defines the timing for latching the event signal. The control signal POLARITY is a signal that specifies the polarity of the event signal. The logic circuit 27 outputs the event signal in synchronization with the frame period. The event signal output from the logic circuit 27 is input to the EVS digital circuit 5.

[0131] The EVS digital circuit 5 generates a digital signal based on event signals detected in all the EVS pixels 9 in the pixel array unit 2 .

[0132] Figure 5 2 is a diagram showing the driving timing of the photodetection device 1 according to the first embodiment. Figure 5 The driving timing of the grayscale pixels 8 and the EVS pixels 9 for three frames is shown. The photodetection device 1 according to the first embodiment reads the grayscale pixels 8 and the EVS pixels 9 in synchronization with the frame synchronization signal XVS.

[0133] exist Figure 5 In the example, in one frame cycle, first, the turn-on events of all EVS pixels 9 in the pixel array unit 2 are detected simultaneously (period T1). Next, the reset operation of all EVS pixels 9 in the pixel array unit 2 is performed (period T2). Next, the turn-on event signals of all EVS pixels 9 in the pixel array unit 2 are read simultaneously (period T3). Next, the turn-off events of all EVS pixels 9 in the pixel array unit 2 are detected (period T4). Next, the reset operation of all EVS pixels 9 in the pixel array unit 2 is performed (period T5). Next, the turn-off event signals of all EVS pixels 9 in the pixel array unit 2 are read (period T6). Thereafter, the reading of all grayscale pixels 8 in the pixel array unit 2 is performed (period T7).

[0134] Figure 2 An example is shown in which a wiring path 17 is set from an EVS pixel 9 set on an upper chip 11 to a lower chip 12 through Cu-Cu bonding, etc., and a wiring pattern 18 on the lower chip 12 is connected to a corresponding event detection circuit 4, but the wiring pattern can be set on the upper chip 11 side. Figure 6 It is shown Figure 2 FIG. 1 is a diagram showing a modification of the chip configuration. Figure 6 In the embodiment, the wiring pattern on the upper chip 11 is set from the EVS pixel 9 set on the upper chip 11 to the position just above the corresponding event detection circuit 4 on the lower chip 12, and is directly connected from this position to the event detection circuit 4 of the lower chip 12 through Cu-Cu bonding or the like. Since only the pixel array unit 2 is set on the upper chip 11, Figure 6 The chip configuration can be realized by setting the wiring pattern inside the pixel array unit 2 or in a free area outside the pixel array unit 2.

[0135] like Figure 5 As shown in the timing diagram, Figure 4 The event detection circuit 4 has a differentiating circuit 23 and a comparator 24, and detects the on-event signal and the off-event signal at different timings. Figure 4 As a modification, a differential circuit 23 and a comparator 24 for turning on the event signal and a differential circuit 23 and a comparator 24 for turning off the event signal may be provided in the event detection circuit 4.

[0136] Figure 7 yes Figure 4 A modified circuit diagram of the event detection circuit 4. Figure 4 The configuration is similar to the configuration of the EVS pixel 9 connected to Figure 7 Event detection circuit 4. Figure 7 The event detection circuit 4 includes a first event detection section 31 for detecting a turn-on event signal and a second event detection section 32 for detecting a turn-off event signal.

[0137] Each of the first event detection section 31 and the second event detection section 32 has Figure 4 The event detection circuit 4 has the same circuit configuration as in FIG. Figure 7 In the embodiment, the transistors in the first event detection unit 31 and the second event detection unit 32 are connected to Figure 4 The event detection circuit 4 in FIG. 1 is denoted by the same reference numerals.

[0138] The voltage signal output from the buffer 22 in the EVS pixel 9 is input to the first event detection section 31 and the second event detection section 32. The bias signal for the on-event signal is input to the gate of the transistor Q28 in the differential circuit (first differentiator) 23 of the first event detection section 31. In addition, the threshold voltage for the on-event signal is input to the gate of the transistor Q30 in the comparator 24 in the first event detection section 31. Similarly, the bias signal for the off-event signal is input to the gate of the transistor Q28 in the differential circuit (second differentiator) 23 in the second event detection section 32. In addition, the threshold voltage for the off-event signal is input to the gate of the transistor Q30 in the comparator 24 in the second event detection section 32. The on-event signal detected by the first event detection section 31 and the off-event signal detected by the second event detection section 32 are input to the output circuit 25.

[0139] The first event detection section 31 and the second event detection section 32 operate simultaneously. Therefore, when the EVS pixel 9 detects a turn-on event, the first event detection section 31 outputs a turn-on event signal, and when another EVS pixel 9 detects a turn-off event at the same timing, the second event detection section 32 outputs a turn-off event signal.

[0140] Figure 8 It is shown that Figure 7 Schematic diagram of the driving timing of the photoelectric detection device 1 of the event detection circuit 4. In one frame cycle, first, the turn-on events and turn-off events of all EVS pixels 9 in the pixel array unit 2 are detected simultaneously (cycle T1). Next, the reset operation of all EVS pixels 9 in the pixel array unit 2 is performed (cycle T2). Next, the turn-on event signal and the turn-off event signal of all EVS pixels 9 in the pixel array unit 2 are read simultaneously (cycle T3). In the case where the EVS pixel 9 detects a turn-on event, the first event detection unit 31 in the corresponding event detection circuit 4 outputs a turn-on event signal. In the case where the EVS pixel 9 detects a turn-off event, the second event detection unit 32 in the corresponding event detection circuit 4 outputs a turn-off event signal.

[0141] In this way, by providing the first event detection section 31 for the on event and the second event detection section 32 for the off event in the event detection circuit 4, the on event and the off event can be detected at the same time, and the on event signal and the off event signal can be output at the same time. Therefore, the detection time of the on event and the off event can be shortened.

[0142] Fig. 9 is a diagram showing a chip configuration of a photodetection device 1 according to a comparative example. Fig. 9The photodetection device 1 is configured by stacking an upper chip 11 and a lower chip 12. The pixel array unit 2 provided on the upper chip 11 has one EVS pixel 9 for three grayscale pixels 8. In this way, Fig. 9 The pixel array unit 2 has a ratio Figure 2 The pixel array unit 2 has more EVS pixels 9. Therefore, the event detection circuit 4 is arranged in almost all the areas facing the pixel array unit 2 on the lower chip 12, and the grayscale ADC 3, the reading circuit 33, the EVS digital circuit 5, the control circuit 6 and the bias circuit 7 are arranged outside the event detection circuit 4.

[0143] Figure 2 The read circuit 33 which does not exist in the embodiment is provided to improve the driving capability of the event signal output from the event detection circuit 4. The event signal output from the read circuit 33 is input to the EVS digital circuit 5.

[0144] exist Fig. 9 The reason why the reading circuit 33 is required in the photodetection device 1 is that the event detection circuit 4 is arranged in a large area, and the distance from the event detection circuit 4 to the EVS digital circuit 5 becomes long. Figure 2 In the photoelectric detection device 1, since the number of EVS pixels 9 in the pixel array unit 2 is less than Fig. 9 The number of EVS pixels in the chip 12 is such that the event detection circuit 4 can be arranged in a row near the EVS digital circuit 5 of the lower chip 12. Fig. 9 In the photoelectric detection device 1, the distance between the event detection circuit 4 and the EVS digital circuit 5 is Figure 2 The distance in is short, and there is no need to improve the driving capability of the event signal by the reading circuit 33. Fig. 9 In the photodetection device 1, since it is not necessary to provide the read circuit 33 in the lower chip 12, the size of the lower chip 12 can be reduced.

[0145] As mentioned above, in Fig. 9 In the photodetection device 1 , since the area of ​​the event detection circuit 4 provided in the lower chip 12 increases and the reading circuit 33 is required, the size of the lower chip 12 needs to be increased, and the size of the photodetection device 1 also increases.

[0146] Fig.10 It is shown Fig. 9 A circuit diagram showing the internal configuration of the EVS pixel 9, event detection circuit 4, read circuit 33 and EVS digital circuit 5.

[0147] Fig.10 The EVS pixel 9 in the Figure 4 The circuit of the EVS pixel 9 is configured. Figure 4 In the EVS pixel 9, transistors Q21 to Q25 are arranged on the upper chip 11, and transistor Q26 is arranged on the lower chip 12, and Fig.10 , the transistors Q21 to Q23 in the EVS pixel 9 are arranged on the upper chip 11 , and the transistors Q24 to Q26 are arranged on the lower chip 12 .

[0148] Fig.10 The event detection circuit 4 in the embodiment has a structure similar to Figure 4 The circuit configuration of the event detection circuit 4 in FIG. 4 includes a differential circuit 23 and a comparator 24. The circuit configuration of the output circuit 25 provided at the subsequent stage of the comparator 24 is similar to that of the output circuit 25. Figure 4 The output circuit 25 is different. Figure 4 The logic circuit 27 is similarly configured to the logic circuit 27, Fig.10 The output circuit 25 has NMOS transistors Q32 and Q33 as the Figure 4 The output circuit 25 does not exist in the configuration.

[0149] Fig.10 The reading circuit 33 in the event detection circuit 4 has a PMOS transistor Q34 and a latch circuit (latch) 34. The source of the transistor Q34 is connected to the power supply voltage node, and the drain of the transistor Q34 is connected to the latch circuit 34 and the drain of the transistor Q32 in the event detection circuit 4.

[0150] The latch circuit 34 latches and outputs the drain voltage of the transistor Q34 according to the event signal output from the event detection circuit 4. The output signal of the latch circuit 34 is input to the EVS digital circuit 5.

[0151] As mentioned above, except Figure 4 In addition to the circuit configuration of the event detection circuit 4, Fig.10 The event detection circuit 4 also has transistors Q32 and Q33. In addition, the reading circuit 33 is arranged at Fig.10 between the event detection circuit 4 and the digital circuit. Therefore, Fig.10 The size of the lower chip 12 is larger than Figure 2 and Figure 3 The size of the lower chip 12 in the embodiment is large, which hinders the miniaturization of the photodetection device 1.

[0152] As described above, in the first embodiment, the number of EVS pixels 9 in the pixel array unit 2 is made smaller than the number of grayscale pixels 8, and a plurality of event detection circuits 4 for a plurality of EVS pixels 9 in the pixel array unit 2 are gathered in the vicinity of the EVS digital circuit 5 in the lower chip 12. Therefore, circuits other than the event detection circuit 4 can be provided in the region of the lower chip 12 facing the pixel array unit 2 provided on the upper chip 11. In addition, since the event detection circuit 4 is provided in the vicinity of the EVS digital circuit 5, it is not necessary to provide the reading circuit 33 between the event detection circuit 4 and the EVS digital circuit 5, so that the size of the lower chip 12 can be further reduced, and the size of the photodetection device 1 can be further reduced.

[0153] (Second Embodiment)

[0154] The photodetection device 1 according to the first embodiment is of a synchronous type that reads an event signal in synchronization with a frame period, whereas the photodetection device 1 according to a second embodiment described below is of an asynchronous type.

[0155] Fig.11 is a diagram showing a chip configuration of a photodetection device 1 according to the second embodiment. Fig.11 The photodetection device 1 of the embodiment is configured by stacking an upper chip 11 and a lower chip 12 similarly to the first embodiment. The configuration of the upper chip 11 is similar to Figure 2 The second embodiment is configured as follows, and the pixel array unit 2 having grayscale pixels 8 and EVS pixels 9 is disposed on the upper chip 11. The second embodiment is also similar to the first embodiment in that the number of EVS pixels 9 is less than the number of grayscale pixels 8.

[0156] Fig.11 The lower chip 12 in the embodiment has a grayscale ADC 3, an event detection circuit 4, an EVS digital circuit 5, and a bias circuit 7. Figure 2 The control circuit 6 on the lower chip 12 and with Figure 2 Compared with the lower chip 12, the size can be further reduced.

[0157] Fig.12 is a circuit diagram showing the internal configuration of the EVS pixel 9 and the event detection circuit 4 according to the second embodiment. Fig.12 The internal configuration of the EVS Pixel 9 is similar to Figure 4 Internal configuration of the EVS pixel 9.

[0158] Fig.12 The event detection circuit 4 of the embodiment outputs an event signal indicating that an event has been detected whenever the event detection circuit 4 detects an event, regardless of the frame cycle. More specifically, Fig.12The event detection circuit 4 in FIG. 1 includes a first event detection unit 31 , a second event detection unit 32 , and a control signal generation unit 35 .

[0159] Fig.12 The circuit configuration of the first event detection unit 31 and the second event detection unit 32 in Figure 7 The circuit configurations of the first event detection unit 31 and the second event detection unit 32 are the same. Fig.12 In, constitute Figure 7 The circuit elements of the first event detection unit 31 and the second event detection unit 32 are composed of Figure 7 The same reference numerals as those in the drawings are denoted by the same reference numerals as those in the drawings.

[0160] The control signal generating unit 35 includes a PMOS transistor Q41, an NMOS transistor Q42, and a capacitor C2. The transistors Q41 and Q42 are connected between a power supply voltage node and a ground voltage node by a common source and a common gate. The first control signal from the EVS digital circuit 5 is input to the gate of the transistor Q41. The control signal SLOPE is input to the gate of the transistor Q42. Figure 4 The control signal AZ_SLOPE in the first event detection unit 31 is output from the connection node of the drain of the transistor Q41 and the drain of the transistor Q42. The control signal AZ_SLOPE is input to the gate of the transistor Q27 in the first event detection unit 31 and the gate of the transistor Q27 in the second event detection unit 32. The EVS digital circuit 5 outputs a switching control signal BIAS_SW for switching control of the switch 26. The switch 26 switches the gate voltage of the transistor Q28 by the switching control signal BIAS_SW.

[0161] As described above, in the photodetection device 1 according to the second embodiment, since the control signal AZ_SLOPE is generated in the event detection circuit 4 and the switching control signal BIAS_SW of the switch 26 is generated in the EVS digital circuit 5, Figure 4 The control circuit 6 becomes unnecessary. Therefore, the chip size of the lower chip 12 can be further reduced. Fig.11 The photodetection device 1 does not include the control circuit 6 and thus can output the on-event signal and the off-event signal asynchronously with the frame period.

[0162] (Third Embodiment)

[0163] As described in the first and second embodiments, a portion of the EVS pixel 9 and the event detection circuit 4 included in the photodetection device 1 is provided on the upper chip 11, and the remaining portion is provided on the lower chip 12. In the EVS pixel 9 and the event detection circuit 4, the circuit provided on the upper chip 11 and the circuit provided on the lower chip 12 may be separated not only in one manner but also in a plurality of manners.

[0164] Fig.13A is a circuit diagram showing a first separation between the EVS pixel 9 and the event detection circuit 4. Figure 4 , Fig.13A The example in which the transistors Q21 to Q25 in the EVS pixel 9 are arranged on the upper chip 11 and the transistor Q26 and the event detection circuit 4 in the EVS pixel 9 are arranged on the lower chip 12 is shown. As described above, the EVS pixel 9 has the logarithmic response section 21 and the buffer 22, but in Fig.13A In the example of , the logarithmic response section 21 and a portion of the buffer 22 are provided on the upper chip 11, and the remaining portion of the buffer 22 is provided on the lower chip 12. Therefore, Fig.13A The EVS pixels 9 in the embodiment are separately arranged on an upper chip 11 and a lower chip 12 .

[0165] Fig. 13B is a circuit diagram showing a second separation between the EVS pixel 9 and the event detection circuit 4. Fig. 13B In, similar to Fig.13A Perform separation, but Fig. 13B The circuit configuration of the EVS pixel 9 is similar to Fig.13A The circuit configuration of the EVS pixel 9 is partially different. Fig. 13B In the logarithmic response section 21 of the EVS pixel 9, the transistor Q22 is omitted and the transistor Q21 is diode-connected. Fig.13A In comparison, the internal configuration of the logarithmic response section 21 can be simplified.

[0166] Fig. 13C is a circuit diagram showing a third separation between the EVS pixel 9 and the event detection circuit 4 . Fig. 13C The logarithmic response section 21 in the EVS pixel 9 has an NMOS transistor Q24a instead of a PMOS transistor Q24. By replacing the PMOS transistor Q24 with the NMOS transistor Q24a, a bias current can be generated by a leakage current. In addition, by providing the NMOS transistor Q24a, all transistors Q21 to Q25 of the EVS pixel 9 provided on the upper chip 11 can be unified with the NMOS, and the manufacturing process can be simplified.

[0167] Fig.13D is a circuit diagram showing a fourth separation between the EVS pixel 9 and the event detection circuit 4. Fig.13D In the embodiment, not only the EVS pixel 9 but also at least a part of the differential circuit 23 in the event detection circuit 4 is disposed on the upper chip 11. It should be noted that at least a part of the comparator 24 in the event detection circuit 4 may be disposed on the upper chip 11.

[0168] Fig.13E is a circuit diagram showing a fifth separation between the EVS pixel 9 and the event detection circuit 4 . Fig.13E An example is shown in which a part of the comparator 24 is provided on the upper chip 11 . Fig.13E An example is shown in which the transistor Q30 in the comparator 24 is provided on the upper chip 11 and the transistor Q31 is provided on the lower chip 12 , but the transistor Q31 may be provided on the upper chip 11 and the transistor Q30 may be provided on the lower chip 12 .

[0169] Fig.13A , Fig. 13B , Fig. 13C and Fig.13D An example is shown in which one set of differentiating circuit 23 and comparator 24 is provided in event detection circuit 4. However, even in the case where a plurality of sets of differentiating circuits 23 and comparators 24 are provided in event detection circuit 4, circuits provided arbitrarily separately on upper chip 11 and lower chip 12 are conceivable.

[0170] Above Figure 7 is a diagram showing an example of how to separate the upper chip 11 and the lower chip 12 in the case where the first event detection section 31 and the second event detection section 32 are provided in the event detection circuit 4 . Figure 7 An example is shown in which the transistors Q21 to Q25 in the EVS pixel 9 are provided on the upper chip 11 , and the transistor Q26 in the EVS pixel 9 and the entire event detection circuit 4 are provided on the lower chip 12 .

[0171] In the above-described photodetection device 1 , an example has been described in which the EVS pixels 9 correspond to the event detection circuits 4 on a one-to-one basis, but a configuration in which a plurality of EVS pixels 9 share one event detection circuit 4 may also be employed.

[0172] Fig.14 is a circuit diagram showing an example in which at least a portion of the event detection circuit 4 is shared by a plurality of EVS pixels 9 . Fig.14 There are a plurality of individual pixel units 41 including the EVS pixel 9 and the first part of the event detection circuit 4, and a shared part 42 including the remaining second part except the first part of the event detection circuit 4. The plurality of individual pixel units 41 are arranged on the upper chip 11, and the shared part 42 is arranged on the lower chip 12.

[0173] Each of the plurality of individual pixel units 41 has transistors Q21 to Q26 in the EVS pixel 9 and transistors Q27 and Q28 and a capacitor C3 in the event detection circuit 4. The shared portion 42 has transistors Q29 to Q31 and a switch 43. The switch 43 performs switching control on the plurality of individual pixel units 41 to connect any one of the individual pixel units 41 to the shared portion 42.

[0174] Although Fig.14 The example in which the switch 43 is disposed on the lower chip 12 is shown, but the switch 43 may be disposed on the upper chip 11, as shown in FIG. Fig.15 shown. Fig.16 is corresponding to Fig.15 Circuit diagram of the .

[0175] like Fig.14 As shown, since the shared part 42 as a part of the event detection circuit 4 is arranged on the lower chip 12, and the shared part 42 is shared by multiple individual pixel units 41 arranged on the upper chip 11, circuits other than the shared part 42 (for example, grayscale ADC 3, EVS digital circuit 5, control circuit 6, bias circuit 7, etc.) can be arranged in the area facing the individual pixel units 41 on the lower chip 12, and the chip size of the lower chip 12 can be reduced.

[0176] As described above, in the third embodiment, since the EVS pixel 9 and the event detection circuit 4 can be arbitrarily separated and arranged on the upper chip 11 and the lower chip 12, the circuit area of ​​the upper chip 11 and the lower chip 12 can be optimized, and the entire information processing device can be miniaturized. In addition, in some cases, the information processing device can also be configured by stacking three or more chips.

[0177] (Fourth Embodiment)

[0178] The photodetection device 1 according to the first to third embodiments is configured by being divided into an upper chip 11 and a lower chip 12. As described above, the method of dividing the circuit of the photodetection device 1 into the upper chip 11 and the lower chip 12 is arbitrary. For example, Fig.17 An example is shown in which the EVS pixel 9 and the transistor Q25 of the event detection circuit 4 are provided on the upper chip 11 , and other circuit parts are provided on the lower chip 12 .

[0179] Furthermore, the photodetection device 1 having a stacked structure of three or more layers may be manufactured by stacking one or more intermediate chips 13 between the upper chip 11 and the lower chip 12 .

[0180] Fig.18 is a circuit diagram showing an example of a photodetection device 1 having a three-layer structure. Fig.18, the photoelectric conversion element 14 and transistors Q21 to Q23 are arranged on the upper chip 11, the transistors Q24 and Q25 are arranged on the middle chip 10, and the remaining circuit parts of the event detection circuit 4 and the output circuit 25 are arranged on the lower chip 12. In the case where the photoelectric detection device 1 has a stacked structure of three or more layers, the corresponding chips are connected by Cu-Cu bonding, through holes or bumps, but it is desirable that the corresponding circuit elements are arranged so that the wiring pattern in each chip is as short as possible.

[0181] Although in the above Figure 2 FIG. 4 shows an example of arranging a plurality of event detection circuits 4 along the row direction X, but Fig.19 As shown, a plurality of event detection circuits 4 can be arranged in the column direction. By collectively arranging a plurality of event detection circuits 4 in a partial area on the lower chip 12, other areas can be effectively used to arrange other circuits, and the size of the lower chip 12 can be reduced.

[0182] (Application Example)

[0183] The technology according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure can also be implemented as a device installed on any type of mobile body (such as a car, an electric vehicle, a hybrid electric vehicle, an automatic two-wheeled vehicle, a bicycle, a personal mobile body, an airplane, a drone, a ship, a robot, a construction machine, an agricultural machine (tractor), etc.).

[0184] Fig. 20 7000 is a block diagram showing a schematic configuration example of a vehicle control system 7000 as an example of a mobile body control system to which the technology of the present disclosure is applied. The vehicle control system 7000 includes a plurality of electronic control units connected to each other via a communication network 7010. Fig. 20 In the example shown, the vehicle control system 7000 includes a drive system control unit 7100, a body system control unit 7200, a battery control unit 7300, an external information detection unit 7400, an internal information detection unit 7500, and an integrated control unit 7600. For example, the communication network 7010 connecting the plurality of control units to each other may be an in-vehicle communication network conforming to any standard, such as a controller area network (CAN), a local interconnect network (LIN), a local area network (LAN), FlexRay (registered trademark), and the like.

[0185] Each control unit includes: a microcomputer that performs calculations according to various programs; a storage unit that stores programs executed by the microcomputer, parameters for various operations, etc.; and a drive circuit that drives various control target devices. Each control unit further includes: a network interface (I / F) for communicating with other control units via the communication network 7010; and a communication I / F for communicating with devices, sensors, etc. inside and outside the vehicle through wired communication or radio communication. Fig. 20 , a microcomputer 7610, a general communication I / F 7620, a dedicated communication I / F 7630, a positioning unit 7640, a beacon receiving unit 7650, an onboard device I / F 7660, a sound / image output unit 7670, an onboard network I / F 7680, and a storage unit 7690 are shown as a functional configuration of the integrated control unit 7600. Other control units similarly include a microcomputer, a communication I / F, a storage unit, and the like.

[0186] The drive system control unit 7100 controls the operation of devices related to the drive system of the vehicle according to various programs. For example, the drive system control unit 7100 is used as a control device for a drive force generating device (such as an internal combustion engine, a drive motor, etc.) for generating the drive force of the vehicle, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating the braking force of the vehicle, etc. The drive system control unit 7100 may have a function as a control device for an anti-lock braking system (ABS), an electronic stability control (ESC), etc.

[0187] The drive system control unit 7100 is connected to the vehicle state detection unit 7110. The vehicle state detection unit 7110 includes, for example, a gyro sensor for detecting the angular velocity of the axial rotational motion of the vehicle body, an acceleration sensor for detecting the acceleration of the vehicle, and at least one of sensors for detecting the operation amount of the accelerator pedal, the operation amount of the brake pedal, the steering angle of the steering wheel, the engine speed, or the speed of the wheels, etc. The drive system control unit 7100 performs arithmetic processing using the signal input from the vehicle state detection unit 7110, and controls the internal combustion engine, the drive motor, the electric power steering device, the brake device, etc.

[0188] The body system control unit 7200 controls the operation of various devices provided in the body according to various programs. For example, the body system control unit 7200 is used as a control device for a keyless entry system, a smart key system, a power window device, or various lights such as a headlight, a reverse light, a brake light, a turn signal, a fog light, etc. In this case, a radio wave transmitted from a portable device used instead of a key or a signal of various switches may be input to the body system control unit 7200. The body system control unit 7200 receives these input radio waves or signals, and controls the door lock device, the power window device, the lights, etc. of the vehicle.

[0189] The battery control unit 7300 controls the secondary battery 7310 as a power source for driving the motor according to various programs. For example, information about the battery temperature, the battery output voltage, the amount of charge remaining in the battery, etc. is supplied to the battery control unit 7300 from the battery device including the secondary battery 7310. The battery control unit 7300 performs arithmetic processing using these signals, and performs control for adjusting the temperature of the secondary battery 7310 or controls a cooling device provided in the battery device or the like.

[0190] The vehicle exterior information detection unit 7400 detects information about the exterior of the vehicle including the vehicle control system 7000. For example, the vehicle exterior information detection unit 7400 is connected to at least one of the imaging unit 7410 and the vehicle exterior information detection unit 7420. The imaging unit 7410 includes at least one of a time-of-flight (ToF) camera, a stereo camera, a monocular camera, an infrared camera, and other cameras. For example, the vehicle exterior information detection unit 7420 includes at least one of an environmental sensor for detecting current atmospheric conditions or weather conditions and a peripheral information detection sensor for detecting other vehicles, obstacles, pedestrians, etc., in the periphery of the vehicle including the vehicle control system 7000.

[0191] The environmental sensor may be, for example, at least one of a raindrop sensor for detecting rain, a fog sensor for detecting fog, a sunshine sensor for detecting the degree of sunshine, and a snow sensor for detecting snowfall. The peripheral information detection sensor may be at least one of an ultrasonic sensor, a radar device, and a LIDAR device (a light detection and ranging device, or a laser imaging detection and ranging device). Each of the imaging unit 7410 and the vehicle exterior information detection unit 7420 may be provided as an independent sensor or device, or may be provided as a device in which a plurality of sensors or devices are integrated.

[0192] here, Fig.21An example of the installation position of the imaging unit 7410 and the vehicle exterior information detection unit 7420 is shown. The imaging units 7910, 7912, 7914, 7916 and 7918 are, for example, arranged at least one of the positions on the front nose, side mirrors, rear bumper and rear door of the vehicle 7900 and the position on the upper part of the windshield inside the vehicle. The imaging unit 7910 arranged at the front nose and the imaging unit 7918 arranged at the upper part of the windshield inside the vehicle mainly obtain an image in front of the vehicle 7900. The imaging units 7912 and 7914 arranged at the side mirrors mainly obtain an image of the side of the vehicle 7900. The imaging unit 7916 arranged at the rear bumper or rear door mainly obtains an image of the rear of the vehicle 7900. The imaging unit 7918 arranged at the upper part of the windshield inside the vehicle is mainly used to detect the front vehicle, pedestrians, obstacles, signals, traffic signs, lanes, etc.

[0193] Notice, Fig.21 An example of the imaging range of each of the imaging units 7910, 7912, 7914, and 7916 is shown. Imaging range a represents the imaging range of the imaging unit 7910 provided at the front nose. Imaging ranges b and c respectively represent the imaging ranges of the imaging units 7912 and 7914 provided at the side mirrors. Imaging range d represents the imaging range of the imaging unit 7916 provided at the rear bumper or the rear door. For example, by superimposing image data imaged by the imaging units 7910, 7912, 7914, and 7916, a bird's-eye view image of the vehicle 7900 observed from above can be obtained.

[0194] The vehicle exterior information detection units 7920, 7922, 7924, 7926, 7928, and 7930 provided at the front, rear, side, corner, and upper portion of the windshield inside the vehicle 7900 may also be, for example, ultrasonic sensors or radar devices. The vehicle exterior information detection units 7920, 7926, and 7930 provided at the front nose of the vehicle 7900, the rear bumper of the vehicle 7900, the rear door, and upper portion of the windshield inside the vehicle may also be, for example, LIDAR devices. These vehicle exterior information detection units 7920 to 7930 are mainly used to detect vehicles ahead, pedestrians, obstacles, and the like.

[0195] Return to reference Fig. 20, will continue to describe. The vehicle exterior information detection unit 7400 enables the imaging unit 7410 to image the image outside the vehicle, and receives the imaged image data. In addition, the vehicle exterior information detection unit 7400 receives detection information from the vehicle exterior information detection unit 7420 connected to the vehicle exterior information detection unit 7400. In the case where the vehicle exterior information detection unit 7420 is an ultrasonic sensor, a radar device, or a LIDAR device, the vehicle exterior information detection unit 7400 sends ultrasonic waves, electromagnetic waves, etc., and receives information of the received reflected waves. The vehicle exterior information detection unit 7400 can perform processing for detecting objects such as people, vehicles, obstacles, signs, characters on the road surface, etc., or processing for detecting the distance to the object based on the received information. The vehicle exterior information detection unit 7400 can perform environmental recognition processing for identifying rainfall, fog, road conditions, etc. based on the received information. The vehicle exterior information detection unit 7400 can calculate the distance to an object outside the vehicle based on the received information.

[0196] In addition, the vehicle exterior information detection unit 7400 can perform image recognition processing for identifying people, vehicles, obstacles, signs, characters on the road surface, etc., or processing for detecting the distance thereto based on the received image data. The vehicle exterior information detection unit 7400 can perform processing such as distortion correction, alignment, etc. on the received image data, and combine the image data imaged by a plurality of different imaging units 7410 to generate a bird's-eye view image or a panoramic image. The vehicle exterior information detection unit 7400 can perform viewpoint transformation processing using the image data imaged by the imaging unit 7410, which includes different imaging units.

[0197] The in-vehicle information detection unit 7500 detects information about the interior of the vehicle. For example, the in-vehicle information detection unit 7500 is connected to a driver state detection unit 7510 that detects the state of the driver. The driver state detection unit 7510 may include a camera that images the driver, a biosensor that detects the driver's biometric information, a microphone that collects sounds inside the vehicle, and the like. The biosensor is, for example, arranged in a seat surface, a steering wheel, and the like, and detects biometric information of an occupant sitting on the seat or a driver holding the steering wheel. The in-vehicle information detection unit 7500 may calculate the driver's fatigue or the driver's concentration based on the detection information input from the driver state detection unit 7510, or may determine whether the driver is dozing off. The in-vehicle information detection unit 7500 may subject the audio signal obtained by collecting the sound to processing such as noise elimination processing.

[0198] The integrated control unit 7600 controls the general operation within the vehicle control system 7000 according to various programs. The integrated control unit 7600 is connected to the input unit 7800. The input unit 7800 is implemented, for example, by a device (such as a touch panel, a button, a microphone, a switch, a lever, etc.) for the occupant to perform input operations. The integrated control unit 7600 may be supplied with data obtained by voice recognition of the voice input through the microphone. The input unit 7800 may be, for example, a remote control device using infrared or other radio waves, or an external connection device that supports the operation of the vehicle control system 7000, such as a mobile phone, a personal digital assistant (PDA), etc. The input unit 7800 may be, for example, a camera. In this case, the occupant can input information through gestures. Alternatively, data obtained by detecting the movement of a wearable device worn by the occupant may be input. In addition, the input unit 7800 may include, for example, an input control circuit, etc., which generates an input signal based on the information input by the occupant, etc. using the above-mentioned input unit 7800, and outputs the generated input signal to the integrated control unit 7600. The occupants and the like input various data or instruct processing operations to the vehicle control system 7000 by operating the input unit 7800 .

[0199] The storage unit 7690 may include a read-only memory (ROM) storing various programs executed by the microcomputer and a random access memory (RAM) storing various parameters, transportation results, sensor values, etc. In addition, the storage unit 7690 may be implemented by a magnetic storage device such as a hard disk drive (HDD), a semiconductor storage device, an optical storage device, a magneto-optical storage device, etc.

[0200] The general communication I / F 7620 is a widely used communication I / F that mediates communication with various devices existing in the external environment 7750. The general communication I / F 7620 may implement a cellular communication protocol such as Global System for Mobile Communications (GSM (registered trademark)), Worldwide Interoperability for Microwave Access (WiMAX (registered trademark)), Long Term Evolution (LTE (registered trademark)), LTE-Advanced (LTE-A), etc., or another wireless communication protocol such as a wireless LAN (also known as Wireless Fidelity (Wi-Fi (registered trademark)), Bluetooth (registered trademark), etc. For example, the general communication I / F 7620 may be connected to a device (e.g., an application server or a control server) existing on an external network (e.g., the Internet, a cloud network, or a company-specific network) via a base station or an access point. In addition, for example, the general communication I / F 7620 may be connected to a terminal existing near the vehicle (the terminal is, for example, a driver's terminal, a pedestrian or a store, or a machine type communication (MTC) terminal) using a peer-to-peer (P2P) technology.

[0201] The dedicated communication I / F 7630 is a communication I / F that supports the development of a communication protocol for use in a vehicle. The dedicated communication I / F 7630 may, for example, implement a standard protocol such as Wireless Access in Vehicular Environments (WAVE) (which is a combination of Institute of Electrical and Electronics Engineers (IEEE) 802.11p as a lower layer and IEEE 1609 as a higher layer), Dedicated Short Range Communication (DSRC), or a cellular communication protocol. The dedicated communication I / F 7630 generally performs V2X communication as a concept including one or more of the following: communication between vehicles and vehicles (vehicle to vehicle), communication between roads and vehicles (vehicle to infrastructure), communication between vehicles and homes (vehicle to home), and communication between pedestrians and vehicles (vehicle to pedestrians).

[0202] The positioning unit 7640 performs positioning by, for example, receiving a GNSS signal from a global navigation satellite system (GNSS) satellite (e.g., a GPS signal from a global positioning system (GPS) satellite), and generates position information including the latitude, longitude, and altitude of the vehicle. Incidentally, the positioning unit 7640 may identify the current position by exchanging signals with a wireless access point, or may obtain position information from a terminal such as a mobile phone, a personal handyphone system (PHS), or a smart phone having a positioning function.

[0203] The beacon receiving section 7650 receives, for example, radio waves or electromagnetic waves transmitted from a radio station installed on a road or the like, and thereby obtains information on the current position, congestion, closed roads, necessary time, etc. Incidentally, the function of the beacon receiving section 7650 may be included in the above-mentioned dedicated communication I / F 7630.

[0204] The vehicle-mounted device I / F 7660 is a communication interface that mediates the connection between the microcomputer 7610 and various vehicle-mounted devices 7760 present in the vehicle. The vehicle-mounted device I / F 7660 can establish a wireless connection using a wireless communication protocol such as wireless LAN, Bluetooth (registered trademark), near field communication (NFC), or wireless universal serial bus (WUSB). In addition, the vehicle-mounted device I / F 7660 can establish a wired connection through a universal serial bus (USB), a high-definition multimedia interface (HDMI (registered trademark)), a mobile high-definition link (MHL), etc. via a connection terminal (and a cable, if necessary) not shown in the figure. The vehicle-mounted device 7760 may, for example, include at least one of a mobile device and a wearable device owned by an occupant and an information device carried or attached to the vehicle. The vehicle-mounted device 7760 may also include a navigation device that searches for a path to an arbitrary destination. The vehicle-mounted device I / F 7660 exchanges control signals or data signals with these vehicle-mounted devices 7760.

[0205] The in-vehicle network I / F 7680 is an interface that mediates communication between the microcomputer 7610 and the communication network 7010. The in-vehicle network I / F 7680 transmits and receives signals and the like according to a predetermined protocol supported by the communication network 7010.

[0206] The microcomputer 7610 of the integrated control unit 7600 controls the vehicle control system 7000 according to various programs based on information obtained via at least one of the general communication I / F 7620, the dedicated communication I / F 7630, the positioning unit 7640, the beacon receiving unit 7650, the vehicle-mounted device I / F 7660, and the vehicle-mounted network I / F 7680. For example, the microcomputer 7610 can calculate the control target value of the driving force generation device, the steering mechanism, or the braking device based on the information obtained about the inside and outside of the vehicle, and output a control command to the drive system control unit 7100. For example, the microcomputer 7610 can perform cooperative control aimed at realizing the functions of the advanced driver assistance system (ADAS), which includes collision prevention or shock absorption for the vehicle, follow-up driving based on the following distance, vehicle speed maintenance driving, warning of vehicle collision, warning of vehicle deviation from the lane, etc. In addition, microcomputer 7610 can perform cooperative control intended for autonomous driving by controlling a drive force generating device, a steering mechanism, a braking device, etc. based on information obtained about the vehicle's surroundings, which enables the vehicle to travel automatically without depending on the driver's operation, etc.

[0207] The microcomputer 7610 may generate three-dimensional distance information between the vehicle and objects such as surrounding structures, people, etc., based on information obtained via at least one of the general communication I / F 7620, the dedicated communication I / F 7630, the positioning unit 7640, the beacon receiving unit 7650, the vehicle-mounted device I / F 7660, and the vehicle-mounted network I / F 7680, and generate local map information including information about the surroundings of the current position of the vehicle. In addition, the microcomputer 7610 may predict dangers such as collision of the vehicle, approach of pedestrians, etc., entering a closed road, etc. based on the obtained information, and generate a warning signal. The warning signal may be, for example, a signal for generating a warning sound or turning on a warning light.

[0208] The sound / image output unit 7670 sends an output signal of at least one of sound and image to an output device, which can visually or auditorily notify the occupants of the vehicle or the outside of the vehicle of information. Fig. 20In the example of , an audio speaker 7710, a display unit 7720, and an instrument panel 7730 are shown as output devices. For example, the display unit 7720 may include at least one of an onboard display and a head-up display. The display unit 7720 may have an augmented reality (AR) display function. The output device may be different from these devices, and may be another device such as headphones, a wearable device such as a glasses-type display worn by an occupant, a projector, a lamp, etc. In the case where the output device is a display device, the display device visually displays the results obtained by various processes performed by the microcomputer 7610 or information received from another control unit in various forms such as text, images, tables, graphics, etc. In addition, in the case where the output device is an audio output device, the audio output device converts an audio signal consisting of reproduced audio data or sound data, etc. into an analog signal, and outputs the analog signal audibly.

[0209] Note that Fig. 20 In the example shown, at least two control units connected via the communication network 7010 may be integrated into one control unit. Alternatively, each individual control unit may include a plurality of control units. In addition, the vehicle control system 7000 may include another control unit not shown in the figure. In addition, part or all of the functions performed by one of the control units described above may be assigned to another control unit. That is, as long as information is sent and received via the communication network 7010, predetermined arithmetic processing may be performed by any control unit. Similarly, a sensor or device connected to one of the control units may be connected to another control unit, and a plurality of control units may send and receive detection information to each other via the communication network 7010.

[0210] Note that the present technology can have the following configurations.

[0211] (1) A photoelectric detection device comprising:

[0212] a first substrate and a second substrate stacked on each other,

[0213] The first substrate has a pixel group, which includes a first pixel that generates a pixel signal according to the amount of incident light and a second pixel that detects a change in the brightness of the incident light.

[0214] The second substrate has an event detection circuit that detects an event based on a change in brightness of the second pixel, and

[0215] At least a portion of the event detection circuit is disposed in a region on the second substrate other than a region of the same size facing the pixel group.

[0216] (2) The photoelectric detection device according to (1),

[0217] The first substrate has a plurality of pixel groups including a plurality of first pixels and a plurality of second pixels, the second substrate has a plurality of event detection circuits arranged adjacent to each other, and

[0218] At least a portion of the plurality of event detection circuits is disposed in a region on the second substrate other than a region of the same size facing the plurality of pixel groups.

[0219] (3) The photoelectric detection device according to (2),

[0220] The first substrate has a pixel array unit including a plurality of pixel groups, and

[0221] The event detection circuit is disposed in a region of the same size on the second substrate facing the pixel array unit.

[0222] (4) The photodetection device according to (2) or (3), wherein the event detection circuit outputs a signal indicating whether each of the plurality of second pixels detects an event in synchronization with a predetermined frame period.

[0223] (5) A photodetection device according to any one of (1) to (3), wherein the event detection circuit has a first differentiator and a second differentiator, which respectively perform time differentiation on the electrical signals photoelectrically converted by two second pixels having different directions of brightness change.

[0224] (6) The photodetection device according to (5), wherein the event detection circuit outputs an event signal indicating that the event has been detected whenever the event detection circuit detects an event, regardless of a frame cycle.

[0225] (7) The photodetection device according to any one of (1) to (6), wherein at least a portion of the second pixel is provided on the second substrate.

[0226] (8) The photoelectric detection device according to (7),

[0227] Wherein, the second pixel has:

[0228] Photoelectric conversion element;

[0229] a charge-voltage conversion unit that generates a voltage signal obtained by logarithmically converting the charge photoelectrically converted by the photoelectric conversion element; and

[0230] The buffer circuit buffers the voltage signal.

[0231] The photoelectric conversion element, the charge-voltage conversion unit, and a portion of the buffer circuit are disposed on the first substrate, and

[0232] A portion other than a portion of the buffer circuit is disposed on the second substrate.

[0233] (9) The photodetection device according to any one of (1) to (7),

[0234] Wherein, the second pixel has:

[0235] a photoelectric conversion element; and

[0236] a charge-voltage conversion unit that converts the charge photoelectrically converted by the second pixel into a voltage signal that is subjected to logarithmic conversion, and

[0237] The charge-voltage conversion unit has a diode connected between a cathode of the photoelectric conversion element and a power supply voltage node.

[0238] (10) The photodetection device according to any one of (1) to (7),

[0239] Wherein, the second pixel has:

[0240] a photoelectric conversion element; and

[0241] a charge-voltage conversion unit that converts the charge photoelectrically converted by the second pixel into a voltage signal that is subjected to logarithmic conversion, and

[0242] The charge-to-voltage conversion unit has:

[0243] an amplifier connected to the cathode of the photoelectric conversion element; and

[0244] Bias circuit, provides bias current to the amplifier.

[0245] (11) The photodetection device according to (10), wherein the voltage conversion unit includes a bias circuit and has a plurality of transistors of the same conductivity type.

[0246] (12) The photoelectric detection device according to (10),

[0247] Wherein, in addition to the bias circuit, the voltage conversion unit also includes a plurality of transistors of the first conductivity type, and

[0248] The bias circuit has a transistor of the second conductivity type.

[0249] (13) The photodetection device according to any one of (1) to (12), wherein the event detection circuit has a first circuit portion provided on the first substrate and a second circuit portion provided on the second substrate.

[0250] (14) The photoelectric detection device according to (13),

[0251] Wherein, the event detection circuit has:

[0252] a differentiator for performing time differentiation on a voltage signal output from the second pixel;

[0253] a source follower circuit connected to the output node of the differentiator; and

[0254] a comparator connected to an output node of the source follower circuit and detecting an event based on a result of comparing an output signal of the source follower circuit with a predetermined reference signal,

[0255] The first circuit portion has a differentiator and a source follower circuit, and

[0256] The second circuit unit includes a comparator.

[0257] (15) The photoelectric detection device according to (13),

[0258] Wherein, the event detection circuit has:

[0259] a differentiator for performing time differentiation on a voltage signal output from the second pixel;

[0260] a source follower circuit connected to the output node of the differentiator; and

[0261] a comparator connected to an output node of the source follower circuit and detecting an event based on a result of comparing an output signal of the source follower circuit with a predetermined reference signal,

[0262] The first circuit portion has a differentiator, a source follower circuit, and a portion of a comparator, and

[0263] The second circuit portion has a portion other than a portion of the comparator.

[0264] (16) The photodetection device according to any one of (13) to (15), wherein two or more first circuit sections connected to two or more second pixels share one second circuit section.

[0265] (17) The photoelectric detection device according to (16), further comprising:

[0266] a switch connected to the output nodes of two or more first circuit portions,

[0267] The switch connects any output node of two or more first circuit parts to an input node of the second circuit part.

[0268] (18) The photodetection device according to (17), wherein the switch is provided on the first substrate or the second substrate.

[0269] (19) The photodetection device according to any one of (3) to (15),

[0270] wherein an event detection circuit is provided for each of the plurality of second pixels, and

[0271] A plurality of event detection circuits are disposed close to each other in a partial region on the second substrate.

[0272] (20) An electronic device comprising:

[0273] a photoelectric detection device; and

[0274] a signal processing section that performs signal processing based on the pixel signal and the event signal output from the photodetection device,

[0275] Wherein, the photoelectric detection device comprises:

[0276] a first substrate and a second substrate stacked on each other,

[0277] The first substrate has a pixel group including a first pixel that generates a pixel signal according to the amount of incident light and a second pixel that detects a change in brightness of the incident light.

[0278] The second substrate has an event detection circuit that detects an event based on a change in brightness of the second pixel, and

[0279] At least a portion of the event detection circuit is disposed in a region on the second substrate other than a region of the same size facing the pixel group.

[0280] The various aspects of the present disclosure are not limited to the above-mentioned embodiments, but include various modifications that can be thought of by those skilled in the art, and the effects of the present disclosure are not limited to the above-mentioned contents. That is, various additions, modifications and partial deletions can be made without departing from the concept and spirit of the present disclosure obtained from the contents defined in the claims and their equivalents.

[0281] Reference Mark List

[0282] 1 Photoelectric detection device

[0283] 2 pixel array unit

[0284] 4 Event Detection Circuit

[0285] 5EVS digital circuit

[0286] 6. Control Circuit

[0287] 7 Bias Circuit

[0288] 8 grayscale pixels

[0289] 9EVS Pixel

[0290] 11 Upper chip

[0291] 12 Lower chip

[0292] 13 pixel groups

[0293] 14 Photoelectric conversion element

[0294] 15 pixel circuit

[0295] 17 wiring paths

[0296] 18 Wiring Pattern

[0297] 21 Logarithmic response unit

[0298] 22 Buffer

[0299] 23 Differential Circuit

[0300] 24 Comparators

[0301] 25 Output Circuit

[0302] 26 switches

[0303] 27 Logic Circuit

[0304] 31First event detection unit

[0305] 32 Second event detection unit

[0306] 34 Latch circuit

[0307] 35 control signal generating unit

[0308] 41 individual pixel units

[0309] 42 Shared Department

[0310] 43 switches.

Claims

1. A photoelectric detection device, comprising: a first substrate and a second substrate stacked on each other, The first substrate has a pixel group, the pixel group includes a first pixel that generates a pixel signal according to the amount of incident light and a second pixel that detects a change in brightness of the incident light. The second substrate has an event detection circuit that detects an event based on a change in brightness of the second pixel, and At least a portion of the event detection circuit is disposed in a region on the second substrate other than a region of the same size facing the pixel group.

2. The photoelectric detection device according to claim 1, in, The first substrate has a plurality of pixel groups including a plurality of the first pixels and a plurality of the second pixels. The second substrate has a plurality of the event detection circuits disposed adjacent to each other, and At least a portion of the plurality of event detection circuits is disposed in a region on the second substrate other than a region of the same size facing the plurality of pixel groups.

3. The photoelectric detection device according to claim 2, in, The first substrate has a pixel array unit including a plurality of the pixel groups, and The event detection circuit is disposed in a region of the same size on the second substrate facing the pixel array unit.

4. The photoelectric detection device according to claim 2, wherein: The event detection circuit outputs a signal indicating whether each of the plurality of second pixels has detected the event in synchronization with a predetermined frame period.

5. The photoelectric detection device according to claim 1, wherein: The event detection circuit includes a first differentiator and a second differentiator, and the first differentiator and the second differentiator respectively perform time differentiation on the electric signals photoelectrically converted by the two second pixels having different directions of brightness change.

6. The photoelectric detection device according to claim 5, wherein: The event detection circuit outputs an event signal indicating that the event has been detected whenever the event detection circuit detects the event, regardless of a frame cycle.

7. The photoelectric detection device according to claim 1, wherein: At least a portion of the second pixel is disposed on the second substrate.

8. The photoelectric detection device according to claim 7, in, The second pixel has: Photoelectric conversion element; a charge-voltage conversion unit that generates a voltage signal obtained by logarithmically converting the charge photoelectrically converted by the photoelectric conversion element; as well as a buffer circuit, buffering the voltage signal, A portion of the buffer circuit, the photoelectric conversion element, and the charge-voltage conversion unit are provided on the first substrate, and A portion other than the portion of the buffer circuit is disposed on the second substrate.

9. The photoelectric detection device according to claim 1, in, The second pixel has: a photoelectric conversion element; and a charge-voltage conversion unit that converts the charge photoelectrically converted by the second pixel into a voltage signal that is subjected to logarithmic conversion, and The charge-voltage conversion unit has a diode connected between a cathode of the photoelectric conversion element and a power supply voltage node.

10. The photoelectric detection device according to claim 1, in, The second pixel has: a photoelectric conversion element; and a charge-voltage conversion unit that converts the charge photoelectrically converted by the second pixel into a voltage signal that is subjected to logarithmic conversion, and The charge-to-voltage conversion unit has: an amplifier connected to a cathode of the photoelectric conversion element; and The bias circuit provides a bias current to the amplifier.

11. The photoelectric detection device according to claim 10, wherein: The charge-voltage conversion unit includes the bias circuit and has a plurality of transistors of the same conductivity type.

12. The photoelectric detection device according to claim 10, in, The charge-voltage conversion unit further includes a plurality of transistors of a first conductivity type in addition to the bias circuit, and The bias circuit has a transistor of a second conductivity type.

13. The photoelectric detection device according to claim 1, wherein: The event detection circuit has a first circuit portion provided on the first substrate and a second circuit portion provided on the second substrate.

14. The photoelectric detection device according to claim 13, in, The event detection circuit has: a differentiator for performing time differentiation on the voltage signal output from the second pixel; a source follower circuit connected to an output node of the differentiator; as well as a comparator connected to an output node of the source follower circuit and detecting the event based on a result of comparing an output signal of the source follower circuit with a predetermined reference signal, The first circuit portion has the differentiator and the source follower circuit, and The second circuit part has the comparator.

15. The photoelectric detection device according to claim 13, in, The event detection circuit has: a differentiator for performing time differentiation on the voltage signal output from the second pixel; a source follower circuit connected to an output node of the differentiator; as well as a comparator connected to an output node of the source follower circuit and detecting the event based on a result of comparing an output signal of the source follower circuit with a predetermined reference signal, The first circuit portion has a portion of the comparator, the differentiator, and the source follower circuit, and The second circuit portion has a portion other than the portion of the comparator.

16. The photoelectric detection device according to claim 13, wherein: Two or more of the first circuit portions connected to two or more of the second pixels share one second circuit portion.

17. The photoelectric detection device according to claim 16, further comprising: a switch connected to two or more output nodes of said first circuit portion, The switch connects any output node of two or more of the first circuit parts to an input node of the second circuit part.

18. The photoelectric detection device according to claim 17, wherein: The switch is disposed on the first substrate or the second substrate.

19. The photoelectric detection device according to claim 3, in, The event detection circuit is provided for each of a plurality of the second pixels, and A plurality of the event detection circuits are disposed close to each other in a partial region on the second substrate.

20. An electronic device, comprising: Photoelectric detection device; as well as a signal processing section that performs signal processing based on the pixel signal and the event signal output from the photodetection device, Wherein, the photoelectric detection device comprises: a first substrate and a second substrate stacked on each other, The first substrate has a pixel group, the pixel group includes a first pixel that generates a pixel signal according to the amount of incident light and a second pixel that detects a change in brightness of the incident light. The second substrate has an event detection circuit that detects an event based on a change in brightness of the second pixel, and At least a portion of the event detection circuit is disposed in a region on the second substrate other than a region of the same size facing the pixel group.

Images