Tantalum film growth method, quantum chip preparation method, substrate and quantum chip
Through the annealing operation of the first diaphragm obtained by the coating, the purity of the alpha structure was improved, the problem of generating high -purity alpha phase membrane was solved, and the effect of preparing a long -town quantum chip was achieved.
Patent Information
- Application Number
- CN202310936733.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-27
- Publication Date
- 2025-01-28
AI Technical Summary
How to generate high-purity alpha-phase tantalum films to prepare coherent quantum chips.
By obtaining the first membrane on the substrate, it has a first -purity alpha structure, and the annealing operation is performed to obtain a second -schochicon, which has a second -purity alpha structure. The second purity is greater than the first purity. Essence
The purity of the α -structure is increased, the TLS loss is reduced, the relevant time of the quantum bit is extended, and it is suitable for preparing a long quantum chip.
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Figure CN119372599A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of micro-nano processing, and in particular to a tantalum film growth method, a quantum chip preparation method, a substrate and a quantum chip. Background Art
[0002] Currently, the material commonly used to prepare superconducting quantum chips is aluminum film, but recently tantalum film has also received more and more attention. The coherence time of quantum bits generated by tantalum film is much longer than that of aluminum film.
[0003] In the related art, the grown tantalum film has two phases, namely α phase and β phase. Compared with β phase tantalum film, α phase tantalum film has smaller TLS (Two-Level System) loss. TLS loss refers to the interaction between the two-level system in the superconducting quantum chip material and the microwaves in the quantum chip, which leads to the shortening of the coherence time (or decoherence time) of the quantum bit. Therefore, the coherence time of the quantum bit generated by the α phase tantalum film is greater than that of the β phase tantalum film, and the α phase tantalum film is more suitable for the preparation of superconducting quantum chips.
[0004] How to generate high-purity α-phase tantalum film has become a technical problem that needs to be solved urgently. Summary of the invention
[0005] The present application provides a tantalum film growth method, a quantum chip preparation method, a substrate and a quantum chip. The above scheme provides a high-purity α-phase tantalum film growth method, and the high-purity α-phase tantalum film is more conducive to the preparation of long-coherent quantum chips. The technical scheme is as follows:
[0006] According to one aspect of the present application, a method for growing a tantalum film is provided, the method comprising:
[0007] Plating a first tantalum film on a substrate, wherein the first tantalum film has an α-phase structure of a first purity;
[0008] An annealing operation is performed on the first tantalum film to obtain a second tantalum film, wherein the second tantalum film has an α-phase structure with a second purity, and the second purity is greater than the first purity.
[0009] In an optional embodiment, the annealing operation is performed on the first tantalum film at a first annealing temperature to obtain the second tantalum film; wherein the first annealing temperature is greater than or equal to 700°C.
[0010] In an optional embodiment, the first annealing temperature is determined according to a heating capacity of an annealing device; wherein the annealing device is a device that performs the annealing operation.
[0011] In an optional embodiment, the annealing operation is performed on the first tantalum film for a first annealing time to obtain the second tantalum film; wherein the first annealing time is greater than or equal to 2 hours.
[0012] In an optional embodiment, the first annealing duration is determined according to the temperature resistance of an annealing device; wherein the annealing device is a device for performing the annealing operation.
[0013] In an optional embodiment, the first tantalum film is obtained by coating on the substrate in a temperature range of -20°C to 200°C in combination with coating parameters.
[0014] In an optional embodiment, the coating parameters include at least one of coating power, coating gas pressure, coating gas flow rate, target-substrate distance, and tantalum film thickness.
[0015] In an optional embodiment, the first tantalum film is a mixed phase tantalum film having an α phase structure and a β phase structure, wherein the α phase structure refers to a body-centered cubic structure of the tantalum film, and the β phase structure refers to a face-centered cubic structure of the tantalum film.
[0016] In an optional embodiment, the material of the substrate includes at least one of sapphire, high-resistance silicon, and silicon carbide.
[0017] In an optional embodiment, the first tantalum film is obtained by magnetron sputtering.
[0018] According to one aspect of the present application, a method for preparing a quantum chip is provided, the method comprising:
[0019] The second tantalum film is grown by using the above-mentioned tantalum film growth method;
[0020] performing an exposure operation and an etching operation on the second tantalum film to form a circuit structure;
[0021] According to the prepared Josephson junction, combined with the circuit structure, a quantum bit is formed;
[0022] According to the quantum bits, the quantum chip is obtained.
[0023] In an optional embodiment, organic impurities on the substrate are removed by piranha solution.
[0024] In an optional embodiment, the obtained multiple quantum bits are subjected to coating, slicing and desizing operations to obtain the quantum chip.
[0025] According to another aspect of the present application, a chip substrate is provided, and the chip substrate is plated using the above-mentioned tantalum film growth method.
[0026] According to another aspect of the present application, a quantum chip is provided, wherein the quantum chip is prepared by the above-mentioned method for preparing a quantum chip. The quantum chip includes the above-mentioned chip substrate.
[0027] According to another aspect of the present application, a computer device is provided, wherein the computer device comprises a quantum chip prepared by the above-mentioned method for preparing a quantum chip.
[0028] According to another aspect of the present application, a production line device is provided, the production line device comprising a coating device and an annealing device, the coating device is used to coat a first tantalum film on a substrate, the first tantalum film having an α-phase structure of a first purity;
[0029] The annealing device is used to perform an annealing operation on the first tantalum film to obtain a second tantalum film, wherein the second tantalum film has an α-phase structure of a second purity, and the second purity is greater than the first purity.
[0030] The beneficial effects of the technical solution provided by this application include at least:
[0031] The present application performs an annealing operation on the first tantalum film obtained by coating to obtain a second tantalum film, and the purity of the α-phase structure in the second tantalum film is higher than the purity of the α-phase structure in the first tantalum film. The α-phase structure is more conducive to the preparation of long coherence (long decoherence) quantum chips. In addition, the growth method of the tantalum film provided in the present application is not sensitive to the coating parameters during coating, and the tantalum film can be coated by a variety of coating methods, that is, the growth method of the high-purity α-phase tantalum film provided in the present application has strong versatility. BRIEF DESCRIPTION OF THE DRAWINGS
[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0033] Figure 1 is a schematic diagram of a quantum bit provided by an exemplary embodiment of the present application;
[0034] Figure 2 is a flow chart of a method for growing a tantalum film provided by an exemplary embodiment of the present application;
[0035] Figure 3 is an electron microscope morphology image of a first tantalum film provided by an exemplary embodiment of the present application;
[0036] Figure 4 is an electron microscope morphology image of a second tantalum film provided by an exemplary embodiment of the present application;
[0037] Figure 5 is a schematic diagram of an XRD (X-ray Diffraction) measurement result of a first tantalum film provided by an exemplary embodiment of the present application;
[0038] Figure 6 is a schematic diagram of an XRD measurement result of a second tantalum film provided by an exemplary embodiment of the present application;
[0039] Figure 7 is a schematic diagram comparing the diffraction peaks of the first tantalum film and the second tantalum film at about 33.7° according to the XRD measurement results provided by another exemplary embodiment of the present application;
[0040] Figure 8 It is a flow chart of a method for preparing a quantum chip provided by an exemplary embodiment of the present application. DETAILED DESCRIPTION
[0041] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.
[0042] A quantum computer is a physical device that follows the laws of quantum mechanics to perform high-speed mathematical and logical operations, store and process quantum information. When a device processes and calculates quantum information and runs a quantum algorithm, it is a quantum computer. Quantum computers have faster running speeds, stronger information processing capabilities, and a wider range of applications. Compared with classical computers, the more information is processed, the more advantageous it is for quantum computers to perform operations, and the more accurate the operations can be. Quantum computers have more powerful computing power than traditional computers, mainly due to the quantum superposition state. However, the superposition state based on quantum mechanics is easily disturbed by the environment and depolarized to the classical state. The time used for depolarization is called the relaxation time. The length of the relaxation time directly affects the computing power of the quantum computer.
[0043] Quantum chips are the core components of quantum computers. Quantum bits are the core units of quantum chips. Depending on the different physical systems used to construct superconducting quantum bits, the physical implementation of quantum bits includes superconducting quantum circuits, semiconductor quantum dots, ion traps, diamond vacancies, topological quantum, photons, etc.
[0044] In quantum information science, a qubit is a unit of measurement for quantum information. Unlike a classical bit, which can only be in one of the states 0 or 1, a qubit can be in both the 0 and 1 states at the same time, i.e., a quantum superposition state of 0 and 1. The number of qubits in a quantum chip determines the computing power of the quantum chip. Therefore, an important performance criterion for a quantum computing system is the number of integrated qubits.
[0045] One type of qubit that has received much attention is the Transmon qubit.
[0046] The Transmon qubit is shaped like a "+" and consists of a cross-shaped capacitor and a superconducting quantum interference device (SQUID) connected to the end of one branch of the capacitor. The SQUID contains one or more Josephson junctions. The Josephson junction is a device that includes two electrodes and a thin insulating barrier layer that separates the two electrodes. The materials of the two electrodes can exhibit superconducting properties in an environment at or below the critical temperature of the material.
[0047] In a quantum chip, there are various circuit structures with different functions around the quantum bits, including but not limited to: drive control signal lines (also called xy control lines or pulse control signal lines) for XY rotation operations on quantum bits, read resonant cavities, and couplers for coupling connections between quantum bits.
[0048] In addition, the Z rotation operation of the quantum bit is completed by the control signal line near the superconducting quantum interference device (also called the flux control signal line, z control signal line or frequency control signal line). The flux control signal line is arranged near the superconducting quantum interference device and excites the current, and couples with the superconducting quantum interference device through magnetic flux.
[0049] It should be noted that both the flux control signal line and the drive control line can be used to control the quantum bit, but the control methods of the two are essentially different. Among them, the signal transmitted by the flux control signal line will generate a magnetic field and be applied to the area of the superconducting quantum interference device. And accordingly, the magnetic flux passing through the area of the quantum interference device can cause a change in the critical current of the superconducting quantum interference device. And the change in the critical current causes a change in the frequency of the tunable quantum bit. That is, the frequency of the quantum bit can be controlled by the signal transmitted by the flux control signal line. Among them, the drive control signal line applies a pulse to the quantum bit in the form of an electric field, and the pulse causes the energy level of the quantum bit to transition.
[0050] Figure 1 A schematic diagram of the structure of quantum bits arranged on a quantum chip in the related art is shown.
[0051] Combined with reference Figure 1 , the quantum bit uses a single capacitor to ground, Figure 1 A cross-type parallel plate capacitor (Cq) 110 is shown, one end of which is grounded, and the other end of which is connected to a superconducting quantum interference device (Squid) 120 .
[0052] exist Figure 1 In the embodiment, the cross-type parallel plate capacitor 110 is surrounded by a ground plane (GND) 130. There is a gap between the cross-type parallel plate capacitor 110 and the ground plane 130, one end of the superconducting quantum interference device 120 is connected to the cross-type capacitor plate 110 (the end of one capacitor arm), and the other end of the superconducting quantum interference device 120 is connected to the ground plane 130.
[0053] The first end of the cross-shaped parallel plate capacitor 110 is connected to the superconducting quantum interference device 120, and the second end is used to connect to the resonant cavity ( Figure 1 A certain amount of space needs to be reserved near the first end and the second end of the cross-shaped parallel plate capacitor 110 for arranging microwave transmission lines such as the drive control signal line (XY line) 140 and the magnetic flux control signal line (Z line) 150. A certain amount of space needs to be reserved near the resonant cavity 160 for arranging the read signal transmission line ( Figure 1 The other two ends of the cross-shaped parallel plate capacitor 110 are used to couple with adjacent quantum bits. The drive control signal line 140, the magnetic flux control signal line 150 and the read signal transmission line can all adopt various appropriate microwave transmission line structures, which will not be described in detail.
[0054] As an example, when performing quantum computing, the operation is implemented as follows:
[0055] The frequency of the quantum bit is first adjusted to the operating frequency (i.e., the initialization of the quantum bit) by using the flux control signal on the flux control signal line 150. Then, the quantum state control signal is applied by driving the control signal line 140 to control the quantum state of the quantum bit in the initial state. The resonant cavity 160 is then used to read the quantum state of the regulated quantum bit. Further illustratively, a read detection signal is applied / input on the read signal transmission line coupled to the resonant cavity 160, and then the read feedback signal outputted through the read signal transmission line is analyzed to determine the quantum state of the quantum bit.
[0056] Optionally, the process of quantum computing performed by the quantum chip is as follows:
[0057] The quantum program in the quantum computing task, the compiled waveform instructions, etc. are sent to the physical signal generating device. The physical signal generating device generates the corresponding physical signal and sends the physical signal to the quantum chip to operate the corresponding quantum bit accordingly. Then, the quantum state reading signal is applied to the corresponding quantum bit. The quantum state information of the quantum bit is determined by using the reading feedback signal fed back by the quantum bit based on the quantum state reading signal. Then, the quantum computing result is parsed from the quantum state information.
[0058] When preparing a superconducting quantum chip, a superconducting film needs to be covered on the substrate. Currently, aluminum film is commonly used to prepare superconducting films, but tantalum film has also received more and more attention recently. Since tantalum film has smaller TLS loss, the coherence time of quantum bits generated based on tantalum film is much longer than that of aluminum film.
[0059] In the related art, the grown tantalum film has two phases, namely α phase and β phase. Compared with β phase tantalum film, α phase tantalum film has smaller TLS loss, and the coherence time of quantum bits generated by α phase tantalum film is greater than that of β phase tantalum film. α phase tantalum film is more suitable for preparing superconducting quantum chips.
[0060] Furthermore, the related art provides two methods for obtaining high-purity α-phase tantalum films. First, a suitable temperature or bias voltage is applied to the substrate during the coating process, but this method is sensitive to other parameters in the coating process and requires other parameters to be within a suitable range in order to grow a high-purity α-phase tantalum film.
[0061] Second, when coating, a seed layer with a thickness of several nanometers is first coated on the substrate, and then the tantalum film is grown. However, the seed layer will introduce additional TLS loss, which will ultimately affect the coherence of the quantum chip.
[0062] The present application provides a method for post-treatment of tantalum film coating to obtain a high-purity α-phase tantalum film, which can overcome the shortcomings of related technologies. Specifically, the present application obtains a high-purity α-phase tantalum film by annealing the tantalum film after coating. For details, please refer to the following introduction. It should be noted that the method provided in the present application can be performed by a person, or by a coating device and an annealing device. In other words, the "tantalum film growth method" provided in the present application can be implemented manually, or by a coating device and an annealing device, or by interaction between manual, coating device and annealing device. The coating device and the annealing device can be implemented as the same device or different devices.
[0063] Figure 2 A flow chart showing a method for growing a tantalum film provided by an exemplary embodiment of the present application is shown. The method comprises:
[0064] Step 220, coating a first tantalum film on the substrate, wherein the first tantalum film has an α-phase structure of a first purity;
[0065] Substrate: In the present application, the substrate material may be at least one of sapphire, high-resistance silicon, and silicon carbide.
[0066] In some embodiments, the first tantalum film is formed on the substrate by magnetron sputtering, which is a type of physical vapor deposition (PVD). Since the tantalum film has a high melting point, magnetron sputtering is used to grow the tantalum film.
[0067] In the present application, the first tantalum film is obtained by coating on the substrate under conventional coating conditions. Conventional coating conditions refer to any coating conditions that can achieve coating on the substrate to obtain a tantalum film.
[0068] Optionally, the first tantalum film is obtained by coating on the substrate at room temperature in combination with coating parameters, wherein the coating parameters include at least one of coating power, coating pressure, coating gas flow, target-substrate distance, and tantalum film thickness.
[0069] Optionally, the first tantalum film is obtained by coating on the substrate in a temperature range of -20°C to 200°C in combination with coating parameters. Optionally, the first tantalum film is obtained by coating on the substrate at a constant temperature of 23°C in combination with coating parameters.
[0070] The first tantalum film is a mixed phase tantalum film having an α phase structure and a β phase structure, the α phase structure refers to the body-centered cubic structure of the tantalum film, and the β phase structure refers to the face-centered cubic structure of the tantalum film. The α phase structure has smaller TLS loss, and the coherence time of the quantum bits generated according to the α phase structure is greater than that of the β phase structure. Therefore, compared with the β phase structure, the α phase structure is more suitable for the preparation of superconducting quantum chips. The body-centered cubic structure refers to a structure in which there is an atom at each of the eight vertices of the cubic unit cell and an atom at the center of the body. The face-centered cubic structure refers to a structure in which there is an atom at each of the eight vertices of the cubic unit cell and an atom at the center of each of the six faces.
[0071] The first tantalum film obtained by plating has an α-phase structure of the first purity. Therefore, it can also be expressed that the first tantalum film is an α-phase tantalum film of the first purity.
[0072] In some embodiments, the first tantalum film is obtained by coating the substrate with a coating device. Optionally, the coating device is a physical deposition device. Optionally, the coating device is a sputtering coating device.
[0073] Step 240 , performing an annealing operation on the first tantalum film to obtain a second tantalum film, wherein the second tantalum film has an α-phase structure of a second purity, and the second purity is greater than the first purity.
[0074] In one embodiment, the first tantalum film is annealed at a first annealing temperature to obtain a second tantalum film; the first annealing temperature is greater than or equal to 700° C. In one embodiment, the first tantalum film is annealed for a first annealing time to obtain a second tantalum film; the first annealing time is greater than or equal to 2 hours.
[0075] When the annealing temperature of the first tantalum film is greater than or equal to 700° C., the obtained second tantalum film will have a higher purity α phase structure. When the annealing time of the first tantalum film is greater than or equal to 2 hours, the obtained second tantalum film will have a higher purity α phase structure.
[0076] Preferably, the first annealing temperature is 1000°C.
[0077] Optionally, the first annealing temperature is determined according to the heating capacity of the annealing equipment, wherein the annealing equipment is a device for performing an annealing operation. Schematically, if the maximum heating temperature of the annealing equipment is 800°C, the first annealing temperature is determined to be 800°C.
[0078] Optionally, the first annealing time is determined according to the temperature resistance of the annealing equipment, wherein the annealing equipment is a device that performs the annealing operation. Schematically, the temperature resistance of the annealing equipment is 800°C for 5 hours. When it exceeds 5 hours, the annealing equipment will be obviously worn. Therefore, the first annealing time is determined to be 3 hours.
[0079] In one embodiment, an annealing operation is performed on the first tantalum film by an annealing device to obtain a second tantalum film. Optionally, the annealing device is a rapid thermal processing (RTP) device.
[0080] In summary, the present application performs an annealing operation on the first tantalum film obtained by plating to obtain a second tantalum film, and the purity of the α phase structure in the second tantalum film is higher than the purity of the α phase structure in the first tantalum film. The α phase structure is more conducive to the preparation of long-coherent quantum chips.
[0081] Furthermore, the tantalum film growth method provided in the present application is not sensitive to the coating parameters during coating, and the tantalum film can be coated by a variety of coating methods, that is, the high-purity α-phase tantalum film growth method provided in the present application has strong versatility.
[0082] Furthermore, the tantalum film growth method provided in the present application has no requirements on the type of chip substrate. In addition to sapphire substrates, it can also be used for silicon substrates or silicon carbide substrates, and has good compatibility.
[0083] Figure 3 An electron microscope image of a first tantalum film obtained by deposition under room temperature conditions provided by an exemplary embodiment of the present application is shown. Figure 3 The electron microscope morphology of the first tantalum film grown under room temperature is shown. At this time, the first tantalum film is obtained by coating with the following coating parameters. Specific coating parameters: coating power is 100W, argon gas flow rate is 10sccm, target substrate distance is 100mm, and tantalum film thickness is 180nm.
[0084] from Figure 3 It can be observed that the first tantalum film contains both strip-shaped grains and clustered particles. The α-phase structure of the tantalum film presents strip-shaped particles, so it can be judged that the first tantalum film grown under room temperature conditions is a mixed phase tantalum film of α-phase and β-phase. Using this mixed phase tantalum film to prepare quantum chips will have relatively high TLS loss, so it is necessary to grow a high-purity α-phase tantalum film.
[0085] Figure 4 An electron microscope image of a second tantalum film obtained by annealing after coating according to an exemplary embodiment of the present application is shown. At this time, the second tantalum film is obtained by performing an annealing operation at an annealing temperature of 800° C. and an annealing time of 3 hours.
[0086] from Figure 4 It can be observed that the second tantalum film presents a relatively regular strip shape. Figure 3 By comparison, it can be seen that the clustered particles in the tantalum film have basically disappeared. Therefore, it can be determined that the second tantalum film is an α-phase tantalum film with a higher purity.
[0087] Although the electron microscope morphology can also determine whether the tantalum film has a relatively good α phase structure, in order to more accurately compare the content of α phase structure and β phase structure in the tantalum film, XRD (X-ray Diffraction) measurement is required.
[0088] Figure 5 The XRD result of the first tantalum film obtained by coating at room temperature provided by an exemplary embodiment of the present application is shown. Among them, 33.7° is the diffraction peak of the β phase structure in the tantalum film, and 38.23° is the diffraction peak of the α phase structure in the tantalum film. 41.67° is the diffraction peak of the substrate. Optionally, the substrate is a sapphire substrate commonly used in quantum chips, or a high-resistance silicon, silicon carbide or other substrate.
[0089] Figure 6 FIG. 2 shows the XRD result of the second tantalum film obtained by annealing after coating according to an exemplary embodiment of the present application. Figure 5 In comparison, the most obvious change is that the diffraction peak corresponding to the β-phase structure has been significantly reduced, indicating that a high-purity α-phase tantalum film has been obtained.
[0090] In order to more intuitively compare the inhibitory effect of the annealing operation after coating on the β-phase structure of the tantalum film, Figure 7 A schematic diagram comparing the diffraction peaks of the first tantalum film and the second tantalum film near 33.7° is shown. It can be clearly observed that the β-phase structure of the tantalum film is suppressed after the annealing operation, and the height of the diffraction peak of the β-phase structure after the corresponding annealing operation is only one tenth of that before annealing.
[0091] Figure 8A flow chart of a method for preparing a quantum chip provided by an exemplary embodiment of the present application is shown. Optionally, the quantum chip is a superconducting quantum chip. The method comprises:
[0092] Step 801, depositing a first tantalum film on a substrate, wherein the first tantalum film has an α-phase structure of a first purity;
[0093] Optionally, before the tantalum film is plated on the substrate, the substrate is also cleaned. Optionally, organic impurities on the substrate are cleaned by piranha solution. Piranha solution, also known as piranha etching solution, is a mixture of concentrated sulfuric acid and 30% hydrogen peroxide (7:3). The mixture has strong oxidizing properties and can completely remove almost all organic matter on the substrate. The surface of the substrate treated with it will have hydroxyl groups, so it is highly hydrophilic and can be used for subsequent modification.
[0094] Substrate: In the present application, the substrate material may be at least one of sapphire, high-resistance silicon, and silicon carbide.
[0095] In some embodiments, the first tantalum film is formed on the substrate by magnetron sputtering, which is a type of physical vapor deposition (PVD). Since the tantalum film has a high melting point, magnetron sputtering is used to grow the tantalum film.
[0096] In the present application, the first tantalum film is obtained by coating on the substrate under conventional coating conditions. Conventional coating conditions refer to any coating conditions that can achieve coating on the substrate to obtain a tantalum film.
[0097] Optionally, at room temperature, the first tantalum film is obtained by coating on the substrate in combination with coating parameters. The coating parameters include at least one of coating power, coating pressure, coating gas flow (optionally, the coating gas is argon), target-substrate distance, and tantalum film thickness.
[0098] Optionally, the first tantalum film is obtained by coating on the substrate in a temperature range of -20°C to 200°C in combination with coating parameters. Optionally, the first tantalum film is obtained by coating on the substrate at a constant temperature of 23°C in combination with coating parameters.
[0099] The first tantalum film is a mixed phase tantalum film having an α phase structure and a β phase structure, the α phase structure refers to the body-centered cubic structure of the tantalum film, and the β phase structure refers to the face-centered cubic structure of the tantalum film. The α phase structure has smaller TLS loss, and the coherence time of the quantum bits generated according to the α phase structure is greater than that of the β phase structure. Therefore, compared with the β phase structure, the α phase structure is more suitable for the preparation of superconducting quantum chips. The body-centered cubic structure refers to a structure in which there is an atom at each of the eight vertices of the cubic unit cell and an atom at the center of the body. The face-centered cubic structure refers to a structure in which there is an atom at each of the eight vertices of the cubic unit cell and an atom at the center of each of the six faces.
[0100] The first tantalum film obtained by plating has an α-phase structure of the first purity. Therefore, it can also be expressed that the first tantalum film is an α-phase tantalum film of the first purity.
[0101] In some embodiments, the first tantalum film is obtained by coating the substrate with a coating device. Optionally, the coating device is a physical deposition device. Optionally, the coating device is a sputtering coating device.
[0102] Step 802, performing an annealing operation on the first tantalum film to obtain a second tantalum film, wherein the second tantalum film has an α-phase structure of a second purity, and the second purity is greater than the first purity;
[0103] In one embodiment, the first tantalum film is annealed at a first annealing temperature to obtain a second tantalum film; the first annealing temperature is greater than or equal to 700° C. In one embodiment, the first tantalum film is annealed for a first annealing time to obtain a second tantalum film; the first annealing time is greater than or equal to 2 hours.
[0104] When the annealing temperature of the first tantalum film is greater than or equal to 700° C., the obtained second tantalum film will have a higher purity α phase structure. When the annealing time of the first tantalum film is greater than or equal to 2 hours, the obtained second tantalum film will have a higher purity α phase structure.
[0105] Preferably, the first annealing temperature is 1000°C.
[0106] Optionally, the first annealing temperature is determined according to the heating capacity of the annealing equipment, wherein the annealing equipment is a device for performing an annealing operation. Schematically, if the maximum heating temperature of the annealing equipment is 800°C, the first annealing temperature is determined to be 800°C.
[0107] Optionally, the first annealing time is determined according to the temperature resistance of the annealing equipment, wherein the annealing equipment is a device that performs the annealing operation. Schematically, the temperature resistance of the annealing equipment is 800°C for 5 hours. When it exceeds 5 hours, the annealing equipment will be obviously worn. Therefore, the first annealing time is determined to be 3 hours.
[0108] In one embodiment, an annealing operation is performed on the first tantalum film by an annealing device to obtain a second tantalum film. Optionally, the annealing device is a rapid thermal processing (RTP) device.
[0109] Step 803, performing an exposure operation and an etching operation on the second tantalum film to form a circuit structure;
[0110] Optionally, an exposure operation and an etching operation are performed on the second tantalum film to form a Figure 1The cross-shaped parallel plate capacitor 110, the resonant cavity 160, the drive control signal line 140, the magnetic flux control signal line 150, the read signal line coupled to the resonant cavity 160, and the coupler coupled between quantum bits are shown.
[0111] In some embodiments, a photolithography machine is used to perform an exposure operation on the second tantalum film, and an etching machine is used to perform an etching operation on the second tantalum film to form a circuit structure.
[0112] Step 804, forming a quantum bit according to the prepared Josephson junction and the circuit structure;
[0113] According to the prepared Josephson junction and the circuit structure obtained in step 803, a quantum bit is obtained. Optionally, a total of multiple quantum bits are obtained. For specific methods of assembling the Josephson junction and the circuit structure, please refer to Figure 1 Schematic diagram of the quantum bit shown.
[0114] Step 805, obtaining a quantum chip based on the quantum bits.
[0115] The multiple quantum bits obtained are coated with glue, slicing and deslicing to obtain at least one quantum chip. Each quantum chip includes multiple quantum bits. Since the substrate size used in the actual operation is 2 inches, 4 inches, 6 inches, etc., and the final quantum chip is only about 1 cm in size, a slicing operation is required. In order to avoid damage to the circuit during slicing, it is necessary to coat the quantum bits with glue, and then remove the applied protective glue after slicing.
[0116] In summary, the present application performs an annealing operation on the first tantalum film obtained by coating to obtain a second tantalum film, and the purity of the α-phase structure in the second tantalum film is higher than the purity of the α-phase structure in the first tantalum film. Compared with the β-phase structure, the α-phase structure has a smaller TLS loss. The TLS loss refers to the interaction between the two-level system in the superconducting quantum chip material and the microwaves in the quantum chip, which shortens the coherence time of the quantum bit. Therefore, the α-phase structure is more conducive to the preparation of long-coherent quantum chips.
[0117] Furthermore, the tantalum film growth method provided in the present application is not sensitive to the coating parameters during coating, and the tantalum film can be coated by a variety of coating methods, that is, the high-purity α-phase tantalum film growth method provided in the present application has strong versatility.
[0118] Furthermore, the tantalum film growth method provided in the present application has no requirements on the type of chip substrate. In addition to sapphire substrates, it can also be used for silicon substrates or silicon carbide substrates, and has good compatibility.
[0119] An exemplary embodiment of the present application further provides a chip substrate, which is plated using the tantalum film growth method described above. The specific steps are as follows:
[0120] A first tantalum film is obtained by coating on the chip substrate, wherein the first tantalum film has an α-phase structure of a first purity.
[0121] Chip substrate. In the present application, the chip substrate material may be at least one of sapphire, high-resistance silicon, and silicon carbide.
[0122] In some embodiments, the first tantalum film is formed on the chip substrate by magnetron sputtering, which is a type of physical vapor deposition (PVD). Since the tantalum film has a high melting point, magnetron sputtering is used to grow the tantalum film.
[0123] In the present application, the first tantalum film is obtained by coating on the chip substrate under conventional coating conditions. Conventional coating conditions refer to any coating conditions that can achieve coating on the chip substrate to obtain a tantalum film.
[0124] Optionally, the first tantalum film is obtained by coating on the chip substrate at room temperature in combination with coating parameters. The coating parameters include at least one of coating power, coating pressure, coating gas flow, target-substrate distance, and tantalum film thickness.
[0125] Optionally, the first tantalum film is obtained by coating on the chip substrate in a temperature range of -20°C to 200°C in combination with coating parameters. Optionally, the first tantalum film is obtained by coating on the chip substrate at a constant temperature of 23°C in combination with coating parameters.
[0126] The first tantalum film is a mixed phase tantalum film having an α phase structure and a β phase structure, the α phase structure refers to the body-centered cubic structure of the tantalum film, and the β phase structure refers to the face-centered cubic structure of the tantalum film. The α phase structure has smaller TLS loss, and the coherence time of the quantum bits generated according to the α phase structure is greater than that of the β phase structure. Therefore, compared with the β phase structure, the α phase structure is more suitable for the preparation of superconducting quantum chips. The body-centered cubic structure refers to a structure in which there is an atom at each of the eight vertices of the cubic unit cell and an atom at the center of the body. The face-centered cubic structure refers to a structure in which there is an atom at each of the eight vertices of the cubic unit cell and an atom at the center of each of the six faces.
[0127] The first tantalum film obtained by plating has an α-phase structure of the first purity. Therefore, it can also be expressed that the first tantalum film is an α-phase tantalum film of the first purity.
[0128] In some embodiments, the first tantalum film is obtained by coating the chip substrate with a coating device. Optionally, the coating device is a physical deposition device. Optionally, the coating device is a sputtering coating device.
[0129] An annealing operation is performed on the first tantalum film to obtain a second tantalum film having an α-phase structure with a second purity greater than the first purity.
[0130] In one embodiment, the first tantalum film is annealed at a first annealing temperature to obtain a second tantalum film; the first annealing temperature is greater than or equal to 700° C. In one embodiment, the first tantalum film is annealed for a first annealing time to obtain a second tantalum film; the first annealing time is greater than or equal to 2 hours.
[0131] When the annealing temperature of the first tantalum film is greater than or equal to 700° C., the obtained second tantalum film will have a higher purity α phase structure. When the annealing time of the first tantalum film is greater than or equal to 2 hours, the obtained second tantalum film will have a higher purity α phase structure.
[0132] Preferably, the first annealing temperature is 1000°C.
[0133] Optionally, the first annealing temperature is determined according to the heating capacity of the annealing equipment, wherein the annealing equipment is a device for performing an annealing operation. Schematically, if the maximum heating temperature of the annealing equipment is 800°C, the first annealing temperature is determined to be 800°C.
[0134] Optionally, the first annealing time is determined according to the temperature resistance of the annealing equipment, wherein the annealing equipment is a device that performs the annealing operation. Schematically, the temperature resistance of the annealing equipment is 800°C for 5 hours. When it exceeds 5 hours, the annealing equipment will be obviously worn. Therefore, the first annealing time is determined to be 3 hours.
[0135] In one embodiment, an annealing operation is performed on the first tantalum film by an annealing device to obtain a second tantalum film. Optionally, the annealing device is a rapid thermal processing (RTP) device.
[0136] In summary, the present application performs an annealing operation on the first tantalum film obtained by plating to obtain a second tantalum film, and the purity of the α phase structure in the second tantalum film is higher than the purity of the α phase structure in the first tantalum film. The α phase structure is more conducive to the preparation of long-coherent quantum chips.
[0137] Furthermore, the tantalum film growth method provided in the present application is not sensitive to the coating parameters during coating, and the tantalum film can be coated by a variety of coating methods, that is, the high-purity α-phase tantalum film growth method provided in the present application has strong versatility.
[0138] Furthermore, the tantalum film growth method provided in the present application has no requirements on the type of chip substrate. In addition to sapphire substrates, it can also be used for silicon substrates or silicon carbide substrates, and has good compatibility.
[0139] An exemplary embodiment of the present application further provides a quantum chip, which is preferably configured as a superconducting quantum chip, and includes the above-mentioned chip substrate, which is plated using the tantalum film growth method described above. The quantum chip is prepared using the following steps.
[0140] A first tantalum film is obtained by coating on the substrate, wherein the first tantalum film has an α-phase structure of a first purity.
[0141] Optionally, before the tantalum film is plated on the substrate, the substrate is also cleaned. Optionally, organic impurities on the substrate are cleaned by piranha solution. Piranha solution, also known as piranha etching solution, is a mixture of concentrated sulfuric acid and 30% hydrogen peroxide (7:3). The mixture has strong oxidizing properties and can completely remove almost all organic matter on the substrate. The surface of the substrate treated with it will have hydroxyl groups, so it is highly hydrophilic and can be used for subsequent modification.
[0142] Substrate: In the present application, the substrate material may be at least one of sapphire, high-resistance silicon, and silicon carbide.
[0143] In some embodiments, the first tantalum film is formed on the substrate by magnetron sputtering, which is a type of physical vapor deposition (PVD). Since the tantalum film has a high melting point, magnetron sputtering is used to grow the tantalum film.
[0144] In the present application, the first tantalum film is obtained by coating on the substrate under conventional coating conditions. Conventional coating conditions refer to any coating conditions that can achieve coating on the substrate to obtain a tantalum film.
[0145] Optionally, at room temperature, the first tantalum film is obtained by coating on the substrate in combination with coating parameters. The coating parameters include at least one of coating power, coating pressure, coating gas flow (optionally, the coating gas is argon), target-substrate distance, and tantalum film thickness.
[0146] Optionally, the first tantalum film is obtained by coating on the substrate in a temperature range of -20°C to 200°C in combination with coating parameters. Optionally, the first tantalum film is obtained by coating on the substrate at a constant temperature of 23°C in combination with coating parameters.
[0147] The first tantalum film is a mixed phase tantalum film having an α phase structure and a β phase structure, the α phase structure refers to the body-centered cubic structure of the tantalum film, and the β phase structure refers to the face-centered cubic structure of the tantalum film. The α phase structure has smaller TLS loss, and the coherence time of the quantum bits generated according to the α phase structure is greater than that of the β phase structure. Therefore, compared with the β phase structure, the α phase structure is more suitable for the preparation of superconducting quantum chips. The body-centered cubic structure refers to a structure in which there is an atom at each of the eight vertices of the cubic unit cell and an atom at the center of the body. The face-centered cubic structure refers to a structure in which there is an atom at each of the eight vertices of the cubic unit cell and an atom at the center of each of the six faces.
[0148] The first tantalum film obtained by plating has an α-phase structure of the first purity. Therefore, it can also be expressed that the first tantalum film is an α-phase tantalum film of the first purity.
[0149] In some embodiments, the first tantalum film is obtained by coating the substrate with a coating device. Optionally, the coating device is a physical deposition device. Optionally, the coating device is a sputtering coating device.
[0150] Performing an annealing operation on the first tantalum film to obtain a second tantalum film, wherein the second tantalum film has an α-phase structure of a second purity, the second purity being greater than the first purity;
[0151] In one embodiment, the first tantalum film is annealed at a first annealing temperature to obtain a second tantalum film; the first annealing temperature is greater than or equal to 700° C. In one embodiment, the first tantalum film is annealed for a first annealing time to obtain a second tantalum film; the first annealing time is greater than or equal to 2 hours.
[0152] When the annealing temperature of the first tantalum film is greater than or equal to 700° C., the obtained second tantalum film will have a higher purity α phase structure. When the annealing time of the first tantalum film is greater than or equal to 2 hours, the obtained second tantalum film will have a higher purity α phase structure.
[0153] Preferably, the first annealing temperature is 1000°C.
[0154] Optionally, the first annealing temperature is determined according to the heating capacity of the annealing equipment, wherein the annealing equipment is a device for performing an annealing operation. Schematically, if the maximum heating temperature of the annealing equipment is 800°C, the first annealing temperature is determined to be 800°C.
[0155] Optionally, the first annealing time is determined according to the temperature resistance of the annealing equipment, wherein the annealing equipment is a device that performs the annealing operation. Schematically, the temperature resistance of the annealing equipment is 800°C for 5 hours. When it exceeds 5 hours, the annealing equipment will be obviously worn. Therefore, the first annealing time is determined to be 3 hours.
[0156] In one embodiment, an annealing operation is performed on the first tantalum film by an annealing device to obtain a second tantalum film. Optionally, the annealing device is a rapid thermal processing (RTP) device.
[0157] Exposure and etching operations are performed on the second tantalum film to form a circuit structure.
[0158] Optionally, an exposure operation and an etching operation are performed on the second tantalum film to form a Figure 1 The cross-shaped parallel plate capacitor 110, the resonant cavity 160, the drive control signal line 140, the magnetic flux control signal line 150, the read signal line coupled to the resonant cavity 160, and the coupler coupled between quantum bits are shown.
[0159] In some embodiments, a photolithography machine is used to perform an exposure operation on the second tantalum film, and an etching machine is used to perform an etching operation on the second tantalum film to form a circuit structure.
[0160] Based on the prepared Josephson junction and combined with the circuit structure, a quantum bit is formed.
[0161] According to the prepared Josephson junction and the circuit structure obtained in step 803, a quantum bit is obtained. Optionally, a total of multiple quantum bits are obtained. For specific methods of assembling the Josephson junction and the circuit structure, please refer to Figure 1 Schematic diagram of the quantum bit shown.
[0162] Based on quantum bits, we get quantum chips.
[0163] The multiple quantum bits obtained are coated with glue, slicing and deslicing to obtain at least one quantum chip. Each quantum chip includes multiple quantum bits. Since the substrate size used in the actual operation is 2 inches, 4 inches, 6 inches, etc., and the final quantum chip is only about 1 cm in size, a slicing operation is required. In order to avoid damage to the circuit during slicing, it is necessary to coat the quantum bits with glue, and then remove the applied protective glue after slicing.
[0164] In summary, the present application performs an annealing operation on the first tantalum film obtained by coating to obtain a second tantalum film, and the purity of the α-phase structure in the second tantalum film is higher than the purity of the α-phase structure in the first tantalum film. Compared with the β-phase structure, the α-phase structure has a smaller TLS loss. The TLS loss refers to the interaction between the two-level system in the superconducting quantum chip material and the microwaves in the quantum chip, which shortens the coherence time of the quantum bit. Therefore, the α-phase structure is more conducive to the preparation of long-coherent quantum chips.
[0165] Furthermore, the tantalum film growth method provided in the present application is not sensitive to the coating parameters during coating, and the tantalum film can be coated by a variety of coating methods, that is, the high-purity α-phase tantalum film growth method provided in the present application has strong versatility.
[0166] Furthermore, the tantalum film growth method provided in the present application has no requirements on the type of chip substrate. In addition to sapphire substrates, it can also be used for silicon substrates or silicon carbide substrates, and has good compatibility.
[0167] An exemplary embodiment of the present application also provides a production line equipment, which includes a coating equipment and an annealing equipment. The coating equipment is used to coat a first tantalum film on a substrate, and the first tantalum film has an α-phase structure of a first purity; the annealing equipment is used to perform an annealing operation on the first tantalum film to obtain a second tantalum film, and the second tantalum film has an α-phase structure of a second purity, and the second purity is greater than the first purity.
[0168] The annealing device is further used to perform an annealing operation on the first tantalum film at a first annealing temperature to obtain a second tantalum film, wherein the first annealing temperature is greater than or equal to 700° C. Optionally, the first annealing temperature is determined according to the heating capacity of the annealing device.
[0169] The annealing equipment is also used to perform an annealing operation on the first tantalum film for a first annealing time to obtain a second tantalum film, wherein the first annealing time is greater than or equal to 2 hours. Optionally, the first annealing time is determined according to the temperature resistance of the annealing equipment.
[0170] The coating equipment is also used to coat the first tantalum film on the substrate at a temperature of -20°C to 200°C in combination with coating parameters. Optionally, the coating parameters include at least one of coating power, coating pressure, coating gas flow, target-substrate distance, and tantalum film thickness.
[0171] Optionally, the first tantalum film is a mixed phase tantalum film having an α phase structure and a β phase structure, the α phase structure refers to a body-centered cubic structure of the tantalum film, and the β phase structure refers to a face-centered cubic structure of the tantalum film.
[0172] Optionally, the material of the substrate includes at least one of sapphire, high-resistance silicon, and silicon carbide.
[0173] Optionally, the first tantalum film is obtained by magnetron sputtering.
[0174] An exemplary embodiment of the present application further provides a computer device, preferably, the computer device is a superconducting quantum computer. The computer device includes at least one quantum chip, and the quantum chip is prepared by the above-mentioned quantum chip preparation method.
[0175] It should be understood that the "plurality" mentioned in this article refers to two or more. "And / or" describes the association relationship of the associated objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the associated objects are in an "or" relationship.
[0176] A person skilled in the art will understand that all or part of the steps to implement the above embodiments may be accomplished by hardware or by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a disk or an optical disk, etc.
[0177] The above description is only an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent switching, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.
Claims
1. A method for growing a tantalum film, characterized in that: The method comprises: Plating a first tantalum film on a substrate, wherein the first tantalum film has an α-phase structure of a first purity; An annealing operation is performed on the first tantalum film to obtain a second tantalum film, wherein the second tantalum film has an α-phase structure with a second purity, and the second purity is greater than the first purity.
2. The method according to claim 1, characterized in that The step of performing an annealing operation on the first tantalum film to obtain a second tantalum film comprises: performing the annealing operation on the first tantalum film at a first annealing temperature to obtain the second tantalum film; Wherein, the first annealing temperature is greater than or equal to 700°C.
3. The method according to claim 2, characterized in that The first annealing temperature is determined according to the heating capacity of the annealing equipment; Wherein, the annealing equipment is a device for performing the annealing operation.
4. The method according to claim 1, characterized in that The step of performing an annealing operation on the first tantalum film to obtain a second tantalum film comprises: performing the annealing operation on the first tantalum film for a first annealing time to obtain the second tantalum film; Wherein, the first annealing time is greater than or equal to 2 hours.
5. The method according to claim 4, characterized in that The first annealing time is determined according to the temperature resistance of the annealing equipment; Wherein, the annealing equipment is a device for performing the annealing operation.
6. The method according to claim 1, characterized in that The step of coating the substrate to obtain a first tantalum film comprises: The first tantalum film is obtained by coating on the substrate in a temperature range of -20°C to 200°C in combination with coating parameters.
7. The method according to claim 6, characterized in that The coating parameters include at least one of coating power, coating gas pressure, coating gas flow rate, target-substrate distance, and tantalum film thickness.
8. The method according to any one of claims 1 to 7, characterized in that: The first tantalum film is a mixed phase tantalum film having an α phase structure and a β phase structure, wherein the α phase structure refers to a body-centered cubic structure of the tantalum film, and the β phase structure refers to a face-centered cubic structure of the tantalum film.
9. The method according to any one of claims 1 to 7, characterized in that: The material of the substrate includes at least one of sapphire, high-resistance silicon and silicon carbide.
10. The method according to any one of claims 1 to 7, characterized in that: The first tantalum film is obtained by coating in a magnetron sputtering manner.
11. A method for preparing a quantum chip, characterized in that: The method comprises: Plating a first tantalum film on a substrate, wherein the first tantalum film has an α-phase structure of a first purity; performing an annealing operation on the first tantalum film to obtain a second tantalum film, wherein the second tantalum film has an α-phase structure of a second purity, and the second purity is greater than the first purity; performing an exposure operation and an etching operation on the second tantalum film to form a circuit structure; According to the prepared Josephson junction, combined with the circuit structure, a quantum bit is formed; According to the quantum bits, the quantum chip is obtained.
12. The method according to claim 11, characterized in that The method further comprises: Organic impurities on the substrate were removed by piranha solution.
13. The method according to claim 11, characterized in that The step of obtaining the quantum chip according to the quantum bit comprises: The obtained multiple quantum bits are subjected to glue coating, slicing and glue removal operations to obtain the quantum chip.
14. A chip substrate, characterized in that: The chip substrate is plated using the tantalum film growth method as described in any one of claims 1 to 10.
15. A quantum chip, characterized in that: The quantum chip is prepared by the method for preparing a quantum chip according to any one of claims 11 to 13.
16. A computer device, characterized in that: The computer device comprises the quantum chip as claimed in claim 15.
17. A production line equipment, characterized in that: The production line equipment includes a coating device and an annealing device, wherein the coating device is used to coat a first tantalum film on a substrate, wherein the first tantalum film has an α-phase structure of a first purity; The annealing device is used to perform an annealing operation on the first tantalum film to obtain a second tantalum film, wherein the second tantalum film has an α-phase structure of a second purity, and the second purity is greater than the first purity.