A CMOS bulk-driven transconductance amplifier circuit

Abstract

The application discloses a novel CMOS bulk drive transconductance amplifier circuit with super-low voltage, super-low power consumption and high common-mode stability, and realizes stable high transconductance within a rail-to-rail input range by introducing transconductance stabilization and enhancement technology on the basis of the existing rail-to-rail bulk drive transconductance amplifier, compared with the rail-to-rail bulk drive transconductance amplifier in the prior art, the application has the smallest transconductance change within the rail-to-rail range, and has a higher transconductance energy consumption ratio. The transconductance amplifier provided by the application can be used in a low-voltage and low-power consumption system such as a biological medical system, and has a wide application range.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of low-voltage and low-power analog integrated circuits, and particularly relates to a CMOS bulk-driven transconductance amplifier circuit. BACKGROUND

[0002] Currently, wearable technology and biomedical research are continuously deepening, showing great potential. In integrated circuits in these fields, batteries are widely used, which leads to a contradiction between lightweight design and working time. Therefore, the requirements for power supply and energy consumption are very strict. Therefore, low-voltage and low-power design has become one of the hottest topics in analog integrated circuit design.

[0003] The operational transconductance amplifier (OTA) is the most widely used and important module in analog circuits, because it determines the performance of the entire circuit, such as filters, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other circuits. For applications with a power supply voltage lower than 1V, especially lower than the MOS threshold voltage, the circuit needs a high-performance amplifier as well as a power supply voltage and power consumption as low as possible. In a low-voltage environment, the amplifier needs to have excellent input and output voltage ranges, because the signals can be close to the power supply rails. In order to meet these requirements, rail-to-rail amplifiers are often used in low-voltage circuits, such as bandpass filters (BPFs) or low-pass filters (LPFs) used in electrocardiogram (ECG) systems and electromyography (EMG) systems, comparators of ultra-low-power successive approximation register analog-to-digital converters (SAR ADCs), detection circuits in biomedical implants, comparators for energy harvesting systems, and wireless sensors for Internet of Things (IoT) applications.

[0004] A variety of techniques have been explored to implement amplifiers with rail-to-rail capability for ultra-low-voltage environments. Bulk-driven technology has become a subject of great interest due to its inherent large common-mode input range and independent bulk-voltage control capability of transistors. There are two main problems with bulk-driven MOS amplifiers: lower transconductance values, and unstable transconductance at common-mode voltages. SUMMARY

[0005] In order to solve the above problems existing in the prior art bulk-driven amplifier, the present application provides a CMOS bulk-driven transconductance amplifier circuit. The technical problem to be solved by the present application is realized by the following technical scheme:

[0006] The present application provides a CMOS bulk-driven transconductance amplifier circuit, which comprises input transistors Mp1, Mp2, Mp3, Mp4, Mp5, Mp6, Mn1, Mn2, Mn5, Mn6, current source transistors Mp7, Mp8, Mn7, Mn8, and current mirror transistors Mn3, Mn4.

[0007] The body electrodes of Mp1 and Mp2, Mp3 and Mp4, Mn1 and Mn5, and Mn2 and Mn6 are connected to a differential input voltage. The differential input voltage includes a positive differential voltage input terminal VIN+ and a negative differential voltage input terminal VIN–. The phase of the positive differential voltage input terminal VIN+ is 180° different from the phase of the negative differential voltage input terminal VIN–.

[0008] Mp1 and Mp2, Mp3 and Mp4, Mn1 and Mn5, Mn2 and Mn6, and Mn3 and Mn4 are connected in a gate current mirror configuration, with Mp2, Mp3, Mn5, Mn6, and Mn3 connected in a diode configuration. The gates of Mp5 and Mp6 are cross-coupled. Furthermore, the body electrodes of Mp7, Mp8, Mn7, Mn8, Mn3, and Mn4 are connected to their respective gates.

[0009] Mp1 and Mn3, Mp4 and Mn4, Mp7 and Mn5, Mp8 and Mn6 are connected in series to form a path from VDD to GND. In addition, the parallel structure of Mp2 and Mp5 is connected in series with the parallel structure of Mn7 and Mn1 to form a path from VDD to GND. The parallel structure of Mp6 and Mp3 is connected in series with the parallel structure of Mn2 and Mn8 to form a path from VDD to GND. The sources of Mp1 to Mp6 are connected to VDD, and the sources of Mn1 to Mn8 are connected to GND. The gates of Mp7, Mp8 and Mn7, Mn8 are connected to the external bias voltage V bias1 and V bias2 .

[0010] The drain connection point of Mp4 and Mn4 is the output point of the transconductance amplifier.

[0011] Compared with the prior art, the present invention has the following beneficial effects:

[0012] The present invention provides a CMOS body-driven transconductance amplifier circuit, which has minimal transconductance variation within a rail-to-rail range and a high transconductance energy consumption ratio, thereby solving the problems of low transconductance of body-driven MOS amplifiers and unstable transconductance under common-mode voltage.

[0013] In addition, the transconductance amplifier proposed in the present invention can be used in low-voltage and low-power systems such as biomedical systems, and has a wide range of applications.

[0014] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a structural diagram of an ultra-low voltage body driven transconductance amplifier circuit in the prior art;

[0016] Figure 2 This is a structural diagram of a CMOS body-driven transconductance amplifier circuit provided by an embodiment of the present invention;

[0017] Figure 3 It is a schematic diagram of transconductance simulation results of a CMOS body-driven transconductance amplifier circuit provided by an embodiment of the present invention compared with an existing transconductance amplifier. DETAILED DESCRIPTION

[0018] The present invention will be further described in detail below with reference to specific examples, but the embodiments of the present invention are not limited thereto.

[0019] Figure 1 This is a schematic diagram of the structure of an ultra-low voltage body driven transconductance amplifier circuit in the prior art. Figure 1 As shown, in the body-driven transconductance amplifier, the current source MOS transistors Mn1 and Mn2 provide two identical bias currents, the input MOS transistors Mp1 to Mp4 convert the input voltage signal into a differential current signal, and then the current mirror circuits Mn3 and Mn4 are used to realize the current output function.

[0020] The sizes of Mp1 to Mp4 are the same, and the static current is equal, which is set to I DS According to the MOS transconductance formula in the subthreshold region, the body transconductances of Mp1 to Mp4 are equal, which is

[0021]

[0022] where T is the absolute temperature, n is the dip of the weak inversion curve, k is the Boltzmann constant, q is the charge of the electron or hole, and γ p is the body effect coefficient Φ F,p is the potential difference between the Fermi level of the substrate and the intrinsic silicon, V BS,p is the source-to-body voltage. In addition, V BS =VCM–VDD.

[0023] The transconductance of the entire amplifier is

[0024] G m =2g mb,p (2)

[0025] The ratio of the transconductance current is

[0026]

[0027] However, the absolute value of transconductance and transconductance energy consumption in conventional body-driven transconductance amplifiers are relatively low. Furthermore, the transconductance value fluctuates when the input signal common-mode voltage (VCM) changes, which in turn affects various amplifier performance issues. For example, when the input signal common-mode voltage (VCM) changes from 0 to 0.4V, the amplifier's transconductance changes by more than 20%.

[0028] In view of this, the present invention provides a CMOS body-driven transconductance amplifier circuit.

[0029] Figure 2 FIG. 1 is a structural diagram of a CMOS body driven transconductance amplifier circuit provided by an embodiment of the present invention. Figure 2 As shown, the current source MOS transistors Mp7, Mp8 and Mn7, Mn8 provide bias current, the input MOS transistors Mp1 to Mp6 and Mn1, Mn2, Mn5, Mn6 convert the input voltage signal into a differential current signal, and then use the current mirror circuits Mn3 and Mn4 to realize the current output function.

[0030] Figure 2 The left and right halves are symmetrical, and the size ratios between the pMOS and nMOS halves are indicated. Therefore, the overall pMOS and nMOS size ratios are known, and their current ratios are equal to the size ratios.

[0031] Quiescent current I DS The corresponding body transconductance of pMOS and nMOS is

[0032]

[0033] and

[0034]

[0035] The body transconductance of pMOS and nMOS shows opposite trend of change with VCM, and the sum of the two has better stability with respect to VCM. Assuming that when VCM changes between GND and VDD, the absolute value of the change of the body transconductance of pMOS and nMOS is Δg mb,p and Δg mb,n , set the ratio of the quiescent current of nMOS and pMOS to Δg mb,p / Δg mb,n , the body transconductance changes of pMOS and nMOS are offset to the maximum.

[0036] The gate cross-coupling structure of Mp5 and Mp6 forms a negative impedance. As a result, the small signal currents of Mp2, Mp3, Mp5, Mp6 and Mn1, Mn2, Mn5, Mn6 are copied to Mp1 and Mp4 at a greater rate, and the transconductance of the amplifier is enhanced.

[0037] Let the current in Mp1 be I DS , considering the size ratio of pMOS and nMOS, the transconductance of the entire amplifier is

[0038]

[0039] The quiescent current is 2[2+M+(1+M)y / (1+x)]I DS , the ratio of the transconductance current is

[0040]

[0041] In the present invention, M satisfies 0.5 <M<1、x<1、y<1,有

[0042]

[0043] Obviously, the transconductance current ratio of the CMOS body-driven transconductance amplifier proposed by the present invention is greater than the transconductance current ratio of the ultra-low voltage body-driven transconductance amplifier in the prior art.

[0044] Figure 3 The figure shows the transconductance comparison between the transconductance amplifier proposed in the present invention and the conventional transconductance amplifier when VCM varies between GND and VDD.

[0045] It can be seen from the above embodiments that the beneficial effects of the present invention are:

[0046] The present invention provides a CMOS body-driven transconductance amplifier circuit, comprising input transistors Mp1, Mp2, Mp3, Mp4, Mp5, Mp6, Mn1, Mn2, Mn5, and Mn6, current source transistors Mp7, Mp8, Mn7, and Mn8, and current mirror transistors Mn3 and Mn4.

[0047] By introducing complementary CMOS structure and negative impedance structure as transconductance optimization technology on the basis of the existing body-driven transconductance amplifier, the stabilization and enhancement of body transconductance are achieved.

[0048] The CMOS body-driven transconductance amplifier circuit proposed in the present invention can be used in low-voltage and low-power systems and has a wide range of applications.

[0049] In the description of the present invention, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature specified as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined.

[0050] In the description of this specification, the reference terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" mean that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any appropriate manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification.

[0051] Although the present application is described herein in conjunction with various embodiments, in the process of implementing the claimed application, those skilled in the art can understand and implement other changes to the disclosed embodiments by viewing the drawings, the disclosed content, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps, and "one" or "an" does not exclude multiple situations. A single processor or other unit can implement several functions listed in the claims. Certain measures are recorded in different dependent claims, but this does not mean that these measures cannot be combined to produce good results. The above content is a further detailed description of the present invention in conjunction with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should be regarded as falling within the scope of protection of the present invention.

Claims

1. A CMOS body-driven transconductance amplifier circuit, characterized in that: include: A PMOS input differential pair, an NMOS input differential pair, a PMOS current source, an NMOS current source, and an NMOS current mirror, wherein the PMOS input differential pair includes transistors Mp1, Mp2, Mp3, Mp4, Mp5, and Mp6, the NMOS input differential pair includes transistors Mn1, Mn2, Mn5, and Mn6, the PMOS current source includes transistors Mp7 and Mp8, the NMOS current source includes transistors Mn7 and Mn8, and the NMOS current mirror includes transistors Mn3 and Mn4, wherein: The sources of Mp1, Mp2, Mp3, Mp4, Mp5, Mp6, Mp7, and Mp8 are connected to the analog positive power supply; the sources of Mn1, Mn2, Mn3, Mn4, Mn5, Mn6, Mn7, and Mn8 are connected to the analog ground; the gate of Mp1 is connected to the gate of Mp2, the gate of Mp3 is connected to the gate of Mp4, the gate of Mn1 is connected to the gate of Mn5, and the gate of Mn2 is connected to the gate of Mn6. , the gate of Mn3 is connected to the gate of Mn4; the gate of Mp2 is connected to the drain of Mp2, the gate of Mp3 is connected to the drain of Mp3, the gate of Mp5 is connected to the drain of Mp6, the gate of Mp6 is connected to the drain of Mp5, the gate of Mn5 is connected to the drain of Mn5, the gate of Mn6 is connected to the drain of Mn6, and the gate of Mn3 is connected to the drain of Mn3; the gates of Mp7 and Mp8 are connected to the external bias voltage V bias1 Connect the gates of Mn7 and Mn8 to the external bias voltage V bias2 The drain of Mp1 is connected to the drain of Mn3, the drain of Mp4 is connected to the drain of Mn4, the drain of Mp7 is connected to the drain of Mn5, and the drain of Mp8 is connected to the drain of Mn6; the drains of Mp2 and Mp5 are connected to the drains of Mn1 and Mn7, and the drains of Mp3 and Mp45 are connected to the drains of Mn2 and Mn8; the output point of the circuit is the drain connection point of Mp4 and Mn4; the body electrodes of Mp1, Mp3, Mp6, Mn2, and Mn5 are connected to the differential input voltage positive input terminal VIN+, and M The body electrodes of p2, Mp4, Mp5, Mn1, and Mn6 are connected to the negative input terminal VIN– of the differential input voltage, and the phase of the positive input terminal VIN+ of the differential input voltage is 180° different from the phase of the negative input terminal VIN– of the differential input voltage; the body electrode of Mp7 is connected to the gate of Mp7, the body electrode of Mp8 is connected to the gate of Mp8, the body electrode of Mn7 is connected to the gate of Mn7, the body electrode of Mn8 is connected to the gate of Mn8, the body electrode of Mn3 is connected to the gate of Mn3, and the body electrode of Mn4 is connected to the gate of Mn4.

2. The CMOS bulk-driven transconductance amplifier circuit according to claim 1, wherein: All NMOS tubes in the circuit are deep N-well process NMOS.

3. The CMOS bulk-driven transconductance amplifier circuit according to claim 2, wherein: The potential of the analog ground is 0V, and the potential of the analog positive power supply is 0.4V.

4. The CMOS bulk-driven transconductance amplifier circuit according to claim 1, wherein: The sizes of Mp1, Mp2, Mp3, and Mp4 are the same. The size ratio of Mp1, Mp5, and Mp7 is 1:M:(1+M)y / (1+x), and the size ratio of Mp4, Mp6, and Mp8 is 1:M:(1+M)y / (1+x); the size ratio of Mn1, Mn7, and Mn5 is 1:x:y; the size ratio of Mn2, Mn8, and Mn6 is 1:x:y; the size ratio of Mn3 and Mn1 is 1:(1+M) / (1+x); and the size ratio of Mn4 and Mn2 is 1:(1+M) / (1+x).

5. The CMOS body-driven transconductance amplifier circuit according to claim 1, wherein: The common-mode stability of the transconductance of the transconductance amplifier circuit is formed by the cancellation of opposite changes of the PMOS body transconductance and the NMOS body transconductance with the common mode.

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