High-mobility thin film transistor and preparation method thereof

Abstract

The invention discloses a high-mobility thin film transistor and a preparation method thereof. The thin film transistor comprises a silicon dioxide / silicon (SiO2 / Si) substrate, a bottom gate electrode, a high-K dielectric layer, a single-layer tungsten disulfide (WS2) thin film, a source electrode and a drain electrode. WS2 has the excellent characteristics of high field effect mobility, low off-state current, high drain current, an appropriate energy band structure and the like, but the carrier mobility of the transistor is greatly reduced due to impurities such as gaseous adsorbates in the atmospheric environment, and the average carrier mobility of the bottom gate WS2 thin film transistor taking SiO2 as a dielectric layer in the atmospheric environment is only 0.05 cm < 2 > v <-1 > s <-1 >. The bottom gate WS2 thin film transistor has the advantages that the SiO2 dielectric layer is replaced by the high-K dielectric layer, the prepared bottom gate WS2 thin film transistor shows excellent transistor performance in an atmospheric environment, and the average carrier mobility can reach up to 15cm < 2 > v <-1 > s <-1 >.

Description

Technical Field

[0001] The invention relates to the field of two-dimensional single-layer semiconductor transistors, and in particular to a high-mobility thin-film transistor and a preparation method thereof. Background Art

[0002] The discovery of graphene has ushered in an era of two-dimensional material research. Its excellent optical, electrical and mechanical properties have been widely used in solar cells, wearable devices, transparent electrodes and other fields. However, due to the zero band gap of graphene, its application in electronics and optoelectronics is inevitably limited. Among the many two-dimensional semiconductor materials, a new material called transition metal dichalcogenides (TMDs) is the most promising alternative, which has a suitable band gap, good environmental stability, and excellent electrical and optoelectronic properties. Compared with other TMDs, tungsten disulfide (WS2) has excellent properties such as high field effect mobility, low off-state current, high drain current and suitable band structure. It is widely used in transistors, photodetectors, light-emitting devices (LEDs) and other fields. However, although the theoretical mobility of WS2 is very good, the mobility of a single layer at room temperature is about 250cm 2 v -1 s -1 However, the performance of the transistor is easily affected by the external environment. Charged impurities such as chemical residues in the preparation process and gaseous adsorbents in the atmosphere will cause the carrier mobility to be greatly reduced. The average carrier mobility of the bottom-gate WS2 thin-film transistor with SiO2 as the dielectric layer in the atmospheric environment is only 0.05cm 2 v -1 s -1 In order to solve this problem, the present invention proposes a bottom-gate WS2 thin-film transistor structure. By using a high-K dielectric layer material, the performance and stability of the device in the atmospheric environment are improved, and the average carrier mobility can reach up to 15cm 2 v -1 s -1 . Summary of the invention

[0003] The purpose of the present invention is to provide a high-mobility thin-film transistor and a method for preparing the same. By using a high-K dielectric to replace the traditional silicon dioxide as the gate dielectric layer material, the problem that the current WS2 thin-film transistor has poor environmental stability and can only be used in a vacuum environment or after packaging is solved. The bottom-gate WS2 thin-film transistor designed by the present invention does not require packaging and can exhibit excellent transistor performance in an atmospheric environment, with an average carrier mobility of up to 15cm 2 v -1 s -1 .

[0004] To achieve the above-mentioned purpose, the present invention provides a high-mobility thin-film transistor and a preparation method thereof, characterized in that it comprises a silicon dioxide / silicon (SiO2 / Si) substrate, a bottom gate electrode, a high-K dielectric layer, a single-layer tungsten disulfide film and a source-drain electrode arranged from bottom to top, wherein the bottom gate electrode (2) and the high-K dielectric layer (3) are deposited on the silicon dioxide / silicon (SiO2 / Si) substrate (1) in sequence, the single-layer tungsten disulfide film (4) is transferred to the high-K dielectric layer (3) by a wet transfer method, and finally the source-drain electrode (5) is deposited on the single-layer tungsten disulfide film (4).

[0005] In a preferred embodiment of the present invention, the bottom gate electrode material is a gold film, a chromium / gold composite film, an indium / gold composite film, a platinum film or a palladium film, and its thickness is 40 to 100 nanometers.

[0006] In another preferred embodiment of the present invention, the high-K dielectric layer includes four types of Al2O3, HfO2, Al2O3 / HfO2 and HfO2 / Al2O3, and has a thickness of 20 to 60 nanometers.

[0007] In another preferred embodiment of the present invention, the source-drain electrode material is a bismuth / gold composite film, the bismuth film thickness is 10 to 30 nanometers, and the gold film thickness is 40 to 60 nanometers.

[0008] The present invention provides a high-mobility thin film transistor and a method for preparing the same, comprising the following steps:

[0009] Step 1: patterning a bottom gate electrode on a silicon dioxide / silicon (SiO2 / Si) substrate using a photolithography process, and depositing the patterned bottom gate electrode using a standard semiconductor process;

[0010] Step 2: patterning a high-K dielectric layer on the bottom gate electrode using a photolithography process, and depositing the patterned high-K dielectric layer using an atomic layer deposition process;

[0011] Step 3: A single-layer tungsten disulfide film is prepared by a chemical vapor deposition process, and the complete single-layer tungsten disulfide film is transferred to the high-K dielectric layer by a wet transfer method;

[0012] Step 4: Use a photolithography process to pattern a complete single-layer tungsten disulfide film, and use a reactive plasma etching process to etch the complete single-layer tungsten disulfide film into a patterned area;

[0013] Step 5: Use a photolithography process to pattern source and drain electrodes on the single-layer tungsten disulfide film, and deposit the patterned source and drain electrodes through a standard semiconductor process.

[0014] In a preferred embodiment of the present invention, the method for preparing the bottom gate electrode in step 1 is as follows:

[0015] Step 1-1: Place the silicon dioxide / silicon (SiO2 / Si) substrate in acetone, anhydrous ethanol, and deionized water for ultrasonic cleaning for 5 to 10 minutes, and blow dry with nitrogen;

[0016] Step 1-2: Obtain the gate pattern by photolithography, place the substrate with the developed gate pattern into the vacuum chamber of the thermal evaporation coating machine, and evacuate the chamber until the pressure reaches 1×10 -6 ~1×10 -5 Pa;

[0017] Step 1-3: sequentially evaporating 5nm-8nm Cr and 35nm-50nm Au;

[0018] Step 1-4: Place the substrate with the metal electrode vapor deposited thereon into the degumming solution. After the photoresist is removed, rinse it with anhydrous ethanol and deionized water in turn, and finally blow dry it with nitrogen.

[0019] In another preferred embodiment of the present invention, the method for preparing the high-K dielectric layer in step 2 is as follows:

[0020] Step 2-1: Obtain a high-K dielectric layer pattern by photolithography, place the substrate with the developed high-K dielectric layer pattern into the vacuum chamber of the atomic layer deposition equipment, and evacuate the chamber until the pressure reaches 1×10 -4 ~1×10 -3 Torr;

[0021] Step 2-2: The temperature of the atomic layer deposition equipment chamber is maintained at 80-90°C, the tetrakis(dimethylamino)hafnium (TDMAH) source is heated to 70-80°C, and the trimethylaluminum (TMA) source and the water (H2O) source do not need to be heated;

[0022] Step 2-3: When deposition starts, 14-15 Sccm of high-purity nitrogen is introduced into the chamber, and the chamber pressure is maintained at 0.15-0.16 Torr;

[0023] Step 2-4: Set the program to deposit a 30-60nm high-K dielectric layer;

[0024] Step 2-5: Place the substrate with the high-K dielectric layer deposited thereon into a degumming solution, and after the photoresist is removed, rinse it with anhydrous ethanol and deionized water in sequence, and finally blow dry it with nitrogen gas.

[0025] In a preferred embodiment of the present invention, the specific method of wet transfer in step 3 is as follows:

[0026] Step 3-1: Spin-coat the PS solution on the single-layer WS2 film grown on sapphire and bake at 100°C for 10 to 20 minutes;

[0027] Step 3-2: Place the WS2 substrate coated with PS into a NaOH solution to separate the single-layer WS2 film from the sapphire substrate;

[0028] Step 3-3: Wash the single-layer WS2 film with one side being PS in deionized water four times, transfer it to the substrate on which the high-K dielectric layer has been deposited, and dry it for 1-2 hours;

[0029] Step 3-4: Place the transferred substrate in a vacuum tank and evacuate for 30-60 minutes, and bake at 120°C for 10-20 minutes;

[0030] Step 3-5: Soak the treated substrate in toluene solution for 20-30 minutes. After removing the PS on the surface of the single-layer WS2 film, blow it dry directly with nitrogen.

[0031] In another preferred embodiment of the present invention, the method for preparing the patterned single-layer WS2 film in step 4 is as follows:

[0032] Step 4-1: Obtain a single-layer WS2 thin film pattern using a photolithography process;

[0033] Step 4-2: Place the photolithographic substrate into the RIE vacuum chamber, and use carbon tetrafluoride (CF4) and argon (Ar) to perform reactive ion etching on the excess single-layer WS2 film outside the photolithographic pattern after development. The flow rate of CF4 and Ar is controlled by a mass flow meter (MFC) to have a volume ratio of 2:1, an etching power of 10 to 20 W, and an etching time of 65 to 130 s.

[0034] Step 4-3: Place the etched substrate into a degumming solution, and after removing the photoresist, soak it in deionized water, and finally blow dry with nitrogen to obtain a patterned single-layer WS2 film.

[0035] In a preferred embodiment of the present invention, the method for preparing the source-drain electrode in step 5 is as follows:

[0036] Step 5-1: Obtain source-drain electrode patterns by photolithography, place the substrate with developed source-drain electrode patterns into the vacuum chamber of the thermal evaporation coating machine, and evacuate the chamber until the pressure reaches 1×10 -6 ~1×10 -5 Pa;

[0037] Step 5-2: sequentially deposit 10-30 nm Bi and 20-60 nm Au;

[0038] Step 5-3: Place the substrate with the source and drain electrodes evaporated into the degumming solution. After the photoresist is removed, rinse it with anhydrous ethanol and deionized water in turn, and finally blow it dry with nitrogen.

[0039] The thin film transistor provided by the present invention utilizes the suitable band gap, good environmental stability, and excellent electrical and optoelectronic properties of a single-layer tungsten disulfide film. By using a high-K gate dielectric layer material and a bottom-gate thin film transistor structure, the problem that the current WS2 thin film transistor with SiO2 as the dielectric layer has poor environmental stability and can only be used in a vacuum environment or after packaging is solved. The WS2 thin film transistor exhibits excellent transistor performance in the atmospheric environment and improves the stability of the device. It has good development potential in the fields of transistors, flexible sensors, and photodetectors.

[0040] The concept, specific structure and technical effects of the present invention will be further described below in conjunction with the accompanying drawings to fully understand the purpose, characteristics and effects of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 Schematic diagram of the bottom-gate WS2 thin-film transistor structure.

[0042] Figure 2 Schematic diagram of Al2O3 / HfO2 structure.

[0043] Figure 3 Schematic diagram of HfO2 / Al2O3 structure.

[0044] Figure 4 Transfer characteristic curve of SiO2 dielectric layer bottom-gate WS2 thin film transistor.

[0045] Figure 5 Transfer characteristic curve of WS2 thin film transistor with bottom gate and Al2O3 dielectric layer.

[0046] Figure 6 Transfer characteristic curve of WS2 thin film transistor with bottom gate and HfO2 dielectric layer.

[0047] Figure 7 Transfer characteristic curve of bottom-gate WS2 thin film transistor with Al2O3 / HfO2 dielectric layer.

[0048] Figure 8 Transfer characteristic curve of bottom-gate WS2 thin film transistor with HfO2 / Al2O3 dielectric layer.

[0049] Fig. 9 Carrier mobility distribution of bottom-gate WS2 thin-film transistors with different dielectric layers in atmospheric environment. DETAILED DESCRIPTION

[0050] The present invention will be further described below in conjunction with embodiments.

[0051] Example 1

[0052] like Figure 1As shown, a high-mobility thin-film transistor and a preparation method thereof are characterized in that they include a silicon dioxide / silicon (SiO2 / Si) substrate (1), a bottom gate electrode (2), a high-K dielectric layer (3), a single-layer tungsten disulfide film (4) and a source-drain electrode (5) arranged from bottom to top, wherein the bottom gate electrode (2) and the high-K dielectric layer (3) are deposited on the silicon dioxide / silicon (SiO2 / Si) substrate (1) in sequence, the single-layer tungsten disulfide film (4) is transferred to the high-K dielectric layer (3) by a wet transfer method, and finally the source-drain electrode (5) is deposited on the single-layer tungsten disulfide film (4). The preparation method uses a silicon substrate with a silicon dioxide surface as a substrate, deposits a bottom gate electrode by thermal evaporation, and then obtains a high-K dielectric layer by atomic layer deposition, transfers a single-layer tungsten disulfide film prepared by chemical vapor deposition to the high-K dielectric layer by a wet transfer method, obtains an arrayed single-layer tungsten disulfide film by reactive ion etching, and finally deposits the source-drain electrode. The specific steps are as follows:

[0053] 1. The silicon dioxide / silicon (SiO2 / Si) substrate (1) is ultrasonically cleaned in acetone, anhydrous ethanol, and deionized water for 5 minutes, and then dried with nitrogen; an arrayed gate pattern is obtained by photolithography; the substrate with the developed gate pattern is placed in a vacuum chamber of a thermal evaporation coating machine, a chromium evaporation boat and a gold evaporation boat are placed in the vacuum chamber, and the chamber is evacuated to a pressure of 1×10 -5 Pa; first, a 5nm thick Cr film is evaporated at a rate of 0.04nm / s, and then a 35nm thick Au film is evaporated at a rate of 0.06nm / s. After the deposition is completed, the substrate is taken out, and the substrate with the bottom gate electrode (2) evaporated is immersed in acetone. After the photoresist is removed, it is rinsed with anhydrous ethanol and deionized water in turn, and finally blown dry with nitrogen.

[0054] 2. Obtain an arrayed high-K dielectric layer (3) pattern by photolithography; place the substrate with the developed high-K dielectric layer (3) pattern into a vacuum chamber of an atomic layer deposition device, and evacuate the chamber until the pressure reaches 1×10 -3 Torr; the chamber temperature of the atomic layer deposition equipment was maintained at 90°C; 14 Sccm of high-purity nitrogen was introduced into the chamber before deposition began, and the chamber pressure was maintained at 0.15 Torr; the setting program was as follows: trimethylaluminum (TMA) source was turned on for 0.03 seconds and the purge time was 60 seconds; the water (H2O) source was turned on for 0.03 seconds and the purge time was 60 seconds, and the cycle was repeated 179 times to deposit a total of 30nm Al2O3; the substrate with 30nm Al2O3 deposited was placed in the degumming solution, and after the photoresist was removed, it was rinsed with anhydrous ethanol and deionized water in turn, and finally dried with nitrogen.

[0055] 3. A single-layer WS2 film (4) is grown on sapphire by chemical vapor deposition, and after spin-coating a PS solution on the surface, the film is baked at 100°C for 10 minutes; the WS2 substrate coated with PS is placed in a 20% NaOH solution to separate the single-layer WS2 film (4) from the sapphire substrate; the single-layer WS2 film (4) with PS on one side is washed four times in deionized water, transferred to a substrate on which 30nm Al2O3 has been deposited, and dried for 2 hours; the transferred substrate is placed in a vacuum tank and evacuated for 30 minutes, and baked at 120°C for 10 minutes; the treated substrate is immersed in a toluene solution for 20 minutes, and after the PS on the surface of the single-layer WS2 film (4) is removed, it is directly blown dry with nitrogen.

[0056] 4. Obtain an arrayed single-layer WS2 film (4) pattern by photolithography; place the developed substrate in an RIE vacuum chamber, and use carbon tetrafluoride (CF4) and argon (Ar) to perform reactive ion etching on the excess single-layer WS2 film (4) outside the developed photolithography pattern, wherein the flow rates of CF4 and Ar are controlled by a mass flow meter (MFC) to have a volume ratio of 2:1, an etching power of 10 W, and an etching time of 130 s; heat the degumming solution to 120° C., place the etched substrate, and after removing the photoresist, immerse it in deionized water, and finally blow dry it with nitrogen to obtain an arrayed single-layer WS2 film (4).

[0057] 5. Obtaining an arrayed source-drain electrode (5) pattern by photolithography; placing the substrate with the developed source-drain electrode (5) pattern into a vacuum chamber of a thermal evaporation coating machine, placing a bismuth evaporation boat and a gold evaporation boat into the vacuum chamber, and evacuating the chamber until the pressure reaches 1×10 -5 Pa; firstly, a Bi film with a thickness of 30nm is evaporated at a rate of 0.05nm / s, and then a Au film with a thickness of 60nm is evaporated at a rate of 0.06nm / s. After the deposition is completed, the substrate is taken out, and the substrate with the source and drain electrodes (5) evaporated is immersed in acetone. After the photoresist is removed, it is rinsed with anhydrous ethanol and deionized water in turn, and finally blown dry with nitrogen.

[0058] Example 2

[0059] like Figure 1As shown, a high-mobility thin-film transistor and a preparation method thereof are characterized in that they include a silicon dioxide / silicon (SiO2 / Si) substrate (1), a bottom gate electrode (2), a high-K dielectric layer (3), a single-layer tungsten disulfide film (4) and a source-drain electrode (5) arranged from bottom to top, wherein the bottom gate electrode (2) and the high-K dielectric layer (3) are deposited on the silicon dioxide / silicon (SiO2 / Si) substrate (1) in sequence, the single-layer tungsten disulfide film (4) is transferred to the high-K dielectric layer (3) by a wet transfer method, and finally the source-drain electrode (5) is deposited on the single-layer tungsten disulfide film (4). The high-K dielectric layer (3) can be made of hafnium dioxide, and its preparation method is as follows:

[0060] An arrayed high-K dielectric layer (3) pattern is obtained by photolithography; the substrate on which the high-K dielectric layer (3) pattern is developed is placed in a vacuum chamber of an atomic layer deposition device, and the chamber is evacuated until the pressure reaches 1×10 -3 Torr; the chamber temperature of the atomic layer deposition equipment is maintained at 90°C, and the tetrakis(dimethylamino)hafnium (TDMAH) source is heated to 75°C; 14Sccm of high-purity nitrogen is introduced into the chamber at the beginning of deposition, and the chamber pressure is maintained at 0.15Torr; the setting program is: the tetrakis(dimethylamino)hafnium (TDMAH) source is turned on for 0.04 seconds and the purge time is 120 seconds; the water (H2O) source is turned on for 0.04 seconds and the purge time is 120 seconds, and the cycle is repeated 153 times to deposit a total of 30nm HfO2; the substrate with 30nm HfO2 deposited is placed in the degumming solution, and after the photoresist is removed, it is rinsed with anhydrous ethanol and deionized water in turn, and finally blown dry with nitrogen.

[0061] Example 3

[0062] like Figure 1 As shown, a high-mobility thin-film transistor and a preparation method thereof are characterized in that they include a silicon dioxide / silicon (SiO2 / Si) substrate (1), a bottom gate electrode (2), a high-K dielectric layer (3), a single-layer tungsten disulfide film (4) and a source-drain electrode (5) arranged from bottom to top, wherein the bottom gate electrode (2) and the high-K dielectric layer (3) are deposited on the silicon dioxide / silicon (SiO2 / Si) substrate (1) in sequence, the single-layer tungsten disulfide film (4) is transferred to the high-K dielectric layer (3) by a wet transfer method, and finally the source-drain electrode (5) is deposited on the single-layer tungsten disulfide film (4). The high-K dielectric layer (3) can be made of an aluminum oxide / hafnium oxide stacked structure (such as Figure 2 ), which is prepared by:

[0063] An arrayed high-K dielectric layer (3) pattern is obtained by photolithography; the substrate on which the high-K dielectric layer pattern is developed is placed in a vacuum chamber of an atomic layer deposition device, and the chamber is evacuated until the pressure reaches 1×10 -3Torr; the chamber temperature of the atomic layer deposition equipment is maintained at 90°C, and the tetrakis(dimethylamino)hafnium (TDMAH) source is heated to 75°C; 14 Sccm of high-purity nitrogen is introduced into the chamber at the beginning of deposition, and the chamber pressure is maintained at 0.15 Torr; the setting program is as follows: the tetrakis(dimethylamino)hafnium (TDMAH) source is turned on for 0.04 seconds and the purge time is 120 seconds; the water (H2O) source is turned on for 0.04 seconds and the purge time is 120 seconds, and the cycle is repeated 26 times to deposit 5nm HfO2; the trimethylaluminum (TMA) source is turned on for 0.03 seconds and the purge time is 60 seconds; the water (H2O) source is turned on for 0.03 seconds and the purge time is 60 seconds, and the cycle is repeated 27 times to deposit 5nm Al2O3. The above program is repeated three times to obtain an Al2O3 / HfO2 high-K dielectric layer (3) with a thickness of 30nm and an uppermost layer of Al2O3 (6); the 30nm The Al2O3 / HfO2 substrate is placed in the degumming solution. After the photoresist is removed, it is rinsed with anhydrous ethanol and deionized water in turn, and finally blown dry with nitrogen.

[0064] Example 4

[0065] like Figure 1 As shown, a high-mobility thin-film transistor and a preparation method thereof are characterized in that they include a silicon dioxide / silicon (SiO2 / Si) substrate (1), a bottom gate electrode (2), a high-K dielectric layer (3), a single-layer tungsten disulfide film (4) and a source-drain electrode (5) arranged from bottom to top, wherein the bottom gate electrode (2) and the high-K dielectric layer (3) are deposited on the silicon dioxide / silicon (SiO2 / Si) substrate (1) in sequence, the single-layer tungsten disulfide film (4) is transferred to the high-K dielectric layer (3) by a wet transfer method, and finally the source-drain electrode (5) is deposited on the single-layer tungsten disulfide film (4). The high-K dielectric layer (3) can use a hafnium dioxide / aluminum oxide stacked structure (such as Figure 3 ), which is prepared by:

[0066] An arrayed high-K dielectric layer (3) pattern is obtained by photolithography; the substrate on which the high-K dielectric layer (3) pattern is developed is placed in a vacuum chamber of an atomic layer deposition device, and the chamber is evacuated until the pressure reaches 1×10 -3Torr; the chamber temperature of the atomic layer deposition equipment is maintained at 90°C, and the tetrakis(dimethylamino)hafnium (TDMAH) source is heated to 75°C; 14 Sccm of high-purity nitrogen is introduced into the chamber at the beginning of deposition, and the chamber pressure is maintained at 0.15 Torr; the setting program is as follows: the trimethylaluminum (TMA) source is turned on for 0.03 seconds and the purge time is 60 seconds; the water (H2O) source is turned on for 0.03 seconds and the purge time is 60 seconds, and the cycle is repeated 27 times to deposit 5nm Al2O3; the tetrakis(dimethylamino)hafnium (TDMAH) source is turned on for 0.04 seconds and the purge time is 120 seconds; the water (H2O) source is turned on for 0.04 seconds and the purge time is 120 seconds, and the cycle is repeated 26 times to deposit 5nm HfO2; the above program is repeated three times to obtain a HfO2 / Al2O3 high-K dielectric layer (3) with a thickness of 30nm and the uppermost layer being HfO2 (7); the 30nm The HfO2 / Al2O3 substrate was placed in a degumming solution, and after the photoresist was removed, it was rinsed with anhydrous ethanol and deionized water in sequence, and finally dried with nitrogen.

[0067] Example 5

[0068] like Figure 4 As shown, a single-layer tungsten disulfide film (4) is directly transferred to a silicon dioxide / silicon (SiO2 / Si) substrate (1), and an arrayed single-layer WS2 film (4) is obtained after reactive ion etching. The source-drain electrode (5) is deposited on the single-layer WS2 film (4), and the silicon substrate is the gate and silicon dioxide is the gate dielectric layer. The bottom-gate WS2 thin film transistor transfer characteristic curve shows that the on-state current of the transistor tested in the atmospheric environment is very small. When the source-drain voltage is 1V, the source-drain current is only 90nA. The gate dielectric layer is replaced with a high-K dielectric layer (3), and the gate dielectric layer is used. Figure 1 After the bottom-gate WS2 thin-film transistor structure shown in FIG. 1 , the transfer characteristic curves of the four high-K dielectric layers (3) of 30 nm thick Al2O3, HfO2, Al2O3 / HfO2 and HfO2 / Al2O3 are respectively Figure 5 , 6 , 7 and 8, it can be seen that the bottom-gate WS2 thin film transistor using the high-K dielectric layer (3) as the gate dielectric layer exhibits excellent transistor performance in the atmospheric environment. When the source-drain voltage is 0.1V, the source-drain current can reach 20μA. In addition, Fig. 9 The distribution of carrier mobility of bottom-gate WS2 thin-film transistors with different dielectric layers in atmospheric environment. The average carrier mobility of bottom-gate WS2 thin-film transistors with Al2O3 as high-K dielectric layer (3) is 8cm 2 v -1 s -1 The average carrier mobility of the bottom-gate WS2 thin-film transistor with HfO2 as the high-K dielectric layer (3) is 9 cm 2 v -1 s -1The average carrier mobility of the bottom-gate WS2 thin-film transistor with Al2O3 / HfO2 as the high-K dielectric layer (3) is 15 cm 2 v -1 s -1 The average carrier mobility of the bottom-gate WS2 thin-film transistor with HfO2 / Al2O3 as the high-K dielectric layer (3) is 14 cm 2 v - 1 s -1 .

[0069] The preferred specific embodiments of the present invention are described in detail above. It should be understood that ordinary technicians in the field can make many modifications and changes based on the concept of the present invention without creative work. Therefore, all technical solutions that can be obtained by technicians in the technical field based on the concept of the present invention through logical analysis, reasoning or limited experiments on the basis of the prior art should be within the scope of protection determined by the claims.

Claims

1. A high-mobility thin film transistor and a method for preparing the same, characterized in that: The invention comprises a silicon dioxide / silicon (SiO2 / Si) substrate (1), a bottom gate electrode (2), a high-K dielectric layer (3), a single-layer tungsten disulfide film (4) and a source-drain electrode (5) arranged from bottom to top, wherein the bottom gate electrode (2) and the high-K dielectric layer (3) are deposited on the silicon dioxide / silicon (SiO2 / Si) substrate (1) in sequence, the single-layer tungsten disulfide film (4) is transferred to the high-K dielectric layer (3) by a wet transfer method, and finally the source-drain electrode (5) is deposited on the single-layer tungsten disulfide film (4).

2. A high-mobility thin-film transistor and a method for preparing the same according to claim 1, wherein the bottom gate electrode (2) is made of a gold film, a chromium (or nickel) / gold composite film, an indium / gold composite film, a platinum film or a palladium film, and has a thickness of 40 to 100 nanometers.

3. A high-mobility thin-film transistor and a method for preparing the same according to claim 1, wherein the high-K dielectric layer (3) comprises four types of Al2O3, HfO2, Al2O3 / HfO2 and HfO2 / Al2O3, and has a thickness of 20 to 60 nanometers.

4. A high-mobility thin-film transistor and a method for preparing the same according to claim 1, wherein the metal electrode (2) material is a bismuth / gold composite film, the bismuth film thickness is 10 to 30 nanometers, and the gold film thickness is 40 to 60 nanometers.

5. A high-mobility thin film transistor and a method for preparing the same according to claims 1-4, characterized in that: The steps include: Step 1: depositing a patterned bottom gate electrode (2) on a silicon dioxide / silicon (SiO2 / Si) substrate (1) using a standard semiconductor process; Step 2: depositing a patterned high-K dielectric layer (3) on the bottom gate electrode (2) using an atomic layer deposition process; Step 3: a single-layer tungsten disulfide film (4) is prepared by a chemical vapor deposition process, and the single-layer tungsten disulfide film (4) is transferred to the high-K dielectric layer (3) by a wet transfer method; Step 4: using a reactive plasma etching process to etch the complete single-layer tungsten disulfide film (4) into a patterned area; Step 5: Depositing patterned source and drain electrodes (4) on the patterned single-layer tungsten disulfide film (4) using a standard semiconductor process.

6. A high-mobility thin film transistor and a method for preparing the same according to step 2 of claim 5, characterized in that: The preparation method of the high-K dielectric layer (3) is as follows: Step 2-1: using a standard semiconductor photolithography process to obtain a photoresist pattern for depositing a high-K dielectric layer (3); Step 2-2: Prepare an Al2O3 film, or a HfO2 film, or a stacked film Al2O3 / HfO2 or HfO2 / Al2O3 using standard atomic layer deposition technology, wherein the thickness of the film is 20 to 60 nanometers.

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