Semiconductor device

Abstract

A semiconductor device (90) is provided with, in the following order: first to third channel layers (41-43) comprising a group III-V semiconductor containing Fe and C; and a barrier layer (50) comprising a Group III-V semiconductor having a band gap wider than the band gap of the third channel layer (43). The concentration distribution satisfies the following conditions: a) the Fe concentration in the second channel layer (42) and the third channel layer (43) gradually decreases toward the barrier layer (50), b) the maximum value of the C concentration in the third channel layer (43) is higher than the average value of the C concentration in the second channel layer (42), and c) the maximum value of the C concentration in the third channel layer (43) is lower than the maximum value of the sum of the Fe concentration and the C concentration in the first channel layer (41).

Description

Technical Field

[0001] The present disclosure relates to semiconductor devices, and in particular to semiconductor devices using III-V semiconductors. Background Art

[0002] III-V semiconductors such as GaN (gallium nitride) are sometimes used in semiconductor devices such as HEMT (High Electron Mobility Transistor) for high-frequency applications. HEMT requires good pinch-off characteristics, that is, low leakage current (hereinafter referred to as "leakage current") between the source and the drain when the gate is off. In order to suppress the leakage current, it is necessary to increase the electrical resistance of the portion where the leakage current may flow in the off state.

[0003] It is known that for the above purpose, Fe (iron) and C (carbon) are doped as acceptors to compensate for residual donors in semiconductors such as GaN. On the other hand, when electrons moving in the channel are trapped by traps caused by the dopants, a phenomenon in which the drain current varies over time sometimes occurs, which is called current collapse. Therefore, it is difficult to simply suppress current collapse and obtain good pinch-off characteristics at the same time. Considering this phenomenon, efforts have been made to study the concentration distribution of Fe and C in the thickness direction of the semiconductor layer.

[0004] For example, Japanese Patent Publication No. 2016-511545 (Patent Document 1) discloses a MOCVD (Metal Organic Chemical Vapor Deposition) technology for forming a semi-insulating GaN layer doped with Fe and C. This technology takes into account that Fe doping is difficult to stop quickly in MOCVD and that C doping can be stopped quickly but is prone to crystal defects. Specifically, in MOCVD, a process with about 5×10 18 / cm 3 The growth of Fe doping at a concentration of about 5×10 16 / cm 3 The concentration started at 5 × 10 19 / cm 3 , and then stop. C doping is different from Fe doping and can be stopped quickly.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application No. 2016-511545 Summary of the invention

[0008] According to the technique exemplified in the above publication, in MOCVD, first, a C-doped catalyst with a concentration of 5×10 18 / cm 3 Fe-doped growth. In this growth, only Fe is added as a dopant, so the total dopant concentration is 5×10 18 / cm 3 After that, the active Fe doping was stopped and the growth was carried out with C doping. The C concentration when the C doping was stopped was 5×10 19 / cm 3 The final C doping concentration is 5×10 19 / cm 3 The total dopant concentration is 5×10 18 / cm 3 high.

[0009] The inventors of the present invention have focused on the fact that when the concentration of C doping increases as described above, the recovery time constant, which is an indicator of the time required to recover from the state where electrons are trapped in the energy level formed by C doping, becomes larger. When the above-mentioned concentration distribution is used, when current collapse occurs due to electrons being trapped, there is a problem that the time until the semiconductor device recovers the original current characteristics due to the electrons escaping from the trap becomes longer due to the large recovery time constant.

[0010] The present disclosure has been made to solve the above problems, and an object of the present disclosure is to provide a semiconductor device that can simultaneously suppress current collapse and obtain good pinch-off characteristics while preventing the recovery time constant from becoming excessively large.

[0011] The present disclosure provides a semiconductor device, which includes, in order in the thickness direction: a substrate; a first channel layer composed of a III-V semiconductor containing Fe and C as impurities; a second channel layer composed of a III-V semiconductor containing Fe and C as impurities; a third channel layer composed of a III-V semiconductor containing Fe and C as impurities; and a barrier layer composed of a III-V semiconductor having a band gap wider than that of the third channel layer. The semiconductor channel layer including the first channel layer, the second channel layer, and the third channel layer has a concentration distribution in the thickness direction with respect to the Fe concentration and the C concentration. The concentration distribution satisfies the following conditions: a) the Fe concentration in the second channel layer and the third channel layer gradually decreases toward the barrier layer; b) the maximum value of the C concentration in the third channel layer is higher than the average value of the C concentration in the second channel layer; and c) the maximum value of the C concentration in the third channel layer is lower than the maximum value of the sum of the Fe concentration and the C concentration in the first channel layer.

[0012] According to the present disclosure, it is possible to simultaneously achieve suppression of current collapse and obtaining good pinch-off characteristics while preventing the recovery time constant from becoming excessively large.

[0013] The objects, features, aspects, and advantages of the present disclosure will become more apparent from the following detailed description and accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a cross-sectional view schematically showing the structure of the semiconductor device according to each of Embodiments 1 to 3.

[0015] Figure 2 This is a graph showing an example of concentration distribution of Fe concentration and C concentration in the semiconductor channel layer included in the semiconductor device of the first embodiment, depending on the thickness direction.

[0016] Figure 3 This is a graph illustrating calculation results of the relationship between the C concentration in the third channel layer and the pinch-off voltage variation rate in the semiconductor device according to the first embodiment.

[0017] Figure 4 This is a graph illustrating calculation results of the relationship between the thickness of the third channel layer and the current reduction rate after the pressure voltage is applied, and the relationship between the thickness of the third channel layer and the pinch-off voltage variation rate, for the semiconductor device of the first embodiment.

[0018] Figure 5 This is a graph showing an example of concentration distribution of Fe concentration and C concentration in the semiconductor channel layer included in the semiconductor device of the second embodiment, depending on the thickness direction.

[0019] Figure 6 This is a graph showing an example of concentration distributions of Fe concentration and C concentration in a semiconductor channel layer included in a semiconductor device according to a modification of the second embodiment, depending on the thickness direction.

[0020] Figure 7 This is a graph showing an example of concentration distribution of Fe concentration and C concentration in the semiconductor channel layer included in the semiconductor device of the third embodiment depending on the thickness direction. DETAILED DESCRIPTION

[0021] In the following drawings, the same or corresponding parts are denoted by the same reference numerals, and their description will not be repeated.

[0022] In this specification, a III-V semiconductor refers to a semiconductor using at least one III group element and at least one V group element. In addition, in the technical field, the III group is also called the 13th group, and the V group is also called the 15th group. Examples of the III group elements are aluminum (Al), gallium (Ga), and indium (In). Examples of the V group elements are nitrogen (N), phosphorus (P), arsenic (As), and antimony (Sb).

[0023] <Implementation Method 1>

[0024] Figure 1 This is a cross-sectional view schematically showing the structure of a semiconductor device 90 of the present embodiment 1 (and embodiments 2 and 3 described later). In addition, as described in detail later, the impurity concentration distribution is different between embodiments 1 to 3. The semiconductor device 90 is a high electron mobility transistor (HEMT: High Electron Mobility Transistor) using a two-dimensional electron gas (2DEG: Two Dimensional Electron Gas).

[0025] The semiconductor device 90 includes a substrate 10, a nucleation layer 11, a semiconductor channel layer 40, and a barrier layer 50 in order in the thickness direction (upward in the figure). The semiconductor channel layer 40 includes a first channel layer 41, a second channel layer 42, and a third channel layer 43 in order in the thickness direction (upward in the figure). The semiconductor device 90 also includes a source electrode 61, a drain electrode 62, a gate electrode 65, and a protective layer 70. The source electrode 61, the drain electrode 62, and the gate electrode 65 can be arranged on the semiconductor layer including the barrier layer 50 and the semiconductor channel layer 40, and contact the surface (upper surface) of the barrier layer 50 as shown in the figure. The portion of the semiconductor layer that contacts the source electrode 61 and the drain electrode 62 (the portion directly below these electrodes in the figure) can be set as a region doped in a manner that locally has a high impurity concentration in order to reduce the contact resistance with these electrodes.

[0026] The substrate 10 may be a single crystal substrate made of SiC, Si, sapphire, or GaN, such as a SiC single crystal substrate. The nucleation layer 11 may be made of a III-V semiconductor, such as an AlN (aluminum nitride) layer. The thickness of the nucleation layer 11 is, for example, 10 nm.

[0027] The semiconductor channel layer 40 (specifically, each channel layer of the first channel layer 41, the second channel layer 42, and the third channel layer 43) is composed of a III-V semiconductor containing Fe and C as impurities, and the III-V semiconductor is, for example, GaN. Fe and C have the function of being an acceptor. The thickness of the semiconductor channel layer 40 is, for example, 300 nm or more and 1200 nm or less. The thickness of the third channel layer 43 is preferably 20 nm or more and 400 nm or less, and more preferably 100 nm or more and 300 nm or less. The barrier layer 50 is composed of a III-V semiconductor having a band gap wider than that of the third channel layer 43, and the III-V semiconductor is, for example, AlGaN (aluminum gallium nitride). The thickness of the barrier layer 50 is, for example, 20 nm. The semiconductor channel layer 40 and the barrier layer 50 form a heterojunction. At the heterojunction interface, electrons are accumulated by polarization effect, thereby forming a 2DEG with high concentration and high mobility.

[0028] The semiconductor device 90 may have a spacer layer (not shown) between the semiconductor channel layer 40 and the barrier layer 50. The spacer layer is composed of a III-V semiconductor having a band gap wider than the band gap of the barrier layer 50, and the III-V semiconductor is, for example, AlN. The thickness of the spacer layer is, for example, greater than 0.5 nm and less than 3 nm. When the spacer layer is provided, alloy scattering can be reduced, thereby improving 2DEG mobility. In addition, the conduction band bias becomes larger, so the 2DEG density can be increased, and the forward gate leakage can be reduced.

[0029] The semiconductor device 90 may have a gap layer (not shown) between the barrier layer 50 and each of the source electrode 61, the gate electrode 65, and the drain electrode 62. The gap layer is composed of, for example, a III-V semiconductor such as GaN. The thickness of the gap layer is, for example, 2 nm. The protective layer 70 is an insulating layer provided to reduce surface defects of the semiconductor layer located on the outermost surface (uppermost in the figure), and is composed of, for example, SiN (silicon nitride).

[0030] The semiconductor channel layer 40 has a concentration distribution with respect to the Fe concentration and the C concentration depending on the thickness direction. Figure 2 : is a graph diagram showing an example of the concentration distribution in the first embodiment. The “depth” on the horizontal axis of the graph is an arrow D ( Figure 1 )correspond.

[0031] Concentration distribution ( Figure 2 ) meets the following conditions:

[0032] a) The Fe concentration in the second channel layer 42 and the third channel layer 43 gradually decreases toward the barrier layer 50;

[0033] b) the maximum value of the C concentration in the third channel layer 43 is higher than the average value of the C concentration in the second channel layer 42;

[0034] c) The maximum value of the C concentration in the third channel layer 43 is larger than the maximum value of the sum of the Fe concentration and the C concentration in the first channel layer 41 .

[0035] Furthermore, the above-mentioned “maximum value of the sum of the Fe concentration and the C concentration in the first channel layer 41 ” means the maximum value in the distribution of the total concentration of Fe and C in the first channel layer 41 .

[0036] Hereinafter, the concentration distribution in the present first embodiment will be described in detail.

[0037] Since the acceptor concentration of the first channel layer 41 is sufficiently high and the conduction band energy is increased, the confinement effect of 2DEG is enhanced, so that leakage current can be suppressed and pinch-off characteristics can be improved.

[0038] As described above, due to the limitations of the film forming technology (typically MOCVD) in this technical field, the doping of Fe cannot be stopped quickly. Even if Fe is intentionally doped during the film formation of the first channel layer 41, and then the active doping of Fe is stopped at the time when the second channel layer 42 begins to be formed after the film formation of the first channel layer 41 is completed, due to the upward diffusion of Fe, the concentration of the doped Fe will not actually decrease sharply, and will gradually decrease during the film formation of the second channel layer 42 and the third channel layer 43. Therefore, Fe also remains in the second channel layer 42 and the third channel layer 43. Specifically, the Fe concentration in the second channel layer 42 and the third channel layer 43 gradually decreases from the first channel layer 41 toward the barrier layer 50 (in other words, toward the upper surface FB of the semiconductor channel layer 40).

[0039] On the other hand, C (carbon) is mixed from the atmosphere during the manufacturing process and is unintentionally doped to a certain extent. Therefore, the first channel layer 41, the second channel layer 42, and the third channel layer 43 all have at least a small amount of C concentration. The C concentration caused by this unintentional doping is relatively low, approximately 3×10 16 atoms / cm 3 If this lower concentration is ignored, it can be said that unlike Fe doping, C doping can be stopped quickly. Figure 2 The concentration is intentionally changed sharply in the depth direction of the channel layer. Here, the main energy level formed by C doping becomes deeper when the C concentration is high, which leads to an increase in the recovery time constant. Therefore, in the first channel layer 41, it is best to suppress the leakage current mainly by doping Fe at a high concentration instead of C.

[0040] Based on the above viewpoint, the maximum value of the Fe concentration in the first channel layer 41 is preferably higher than the maximum value of the C concentration in the first channel layer 41. The maximum value of the Fe concentration in the first channel layer 41 is preferably 1×10 17 atoms / cm 3 Above and 1×10 19 atoms / cm 3 When the Fe concentration is lower than this range, the effect of preventing leakage current becomes low. In addition, when the Fe concentration is higher than this range, the Fe concentration of the second channel layer 42 becomes unnecessarily high due to the above reasons, and as a result, the current collapse may be deteriorated. Figure 2 In the illustrated concentration distribution, the Fe concentration is higher than the C concentration at any depth position (in other words, thickness position) in the first channel layer 41 .

[0041] The concentration of Fe and C contained in the second channel layer 42, in other words, the acceptor concentration, is preferably as low as possible. The reason is that when the concentration of the acceptor contained in the second channel layer 42 is high, the trap density increases, and thus the current collapse is sometimes worsened. On the other hand, the Fe concentration of the first channel layer 41 is relatively high as described above, and as a result, it is difficult to reduce the Fe concentration of the second channel layer 42 for the above reasons. Therefore, the maximum value of the Fe concentration in the second channel layer 42 is higher than the average value of the C concentration in the second channel layer 42. In addition, in Figure 2 In the illustrated concentration distribution, the Fe concentration is higher than the C concentration at any depth position in the second channel layer 42. Figure 2 In the concentration distribution shown in the example, the minimum value of the Fe concentration in the second channel layer 42 is higher than the maximum value of the C concentration in the second channel layer 42. In the second channel layer, the average value of the C concentration is preferably 3×10 16 atoms / cm 3 The maximum value of C concentration is more preferably 3×10 16 atoms / cm 3 the following.

[0042] The maximum value of the C concentration in the third channel layer is higher than the average value of the C concentration in the second channel layer 42. As a result, in the vicinity of the 2DEG, the conduction band energy increases, so the closing effect of the 2DEG is improved. Therefore, the leakage current is reduced, the DIBL (Drain Induced Barrier Lowering) effect when a high drain voltage is applied is also suppressed, and the pinch-off characteristic is improved. Furthermore, the conduction band barrier becomes higher, thereby being able to suppress the electrons in the 2DEG from being captured on the second channel layer 42 side. Based on the above, it is possible to simultaneously suppress the current collapse and obtain good pinch-off characteristics. Therefore, it is best to suppress the C concentration in the second channel layer 42 while increasing the C concentration in the third channel layer 43. To this end, it is best to reduce the C concentration at the interface between the second channel layer 42 and the third channel layer 43. Figure 2 The shown changes are in a step-like manner.

[0043] Here, when the C concentration in the third channel layer 43 becomes higher, the trap density also becomes higher. On the other hand, near the electron movement region, the trap energy level and the Fermi level are close to each other, so even if the pressure voltage is not applied, the electrons have been captured by most of the trap energy levels. Therefore, the change in the ionization trap density before and after the pressure is small. Therefore, if the C concentration is only increased to a certain extent, it is difficult to cause the deterioration of the current collapse. Therefore, it is preferred to increase the maximum value of the C concentration to a sufficient level for suppressing the leakage current. However, an excessively large C concentration forms an excessively deep trap energy level, which results in a substantial deterioration of the current collapse and a substantial increase in the recovery time constant. According to the research of the inventors, in order to avoid substantial deterioration of the current collapse and a substantial increase in the recovery time constant, it is preferred that the maximum value of the C concentration in the third channel layer 43 is lower than the maximum value of the sum of the Fe concentration and the C concentration in the first channel layer 41, and more preferably less than half of the sum.

[0044] Figure 3 This is a graph diagram illustrating the calculation results of the relationship between the C concentration in the third channel layer 43 and the pinch-off voltage variation rate when the drain voltage is changed from 5V to 50V for the semiconductor device 90 of the first embodiment. When the drain voltage is increased, the pinch-off voltage shifts in the negative direction due to the DIBL effect. The value obtained by dividing the shift amount by the pinch-off voltage when the drain voltage is low is defined as the pinch-off voltage variation rate. Therefore, Figure 3 The pinch-off voltage variation rate shown is a value obtained by dividing the amount of shift in the pinch-off voltage when the drain voltage is changed from 5V to 50V by the pinch-off voltage when the drain voltage is 5V.

[0045] from Figure 3 As can be seen from the graph, when the C concentration of the third channel layer 43 is increased to a certain extent, the pinch-off characteristics are improved. In the usual practical use of the semiconductor device 90, the pinch-off voltage variation rate is preferably about 8% (see Figure 3 Therefore, the maximum value of the C concentration of the third channel layer 43 is preferably 5×10 16 atoms / cm 3 More preferably, 1×10 17 atoms / cm 3 However, when the C concentration of the third channel layer 43 becomes too high, as described above, the main trap level derived from C becomes deeper and the recovery time constant becomes too long. From this point of view, the maximum value of the C concentration in the third channel layer 43 is preferably 5×10 17 atoms / cm 3 the following.

[0046] Figure 4The graphs are diagrams showing the calculation results of the relationship between the thickness of the third channel layer 43 and the current reduction rate after the pressure voltage is applied, and the relationship between the thickness of the third channel layer 43 and the pinch-off voltage variation rate, for the semiconductor device 90 of the first embodiment. Figure 3 The same situation.

[0047] from Figure 4 As can be seen from the graph, when the thickness of the third channel layer 43 is increased to a certain extent, the pinch-off characteristics are improved. On the other hand, when the thickness of the third channel layer 43 is reduced to a certain extent, the current reduction rate after the pressure voltage is applied is suppressed, in other words, the current collapse is suppressed. Therefore, regarding the thickness of the third channel layer 43, there is a trade-off relationship between the improvement of the pinch-off characteristics and the suppression of the current collapse. Here, as described above, the pinch-off voltage variation rate is preferably approximately 8% or less (refer to Figure 4 In addition, in the normal practical application of the semiconductor device 90, the current reduction rate after the pressure voltage is applied is preferably approximately 40% or less (refer to Figure 4 Therefore, in order to simultaneously improve the pinch-off characteristics and suppress the current collapse, the thickness of the third channel layer 43 is preferably greater than 100 nm and less than 300 nm. In addition, the optimal value of the thickness of the third channel layer 43 depends on the C concentration of the third channel layer 43 and the Fe concentration of the first channel layer 41.

[0048] According to the present embodiment 1 (refer to Figure 2 ), the Fe concentration in the first, second channel layers 42 and the third channel layer 43 gradually decreases toward the barrier layer 50. As a result, the Fe concentration in the first channel layer 41 can be ensured to be high while suppressing the Fe concentration at the upper surface FB of the semiconductor channel layer 40. Therefore, in the first channel layer 41, Fe can be mainly used as an acceptor for ensuring good pinch-off characteristics. Therefore, there is no need to increase the C concentration in the first channel layer 41. This contributes to preventing the recovery time constant from becoming too large.

[0049] Second, when the Fe concentration in the third channel layer 43 becomes lower due to the gradual decrease in the above-mentioned Fe concentration, the maximum value of the C concentration in the third channel layer 43 is higher than the average value of the C concentration in the second channel layer 42. As the C concentration in the third channel layer 43 becomes higher, the effect of narrowly confining the two-dimensional electron gas (2DEG) near the barrier layer 50 is improved. This effect contributes to both improving the pinch-off characteristics and reducing the current collapse. To put the above-mentioned characteristics about the C concentration in other words, the average value of the C concentration in the second channel layer 42 is lower than the maximum value of the C concentration in the third channel layer 43. As a result, the acceptor concentration in the second channel layer 42 can be reduced. Therefore, the current collapse caused by the electrons of the 2DEG being trapped in the second channel layer 42 can be suppressed.

[0050] Third, as described above, the maximum value of the C concentration in the third channel layer 43 is higher than the average value of the C concentration in the second channel layer 42, but lower than the maximum value of the sum of the Fe concentration and the C concentration in the first channel layer 41. Thus, the electrons diffusing from the 2DEG to the third channel layer 43 are suppressed from further diffusing to the first channel layer 41. This contributes to good pinch-off characteristics.

[0051] According to the above, it is possible to simultaneously achieve suppression of current collapse and acquisition of good pinch-off characteristics while preventing the recovery time constant from becoming excessively large.

[0052] The maximum value of the C concentration in the third channel layer 43 can be 5×10 16 atoms / cm 3 Above and 5×10 17 atoms / cm 3 As a result, it is possible to more fully achieve both suppression of current collapse and acquisition of good pinch-off characteristics.

[0053] The maximum Fe concentration in the first channel layer 41 can be 1×10 17 atoms / cm 3 Above and 1×10 19 atoms / cm 3 As a result, it is possible to more reliably suppress current collapse and obtain good pinch-off characteristics while preventing the recovery time constant from becoming excessively large.

[0054] The maximum C concentration in the third channel layer 43 may be less than half the maximum sum of the Fe concentration and the C concentration in the first channel layer 41. This can more reliably achieve both suppression of current collapse and good pinch-off characteristics while preventing the recovery time constant from becoming excessively large.

[0055] The maximum value of the Fe concentration in the second channel layer 42 may be higher than the average value of the C concentration in the second channel layer 42. This makes it possible to more reliably achieve both suppression of current collapse and acquisition of good pinch-off characteristics while preventing the recovery time constant from becoming excessively large.

[0056] The maximum value of the Fe concentration in the first channel layer 41 may be higher than the maximum value of the C concentration in the first channel layer 41. Thus, it is possible to more satisfactorily achieve both preventing the recovery time constant from becoming excessively large and obtaining good pinch-off characteristics.

[0057] The C concentration may have a step-like change at the interface between the second channel layer 42 and the third channel layer 43. This makes it possible to more fully achieve both suppression of current collapse and acquisition of good pinch-off characteristics.

[0058] The third channel layer 43 has a thickness of 100 nm to 300 nm. This makes it possible to more fully achieve both suppression of current collapse and acquisition of good pinch-off characteristics.

[0059] <Implementation Method 2>

[0060] Figure 5 The semiconductor device 90 ( Figure 1 ) is a graph showing an example of the concentration distribution of Fe concentration and C concentration in the semiconductor channel layer 40 having a thickness direction. In the present embodiment, the C concentration at the interface between the third channel layer 43 and the layer including the barrier layer 50 on the third channel layer 43 is lower than the C concentration at the interface between the third channel layer 43 and the second channel layer 42, and is 3×10 16 atoms / cm 3 The above-mentioned "layer including the barrier layer 50 on the third channel layer 43" is as follows: Figure 1 In the case where the third channel layer 43 and the barrier layer 50 are directly in contact, the third channel layer 43 corresponds to the barrier layer 50, and in the case where the spacer layer is provided between the third channel layer 43 and the barrier layer 50, the spacer layer and the barrier layer 50 correspond to a stacked body. In other words, the above conditions are that the C concentration in the upper surface FB of the semiconductor channel layer 40 is lower than the C concentration in the interface between the third channel layer 43 and the second channel layer 42, and is 3×10 16 atoms / cm 3 the following.

[0061] In order to obtain the above-mentioned C concentration distribution, it is necessary that the C concentration in at least a portion of the third channel layer 43 decreases as it approaches the upper surface FB (in other words, the layer including the barrier layer 50 on the third channel layer 43). Figure 5 As shown, it can also be reduced in steps as shown. Figure 6The variations shown are progressively smaller.

[0062] The configuration other than the above is substantially the same as that of the above-described embodiment 1. Therefore, also in this embodiment, it is possible to simultaneously suppress current collapse and obtain good pinch-off characteristics while preventing the recovery time constant from becoming excessively large.

[0063] When the impurity concentration in the electron moving region is too high, the mobility will be excessively reduced due to ionized impurity scattering. In particular, when the acceptor concentration is too high, the 2DEG density will be excessively reduced due to the increase in the conduction band energy. Therefore, by using the above-mentioned concentration distribution in this embodiment, the reduction in mobility in the electron moving region can be suppressed, and the reduction in 2DEG density can also be suppressed. Therefore, the current characteristics of the semiconductor device 90 in the on state can be improved.

[0064] <Implementation Method 3>

[0065] Figure 7 The semiconductor device 90 ( Figure 1 ) is a graph showing an example of the concentration distribution of Fe concentration and C concentration in the semiconductor channel layer 40 depending on the thickness direction.

[0066] In the third embodiment, the maximum value of the Fe concentration in the first channel layer 41 is lower than the maximum value of the C concentration in the first channel layer 41. Since the maximum value of the Fe concentration in the first channel layer 41 is not so high, the concentration of unintentionally doped Fe in the second channel layer 42 and the third channel layer 43 can be reduced. Thus, the current collapse can be reduced.

[0067] In the first channel layer 41, the maximum value of the Fe concentration is lowered as described above. In order to avoid the failure to obtain sufficiently good pinch-off characteristics due to this, the maximum value of the C concentration in the first channel layer 41 can be increased to ensure the acceptor concentration in the first channel layer 41. However, in order to prevent the energy level of the main trap formed by C doping from becoming too deep, it is preferable that the maximum value of the C concentration be 5×10 17 atoms / cm 3 the following.

[0068] In addition, Figure 7 In the illustrated concentration distribution, the Fe concentration is lower than the C concentration at any depth position (in other words, thickness position) in the first channel layer 41 .

[0069] The configuration other than that described above in the third embodiment is substantially the same as that of the first embodiment, and thus the description thereof will not be repeated.

[0070] In addition, each embodiment can be freely combined, or each embodiment can be appropriately deformed or omitted. Although the present disclosure is described in detail, the above description is only for illustration in all schemes and is not limited to this. It should be understood that countless variations that are not illustrated can be conceived from the present disclosure.

[0071] (Explanation of symbols)

[0072] 10: substrate; 11: nucleation layer; 40: semiconductor channel layer; 41: first channel layer; 42: second channel layer; 43: third channel layer; 50: barrier layer; 61: source electrode; 62: drain electrode; 65: gate electrode; 70: protective layer; 90: semiconductor device.

Claims

1. A semiconductor device comprising, in order in a thickness direction: substrate; The first channel layer is composed of a III-V semiconductor containing Fe and C as impurities; The second channel layer is composed of a III-V semiconductor containing Fe and C as impurities; a third channel layer composed of a Group III-V semiconductor containing Fe and C as impurities; and The barrier layer is composed of a III-V semiconductor having a band gap wider than the band gap of the third channel layer, The semiconductor channel layer including the first channel layer, the second channel layer, and the third channel layer has a concentration distribution of Fe concentration and C concentration depending on the thickness direction, and the concentration distribution satisfies the following conditions: a) the Fe concentration in the second channel layer and the third channel layer gradually decreases toward the barrier layer; b) the maximum value of the C concentration in the third channel layer is higher than the average value of the C concentration in the second channel layer; and c) The maximum value of the C concentration in the third channel layer is lower than the maximum value of the sum of the Fe concentration and the C concentration in the first channel layer.

2. The semiconductor device according to claim 1, wherein The maximum value of the C concentration in the third channel layer is 5×10 16 atoms / cm 3 Above and 5×10 17 atoms / cm 3 the following.

3. The semiconductor device according to claim 1 or 2, wherein: The maximum value of the Fe concentration in the first channel layer is 1×10 17 atoms / cm 3 Above and 1×10 19 atoms / cm 3 the following.

4. The semiconductor device according to any one of claims 1 to 3, wherein: The maximum value of the C concentration in the third channel layer is less than or equal to half of the maximum value of the sum of the Fe concentration and the C concentration in the first channel layer.

5. The semiconductor device according to any one of claims 1 to 4, wherein: The maximum value of the Fe concentration in the second channel layer is higher than the average value of the C concentration in the second channel layer.

6. The semiconductor device according to any one of claims 1 to 5, wherein: The maximum value of the Fe concentration in the first channel layer is higher than the maximum value of the C concentration in the first channel layer.

7. The semiconductor device according to any one of claims 1 to 6, wherein: The C concentration changes in a step-like manner at an interface between the second channel layer and the third channel layer.

8. The semiconductor device according to any one of claims 1 to 7, wherein: The third channel layer has a thickness of not less than 100 nm and not more than 300 nm.

9. The semiconductor device according to any one of claims 1 to 8, wherein: The C concentration at the interface between the third channel layer and the layer including the barrier layer on the third channel layer is lower than the C concentration at the interface between the third channel layer and the second channel layer and is 3×10 16 atoms / cm 3 the following.

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