A detection system and a detection method

Abstract

The present invention discloses a detection system and a detection method, which are applied to a system probe card. The detection system includes a tester, a host computer and a transfer module; the host computer is respectively communicatively connected to the tester and the transfer module, the tester is electrically connected to the transfer module, and the transfer module is connected to the system probe card. The host computer is used to schedule the tester and the transfer module; the transfer module includes a communication main control unit, a channel expansion unit, a system power supply unit and a on-card system control unit. The communication main control unit is communicatively connected to the host computer and is respectively communicatively connected to the channel expansion unit, the system power supply unit and the on-card system control unit. The transfer module of the present invention can directly schedule the on-card system of the system probe card under the scheduling of the host computer, solving the problem that the existing probe card analyzer needs to repeatedly insert and remove the card to switch states when testing the system probe card.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor device testing, and particularly relates to a detection system and a detection method with a system probe card. Background Art

[0002] The probe card acts as a connecting bridge between the tester and the wafer. With the increase in wafer design capabilities and complexity, the probe card is developing towards a trend of smaller pitch and more pins. Due to the limited testing capabilities of the tester, it is difficult to meet the demand for simultaneously measuring multiple channels. Therefore, a control unit is integrated on the probe card to form a system-on-card, so that the system-on-card can schedule the test channels of multiple probes on the probe card as needed, enabling each channel to test more chips. And when using the system probe card to measure the wafer, it is necessary to first operate the system-on-card to connect the test channels of multiple probes to the target channels of the wafer.

[0003] In the prior art, when using a traditional probe card analyzer to detect a system probe card, since the traditional probe card analyzer cannot independently control the system-on-card on the system probe card, it is necessary to set the system-on-card on the system probe card to a specific state in advance before testing the system probe card, which undoubtedly requires frequent card removal to switch states, resulting in extremely low testing efficiency.

[0004] Currently, for the problem of low testing efficiency of the traditional probe card analyzer for the system probe card in the prior art, no effective solution has been proposed. Summary of the Invention

[0005] In view of this, embodiments of the present invention provide a detection system and a detection method to at least solve the problem of low testing efficiency of the traditional probe card analyzer for the system probe card in the prior art.

[0006] Embodiments of the present invention provide the following technical solutions:

[0007] Embodiments of the present invention provide a detection system applied to a system probe card. The detection system includes a tester, a host computer, and a transfer module; the host computer is respectively communicatively connected to the tester and the transfer module, the tester is electrically connected to the transfer module, the transfer module is connected to the system probe card, and the host computer is used to schedule the tester and the transfer module;

[0008] The transfer module includes a communication main control unit, a channel expansion unit, a system power supply unit, and a system-on-card control unit. The communication main control unit is communicatively connected to the host computer and is respectively communicatively connected to the channel expansion unit, the system power supply unit, and the system-on-card control unit;

[0009] Among them, the communication master control unit acquires and analyzes the scheduling data sent by the host computer and generates corresponding instruction information. The channel expansion unit matches and connects the resource interface of the test machine with the test channels on the system probe card according to the corresponding instruction information. The system power supply unit supplies power to the system probe card according to the instruction information. The on-card system control unit operates the test channels controlled by the on-card system according to the instruction information to switch to the corresponding probes.

[0010] Further, the channel expansion unit includes a switching circuit, and the switching circuit is respectively connected to the test machine and the system probe card;

[0011] Among them, the channel expansion unit makes the resource interface on the test machine match and connect with the test channels controlled by the on-card system by controlling the opening and closing of the switches in the switching circuit.

[0012] Further, the switching circuit includes a regional short-circuit switching circuit, and the regional short-circuit switching circuit includes n regional switch switching arrays. One ends of the n regional switch switching arrays are correspondingly connected to n resource interfaces of the test machine, and the other ends are correspondingly connected to n regional test channels controlled by the on-card system on the system probe card;

[0013] Among them, when the switches on the n regional switch switching arrays are all closed, it is possible to judge whether there is a short circuit between the n regional test channels according to the leakage current between the n regional switch switching arrays.

[0014] Further, the switching circuit includes a SWITCH switch switching array and / or a Relay switch switching array.

[0015] Further, the channel expansion unit further includes an expansion FPGA chip, and the expansion FPGA chip is respectively connected to the communication master control unit and the switching circuit, and is used to control the opening and closing of the switches in the switching circuit according to the instructions of the communication master control unit.

[0016] Further, the system power supply unit includes a programmable power supply, and the system power supply unit supplies power to the system probe card through the programmable power supply.

[0017] Further, the system power supply unit further includes a power FPGA chip, and the power FPGA chip supplies power to the system probe card through the programmable power supply.

[0018] Further, the communication master control unit includes a master FPGA chip and a plurality of interface components, and the plurality of interface components are respectively connected to the master FPGA chip;

[0019] The communication master control unit is used to parse the scheduling data sent by the host computer into circuit instructions, and send the circuit instructions to the channel expansion unit, the system power supply unit or the on-card system control unit.

[0020] Further, the host computer is communicatively connected to the testing machine through a first communication interface, and the first communication interface includes at least one of JTAG, IIC, SPI, and Ethernet;

[0021] The host computer is communicatively connected to the transfer module through a second communication interface, and the second communication interface includes at least one of Ethernet and UART serial port interface;

[0022] The host computer controls the testing machine to start testing, feedback the testing status and testing structure through the first communication interface, and controls the transfer module through the second communication interface with a simple instruction protocol.

[0023] Another aspect of the present invention provides a detection method, which is applied to the detection system as described above, and the detection method includes:

[0024] The host computer obtains a configuration file, and initializes the transfer module according to the configuration file, wherein the configuration file includes one or more of the number of resource interfaces of the testing machine, the expansion ratio of the channel expansion unit, the address of the channel expansion unit, the address of the system power supply unit, and the address of the on-card system control unit;

[0025] The host computer pre-loads a test queue for the communication master control module of the transfer module, and obtains a start testing instruction;

[0026] Schedule the transfer module, wherein scheduling the transfer module is used to match and connect the resource interface of the testing machine with the test channels of the on-card system control of the system probe card, and switch the test channels of the on-card system control of the system probe card to the corresponding probes;

[0027] The host computer schedules the testing machine to perform testing, obtains and outputs the test results.

[0028] Further, the scheduling of the transfer module includes obtaining the current testing depth, scheduling the switch matrix in the channel expansion module, and scheduling the on-card system control unit.

[0029] Further, the obtaining and outputting the test results includes:

[0030] Obtain the model of the system probe card, and output the test results according to the model of the system probe card.

[0031] Compared with the prior art, the beneficial effects that can be achieved by at least one of the above technical solutions adopted in the embodiments of the present invention at least include:

[0032] A detection system of the present invention matches and connects the resource interface of a tester and the test channels controlled by the system on a card with a system probe card by using the channel expansion unit of a transfer module, and then controls the system on the card of the card with a system probe card by using the on-card system control unit of the transfer module to unbind the tester and the system on the card of the card with a system probe card, so that the transfer module directly schedules the system on the card of the card with a system probe card under the scheduling of a host computer, solves the problem that the existing probe card analyzer needs to repeatedly insert and remove the card to switch states when testing a card with a system probe card, and avoids the tester directly operating on the system on the card of the card with a system probe card;

[0033] Furthermore, in the present application, the channel expansion unit enables the resource interface of the tester to be only connected to the test channels of the card with a system probe card, realizes the unbinding of the tester and the card with a system probe card, and avoids the tester directly operating and scheduling the system on the card, so that different types of cards with a system probe card can be detected by a DC tester by simply modifying the scheduling program. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application, and those of ordinary skill in the art can also obtain other drawings based on these drawings without creative efforts.

[0035] Figure 1 It is a connection relationship diagram of a detection system according to an embodiment of the present invention;

[0036] Figure 2 It is a scheduling relationship diagram of a detection system according to an embodiment of the present invention;

[0037] Figure 3 It is a transfer system architecture diagram of a detection system according to an embodiment of the present invention;

[0038] Figure 4 It is a regional short-circuit switch circuit of a switch circuit according to an embodiment of the present invention;

[0039] Figure 5 It is a probe card side switch circuit (I) of a switch circuit according to an embodiment of the present invention;

[0040] Figure 6 It is a probe card side switch circuit (II) of a switch circuit according to an embodiment of the present invention;

[0041] Figure 7Flowchart of a detection method according to an embodiment of the present invention;

[0042] Figure 8 Control flowchart of the host computer in an embodiment of the present invention;

[0043] Figure 9 Switch matrix control instruction diagram in a detection system according to an embodiment of the present invention. Detailed implementation manners

[0044] The embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0045] The following uses specific specific examples to illustrate the implementation manners of the present application. Those skilled in the art can easily understand other advantages and effects of the present application from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The present application can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that, without conflict, the following embodiments and the features in the embodiments can be combined with each other. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without making creative efforts belong to the scope of protection of the present application.

[0046] It should be noted that the following describes various aspects of the embodiments within the scope of the appended claims. It should be obvious that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is illustrative only. Based on the present application, those skilled in the art should understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number and aspects described herein can be used to implement the device and / or practice the method. In addition, this device and / or this method can be implemented using other structures and / or functions in addition to one or more of the aspects described herein.

[0047] It should also be noted that the drawings provided in the following embodiments only illustrate the basic concept of the present application schematically. The drawings only show the components related to the present application, rather than being drawn according to the number, shape and size of the components in actual implementation. The type, quantity and ratio of each component in its actual implementation can be an arbitrary change, and the component layout type may also be more complex.

[0048] In addition, in the following description, specific details are provided for the purpose of thorough understanding of the examples. However, those skilled in the art will understand that the practice can be carried out without these specific details.

[0049] With the improvement of wafer manufacturing capabilities and the increase in chip design complexity, probe cards are trending towards smaller pitch and more pins. However, due to the limited testing capabilities of the tester, it is difficult to meet the demand for simultaneous measurement of multiple channels. Therefore, it has become a trend to introduce a system-on-card on the probe card to schedule the tester resources so that each channel can test more chips.

[0050] The main difference between a system-on-card probe card and a non-system probe card is that: the channels of a non-system probe card can be directly measured, while for a system-on-card probe card, its internal system needs to be operated first before the target channel can be measured.

[0051] For example, taking a 12-inch wafer as an example, with more chips in the same area and more probe pins on the probe card, the tester is not sufficient to support powering on all chips at once. Therefore, a system-on-card is needed to switch the power once to avoid overloading the tester.

[0052] Currently, there is no mature solution for detecting a probe card with a system-on-card. Existing probe card analyzers cannot effectively detect the channels controlled by the system-on-card, and using a traditional tester for probe card detection is too wasteful. Therefore, there is an urgent need for a dedicated detection system to solve the detection problem of a probe card with a system.

[0053] There are usually two solutions for testing a probe card with a system-on-card in the prior art:

[0054] Solution 1: Use a probe card analyzer to test the probe card with a system-on-card. Traditional probe card analyzers lack hardware integration control functions and need to preset the system-on-card to a certain state before testing. This method requires frequent removal and replacement of the on-card state, resulting in extremely low testing efficiency.

[0055] Therefore, existing probe card analyzers can only test non-system probe cards.

[0056] Solution 2: Directly use a tester to test the probe card. On a specific probe card platform, the corresponding tester needs to be used, and different test programs need to be written for the same system-on-card on different platforms for adaptation. This method is mainly for mass production testing, but it is too wasteful and costly when used for detecting probe cards. In addition, the results of the tester are for the wafer, not the probe card itself, and it has no direct help in identifying probe card problems.

[0057] Therefore, when the probe card is the connection bridge between the tester and the wafer, the tester capable of testing with a system-on-card probe card must have the ability to operate the system-on-card of the probe card. Therefore, in order to realize the operation of the system-on-card, the system-on-card probe card needs to rely on a specific tester for testing and verification during factory testing.

[0058] Different probe card platforms have different repetitive structures, which are determined by the test machine used. When designing a probe card, the system on the card is extended according to this structure. The overall structure of different types can be first subjected to OS (Open Short) tests (open circuit test, short circuit test), and then the OS test can be carried out within the structure. Based on this requirement, the test can be carried out in time-sharing and segmented manner, reducing the requirement for the number of test source channels.

[0059] Based on this, an embodiment of this specification proposes a processing solution: as Figures 1 - 3 shown, a detection system of the present invention uses a host computer to first schedule a transfer module, and first uses the channel expansion unit of the transfer module to make the resource interface of the test machine match and connect with the test channels controlled by the system on the card of the system probe card with system. Then, the control unit of the on-card control system is used to operate the system on the card on the system probe card with system, so that the test channels controlled by the system on the card are switched to the corresponding probes. Finally, the host computer schedules the test machine to perform the test work, solving the problem that the existing probe card analyzer needs to frequently remove the card to switch states when testing the system probe card with system, resulting in low test efficiency.

[0060] Furthermore, by only matching and connecting the test machine with the test channels of the system probe card with system, the test machine and the system on the card on the system probe card with system are decoupled. Therefore, only a common test machine is needed to test the system probe card with system, and only simple modifications to the test program are required to meet different systems on the card.

[0061] The following will describe the technical solutions provided by the embodiments of the present application with reference to the accompanying drawings.

[0062] Embodiment 1

[0063] As Figures 1 - 3 shown, a detection system provided by an embodiment of the present invention is applied to a system probe card with system. The detection system includes a test machine, a host computer, and a transfer module; the host computer is respectively communicatively connected to the test machine and the transfer module, the test machine is electrically connected to the transfer module, and the transfer module is connected to the system probe card with system. The host computer is used to schedule the test machine and the transfer module.

[0064] Among them, the test machine of the present application can at least perform OS tests. For example, the test machine of the present application can be a DC (Direct Current) test machine. The DC test machine is easy to obtain, has a low cost, and can meet the requirements of probe card testing.

[0065] Among them, the test machine is mainly used to test the system probe card with system through the transfer module.

[0066] Among them, the role of the host computer is to schedule the test machine and the transfer module, construct a test sequence, and integrate the test results.

[0067] Among them, the host computer can be a PC host computer or an embedded system host computer, or other devices that can implement the host computer function can be used instead.

[0068] Among them, the host computer can communicate with the test machine through the first communication interface (Interface 1), and the host computer can control the test machine to start testing, feedback the test status and test results through the first communication interface. The first communication interface can be a conventional test machine communication interface, such as communication interfaces like JTAG, IIC, SPI Ethernet, etc.

[0069] Among them, the transfer module is used to match the resource interface of the test machine with the test channels controlled by the on-card system of the system probe card with system, and control and schedule the test channels controlled by the on-card system of the system probe card with system to switch to the corresponding probes.

[0070] Among them, in this application, there is no direct scheduling between the test machine and the transfer module, and the cooperation between the test machine and the transfer module needs to be controlled by the host computer.

[0071] Among them, the physical connection between the transfer module and the test machine is to match and connect the test machine and the system probe card with system. The connection methods include but are not limited to connection by connectors, connection by cables, connection by spring pins, etc.

[0072] Among them, the transfer module communicates with the host computer through the second communication interface (Interface 2), and the host computer controls the transfer module from the second communication interface through a simple instruction protocol. The second communication interface can be interfaces such as Ethernet, UART serial port, etc.

[0073] Among them, the system probe card with system is a probe card with an on-card system, which includes multiple probes and a control system (on-card system) integrated into the probe card. The system probe card with system is used to test wafers.

[0074] Specifically, the scheduling method of this application is that the host computer schedules the test machine and the transfer module, and the transfer module schedules itself and the on-card system of the system probe card with system and powers the system probe card with system.

[0075] This application uses the host computer to schedule the test machine and the transfer module, and the transfer module schedules the system probe card with system, so as to unbind the test machine and the system probe card with system, and use the transfer module to schedule the system probe card with system, so that it is not necessary for the test machine to manipulate the system probe card with system, and thus only a common test machine such as a DC test machine can be used to realize the test of the system probe card with system.

[0076] Specifically, the relay module includes a communication master control unit, a channel expansion unit, a system power supply unit, and a system control unit on the card. The communication master control unit is communicatively connected to the host computer and is respectively communicatively connected to the channel expansion unit, the system power supply unit, and the system control unit on the card. Among them, the communication master control unit acquires and parses the scheduling data sent by the host computer and generates corresponding instruction information. The channel expansion unit matches and connects the resource interface of the test machine with the test channels on the system probe card according to the corresponding instruction information. The system power supply unit supplies power to the system probe card according to the instruction information. The system control unit on the card operates the test channels controlled by the system on the card to switch to the corresponding probes according to the instruction information.

[0077] Among them, the communication master control unit is communicatively connected to the host computer through the second communication interface. The communication master control unit is responsible for the external communication of the entire relay module, responsible for parsing external protocol instructions, and distributing commands to each specific hardware, such as distributing to the channel expansion unit, the system power supply unit, and the system control unit on the card.

[0078] Specifically, the communication master control unit includes a master FPGA chip and multiple interface components, and the multiple interface components are respectively connected to the master FPGA chip. The communication master control unit is used to parse the scheduling data sent by the host computer into circuit instructions and send the circuit instructions to the channel expansion unit, the system power supply unit, or the system control unit on the card.

[0079] Among them, the communication master control unit takes the master FPGA chip as the core, and various interface components are built based on the master FPGA chip, and the interface components include the interface types selected by the second communication interface to receive data from the second communication interface.

[0080] Among them, the communication master control unit communicates with the channel expansion unit, the system power supply unit, and the system control unit on the card using the TTC protocol.

[0081] Among them, the channel expansion unit is responsible for implementing the one-to-many relationship between the resource interface (test channel) of the test machine and the channels of the system probe card.

[0082] Among them, the number of the channel expansion unit and the system power supply unit can be plural, and each unit has its own independent address.

[0083] Among them, the expansion ratio of the channel expansion unit can be set as needed, and it can be expanded in the ratio of 1:2, 1:4, 1:8.

[0084] Among them, the channel expansion unit includes an expansion FPGA chip and a switch circuit. The expansion FPGA chip is respectively connected to the communication master control unit and the switch circuit, and is used to control the opening and closing of the switches in the switch circuit.

[0085] Among them, the extended FPGA chip controls the opening and closing of the switches in the switch circuit, so that the resource interface on the tester is connected to the test channels controlled by the on-card system in a matching manner.

[0086] Among them, the system power supply unit is responsible for imitating the tester to supply power to the system probe card with a system.

[0087] Among them, the system power supply unit includes a power FPGA chip and is connected to the power supply interface of the system probe card with a system.

[0088] Optionally, the system power supply unit includes a programmable power supply. The system power supply unit supplies power to the system probe card with a system through the programmable power supply, that is, the power FPGA supplies power to the system probe card with a system through the programmable power supply, so as to form an integrated programmable adjustable DC power supply to supply power to the system probe card with a system.

[0089] Among them, the on-card system control unit is used to schedule the on-card system of the system probe card with a system and cooperate with the test item to switch the test channels controlled by the on-card system to different probes.

[0090] Among them, the on-card system control unit uses an FPGA master (on-card system FPGA) and can realize the conversion of various different serial ports and parallel ports to directly operate the on-card system on the system probe card with a system.

[0091] Among them, the on-card system control unit is connected to the system control port on the system probe card with a system.

[0092] Furthermore, the channel expansion unit includes a switch circuit. The switch circuit is respectively connected to the tester and the system probe card with a system; among them, the channel expansion unit controls the opening and closing of the switches in the switch circuit, so that the resource interface on the tester is connected to the test channels controlled by the on-card system in a matching manner.

[0093] Furthermore, the switch circuit includes a regional short-circuit switch circuit. The regional short-circuit switch circuit includes n regional switch switching arrays. One end of the n regional switch switching arrays is correspondingly connected to the n resource interfaces of the tester, and the other end is correspondingly connected to the n regional test channels controlled by the on-card system on the system probe card with a system; among them, when the switches on the n regional switch switching arrays are all closed, it is possible to judge whether there is a short circuit between the n regional test channels according to the leakage current between the n regional switch switching arrays.

[0094] For example, taking a 100-channel test source to test a 400-channel probe card as an example, the switch matrix of the transfer module is designed with an expansion ratio of 1:4. The test source channels are named CH1-CH100, and the probe card channels are named CHA1-100, CHB1-100, CHC1-100, and CHD1-100. Figure 4It is a regional short - circuit switch circuit. As can be seen from the figure, CH1, CH2, CH3, and CH4 respectively correspond to the four repetitive structural parts of the probe card. When the switch of CH1 is closed, CHA1 - 100 is short - circuited; when the switch of CH2 is closed, CHB1 - 100 is short - circuited; when the switch of CH3 is closed, CHC1 - 100 is short - circuited; when the switch of CH4 is closed, CHD1 - 100 is short - circuited. All signals in the four regions A, B, C, and D of the probe card are short - circuited. By measuring the leakage current between CH1, CH2, CH3, and CH4, it can be determined whether there is a short - circuit between regions.

[0095] Among them, the switch circuit includes a SWITCH switch - switching array and / or a Relay switch - switching array. When the accuracy requirement for channel resistance in the test of the system - equipped probe card is relatively low, the SWITCH switch - switching array can be used; when the accuracy requirement is relatively high, the Relay switch - switching array can be used.

[0096] Preferably, the switch circuit includes both a SWITCH switch - switching array and a Relay switch - switching array, and the SWITCH switch - switching array and the Relay switch - switching array are arranged in parallel, so that the transfer module can handle different scenarios.

[0097] As Figures 5 - 6 shown, the switch circuit also includes a conventional probe - card - side switch circuit, and the expansion ratio of the conventional probe - card - side switch circuit can be expanded in the ratios of 1:2, 1:4, and 1:8.

[0098] For example, the switch circuit also includes multiple switch groups. Each switch group includes multiple switches. One ends of the multiple switches in the switch group are respectively connected to the resource ports of the tester, and the other ends of the multiple switches in the switch group are connected in series and then connected to the test channels of the system - equipped probe card; or the switch circuit includes one switch group. The switch group includes multiple switches. One end of the switch group is connected in series and then connected to the resource port of the tester, and the other end of the switch group is respectively connected to multiple test channels on the system - equipped probe card.

[0099] In the embodiment of the present invention, the connection between the transfer module and the system - equipped probe card adopts the form of a flexible board + a rigid board with a gold finger, and different tester interface boards are replaced according to different tester platforms.

[0100] A detection system according to an embodiment of the present invention is connected to a test channel with a system probe card through a transfer module by a tester, and the on-card system control unit of the transfer module is used to control the on-card system of the system probe card, so as to unbind the tester from the system probe card. Then, the host computer schedules the transfer module, enabling the transfer module to schedule the on-card system. Then, the channel expansion unit completes the matching connection between the resource interface of the tester and the test channel of the system probe card. Finally, the tester is scheduled to complete the detection of the system probe card, so that the detection of the system probe card can be achieved by using a DC tester. And because the tester and the on-card system are unbound, only simple modification of the test program of the transfer module is required to meet different on-card systems.

[0101] In the embodiment of the present invention, the on-card system is controlled by a dedicated module (on-card system control unit), which solves the problem that traditional probe card analyzers do not have hardware control integration. And the requirement for the number of tester channels is reduced through the channel expansion module, and an easily obtainable DC tester can be selected, without the need for a large-scale specific model of a certain tester, reducing the test cost and test difficulty; the transfer module separates the scheduling of the on-card system from the tester itself, and the tester is only used for OS testing, and the scheduling of the on-card system is no longer restricted by the tester.

[0102] Embodiment 2

[0103] As Figures 7 - 8 shown, the present application provides a detection method, which is applied to the detection system according to any one of Embodiment 1. The detection method includes:

[0104] Step S102, the host computer obtains a configuration file and initializes the transfer module according to the configuration file, where the configuration file includes one or more of the number of resource interfaces of the tester, the expansion ratio of the channel expansion unit, the address of the channel expansion unit, the address of the system power supply unit, and the address of the on-card system control unit.

[0105] Before the host computer obtains the configuration file, first connect the host computer to the tester and the transfer module respectively, and then initialize the transfer module according to the configuration file.

[0106] Step S104, the host computer preloads a test queue for the communication main control module of the transfer module and obtains a start test instruction.

[0107] After the host computer loads the test queue, it obtains a start test instruction to send corresponding instruction information to the transfer module, so that the transfer module executes a scheduling task according to the corresponding instruction information.

[0108] Step S106, Scheduling and Transfer Module. The scheduling and transfer module is used to match and connect the resource interface of the test machine with the test channels controlled by the on-card system of the system probe card, and to switch the test channels controlled by the on-card system of the system probe card to the corresponding probes.

[0109] Among them, the scheduling and transfer module includes obtaining the current test depth, the switch matrix in the scheduling channel expansion module, and the on-card system control unit.

[0110] The upper computer scheduling and transfer module essentially sends command information to the transfer module, enabling the transfer module to perform switch matrix scheduling and on-card system scheduling according to the command information.

[0111] Taking the switch matrix scheduling of the transfer module as an example, as Figure 9 shown in the switch matrix control instruction diagram, the instruction consists of transmission status, instruction type, start channel, end channel, and channel status. It can specify the channel range to batch-adjust the instruction status, and can control each switch in the matrix by combining multiple instructions. This instruction can be adjusted according to different actual situations.

[0112] Step S108, The upper computer schedules the test machine to perform tests, obtains the test results, and ends the test.

[0113] Among them, obtaining and outputting the test results includes:

[0114] Obtaining the model of the system probe card, and outputting the test results according to the model of the system probe card.

[0115] Among them, when the transfer module outputs the test results to the upper computer, if there are unfinished test items, the transfer module scheduling is re-performed.

[0116] The upper computer of this application starts to detect the interfaces of the test machine and the transfer module. After obtaining the connection response, the test starts. The configuration file of the upper computer specifies the number of channels of the current test machine, the expansion ratio of the transfer module, the number and addresses of the channel expansion modules and system power modules of the transfer module; after the configuration is completed, the upper computer pre-loads the test queue for the communication main control module to obtain the test depth of this time; the instruction sequence should follow the order of scheduling the transfer module first and then operating the test machine; after all the tests in the test sequence are completed, the test results are output according to the model of the probe card.

[0117] The upper computer process of this application can be regarded as the sequential scheduling order of each device in the architecture, and this scheduling ensures that the actual circuit is switched to the part that needs to be tested.

[0118] The embodiments of the present invention can realize the on-card system scheduling of the system probe card, so that the test channels of the system probe card are switched to different probes, and the probes before and after the switch are different.

[0119] The test results obtained in the embodiments of the present invention are related to the model of the system probe card, which is beneficial to troubleshooting the probe card.

[0120] In this specification, the same or similar parts among the various embodiments can be referred to each other. Each embodiment focuses on the differences from other embodiments. In particular, for the product embodiments described later, since they correspond to the methods, the descriptions are relatively simple, and the relevant parts can be referred to the partial descriptions of the system embodiments.

[0121] The above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present application should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A detection system, applied to a probe card with a system, characterized in that: The detection system includes a test machine, a host computer and a transfer module; the host computer is respectively connected to the test machine and the transfer module for communication, the test machine is electrically connected to the transfer module, the transfer module is connected to the probe card with the system, and the host computer is used to schedule the test machine and the transfer module; The transfer module includes a communication main control unit, a channel expansion unit, a system power supply unit and an on-card system control unit, wherein the communication main control unit is communicatively connected to the host computer, and is communicatively connected to the channel expansion unit, the system power supply unit and the on-card system control unit respectively; Among them, the communication main control unit obtains and parses the scheduling data sent by the host computer and generates corresponding instruction information; the channel expansion unit matches and connects the resource interface of the test machine with the test channel controlled by the system on the card with the system probe card according to the corresponding instruction information, so that the test machine can detect the system probe card; the system power supply unit supplies power to the system probe card according to the instruction information, and the on-card system control unit operates the on-card system controlled by the on-card system to switch to the corresponding probe according to the instruction information, and the on-card system control unit is used to schedule the on-card system with the system probe card, and switch the test channel controlled by the on-card system to different probes in accordance with the test items.

2. The detection system according to claim 1, characterized in that: The channel expansion unit includes a switch circuit, and the switch circuit is respectively connected to the test machine and the probe card with system; The channel expansion unit controls the opening and closing of the switch in the switch circuit so that the resource interface on the test machine matches and connects with the test channel controlled by the system on the card.

3. The detection system according to claim 2, characterized in that: The switch circuit includes a regional short-circuit switch circuit, and the regional short-circuit switch circuit includes n regional switch switching arrays, one end of the n regional switch switching arrays is correspondingly connected to the n resource interfaces of the tester, and the other end is correspondingly connected to the n regional test channels controlled by the on-card system on the probe card with system; When the switches on the n regional switch switching arrays are all closed, it is possible to determine whether there is a short circuit between the n regional test channels according to the leakage current between the n regional switch switching arrays.

4. The detection system according to claim 3, characterized in that: The switch circuit includes a SWITCH switch array and / or a Relay switch array.

5. The detection system according to any one of claims 2 to 4, characterized in that: The channel extension unit also includes an extended FPGA chip, which is connected to the communication main control unit and the switch circuit respectively, and is used to control the opening and closing of the switch in the switch circuit according to the instructions of the communication main control unit.

6. The detection system according to claim 1, characterized in that: The system power supply unit includes a programmable power supply, and the system power supply unit supplies power to the system probe card through the programmable power supply.

7. The detection system according to claim 6, characterized in that: The system power supply unit further comprises a power FPGA chip, and the power FPGA chip supplies power to the system probe card through the program-controlled power supply.

8. The detection system according to claim 1, characterized in that: The communication main control unit includes a main control FPGA chip and a plurality of interface elements, and the plurality of interface elements are respectively connected to the main control FPGA chip; The communication main control unit is used to parse the scheduling data sent by the host computer into circuit instructions, and send the circuit instructions to the channel expansion unit, the system power supply unit or the on-card system control unit.

9. The detection system according to claim 1, characterized in that: The host computer is connected to the test machine through a first communication interface, wherein the first communication interface includes at least one of JTAG, IIC, SPI, and Ethernet; The host computer is connected to the transfer module through a second communication interface, wherein the second communication interface includes at least one of an Ethernet and a UART serial port interface; The host computer controls the test machine to start testing, feedback test status and test structure through the first communication interface, and controls the transfer module through the second communication interface with a simple instruction protocol.

10. A detection method, characterized in that: Applied to the detection system according to any one of claims 1 to 9, the detection method comprises: The host computer obtains a configuration file and initializes the transfer module according to the configuration file, wherein the configuration file includes one or more of the number of resource interfaces of the test machine, the expansion ratio of the channel expansion unit, the address of the channel expansion unit, the address of the system power supply unit, and the address of the system control unit on the card; The host computer preloads the test queue for the communication main control module of the transfer module and obtains the start test instruction; A scheduling transfer module, wherein the scheduling transfer module is used to match and connect the resource interface of the test machine with the test channel of the system control on the card with the system probe card, and switch the test channel of the system control on the card with the system probe card to the corresponding probe; The host computer schedules the test machine to perform testing, and obtains and outputs test results.

11. The detection method according to claim 10, characterized in that: The scheduling transfer module includes obtaining the current test depth, a switch matrix in the scheduling channel expansion module, and a system control unit on the scheduling card.

12. The detection method according to claim 10, characterized in that: The obtaining and outputting of the test results comprises: The model of the system probe card is obtained, and the test result is output according to the model of the system probe card.

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