Double linked list aging method, electronic equipment and medium

By adopting the double-linked list aging method in the full association cache and using three-party interchange operations to achieve activity-based sorting optimization, the problems of high complexity and low execution efficiency of table entry aging in the existing technology are solved, and efficient resource utilization and data transmission performance are achieved.

CN119396844BActive Publication Date: 2025-05-02SHENZHEN XINGYUN ZHILIAN TECH CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202510012151.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-01-06
Publication Date
2025-05-02
Estimated Expiration
2045-01-06

AI Technical Summary

Technical Problem

The prior art has high complexity and low execution efficiency when the table items under the full-related cache are aging, and it is prone to repeated consultations and repeated chain building problems.

Method used

The double-linked list aging method is used to generate the first and second linked lists, and the activity-based sorting optimization is achieved using three-party interchange operations, simplifying the circuit complexity and avoiding random removal and repeated link building.

Benefits of technology

The table entry aging mechanism under full-association cache is realized, which improves resource utilization and data transmission performance, simplifies circuit complexity, saves memory resources, and avoids the problems of repeated consultations and repeated chain building.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119396844B_ABST
    Figure CN119396844B_ABST
Patent Text Reader

Abstract

The present application relates to the field of computer technology and provides a double-linked list aging method, electronic device and medium. In the face of the high complexity and low execution efficiency of table item aging under a fully associative cache, the method uses a first linked list and a second linked list to form a double-linked list design to implement the double-linked list aging method, converts the operations performed on the table items in the cache table, such as table item access and table item modification, into the first element of the first index number in the first linked list, thereby triggering the corresponding three-party exchange operations on the first linked list and the second linked list, respectively, and realizes the sorting optimization based on activity. When the table items are not full, the table items can be accurately aged, and when the table items are full, the inactive elements can be replaced, which simplifies the circuit complexity, saves the occupation of memory resources, helps to realize a fully associative cache, and effectively overcomes the problems of repeated consultations and repeated chain building.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a double linked list aging method, electronic equipment and medium. Background Art

[0002] In the application fields of communication, high-performance computers, etc., it is necessary to widely use cache to store various entries, and it is necessary to manage the aging of cache entries, age some entries and add new entries under the limitation of limited storage space. In the prior art, one aging method is the time aging mechanism, that is, setting the aging of unused entries after a certain period of time, or selecting the entries with the smallest remaining survival time from all the entries to age, but the time aging mechanism may have problems of repeated negotiation and repeated chain building. For example, the removed entries may have high activity at present, thus affecting the data transmission performance in certain scenarios. Another aging method is the least recently used (Least Recently Used, LRU), that is, aging the least recently used entries, but LRU needs to maintain a counter for each entry separately to count the number of accesses in the recent period of time, which leads to high circuit complexity, difficulty in achieving full associative cache, and low execution efficiency when the size of the entries is large.

[0003] To this end, the present application provides a double linked list aging method, electronic device and medium, which can not only realize the table entry aging mechanism under the fully associative cache, but also does not need to record and maintain the number of accesses and aging time for each table entry or each element separately, and also avoids the loss of random removal and repeated chain building, which helps to improve resource utilization and data transmission performance. Summary of the invention

[0004] In the first aspect, the present application provides a double linked list aging method. The double linked list aging method includes: generating a first linked list based on the table items in the cache table, wherein the elements in the first linked list correspond one-to-one to the table items in the cache table, and the elements in the first linked list are arranged from small to large according to the first table item index; generating a second linked list based on the first linked list, wherein the elements in the second linked list are arranged from small to large according to the second table item index, the element with the largest index number in the second table item index in the second linked list corresponds to the element with the second smallest index number in the first table item index in the first linked list, and the element with the second largest index number in the second table item index in the second linked list corresponds to the element with the smallest index number in the first table item index in the first linked list; at least after generating the second linked list, initializing the linked list head pointer to point to the element with the smallest index number in the first table item index in the first linked list, and initializing the linked list tail pointer to point to the element with the largest index number in the second table item index in the second linked list; in response to hitting the element with the first table item index in the first linked list, a first element of a first index number, determining a second element of the first linked list having a second index number immediately before the first element and a third element of the first linked list having a third index number immediately after the first element, performing a first type of three-way swap operation on the first linked list from the element corresponding to the first index number to the element corresponding to the third index number, from the element corresponding to the third index number to the element pointed to by the linked list head pointer, and from the element pointed to by the linked list head pointer to the element corresponding to the first index number, and performing a second type of three-way swap operation on the second linked list from the element corresponding to the first index number to the element corresponding to the second index number, from the element corresponding to the second index number to the element pointed to by the linked list tail pointer, and from the element pointed to by the linked list tail pointer to the element corresponding to the first index number, and then, after performing the first type of three-way swap operation and the second type of three-way swap operation, updating the linked list head pointer to point to the element corresponding to the first index number in the first linked list and keeping the linked list tail pointer unchanged.

[0005] Through the first aspect of the present application, in the face of the high complexity and low execution efficiency of table item aging under a fully associative cache, a double linked list design is formed by using a first linked list and a second linked list to implement a double linked list aging method, and operations performed on table items in the cache table, such as table item access and table item modification, are converted into hitting the first element of the first index number in the first linked list, thereby triggering the corresponding three-party swap operations on the first linked list and the second linked list, respectively, thereby realizing sorting optimization based on activity, and accurately aging the table items when the table items are not full, and replacing inactive elements when the table items are full, thereby simplifying the circuit complexity, saving memory resources, and helping to realize a fully associative cache, and effectively overcoming the problems of repeated negotiations and repeated chain building.

[0006] In a possible implementation of the first aspect of the present application, when the entry in the cache table corresponding to the first element in the first linked list is accessed or modified, the first element in the first linked list with the first index number in the first entry index is hit.

[0007] In a possible implementation manner of the first aspect of the present application, the linked list head pointer is used to point to the element in the first linked list corresponding to the last accessed entry in the cache table.

[0008] In a possible implementation of the first aspect of the present application, the first type of three-way swap operation is used to move the elements with higher activity in the first linked list toward the head of the first linked list, and the second type of three-way swap operation is used to move the elements with lower activity in the second linked list toward the tail of the second linked list.

[0009] In a possible implementation of the first aspect of the present application, the double linked list aging method further includes: in response to removing the fourth element in the second linked list having the fourth index number in the second table entry index, determining the fifth element in the first linked list having the fifth index number immediately before the fourth element and the sixth element in the first linked list having the sixth index number immediately after the fourth element, executing on the first linked list an operation from the element corresponding to the fourth index number to the element corresponding to the sixth index number, from the element corresponding to the sixth index number to the element pointed to by the head pointer of the linked list, and from the element pointed to by the head pointer of the linked list to the sixth element. A third type of three-way interchange operation is performed on the element corresponding to the fourth index number, and a fourth type of three-way interchange operation is performed on the second linked list from the element corresponding to the fourth index number to the element corresponding to the fifth index number, from the element corresponding to the fifth index number to the element pointed to by the tail pointer of the linked list, and from the element pointed to by the tail pointer of the linked list to the element corresponding to the fourth index number, and then, after performing the third type of three-way interchange operation and the fourth type of three-way interchange operation, the tail pointer of the linked list is updated to point to the element corresponding to the fourth index number in the second linked list and the head pointer of the linked list is kept unchanged.

[0010] In a possible implementation manner of the first aspect of the present application, the first type of three-party interchange operation and the third type of three-party interchange operation are both implemented through a first interchange circuit, and the second type of three-party interchange operation and the fourth type of three-party interchange operation are both implemented through a second interchange circuit.

[0011] In a possible implementation of the first aspect of the present application, when the entry in the cache table corresponding to the fourth element in the second linked list is deleted, the fourth element in the first linked list having the fourth index number in the first entry index is removed.

[0012] In a possible implementation manner of the first aspect of the present application, the linked list tail pointer is used to point to the element in the second linked list corresponding to the last deleted entry in the cache table.

[0013] In a possible implementation of the first aspect of the present application, the third type of three-way swap operation is used to move the elements with higher activity in the first linked list toward the head of the first linked list, and the fourth type of three-way swap operation is used to move the elements with lower activity in the second linked list toward the tail of the second linked list.

[0014] In a possible implementation of the first aspect of the present application, the double linked list aging method further includes: in response to adding a new entry to the cache table, adding an element corresponding to the new entry to the linked list tail pointer in the second linked list.

[0015] In a possible implementation manner of the first aspect of the present application, when the cache table is full, the element pointed to by the tail pointer of the linked list in the second linked list is replaced with the element corresponding to the new entry.

[0016] In a possible implementation of the first aspect of the present application, the double linked list aging method also includes: after adding the element corresponding to the new table item to the linked list tail pointer in the second linked list, using the pointer to the linked list tail as the index number of the element corresponding to the new table item in the second table item index, and then modifying the head of the first linked list to the next level element of the tail of the first linked list and modifying the tail of the first linked list to the head of the first linked list.

[0017] In a possible implementation manner of the first aspect of the present application, the first linked list associates all entries in the cache table.

[0018] In a possible implementation of the first aspect of the present application, when an entry in the cache table is accessed or modified, the first linked list and the second linked list are relinked; when an entry in the cache table is deleted, the first linked list and the second linked list are unlinked; and when an entry is added to the cache table, the first linked list and the second linked list are linked.

[0019] In a second aspect, an embodiment of the present application further provides a computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements a method according to any one of the implementation modes of any of the above aspects when executing the computer program.

[0020] In a third aspect, an embodiment of the present application further provides a computer-readable storage medium, which stores computer instructions. When the computer instructions are executed on a computer device, the computer device executes a method according to any one of the implementation methods of any of the above aspects.

[0021] In a fourth aspect, an embodiment of the present application further provides a computer program product, which includes instructions stored on a computer-readable storage medium, and when the instructions are executed on a computer device, the computer device executes a method according to any one of the implementation methods of any of the above aspects. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0023] Figure 1 A schematic diagram of a double-linked list aging method provided in an embodiment of the present application;

[0024] Figure 2 References provided for the embodiments of this application Figure 1 The double linked list aging method shown is a schematic diagram of aging management of table items in a cache table;

[0025] Figure 3 A schematic diagram of the structure of a computing device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0026] The embodiments of the present application will be further described in detail below in conjunction with the accompanying drawings.

[0027] It should be understood that, in the description of this application, "at least one" means one or more, and "a plurality of" means two or more. In addition, unless otherwise specified, the words "first", "second", etc. are only used for the purpose of distinguishing descriptions, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying an order.

[0028] Figure 1 The following is a flow chart of a double linked list aging method provided in an embodiment of the present application. Figure 1 As shown, the double linked list aging method includes the following steps.

[0029] Step S101: Generate a first linked list based on the entries in the cache table.

[0030] The elements in the first linked list correspond to the entries in the cache table one by one, and the elements in the first linked list are arranged from small to large according to the first entry index.

[0031] Step S103: Generate a second linked list based on the first linked list.

[0032] Among them, the elements in the second linked list are arranged from small to large according to the second table item index, the element in the second linked list with the largest index number in the second table item index corresponds to the element in the first linked list with the second smallest index number in the first table item index, and the element in the second linked list with the second largest index number in the second table item index corresponds to the element in the first linked list with the smallest index number in the first table item index.

[0033] Step S105: At least after generating the second linked list, initialize the linked list head pointer to point to the element in the first linked list with the smallest index number in the first table entry index, and initialize the linked list tail pointer to point to the element in the second linked list with the largest index number in the second table entry index.

[0034] Step S107: In response to hitting the first element with the first index number in the first entry index in the first linked list, determine the second element with the second index number immediately before the first element and the third element with the third index number immediately after the first element in the first linked list, perform a first type of three-way swap operation on the first linked list from the element corresponding to the first index number to the element corresponding to the third index number, from the element corresponding to the third index number to the element pointed to by the linked list head pointer, and from the element pointed to by the linked list head pointer to the element corresponding to the first index number, and perform a second type of three-way swap operation on the second linked list from the element corresponding to the first index number to the element corresponding to the second index number, from the element corresponding to the second index number to the element pointed to by the linked list tail pointer, and from the element pointed to by the linked list tail pointer to the element corresponding to the first index number, and then, after performing the first type of three-way swap operation and the second type of three-way swap operation, update the linked list head pointer to point to the element corresponding to the first index number in the first linked list and keep the linked list tail pointer unchanged.

[0035] Figure 1 The double-linked list aging method shown in the figure is applied in the fields of communication, high-performance computers, etc., and can effectively solve the technical problems in the aging management of table entries. In particular, it can achieve accurate aging of all table entries in the fully associative cache, retain high-activity table entries and age low-activity table entries, which helps to improve resource utilization and data transmission performance. Figure 1In step S101, a first linked list is generated based on the table items in the cache table. The elements in the first linked list correspond to the table items in the cache table one by one, and the elements in the first linked list are arranged from small to large according to the first table item index. Here, the cache table is a table composed of table items stored in the cache. Because the cache space is limited, when the space is full and new table items are to be added, the table items in the cache table need to be aged. In addition, in order to improve the efficiency of table lookup, it is also necessary to perform aging management on the table items in the cache table, remove low-activity table items, and optimize the sorting between table items to improve the overall response speed. The elements in the first linked list correspond to the table items in the cache table one by one. The corresponding table items in the cache table can be located through the elements in the first linked list, so that various operations performed on the table items in the cache table, such as table item access, table item modification, table item replacement, table item deletion, and new table items, can be reflected in the corresponding operations performed on the first linked list.

[0036] Continue to refer Figure 1In step S103, based on the first linked list, a second linked list is generated. The elements in the second linked list are arranged from small to large according to the second table item index, and the element in the second linked list with the largest index number in the second table item index corresponds to the element in the first linked list with the second smallest index number in the first table item index, and the element in the second linked list with the second largest index number in the second table item index corresponds to the element in the first linked list with the smallest index number in the first table item index. The first linked list and the second linked list together constitute a double linked list design. Based on the double linked list design, table item aging management can be implemented. By performing corresponding operations on the first linked list and the second linked list, operations such as table item access, table item modification, table item replacement, table item deletion, and new table item addition on the table items in the cache table can be reflected. In addition, by using the chain modification operation, chain removal operation, and chain creation operation of the first linked list and the second linked list, sorting optimization based on activity is implemented, which helps to remove or replace low-activity table items and retain high-activity table items. Moreover, the double linked list aging mechanism implemented based on the double linked list design does not need to record the number of accesses or aging time for each table item separately, but uses the corresponding operations performed on the first linked list and the second linked list to complete the sorting optimization between the elements inside the linked list, so that based on the elements of the linked list, it can be judged which table items in the cache table have low activity and which table items have high activity. Because the sorting optimization is based on the elements in the first linked list and the second linked list, it is not necessary to record all the contents of the table items in the cache table, so that all the table items in the cache table can be associated to realize the table item aging mechanism under the full associative cache. In addition, the double linked list aging mechanism is different from the time aging mechanism. Under the double linked list aging mechanism, it is not necessary to record the aging time or the minimum remaining survival time for each table item separately. Through the double linked list management method, it can be realized that the higher the activity, the closer the element is to the head of the linked list, and the lower the activity, the closer the element is to the tail of the linked list. Therefore, the element indexed at the tail of the linked list belongs to the element with low activity, and can be directly replaced when the table item is full, so that the accurate aging of the table item can be realized, and the problem of repeated consultation and repeated chain building can be effectively overcome. To this end, the second linked list is obtained by performing specific optimization on the basis of the first linked list. Specifically, the element with the largest index number in the second table item index in the second linked list corresponds to the element with the second smallest index number in the first table item index in the first linked list, and the element with the second largest index number in the second table item index in the second linked list corresponds to the element with the smallest index number in the first table item index in the first linked list. Therefore, on the basis of the first linked list, the second linked list is obtained by adjusting specific elements in the first linked list.

[0037] The following is an example of Table 1:

[0038] Table 1

[0039]

[0040] Referring to Table 1 above, the first linked list has 8 elements, which are arranged from small to large according to the first table item index. The first table item index includes 8 index numbers, from 0 to 7. The values ​​of the elements with various index numbers in the first linked list are shown in Table 1. The second linked list is obtained based on the first linked list. The second linked list also has 8 elements, which are arranged from small to large according to the second table item index. The second table item index includes 8 index numbers, from 0 to 7. The values ​​of the elements with various index numbers in the second linked list are shown in Table 1. It can be seen that the table item depth is 8, that is, there are 8 table items, corresponding to the 8 elements in the first linked list. The element with the largest index number in the second table item index in the second linked list (element 0 of index number 7) corresponds to the element with the second smallest index number in the first table item index in the first linked list (element 0 of index number 1). The element with the second largest index number in the second table item index in the second linked list (element 7 of index number 6) corresponds to the element with the smallest index number in the first table item index in the first linked list (element 7 of index number 0). Therefore, on the basis of establishing the first linked list, the second linked list is initialized and created, and the corresponding relationship between the first linked list and the second linked list needs to be satisfied, so that the subsequent process can be coordinated, and the chain modification operation, chain removal operation and chain creation operation of the first linked list and the second linked list are used to realize the sorting optimization based on activity. In some embodiments, the specific implementation method of creating the second linked list can be that after the first linked list is created, the two elements with the smallest index number in the first linked list are removed (element 7 of index number 0 and element 0 of index number 1), and the other elements of the first linked list are moved to the head of the first linked list one by one in order, and then the removed elements are added from the tail of the first linked list (element 7 of index number 6 and element 0 of index number 7), so as to obtain the second linked list. It should be understood that the number of entries in the cache table can be an odd number or an even number, and can be uniformly processed according to the even number situation by filling zeros or leaving blanks. Therefore, the elements in the first linked list are even numbers, and the first entry index can be expressed as (N-1) powers from 0 to 2, and N is a positive integer greater than or equal to 1.

[0041] Continue to refer Figure 1In step S105, at least after generating the second linked list, the linked list head pointer is initialized to point to the element in the first linked list with the smallest index number in the first table item index, and the linked list tail pointer is initialized to point to the element in the second linked list with the largest index number in the second table item index. On the basis of creating the first linked list and the second linked list, the linked list head pointer and the linked list tail pointer are initialized, so that corresponding operations can be performed on the first linked list and the second linked list in combination, thereby reflecting operations such as table item access, table item modification, table item replacement, table item deletion, and new table item addition performed on the table items in the cache table, and by utilizing the chain modification operation, chain removal operation, and chain creation operation of the first linked list and the second linked list, sorting optimization based on activity is realized.

[0042] Continue to refer Figure 1In step S107, in response to hitting the first element with the first index number in the first entry index in the first linked list, a second element with the second index number immediately before the first element and a third element with the third index number immediately after the first element in the first linked list are determined, and a first type of three-way swap operation is performed on the first linked list from the element corresponding to the first index number to the element corresponding to the third index number, from the element corresponding to the third index number to the element pointed to by the linked list head pointer, and from the element pointed to by the linked list head pointer to the element corresponding to the first index number, and a second type of three-way swap operation is performed on the second linked list from the element corresponding to the first index number to the element corresponding to the second index number, from the element corresponding to the second index number to the element pointed to by the linked list tail pointer, and from the element pointed to by the linked list tail pointer to the element corresponding to the first index number, and then, after performing the first type of three-way swap operation and the second type of three-way swap operation, the linked list head pointer is updated to point to the element corresponding to the first index number in the first linked list and the linked list tail pointer is kept unchanged. As described above, the first linked list and the second linked list together constitute a double linked list design. Based on the double linked list design, table item aging management can be implemented. By performing corresponding operations on the first linked list and the second linked list, operations such as table item access, table item modification, table item replacement, table item deletion, and newly added table items in the cache table can be reflected. In addition, by using the chain modification operation, chain removal operation, and chain creation operation of the first linked list and the second linked list, sorting optimization based on activity is implemented. Here, the cache table is hit, which leads to, for example, accessing the corresponding table item or modifying the corresponding table item, thereby triggering a hit on the first element in the first linked list with the first index number in the first table item index. As mentioned above, on the basis of creating the first linked list and the second linked list, the linked list head pointer is initialized to point to the element in the first linked list with the smallest index number in the first table item index, and the linked list tail pointer is initialized to point to the element in the second linked list with the largest index number in the second table item index. Taking Table 1 above as an example, after initializing the linked list head pointer, the linked list head pointer points to the element with the smallest index number in the first table item index in the first linked list (element 7 with index number 0); after initializing the linked list tail pointer, the linked list tail pointer points to the element with the largest index number in the second table item index in the second linked list (element 0 with index number 7). Below, taking the first linked list and the second linked list in Table 1 as the situation before hitting the first element with the first index number in the first table item index in the first linked list, the following Table 2 is provided to illustrate how to perform the corresponding operations of the first linked list and the second linked list after hitting the element, so as to achieve sorting optimization based on activity.

[0043] The following is an example of Table 2:

[0044] Table 2

[0045]

[0046] Referring to Table 2 above, assuming that the first element (element 2 of index number 3) with the first index number in the first table item index in the first linked list is hit, the left half of Table 2 is consistent with the content of Table 1 above, representing the situation of the first linked list and the second linked list before the element with index number 3 is hit. The right half of Table 2 reflects the situation of the first linked list and the second linked list after the element with index number 3 is hit, that is, after the element 2 of index number 3 of the first linked list is hit, the first linked list and the second linked list are subjected to corresponding operations, which is reflected in the right half of Table 2. Moreover, taking Table 1 above as an example, after the linked list head pointer is initialized, the linked list head pointer points to the element with the smallest index number in the first table item index in the first linked list (element 7 of index number 0); after the linked list tail pointer is initialized, the linked list tail pointer points to the element with the largest index number in the second table item index in the second linked list (element 0 of index number 7).

[0047] Continuing to refer to Table 2, in response to hitting the first element (element 2 of index number 3) with the first index number in the first entry index in the first linked list, determine the second element (element 1 of index number 2) with the second index number immediately before the first element and the third element (element 3 of index number 4) with the third index number immediately after the first element in the first linked list. Perform a first type of three-way swap operation on the first linked list from the element corresponding to the first index number (element 2 of index number 3) to the element corresponding to the third index number (element 3 of index number 4), from the element corresponding to the third index number (element 3 of index number 4) to the element pointed to by the head pointer of the linked list (element 7 of index number 0), and from the element pointed to by the head pointer of the linked list (element 7 of index number 0) to the element corresponding to the first index number (element 2 of index number 3). In this way, the first type of three-way swap operation is performed on the first linked list, and the three specific elements in the first linked list are three-way swapped in a specific order, and the result is reflected in the right half of Table 2. It can be seen that after hitting the element with index number 3, the element with index number 0 in the first linked list is 3 (corresponding to element 3 of index number 4 before the three-way swap is performed), the element with index number 3 is 7 (corresponding to element 7 of index number 0 before the three-way swap is performed), and the element with index number 4 is 2 (corresponding to element 2 of index number 3 before the three-way swap is performed). Taking the index number of the hit element as K as an example, in the above example, K is 3, then it can be determined that the index number of the second element with the second index number immediately before the first element in the first linked list is K-1, and the index number of the third element with the third index number immediately after the first element is K+1. For the first linked list, the first type of three-way swap operation is performed, moving the element with index number K (2) to index number K+1, moving the element with index number K+1 (3) to the element pointed to by the head pointer of the linked list (index number 0 after initialization), and moving the element pointed to by the head pointer of the linked list (7) to index number K.

[0048] Continuing to refer to Table 2, the second type of three-way swap operation is performed on the second linked list from the element corresponding to the first index number (element 4 of index number 3) to the element corresponding to the second index number (element 3 of index number 2), from the element corresponding to the second index number (element 3 of index number 2) to the element pointed to by the tail pointer of the linked list (element 0 of index number 7), and from the element pointed to by the tail pointer of the linked list (element 0 of index number 7) to the element corresponding to the first index number (element 4 of index number 3). In this way, the second type of three-way swap operation is performed on the second linked list, and the three specific elements in the second linked list are three-way swapped in a specific order. The result is reflected in the right half of Table 2. It can be seen that after hitting the element of index number 3, the element of index number 7 in the second linked list is 3 (corresponding to element 3 of index number 2 before the three-way swap is performed), the element of index number 3 is 0 (corresponding to element 0 of index number 7 before the three-way swap is performed), and the element of index number 2 is 4 (corresponding to element 4 of index number 3 before the three-way swap is performed). Taking the index number of the hit element as K, in the above example K is 3, it can be determined that the index number of the second element with the second index number immediately before the first element in the first linked list is K-1, and the index number of the third element with the third index number immediately after the first element is K+1. For the second linked list, the second type of three-way swap operation is performed, moving the element with index number K (4) to index number K-1, moving the element with index number K-1 (3) to the element pointed to by the tail pointer of the linked list, and moving the element pointed to by the tail pointer of the linked list (0) to index number K.

[0049] refer to Figure 1and Table 2, in step S107, after performing the first type of three-party swap operation and the second type of three-party swap operation, the linked list head pointer is updated to point to the element corresponding to the first index number in the first linked list and the linked list tail pointer is kept unchanged. In this way, after performing the first type of three-party swap operation on the first linked list and performing the second type of three-party swap operation on the second linked list, the linked list head pointer is updated to point to the element corresponding to the first index number in the first linked list. Taking Table 2 above as an example, the updated linked list head pointer points to the element corresponding to the first index number (element 7 of index number 3), and the linked list tail pointer is kept unchanged. The operation performed on the first linked list involves the element pointed to by the linked list head pointer, and the linked list head pointer points to the index number accessed last time each time. The operation performed on the second linked list involves the element pointed to by the linked list tail pointer. Therefore, every time there is a hit, it is necessary to change the index number pointed to by the linked list head pointer, which in turn affects the next operation on the first linked list. This helps ensure that more active elements are closer to the head of the linked list, and less active elements are slowly pushed to the tail of the linked list. When the table is full, the element pointed to by the tail pointer of the linked list must be inactive, so the element pointed to by the tail pointer of the linked list can be directly replaced. Moreover, when the table is not full, the table can be aged accurately naturally, and the more active elements are sorted closer to the head and the less active elements are sorted closer to the tail.

[0050] refer to Figure 1 , Table 1 and Table 2, a double linked list design is formed by using the first linked list and the second linked list to implement a double linked list aging method, aging management is performed on the table items in the cache table, and operations performed on the table items in the cache table, such as table item access and table item modification, are converted into the first element of the first index number that hits the first linked list, thereby triggering the corresponding three-party exchange operations on the first linked list and the second linked list respectively; in this way, the chain modification operation, chain removal operation and chain creation operation of the first linked list and the second linked list are used to implement sorting optimization based on activity, which is helpful to remove or replace low-activity table items and retain high-activity table items. When the table items are not full, the table items can be accurately aged, and when the table items are full, the inactive elements can be replaced; in addition, the sorting optimization between the elements inside the linked list is completed by performing corresponding operations on the first linked list and the second linked list, so there is no need to record the number of accesses or aging time for each table item separately, which simplifies the circuit complexity, saves the occupation of memory resources, helps to realize a fully associative cache, and effectively overcomes the problems of repeated consultations and repeated chain creation.

[0051] In conclusion, Figure 1The double linked list aging method shown, facing the problems of high complexity and low execution efficiency of table item aging under a fully associative cache, utilizes a double linked list design composed of a first linked list and a second linked list to implement the double linked list aging method, converts operations performed on table items in the cache table, such as table item access and table item modification, into the first element of the first index number that hits the first linked list, thereby triggering corresponding three-party swap operations on the first linked list and the second linked list, respectively, thereby implementing sorting optimization based on activity, and can perform precise table item aging when the table items are not full, and can replace inactive elements when the table items are full, thereby simplifying circuit complexity, saving memory resource usage, and helping to implement a fully associative cache, and effectively overcoming the problems of repeated consultations and repeated chain building.

[0052] Figure 2 References provided for the embodiments of this application Figure 1 The double linked list aging method shown in FIG. 1 is a schematic diagram of aging management of entries in a cache table. Figure 2 As shown, the cache table 201 is managed by the double-linked list aging module 203, such as updating the aging table when the table is hit, deleting the cache table 201 and updating the aging table, adding a table entry of the cache table 201 at the end of the chain, etc. Using the double-linked list aging module 203 to perform aging management can achieve accurate aging, and support operations such as hitting, deleting and adding table entries to the cache table 201. In this way, refer to Figure 1 The double linked list aging method shown, Figure 2 The double linked list aging module 203 shown, in the face of the high complexity and low execution efficiency of table item aging under the fully associative cache, utilizes the first linked list and the second linked list to form a double linked list design to implement a double linked list aging method, and converts the operations performed on the table items in the cache table 201, such as table item access and table item modification, into the first element of the first index number that hits the first linked list, thereby triggering the corresponding three-party swap operations on the first linked list and the second linked list, respectively, to achieve sorting optimization based on activity, and can perform precise table item aging when the table items are not full, and can replace inactive elements when the table items are full, thereby simplifying the circuit complexity, saving memory resource usage, and helping to achieve a fully associative cache, and effectively overcoming the problems of repeated consultations and repeated chain building.

[0053] refer to Figure 1 and Figure 2In a possible implementation, when the entry in the cache table corresponding to the first element in the first linked list is accessed or modified, the first element in the first linked list with the first index number in the first entry index is hit. A double linked list design is formed by using a first linked list and a second linked list to implement a double linked list aging method, aging management is performed on table items in a cache table, and operations performed on table items in the cache table, such as table item access and table item modification, are converted into the first element that hits the first index number in the first linked list, thereby triggering the corresponding three-party exchange operations on the first linked list and the second linked list respectively; in this way, by using the chain modification operation, chain removal operation and chain creation operation of the first linked list and the second linked list, sorting optimization based on activity is realized, which is helpful to remove or replace low-activity table items and retain high-activity table items, and table items can be accurately aged when the table items are not full, and inactive elements can be replaced when the table items are full; in addition, the sorting optimization between the elements inside the linked list is completed by performing corresponding operations on the first linked list and the second linked list, so there is no need to record the number of accesses or aging time for each table item separately, which simplifies the circuit complexity, saves the occupation of memory resources, helps to realize a fully associative cache, and effectively overcomes the problems of repeated consultations and repeated chain creation.

[0054] In a possible implementation, the linked list head pointer is used to point to the element in the first linked list corresponding to the last accessed entry in the cache table. The operation on the first linked list involves the element pointed to by the linked list head pointer, and the linked list head pointer points to the index number last accessed each time. In response to hitting the first element in the first linked list with the first index number in the first entry index, after performing the first type of three-party swap operation and the second type of three-party swap operation, the linked list head pointer is updated to point to the element corresponding to the first index number in the first linked list and the linked list tail pointer is kept unchanged. Therefore, each time there is a hit, the index number pointed to by the linked list head pointer needs to be changed, which in turn affects the next operation on the first linked list. In this way, it helps to ensure that the more active elements are closer to the head of the linked list, and the less active elements are slowly pushed to the tail of the linked list. When the entry is full, the element pointed to by the linked list tail pointer must be inactive, so the element pointed to by the linked list tail pointer can be directly replaced. Furthermore, when the table entries are not full, the table entries can be aged accurately naturally, with highly active elements sorted near the head and inactive elements sorted near the tail.

[0055] In a possible implementation, the first type of three-way swap operation is used to move the elements with higher activity in the first linked list toward the head of the first linked list, and the second type of three-way swap operation is used to move the elements with lower activity in the second linked list toward the tail of the second linked list. In this way, by using the chain modification operation, chain removal operation and chain creation operation of the first linked list and the second linked list, sorting optimization based on activity is realized, which helps to remove or replace low-activity table items and retain high-activity table items. When the table items are not full, the table items can be accurately aged, and inactive elements can be replaced when the table items are full. In addition, the sorting optimization between the elements within the linked lists is completed by performing corresponding operations on the first linked list and the second linked list, so there is no need to record the number of accesses or aging time for each table item separately, which simplifies the circuit complexity, saves memory resources, helps to realize a fully associative cache, and effectively overcomes the problems of repeated negotiations and repeated chain creation.

[0056] In a possible implementation, the double linked list aging method further includes: in response to removing the fourth element with the fourth index number in the second table entry index in the second linked list, determining the fifth element with the fifth index number immediately before the fourth element and the sixth element with the sixth index number immediately after the fourth element in the first linked list, performing an operation on the first linked list from the element corresponding to the fourth index number to the element corresponding to the sixth index number, from the element corresponding to the sixth index number to the element pointed to by the head pointer of the linked list, and from the element pointed to by the head pointer of the linked list to the fourth index number. The third type of three-way swap operation is performed on the second linked list from the element corresponding to the fourth index number to the element corresponding to the fifth index number, from the element corresponding to the fifth index number to the element pointed to by the tail pointer of the linked list, and from the element pointed to by the tail pointer of the linked list to the element corresponding to the fourth index number, and then, after performing the third type of three-way swap operation and the fourth type of three-way swap operation, the tail pointer of the linked list is updated to point to the element corresponding to the fourth index number in the second linked list and the head pointer of the linked list is kept unchanged. Referring to Table 1 and Table 2, Table 2 illustrates how to perform the corresponding operations of the first linked list and the second linked list after hitting an element, thereby realizing activity-based sorting optimization. Taking Table 1 above as an example, after initializing the linked list head pointer, the linked list head pointer points to the element with the smallest index number in the first table item index in the first linked list (element 7 with index number 0); after initializing the linked list tail pointer, the linked list tail pointer points to the element with the largest index number in the second table item index in the second linked list (element 0 with index number 7). The following Table 3 is used to illustrate how to perform the corresponding operations of the first linked list and the second linked list to remove the fourth element, thereby achieving sorting optimization based on activity. The following Table 3 is used as an example:

[0057] Table 3

[0058]

[0059] Referring to Table 3 above, assuming that the fourth element (element 4 of index number 3) with the fourth index number in the second table item index in the second linked list is to be removed, the left half of Table 3 is consistent with the content of Table 1 above, representing the situation of the first linked list and the second linked list before the element 4 of index number 3 is removed. The right half of Table 3 reflects the situation of the first linked list and the second linked list after the element 4 of index number 3 is removed, that is, in response to the removal of the fourth element with the fourth index number in the second table item index in the second linked list, the first linked list and the second linked list are respectively performed with corresponding operations, which is reflected in the right half of Table 3. And, taking Table 1 above as an example, after the linked list head pointer is initialized, the linked list head pointer points to the element with the smallest index number in the first table item index in the first linked list (element 7 of index number 0); after the linked list tail pointer is initialized, the linked list tail pointer points to the element with the largest index number in the second table item index in the second linked list (element 0 of index number 7).

[0060] Continuing to refer to Table 3, in response to removing the fourth element (element 4 of index number 3) with the fourth index number in the second entry index in the second linked list, determine the fifth element (element 1 of index number 2) with the fifth index number immediately before the fourth element and the sixth element (element 3 of index number 4) with the sixth index number immediately after the fourth element in the first linked list. Perform a third type of three-way swap operation on the first linked list from the element corresponding to the fourth index number (element 2 of index number 3) to the element corresponding to the sixth index number (element 3 of index number 4), from the element corresponding to the sixth index number (element 3 of index number 4) to the element pointed to by the head pointer of the linked list (element 7 of index number 0), and from the element pointed to by the head pointer of the linked list (element 7 of index number 0) to the element corresponding to the fourth index number (element 2 of index number 3). It can be seen that after performing the third-party swap operation, the element with index number 0 in the first linked list is 3 (corresponding to element 3 of index number 4 before performing the three-party swap), the element with index number 3 is 7 (corresponding to element 7 of index number 0 before performing the three-party swap), and the element with index number 4 is 2 (corresponding to element 2 of index number 3 before performing the three-party swap). Assuming that the index number is from 0 to 2 (Nth power) minus 1, the index number to be removed is K. Here, assume that N is 4, which corresponds to 8 index numbers from 0 to 7, and K is 3. The previous index number of index number K is K-1 and the next index number is K+1. For the first linked list, perform the third-party swap operation, move the element with index number K (2) to index number K+1, move the element with index number K+1 (3) to the element pointed to by the head pointer of the linked list (index number 0 after initialization), and move the element pointed to by the head pointer of the linked list (7) to index number K.

[0061] Continuing to refer to Table 3, the fourth type of three-way swap operation is performed on the second linked list from the element corresponding to the fourth index number (element 4 of index number 3) to the element corresponding to the fifth index number (element 3 of index number 2), from the element corresponding to the fifth index number (element 3 of index number 2) to the element pointed to by the tail pointer of the linked list (element 0 of index number 7), and from the element pointed to by the tail pointer of the linked list (element 0 of index number 7) to the element corresponding to the fourth index number (element 4 of index number 3). It can be seen that after performing the fourth type of three-way swap operation, the element of index number 7 in the second linked list is 3 (corresponding to element 3 of index number 2 before performing the three-way swap), the element of index number 3 is 0 (corresponding to element 0 of index number 7 before performing the three-way swap), and the element of index number 2 is 4 (corresponding to element 4 of index number 3 before performing the three-way swap). Assuming that the element to be removed is the element with index number K, for the second linked list, perform the fourth type of three-way swap operation, move the element with index number K (4) to index number K-1, move the element with index number K-1 (3) to the element pointed to by the tail pointer of the linked list, and move the element pointed to by the tail pointer of the linked list (0) to index number K.

[0062] Continuing to refer to Table 3, after performing the third type of three-party swap operation and the fourth type of three-party swap operation, the tail pointer of the linked list is updated to point to the element corresponding to the fourth index number in the second linked list and the head pointer of the linked list is kept unchanged. In this way, when performing the third type of three-party swap operation on the first linked list and the fourth type of three-party swap operation on the second linked list, the tail pointer of the linked list is updated to point to the element corresponding to the fourth index number in the second linked list. Taking the above Table 3 as an example, the updated tail pointer of the linked list points to the element corresponding to the fourth index number in the second linked list (element 0 of index number 3), and the head pointer of the linked list is kept unchanged. The operation on the first linked list involves the element pointed to by the head pointer of the linked list, and the operation on the second linked list involves the element pointed to by the tail pointer of the linked list, and the tail pointer of the linked list points to the index number deleted last time each time. Therefore, every time there is a deletion, it is necessary to change the index number pointed to by the tail pointer of the linked list, thereby affecting the next operation on the second linked list. In this way, through the three-way exchange operation of the first linked list and the second linked list, the first linked list is used to exchange elements based on the element pointed to by the head pointer of the linked list, and after each hit, the element pointed to by the head pointer of the linked list is updated to the index number of the last access, and the second linked list is used to exchange elements based on the element pointed to by the tail pointer of the linked list, and after each deletion, the element pointed to by the tail pointer of the linked list is updated to the index number of the last deletion. In this way, a double linked list design can be adopted to achieve accurate aging of table items, ensuring that the more active elements are closer to the head of the linked list, and the less active elements are slowly pushed to the tail of the linked list, and each time a new element is added, it is added from the tail pointer of the linked list. When the table item is full, the element pointed to by the tail pointer of the linked list must be the least active, so the element pointed to by the tail pointer of the linked list can be directly replaced. In this way, all linked list items can be fully associated. There is no need to record the number of times or aging time for each linked list item separately. Instead, the access, addition and deletion of table items are converted into corresponding link modification operations, link removal operations and link creation operations on the first linked list and the second linked list, thereby achieving sorting optimization between elements within the linked list. There is no need for repeated aging and link creation, nor random removal, which can improve device performance.

[0063] In some embodiments, the first type of three-party interchange operation and the third type of three-party interchange operation are both implemented through a first interchange circuit, and the second type of three-party interchange operation and the fourth type of three-party interchange operation are both implemented through a second interchange circuit. In this way, the circuit complexity is simplified, which is conducive to integration and improving resource utilization.

[0064] In some embodiments, when the entry in the cache table corresponding to the fourth element in the second linked list is deleted, the fourth element in the first linked list having the fourth index number in the first entry index is removed. In this way, entry access, entry addition, and entry deletion are converted into corresponding link modification operations, link removal operations, and link creation operations on the first linked list and the second linked list, thereby achieving order optimization between elements within the linked list, without the need for repeated aging and link list creation, and without random removal, and thus improving device performance.

[0065] In some embodiments, the tail pointer of the linked list is used to point to the element in the second linked list corresponding to the last deleted entry in the cache table. The operation on the second linked list involves the element pointed to by the tail pointer of the linked list, and the tail pointer of the linked list points to the index number deleted last time each time. Therefore, every time there is a deletion, it is necessary to change the index number pointed to by the tail pointer of the linked list, thereby affecting the next operation on the second linked list. In this way, through the three-way exchange operation of the first linked list and the second linked list, the first linked list is used to exchange elements based on the element pointed to by the head pointer of the linked list, and after each hit, the element pointed to by the head pointer of the linked list is updated to the index number accessed last time, and the second linked list is used to exchange elements based on the element pointed to by the tail pointer of the linked list, and after each deletion, the element pointed to by the tail pointer of the linked list is updated to the index number deleted last time. In this way, a double linked list design can be used to achieve accurate aging of table items, ensuring that the more active elements are closer to the head of the linked list, and the less active elements are slowly pushed to the tail of the linked list. In addition, each time a new element is added, it is added from the tail pointer of the linked list. When the table item is full, the element pointed to by the tail pointer of the linked list must be the least active, so the element pointed to by the tail pointer of the linked list can be directly replaced. In this way, all linked list items can be fully associated, and there is no need to record the number of times or aging time for each linked list item separately. Instead, the table item access, table item addition, and table item deletion are converted into corresponding chain modification operations, chain removal operations, and chain creation operations on the first and second linked lists, thereby achieving sorting optimization between elements within the linked list. There is no need for repeated aging and building of linked lists, nor is there a need for random removal, which can improve device performance.

[0066] In some embodiments, the third type of three-way swap operation is used to move the elements with higher activity in the first linked list toward the head of the first linked list, and the fourth type of three-way swap operation is used to move the elements with lower activity in the second linked list toward the tail of the second linked list. In this way, by using the chain modification operation, chain removal operation and chain creation operation of the first linked list and the second linked list, sorting optimization based on activity is realized, which helps to remove or replace low-activity table items and retain high-activity table items. When the table items are not full, the table items can be accurately aged, and inactive elements can be replaced when the table items are full. In addition, the sorting optimization between the elements inside the linked list is completed by performing corresponding operations on the first linked list and the second linked list, so there is no need to record the number of accesses or aging time for each table item separately, which simplifies the circuit complexity, saves the occupation of memory resources, helps to realize the fully associative cache, and effectively overcomes the problems of repeated consultation and repeated chain creation.

[0067] In some embodiments, the double linked list aging method further includes: in response to adding a new table entry to the cache table, adding an element corresponding to the new table entry to the tail pointer of the linked list in the second linked list. In this way, all linked list items can be fully associated, and there is no need to record the number of times or aging time for each linked list item separately. Instead, the table item access, table item addition, and table item deletion are converted into corresponding chain modification operations, chain removal operations, and chain creation operations for the first linked list and the second linked list, thereby achieving sorting optimization between elements within the linked list, without the need for repeated aging and building of linked lists, and without random removal, the performance of the device can be improved.

[0068] In some examples, when the cache table is full, the element pointed to by the tail pointer of the linked list in the second linked list is replaced with the element corresponding to the new table entry. In this way, the double linked list design composed of the first linked list and the second linked list is used to implement the double linked list aging method, and the operations performed on the table items in the cache table, such as table item access and table item modification, are converted into the first element of the first index number that hits the first linked list, thereby triggering the corresponding three-party swap operations on the first linked list and the second linked list, respectively, to achieve sorting optimization based on activity, and to perform accurate aging of table items when the table items are not full, and to replace inactive elements when the table items are full, thereby simplifying the circuit complexity, saving memory resource usage, and helping to achieve a fully associative cache, and effectively overcoming the problems of repeated consultations and repeated chain building.

[0069] In some examples, the double linked list aging method further includes: after adding the element corresponding to the new table item to the tail pointer of the linked list in the second linked list, using the pointer to the tail pointer of the linked list as the index number of the element corresponding to the new table item in the second table item index, and then modifying the head of the first linked list to the next level element of the tail of the first linked list and modifying the tail of the first linked list to the head of the first linked list. In this way, all linked list items can be fully associated, and there is no need to record the number of times or aging time for each linked list item separately. Instead, the table item access, table item addition, and table item deletion are converted into corresponding chain modification operations, chain removal operations, and chain creation operations on the first linked list and the second linked list, thereby realizing the sorting optimization between the elements in the linked list, without the need for repeated aging and establishment of linked lists, and without random removal, the performance of the device can be improved.

[0070] In a possible implementation, the first linked list associates all entries in the cache table. This simplifies circuit complexity, saves memory resources, helps to implement a fully associative cache, and effectively overcomes the problem of repeated negotiation and repeated link building.

[0071] In a possible implementation, when an entry in the cache table is accessed or modified, a relink operation is performed on the first linked list and the second linked list; when an entry in the cache table is deleted, a dislink operation is performed on the first linked list and the second linked list; and when an entry is added to the cache table, a link operation is performed on the first linked list and the second linked list. In this way, all linked list items can be fully associated, and there is no need to record the number of times or aging time for each linked list item separately. Instead, the access, addition and deletion of items are converted into corresponding relink operations, dislink operations and link operations on the first linked list and the second linked list, thereby achieving sort optimization between the elements within the linked list, without the need for repeated aging and establishment of linked lists, and without the need for random removal, thereby improving device performance.

[0072] Figure 33 is a schematic diagram of the structure of a computing device provided in an embodiment of the present application, and the computing device 300 includes: one or more processors 310, a communication interface 320 and a memory 330. The processor 310, the communication interface 320 and the memory 330 are interconnected via a bus 340. Optionally, the computing device 300 may also include an input / output interface 350, and the input / output interface 350 is connected to an input / output device for receiving parameters set by a user, etc. The computing device 300 can be used to implement some or all of the functions of the device embodiment or system embodiment in the above-mentioned embodiment of the present application; the processor 310 can also be used to implement some or all of the operating steps of the method embodiment in the above-mentioned embodiment of the present application. For example, the specific implementation of the various operations performed by the computing device 300 can refer to the specific details in the above-mentioned embodiments, such as the processor 310 is used to perform some or all of the steps in the above-mentioned method embodiment or some or all of the operations in the above-mentioned method embodiment. For another example, in an embodiment of the present application, the computing device 300 may be used to implement part or all of the functions of one or more components in the above-mentioned apparatus embodiment. In addition, the communication interface 320 may be specifically used to perform the communication functions necessary to implement the functions of these apparatuses and components, and the processor 310 may be specifically used to perform the processing functions necessary to implement the functions of these apparatuses and components.

[0073] It should be understood that Figure 3 The computing device 300 may include one or more processors 310, and the multiple processors 310 may provide processing capabilities in a parallel connection mode, a serial connection mode, a serial-parallel connection mode, or any connection mode, or the multiple processors 310 may form a processor sequence or a processor array, or the multiple processors 310 may be divided into a main processor and an auxiliary processor, or the multiple processors 310 may have different architectures such as a heterogeneous computing architecture. In addition, Figure 3 The computing device 300 shown in the figure, and the related structural description and functional description are exemplary and non-limiting. In some exemplary embodiments, the computing device 300 may include Figure 3 More or fewer components may be shown, or some components may be combined or separated, or may have a different arrangement of components.

[0074] The processor 310 may have a variety of specific implementation forms. For example, the processor 310 may include a central processing unit (CPU), a graphic processing unit (GPU), a neural-network processing unit (NPU), a tensor processing unit (TPU) or a data processing unit (DPU), etc., and the embodiment of the present application does not specifically limit it. The processor 310 may also be a single-core processor or a multi-core processor. The processor 310 may be a combination of a CPU and a hardware chip. The above-mentioned hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD) or a combination thereof. The above-mentioned PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL) or any combination thereof. The processor 310 may also be implemented using a logic device with built-in processing logic alone, such as an FPGA or a digital signal processor (DSP). The communication interface 320 may be a wired interface or a wireless interface for communicating with other modules or devices. The wired interface may be an Ethernet interface, a local interconnect network (LIN), etc., and the wireless interface may be a cellular network interface or a wireless local area network interface, etc.

[0075] The memory 330 may be a non-volatile memory, such as a read-only memory (ROM), a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The memory 330 may also be a volatile memory, which may be a random access memory (RAM) used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate synchronous DRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct rambus RAM (DR RAM). The memory 330 may also be used to store program codes and data, so that the processor 310 calls the program codes stored in the memory 330 to execute some or all of the operation steps in the above method embodiment, or to execute the corresponding functions in the above device embodiment. Figure 3 Show more or fewer components, or have different component configurations.

[0076] The bus 340 may be a peripheral component interconnect express (PCIe) bus, an extended industry standard architecture (EISA) bus, a unified bus (Ubus or UB), a compute express link (CXL), a cache coherent interconnect for accelerators (CCIX), etc. The bus 340 may be divided into an address bus, a data bus, a control bus, etc. In addition to the data bus, the bus 340 may also include a power bus, a control bus, and a status signal bus, etc. However, for the sake of clarity, Figure 3 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0077] The method and device provided in the embodiments of the present application are based on the same inventive concept. Since the principles of solving the problems in the methods and devices are similar, the embodiments, implementation methods, examples or implementation methods of the methods and devices can refer to each other, and the repeated parts will not be repeated. The embodiments of the present application also provide a system, which includes multiple computing devices, and the structure of each computing device can refer to the structure of the computing device described above. The functions or operations that can be implemented by the system can refer to the specific implementation steps in the above method embodiments and / or the specific functions described in the above device embodiments, which will not be repeated here.

[0078] The present application also provides a computer-readable storage medium, in which computer instructions are stored. When the computer instructions are executed on a computer device (such as one or more processors), the method steps in the above method embodiment can be implemented. The specific implementation of the processor of the computer-readable storage medium in executing the above method steps can refer to the specific operations described in the above method embodiment and / or the specific functions described in the above device embodiment, which will not be repeated here.

[0079] It should be understood by those skilled in the art that the embodiments of the present application may be provided as methods, systems, or computer program products. The present application may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. The embodiments of the present application may be implemented in whole or in part by software, hardware, firmware, or any other combination. When implemented using software, the above embodiments may be implemented in whole or in part in the form of a computer program product. The present application may take the form of a computer program product implemented on one or more computer-usable storage media containing computer-usable program codes. The computer program product includes one or more computer instructions. When the computer program instructions are loaded or executed on a computer, the process or function described in the embodiments of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. Computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) means. Computer-readable storage media can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that contains one or more available media. Available media can be magnetic media (such as floppy disks, hard disks, tapes), optical media, or semiconductor media. Semiconductor media can be solid-state hard disks, random access memory, flash memory, read-only memory, erasable programmable read-only memory, electrically erasable programmable read-only memory, registers, or any other form of suitable storage media.

[0080] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. Each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 These computer program instructions can also be stored in a computer-readable memory that can guide a computer or other programmable data processing device to work in a specific way, so that the instructions stored in the computer-readable memory produce a product including an instruction device, which implements the functions specified in the process. Figure 1A process or multiple processes and / or boxes Figure 1 These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operation steps are executed on the computer or other programmable device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable device provide for implementing the process in the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0081] In the above embodiments, the descriptions of each embodiment have their own emphasis. For parts that are not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments. Obviously, those skilled in the art can make various changes and modifications to the embodiments of the present application without departing from the spirit and scope of the embodiments of the present application. The steps in the method of the embodiment of the present application can be adjusted in sequence, merged or deleted according to actual needs; the modules in the system of the embodiment of the present application can be divided, merged or deleted according to actual needs. If these modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application is also intended to include these modifications and variations.

Claims

1. A double linked list aging method, characterized in that: The double linked list aging method comprises: Based on the table items in the cache table, a first linked list is generated, wherein the elements in the first linked list correspond to the table items in the cache table one by one, and the elements in the first linked list are arranged from small to large according to the first table item index; Based on the first linked list, a second linked list is generated, wherein the elements in the second linked list are arranged from small to large according to the second table item index, the element in the second linked list with the largest index number in the second table item index corresponds to the element in the first linked list with the second smallest index number in the first table item index, and the element in the second linked list with the second largest index number in the second table item index corresponds to the element in the first linked list with the smallest index number in the first table item index; At least after generating the second linked list, initializing a linked list head pointer to point to an element in the first linked list having a smallest index number in the first entry index, and initializing a linked list tail pointer to point to an element in the second linked list having a largest index number in the second entry index; In response to hitting a first element with a first index number in the first entry index in the first linked list, determining a second element with a second index number immediately before the first element and a third element with a third index number immediately after the first element in the first linked list, performing a first type of three-way swap operation on the first linked list from the element corresponding to the first index number to the element corresponding to the third index number, from the element corresponding to the third index number to the element pointed to by the linked list head pointer, and from the element pointed to by the linked list head pointer to the element corresponding to the first index number, and performing a second type of three-way swap operation on the second linked list from the element corresponding to the first index number to the element corresponding to the second index number, from the element corresponding to the second index number to the element pointed to by the linked list tail pointer, and from the element pointed to by the linked list tail pointer to the element corresponding to the first index number, and then, after performing the first type of three-way swap operation and the second type of three-way swap operation, updating the linked list head pointer to point to the element corresponding to the first index number in the first linked list and keeping the linked list tail pointer unchanged.

2. The double linked list aging method according to claim 1, characterized in that: When the entry in the cache table corresponding to the first element in the first linked list is accessed or modified, the first element in the first linked list having the first index number in the first entry index is hit.

3. The double linked list aging method according to claim 1, characterized in that: The linked list head pointer is used to point to the element in the first linked list corresponding to the last accessed entry in the cache table.

4. The double linked list aging method according to claim 1, characterized in that: The first type of three-way swap operation is used to move the elements with higher activity in the first linked list toward the head of the first linked list, and the second type of three-way swap operation is used to move the elements with lower activity in the second linked list toward the tail of the second linked list.

5. The double linked list aging method according to claim 1, characterized in that: The double linked list aging method also includes: In response to removing the fourth element with the fourth index number in the second entry index in the second linked list, determining the fifth element with the fifth index number immediately before the fourth element and the sixth element with the sixth index number immediately after the fourth element in the first linked list, performing a third type of three-way swap operation on the first linked list from the element corresponding to the fourth index number to the element corresponding to the sixth index number, from the element corresponding to the sixth index number to the element pointed to by the linked list head pointer, and from the element pointed to by the linked list head pointer to the element corresponding to the fourth index number, and performing a fourth type of three-way swap operation on the second linked list from the element corresponding to the fourth index number to the element corresponding to the fifth index number, from the element corresponding to the fifth index number to the element pointed to by the linked list tail pointer, and from the element pointed to by the linked list tail pointer to the element corresponding to the fourth index number, and then, after performing the third type of three-way swap operation and the fourth type of three-way swap operation, updating the linked list tail pointer to point to the element corresponding to the fourth index number in the second linked list and keeping the linked list head pointer unchanged.

6. The double linked list aging method according to claim 5, characterized in that: The first type of three-party interchange operation and the third type of three-party interchange operation are both implemented through a first interchange circuit, and the second type of three-party interchange operation and the fourth type of three-party interchange operation are both implemented through a second interchange circuit.

7. The double linked list aging method according to claim 5, characterized in that: When the entry in the cache table corresponding to the fourth element in the second linked list is deleted, the fourth element in the first linked list having the fourth index number in the first entry index is removed.

8. The double linked list aging method according to claim 5, characterized in that: The linked list tail pointer is used to point to the element in the second linked list corresponding to the last deleted entry in the cache table.

9. The double linked list aging method according to claim 5, characterized in that: The third type of three-way swap operation is used to move the elements with higher activity in the first linked list toward the head of the first linked list, and the fourth type of three-way swap operation is used to move the elements with lower activity in the second linked list toward the tail of the second linked list.

10. The double linked list aging method according to claim 5, characterized in that: The double linked list aging method also includes: In response to adding a new entry to the cache table, adding an element corresponding to the new entry to the linked list tail pointer in the second linked list.

11. The double linked list aging method according to claim 10, characterized in that: When the cache table is full, the element corresponding to the new entry is used to replace the element pointed to by the tail pointer of the linked list in the second linked list.

12. The double linked list aging method according to claim 10, characterized in that: The double linked list aging method also includes: After adding the element corresponding to the new entry to the tail pointer of the linked list in the second linked list, use the pointer to the tail pointer of the linked list as the index number of the element corresponding to the new entry in the second entry index, and then modify the head of the first linked list to the next level element of the tail of the first linked list and modify the tail of the first linked list to the head of the first linked list.

13. The double linked list aging method according to claim 1, characterized in that: The first linked list associates all entries in the cache table.

14. The double linked list aging method according to claim 1, characterized in that: When an entry in the cache table is accessed or modified, the first linked list and the second linked list are relinked; when an entry in the cache table is deleted, the first linked list and the second linked list are unlinked; when an entry is added to the cache table, the first linked list and the second linked list are relinked.

15. An electronic device, characterized in that: The electronic device comprises a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the method according to any one of claims 1 to 14 when executing the computer program.

16. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, which, when executed on a computer device, cause the computer device to perform the method according to any one of claims 1 to 14.

Citation Information

Patent Citations

  • Hardware table item aging method and device, equipment and storage medium

    CN114741387A

  • Flow table deployment method, computer equipment and medium

    CN119211120A