Display panel and display device
By setting specific data lines and connection lines structures in the display area and binding area of the display panel, the signal interference problem caused by crossing data lines is solved, and the display effect of the display panel is improved.
Patent Information
- Application Number
- CN202411854146.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-16
- Publication Date
- 2025-02-07
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
When the existing display panel matches the IC insertion scheme, there is a crossover of data lines, resulting in signal interference and affecting the display effect.
A display panel is designed, including a display area and a binding area. A plurality of first data lines, N second data lines and N connection lines are provided in the side display area in the display area. The second part of the connection line is from the display area. Extending to the binding area, the second input on the driving chip is arranged in sequence, and the second portion of the connecting line is coupled to the second input, ensuring that the connecting line does not overlap to avoid signal interference.
By reducing the intersection of data lines, avoiding signal transmission abnormalities and improving the display effect of the display panel.
Smart Images

Figure CN119400086A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art
[0002] Narrow-frame display panels are more and more popular in the market due to their beautiful appearance and good display effects. The lower frame of the display panel has multiple fan-out traces, which are used to connect the driver chip and the data line. Since there are many fan-out traces, the fan-out traces need a certain angle to arrange enough fan-out traces between the driver chip and the display area, so the fan-out traces occupy a large space in the longitudinal direction. In order to compress the lower frame, FIAA (Fanout in AA, fan-out traces are set in the display area) appears, so that a large part of the connection traces and the connection sections of the data lines are set in the display area, so that the fan-out traces can be concentrated in the area facing the driver chip, thereby further compressing the lower frame and reducing the lower frame.
[0003] However, when the existing display panel matches the IC insertion sequence scheme, there will be a problem of data line crossing, which causes signal interference and affects the display effect of the display panel. Summary of the invention
[0004] In view of the problems in the prior art, an object of the present invention is to provide a display panel and a display device, so as to reduce the signal transmission abnormality problem caused by the crossing of data lines and improve the display effect of the display panel.
[0005] An embodiment of the present invention provides a display panel, comprising a display area and a binding area located at one side of the display area;
[0006] The display area includes a central display area and two side display areas, the central display area is located between the two side display areas, the side display areas include a plurality of first data lines, N second data lines and N connection lines, the connection lines include a first part and a second part coupled to each other, the first part is coupled to the corresponding second data line, and the second part extends from the display area to the binding area; along the direction from the side display area to the central display area, the first second data line to the Nth second data line are arranged in sequence, and N is a positive integer greater than 1;
[0007] The binding area is provided with a driving chip, the driving chip includes a central input area and two side input areas, the central input area is located between the two side input areas; the side input area includes a plurality of first input terminals and N second input terminals, and the first second input terminal to the Nth second input terminal are arranged in sequence along the direction from the side input area to the central input area;
[0008] The first data line is coupled to the corresponding first input terminal, and the second portion of the connection line is coupled to the corresponding second input terminal.
[0009] In some embodiments, the N second input terminals are divided into multiple second input terminal groups, each second input terminal group includes at least one second input terminal; the multiple first input terminals are divided into multiple first input terminal groups, each first input terminal group includes at least one first input terminal.
[0010] In some embodiments, each first input terminal group includes the same number of first input terminals, and each second input terminal group includes the same number of second input terminals.
[0011] In some embodiments, an orthographic projection of the second portion of the connecting line on the substrate of the display panel and an orthographic projection of the first data line on the substrate are arranged alternately.
[0012] In some embodiments, the central display area includes a plurality of first data lines, the central input area includes a plurality of first input terminals, and the first data lines in the central display area are coupled to corresponding first input terminals in the central input area.
[0013] In some embodiments, at least a portion of the second data line has a length shorter than a length of the first data line.
[0014] In some embodiments, the display area has a straight edge and a rounded edge, and at least a portion of the second data line extends to the rounded edge.
[0015] In some embodiments, the first portion of the connection line and the second data line are disposed in different layers, and the second portion of the connection line and the second data line are disposed in the same layer.
[0016] In some embodiments, the driving chip includes a sequence adjustment module for adjusting the data signals received on each of the second data lines.
[0017] An embodiment of the present invention further provides a display device, comprising the display panel as described in any one of the above items.
[0018] The display panel and display device provided by the present invention have the following advantages:
[0019] By setting the second input terminal on the driving chip to be arranged in sequence in the direction along the side display area to the middle display area, the second parts coupled to the second input terminals are arranged in sequence in the direction along the side display area to the middle display area, and the first part coupled to the second parts can not overlap with any second part when they are staggered in sequence in the direction along the display area to the binding area. When any two connecting lines do not overlap, the data signal transmitted through the connecting lines is not interfered with. Therefore, there is no abnormality caused by data signal interference when the display panel displays, and the display effect of the display panel can be improved. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Other features, objectives and advantages of the present invention will become more apparent from a reading of the detailed description of non-limiting embodiments made with reference to the following accompanying drawings.
[0021] Figure 1 is a schematic diagram of a display panel in the prior art;
[0022] Figure 2 is a schematic diagram of a display panel provided by an embodiment of the present invention;
[0023] Figure 3 is a schematic diagram of corresponding connections between data lines and input terminals provided by an embodiment of the present invention;
[0024] Figure 4 is a schematic diagram of a display device provided by an embodiment of the present invention.
[0025] Reference numerals:
[0026] 100 Display panel 60 Driver chip
[0027] 10 Display area 61 Middle input area
[0028] 11 Middle display area 62 Side input area
[0029] 12 Side display area 71 Right angle edge
[0030] 20 Binding area 72 Rounded edges
[0031] 30 first data line 200 display device
[0032] 40 second data line d1 to d100 data line
[0033] 50 Connection line F1 First input terminal
[0034] 51 Part 1 F2 Second input
[0035] 52 Part 2 DETAILED DESCRIPTION
[0036] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that the present invention will be comprehensive and complete and fully convey the concepts of the example embodiments to those skilled in the art. In the figures, the same reference numerals represent the same or similar structures, and thus their repeated description will be omitted. "or" and "or" in the specification may both mean "and" or "or".
[0037] In the representations of the present application, the representations with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" etc. mean that the specific features, structures, materials or characteristics represented in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. Moreover, the represented specific features, structures, materials or characteristics may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples represented in the present application and the features of the different embodiments or examples, unless they contradict each other.
[0038] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the representation of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0039] Figure 1 FIG. 2 shows a schematic diagram of a display panel using FIAA technology in the prior art. Figure 1 As shown, the display panel includes a display area 10' and a binding area 20' located on one side of the display area 10', and the display area 10' includes a central display area 11' and side display areas 12' located on both sides of the central display area 11'; wherein the central display area 11' is provided with a plurality of first data lines 30', the side display area 12' is provided with a plurality of second data lines 40', and a driver chip 60' is provided in the binding area 20'. The first data line 30' extends from the display area 10' to the binding area 20' and is directly connected to the driver chip 60', the second data line 40' is first coupled to the connection line 50', and then connected to the driver chip 60' through the connection line 50', and the driver chip 60' can provide each data line with the data signal required for the pixel unit to display, so as to light up the display panel. The connecting line 50 ′, namely the second data line 40 ′, is bent in the display area 10 ′, so that the fan-out wiring extending outside the display area 10 ′ can be concentrated in the area facing the driving chip 60 ′, thereby reducing the lower frame.
[0040] like Figure 1 At the position indicated by the middle circle, there is an overlap between the first connection line 50'(1) connected to the first second data line 40'(1) and the second connection line 50'(2) connected to the second second data line 40'(2). When data signals are transmitted, the overlap between the first connection line 50'(1) and the second connection line 50'(2) will cause the transmitted data signal to be abnormal, thereby causing display abnormality of the display panel.
[0041] In view of the problem mentioned above that the data signal is abnormal due to the overlap of the connection lines 50 ′ on the display panel, which in turn causes abnormal display of the display panel, an embodiment of the present invention provides a display panel. Figure 1 FIG. 1 is a schematic diagram of a display panel provided by an embodiment of the present invention. Figure 1 As shown, the display panel 100 includes a display area 10 and a binding area 20 located at one side of the display area 10 .
[0042] The display area 10 includes a central display area 11 and two side display areas 12, the central display area 11 is located between the two side display areas 12, the side display area 12 includes a plurality of first data lines 30, N second data lines 40 and N connection lines 50, the connection line 50 includes a first part 51 and a second part 52 coupled to each other, the first part 51 is coupled to the corresponding second data line 40, and the second part 52 extends from the display area 10 to the binding area 20; along the direction of the side display area 12 pointing to the central display area 11, the first second data line 40 to the Nth second data line 40 are arranged in sequence, N is a positive integer greater than 1; exemplary, the N second data lines 40 include 300, 400, 500, etc., which are not specifically limited here. It should be noted that the direction along the side display area 12 pointing to the central display area 11 can be understood as the direction from any side display area 12 to the central display area 11, for example, from left to right, or from right to left. Figure 1 Only the first data line 30, the second data line 40 and the connecting line 50 in the side display area 12 on the left are shown. The settings of the first data line 30, the second data line 40 and the connecting line 50 in the side display area 12 on the right can refer to the settings of the middle display area 12 on the left.
[0043] The binding area 20 is provided with a driving chip 60, which includes a central input area 61 and two side input areas 62, wherein the central input area 61 is located between the two side input areas 62; the side input area 62 includes a plurality of first input terminals F1 and N second input terminals F2; along the direction from the side input area 62 to the central input area 61, the first second input terminal F2 to the Nth second input terminal F2 are arranged in sequence; the first data line 30 is coupled to the corresponding first input terminal F1, and the second part 52 of the connecting line 50 is coupled to the corresponding second input terminal F2. It should be noted that the direction from the side input area 62 to the central input area 61 can be understood as the direction from any side input area 62 to the central input area 61, for example, from left to right, or from right to left. Figure 1 Only the first input terminal F1 and the second input terminal F2 of the side input area 62 on the left are shown. The settings of the first input terminal F1 and the second input terminal F2 in the side input area 62 on the right may refer to the settings of the side input area 62 on the left.
[0044] The second data line 40 is led to a position close to the middle display area 11 through the connecting line 50, and then coupled to the corresponding second input terminal F2, so that the FIAA technology can be well implemented and the width of the lower frame of the display panel 100 can be effectively narrowed. Exemplarily, the width of the lower frame of the display panel 100 can be narrowed to less than 1.0 mm.
[0045] By setting the second input terminal F2 on the driving chip 60 to be arranged in sequence in the direction along the side display area 12 pointing to the middle display area 11, the second parts 52 coupled to the second input terminals F2 are arranged in sequence in the direction along the side display area 12 pointing to the middle display area 11, and the second parts 52 of each connecting line 50 are arranged in sequence in the direction along the display area 10 pointing to the binding area 20. When the first parts 51 of each connecting line 50 are staggered in sequence in the direction along the display area pointing to the binding area 20, no two connecting lines 50 will overlap, so that the data signal transmitted through the connecting line 50 will not be interfered with. Therefore, there is no abnormality caused by data signal interference when the display panel displays, and the display effect of the display panel can be improved.
[0046] Figure 3 FIG. 1 is a schematic diagram showing the connection between the data line and the input terminal provided by an embodiment of the present invention. Figure 3As shown, from left to right, data lines d1, data lines d2, data lines d3, data lines d4, data lines d5, ..., data lines d100 are sequentially arranged on the display panel 100. Among them, data line d1 is the first second data line 40 (1), data line d2 is the second second data line 40 (2), data line d3 is the third second data line 40 (3), data line d4 is the fourth second data line 40 (4), data line d5 is the first first data line 30 (1), and data line dn is the first data line 30. Since the first second data line 40(1) to the fourth second data line 40(4) are coupled to the input terminal on the driving chip 60, in order to reduce the width of the lower frame of the display panel 100, the first second data line 40(1) is coupled to the first second input terminal F2(1) through the first connecting line 50(1), the second second data line 40(2) is coupled to the second second input terminal F2(2) through the second connecting line 50(2), the third second data line 40(3) is coupled to the third second input terminal F2(3) through the third connecting line 50(3), and the fourth second data line 40(4) is coupled to the fourth second input terminal F2(4) through the fourth connecting line 50(4). The driving chip 60 provides data signals to the corresponding data lines to drive the display of the display panel.
[0047] Here, the numbers on the input terminals of the driver chip 60 are arranged in order from left to right. Here, the first second input terminal F2(1) is the 98th terminal on the driver chip 60, the second second input terminal F(2) is the 97th terminal on the driver chip 60, the third second input terminal F2(3) is the 2nd terminal on the driver chip, and the fourth second input terminal (4) is the 1st terminal on the driver chip 60. The arrangement order of the first second input terminal F2(1) to the fourth second input terminal F2(4) on the driver chip 60 is in descending order. Therefore, both ends of the first portion 51 of the second connection line 50(2) do not exceed both ends of the first portion 51 of the first connection line 50(1); both ends of the first portion 51 of the third connection line 50(3) do not exceed both ends of the first portion 51 of the second connection line 50(2); and both ends of the fourth connection line 50(4) do not exceed both ends of the first portion 51 of the third connection line 50(3), that is, there is no overlap between the connection lines 50. Therefore, by sequentially arranging the second input terminals F2 corresponding to the second data lines 40, the connection lines 50 corresponding to the second data lines 40 do not overlap, and thus there is no interference when the data signal is transmitted, and no abnormal data signal affects the display of the display panel, thereby improving the display effect of the display panel.
[0048] In other embodiments, the first second input terminal F2(1) to the Nth second input terminal F2(N) may be arranged in descending order, and no overlap between the connecting lines 50 may be achieved. Here, there is no specific limitation on whether the second input terminals corresponding to the second data lines 40 are arranged in ascending or descending order in the driving chip 60, and those skilled in the art may set it according to actual needs.
[0049] See also Figure 2 In some embodiments, the N second input terminals F2 are divided into a plurality of second input terminal groups, each of which includes at least one second input terminal F2; the plurality of first input terminals F1 are divided into a plurality of first input terminal groups, each of which includes at least one first input terminal F1. Preferably, in some embodiments, the second input terminal groups and the first input terminal groups are alternately arranged.
[0050] Furthermore, in some embodiments, each first input terminal group includes the same number of first input terminals F1, and each second input terminal group includes the same or different number of second input terminals F2.
[0051] For example, Figure 2 As shown, the N second input terminals F2 are divided into a plurality of second input terminal groups, the plurality of first input terminals F1 are divided into a plurality of first input terminal groups, each second input terminal group includes two second input terminals F2, each first input terminal group includes two first input terminals F1, and the first input terminal groups and the second input terminal groups are alternately arranged. The orthographic projection of the second portion 52 on the substrate of the display panel 100 is alternately arranged with the orthographic projection of the first data line 30 coupled to the first input terminal F1 on the substrate.
[0052] The specific number of the first input terminals F1 in the first input terminal group and the specific number of the second input terminals F2 in the second input terminal group can be set according to the size and resolution of the actual display panel, etc., and are not specifically limited here.
[0053] For further information, please refer to Figure 2 The middle display area 11 includes a plurality of first data lines 30 , the middle input area 61 includes a plurality of first input terminals F1 , and the first data lines 30 in the middle display area 11 are coupled to corresponding first input terminals F1 in the middle input area 61 .
[0054] For example, Figure 2 As shown, the middle display area 11 includes a plurality of first data lines 30 located between the first data lines 30 of the two side display areas 12 , and the first data lines 30 included in the display panel 100 are arranged in sequence.
[0055] like Figure 2As shown, the display area 10 has a straight edge 71 and a rounded edge 72 , and at least a portion of the second data line 40 extends to the rounded edge 72 .
[0056] Exemplarily, the display area 10 includes four straight edges 71 and four rounded edges 72 , and a portion of the second data line 40 extends to the rounded edge 72 .
[0057] like Figure 2 As shown, at least a portion of the second data line 40 has a length less than that of the first data line 30. Figure 2 As shown, the length of the second data line 40 extending to the upper and lower rounded edges 72 is less than the length of the first data line 30 .
[0058] Further, in some embodiments, the first portion 51 of the connection line 50 is disposed in a different layer from the second data line 40, and the second portion 52 of the connection line 50 is disposed in the same layer as the second data line 40. If the second portion 52 of the connection line 50 is disposed in the same layer as the second data line 40, then the first portion 51 of the connection line 50 is disposed in a different layer from the second data line 40, and vias are required to be disposed in the overlapping region between the first portion 51 of the connection line 50 and the second data line 40 and the overlapping region between the first portion 51 of the connection line 50 and the second portion 52 to achieve coupling between the second data line 40 and the second portion 52.
[0059] Furthermore, the driving chip 60 further includes a sequence adjustment module for adjusting the data signals received on each second data line 40 .
[0060] See also Figure 2 and Figure 3, the display area 10 includes a plurality of data lines, which are sequentially arranged as d1, d2, d3, ..., d100 from left to right; the driver chip 60 is provided with a plurality of input terminals, which are sequentially arranged as input terminal 1, input terminal 2, input terminal 3, ..., input terminal 100 from left to right. The specific number of data lines and the specific number of input terminals of the driver chip 60 are related to the resolution and size of the display panel. The number of data lines and input terminals here is only for illustration. In a display panel that does not adopt the FIAA technology, the data lines are sequentially coupled to the input terminals from left to right, that is, data line d1 is coupled to input terminal 1, data line d2 is coupled to input terminal 2, data line d3 is coupled to input terminal 3, data line d4 is coupled to input terminal 4, data line d5 is coupled to input terminal 5, and so on. Data line d100 is coupled to input terminal 100. Furthermore, data signal 1 is transmitted to data line d1 through input terminal 1, data signal 2 is transmitted to data line d2 through input terminal 2, data signal 3 is transmitted to data line d3 through input terminal 3, data signal 4 is transmitted to data line d4 through input terminal 4, data signal 5 is transmitted to data line d5 through input terminal 5, and so on, data signal 100 is transmitted to data line d100 through input terminal 100. Therefore, in a display panel that does not use FIAA technology, the arrangement order of data lines is the same as the arrangement order of input terminals and the numbering order of data signals, that is, each data line can receive a data signal with a corresponding number, ensuring the normal driving of each sub-pixel in the display area.
[0061] In a display panel using FIAA technology, the data line arrangement order does not change, and the input terminal arrangement order does not change. However, when the data line is connected to the input terminal of the driver chip 60, part of the data line will be pulled to the position of the driver chip 60 facing the display area 10 through the connecting line 50, and then coupled to the input terminal of the driver chip 60. Figure 3 In the example, data line d1 is coupled to input terminal 98, data line d2 is coupled to input terminal 97, data line d3 is coupled to input terminal 2, data line d4 is coupled to input terminal 1, and data line d5 is coupled to input terminal 3. The numbers of the data lines are different from the numbers of the input terminals to which they are coupled. Therefore, when the numbers of the data lines are different from the numbers of the input terminals to which they are coupled, the data signals received by the input terminals need to be further adjusted. For example, input terminal 98 receives data signal 1, input terminal 97 receives data signal 2, input terminal 2 receives data signal 3, input terminal 1 receives data signal 4, and input terminal 3 receives data signal 5.
[0062] Here, the sequence adjustment module can adjust the data signal queue, and form a final disordered data signal queue by exchanging the positions of each data signal in the sequence data signal queue, so that each data line obtains a data signal with a corresponding number. Therefore, by setting the sequence adjustment module on the driver chip 60, a disordered data signal queue can be obtained, and there is no need to customize the driver chip 60 to generate the disordered data signal queue, thereby improving the versatility of the driver chip 60.
[0063] An embodiment of the present invention further provides a display device, comprising the display panel as described above. Figure 4 FIG. 2 shows a display device provided by an embodiment of the present invention. Figure 4 As shown, an embodiment of the present invention further provides a display device 200, which includes the display panel 100 as described above, so the display device 200 can obtain all the technical effects of the above-mentioned display module, which will not be repeated here. Specifically, the display device can be any device that displays images, whether moving (e.g., video) or fixed (e.g., still images), and whether text or images. More specifically, it is expected that the embodiments can be implemented in or associated with a variety of electronic devices. The various electronic devices are, for example (but not limited to), mobile phones, wireless devices, personal data assistants (PDAs), handheld or portable computers, GPS receivers / navigators, cameras, MP4 video players, video cameras, game consoles, watches, clocks, calculators, TV monitors, flat panel displays, computer monitors, car displays, electronic photos, electronic billboards or signs, projectors, building structures, packaging and aesthetic structures, etc.
[0064] In summary, the display panel and display device provided by the present invention have the following advantages:
[0065] By setting the second input terminals on the driving chip to be arranged in sequence in the direction from the side display area to the middle display area, the second parts coupled to the second input terminals are arranged in sequence in the direction from the side display area to the middle display area, and the second parts of the connecting lines are arranged in sequence in the direction from the display area to the binding area. When the first parts of the connecting lines are staggered in sequence in the direction from the display area to the binding area, no two connecting lines will overlap, so that the data signals transmitted through the connecting lines will not be interfered with. Therefore, there is no abnormality caused by data signal interference when the display panel displays, and the display effect of the display panel can be improved.
[0066] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.
Claims
1. A display panel, characterized in that: It includes a display area and a binding area located on one side of the display area; The display area includes a central display area and two side display areas, the central display area is located between the two side display areas, the side display areas include a plurality of first data lines, N second data lines and N connection lines, the connection lines include a first part and a second part coupled to each other, the first part is coupled to the corresponding second data line, and the second part extends from the display area to the binding area; along the direction from the side display area to the central display area, the first second data line to the Nth second data line are arranged in sequence, and N is a positive integer greater than 1; The binding area is provided with a driving chip, the driving chip includes a central input area and two side input areas, the central input area is located between the two side input areas; the side input area includes a plurality of first input terminals and N second input terminals, and the first second input terminal to the Nth second input terminal are arranged in sequence along the direction from the side input area to the central input area; The first data line is coupled to the corresponding first input terminal, and the second portion of the connection line is coupled to the corresponding second input terminal.
2. The display panel according to claim 1, characterized in that: The N second input terminals are divided into multiple second input terminal groups, each second input terminal group includes at least one second input terminal; the multiple first input terminals are divided into multiple first input terminal groups, each first input terminal group includes at least one first input terminal.
3. The display panel according to claim 2, characterized in that: Each first input terminal group includes the same number of first input terminals, and each second input terminal group includes the same or different number of second input terminals.
4. The display panel according to claim 1, characterized in that: The central display area includes a plurality of first data lines, the central input area includes a plurality of first input terminals, and the first data lines in the central display area are coupled to corresponding first input terminals in the central input area.
5. The display panel according to claim 1, characterized in that: The display area has a straight edge and a rounded edge, and at least a portion of the second data line extends to the rounded edge.
6. The display panel according to claim 5, characterized in that: The length of at least a portion of the second data line is shorter than the length of the first data line.
7. The display panel according to claim 1, characterized in that: The first portion of the connection line and the second data line are disposed in different layers, and the second portion of the connection line and the second data line are disposed in the same layer.
8. The display panel according to claim 2, characterized in that: The orthographic projection of the second portion of the connecting line on the substrate of the display panel and the orthographic projection of the first data line on the substrate are arranged alternately.
9. The display panel according to claim 1, characterized in that: The driving chip comprises a sequence adjustment module for adjusting the data signals received on each of the second data lines.
10. A display device, characterized in that: Comprising the display panel as claimed in any one of claims 1 to 9.
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