Frequency converter output overcurrent protection circuit
By designing the inverter output overcurrent protection circuit, including current sampling, comparison and buffering circuit, the problems of high hardware protection cost and slow software protection response in the prior art are solved, and fast and effective overcurrent protection is achieved.
Patent Information
- Application Number
- CN202411793510.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-06
- Publication Date
- 2025-02-07
AI Technical Summary
The hardware overcurrent protection solution of existing inverters is relatively expensive, and the software overcurrent protection response speed is slow, making it difficult to effectively solve the problem of inverter output overcurrent.
A frequency converter output overcurrent protection circuit is designed, including a current sampling circuit, a comparison circuit, a buffer circuit and a reference power supply circuit. The output overcurrent protection is achieved through current detection and comparison, and waveform shaping is used for inverter.
It realizes fast response overcurrent protection, avoids high cost problems, and ensures the integrity and stability of the inverter output signal.
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Figure CN119401346A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of inverter protection, and in particular to an inverter output overcurrent protection circuit. Background Art
[0002] General frequency converters usually have hardware overcurrent protection and software overcurrent protection. Currently, the commonly used hardware overcurrent protections are as follows: Fast fuse: Install a fast fuse on the DC side or AC input end of the frequency converter. When the current exceeds its rated value, the fast fuse can cut off the circuit in a very short time to protect the frequency converter from damage; Overcurrent relay: The overcurrent relay can monitor the output current of the frequency converter in real time. Once it exceeds the preset value, it will immediately act to cut off the control circuit and stop the frequency converter; Current sensor and controller: Add a current sensor to the output circuit of the frequency converter to monitor the current change in real time and transmit the signal to the controller. The controller sends a control signal according to the preset protection threshold to cut off or adjust the working state of the frequency converter; Inverter module protection: In case of damage to the inverter module, an independent protection circuit can be added to each inverter bridge arm, such as installing a fast recovery diode to prevent the occurrence of shoot-through. The fuses, relays, sensors, etc. in the above-mentioned hardware overcurrent protection schemes are relatively expensive and the cost is difficult to control.
[0003] Software overcurrent protection is implemented through the algorithms and logic built into the main control chip. The main control chip reads the current data and converts the analog voltage into a digital current value through the ADC. The main control chip compares the set overcurrent value to determine whether there is overcurrent and triggers protection measures. Software overcurrent protection occupies DSP resources and its response speed is not as fast as hardware protection. Summary of the invention
[0004] The object of the present invention is to provide a frequency converter output overcurrent protection circuit.
[0005] To achieve the above object, the present invention provides the following technical solution: an inverter output overcurrent protection circuit, comprising: Current sampling circuit, used to collect IGBT output current and convert it into voltage signal output; A comparison circuit, used to obtain a voltage signal and compare it with a set value and then output a level signal; and A buffer circuit, used for obtaining a level signal, performing waveform shaping, and then outputting a VCE signal; and The reference power supply circuit is used to stably output a 5V voltage to power the current sampling circuit, the comparison circuit and the buffer circuit.
[0006] Furthermore, the reference power supply circuit includes TL431, resistors R1, R2, R3, R6, C1, C2, and C4, one end of the capacitor C1 is connected to the cathode of TL431 through R1, resistors R2 and R1 are connected in parallel and then connected to the anode of TL431 through R3 and R6 in sequence, the reference electrode of TL431 is connected between resistors R6 and R3, the capacitor C4 is connected to R6 in parallel, one end of the capacitor C2 is connected between R2 and R3, and the other end is connected to C4.
[0007] Furthermore, the current sampling circuit includes operational amplifiers U2A, U2B, resistors R4, R5, R7, RA1, RA2, RA3, R13, R17, R18, R14, R12, capacitors C6, C3, and C11. One end of the resistor R4 is connected to the non-inverting input terminal of the operational amplifier U2B through resistor R5 and capacitor C3 in sequence. The resistor R5 and capacitor C3 are connected in parallel. After the resistors RA1, RA2, and RA3 are connected in parallel, one end is connected to the non-inverting input terminal of the operational amplifier U2A through resistor R13, and the other end is connected to the inverting input terminal of the operational amplifier U2A through resistor R17. The output end of the operational amplifier U2B is connected between R13 and the operational amplifier U2A through the capacitor C6, one end of the resistor R7 is connected between the inverting input end of the operational amplifier U2B, and the other end is connected between the capacitor C6 and the operational amplifier U2B, one end of the resistor R12 is connected between C6 and R7, and the other end of the resistor R12 is connected between C6 and R13, one end of the resistor R18 is connected in parallel with C11 and connected between R17 and the operational amplifier U2A, and the other end is connected to the output end of the operational amplifier U2A, and one end of the resistor R14 is connected to the output end of the operational amplifier U2A.
[0008] Furthermore, the operational amplifiers U2A and U2B are of model TL082IDR.
[0009] Further, the comparison circuit includes an optical coupler U3, resistors R8, R9, R16, R20, R22, R11, R10, R15, R21, capacitors C5, C12, C10, C13, and operational amplifiers U4A and U4B. One end of the capacitor C5 is connected to port 1 of the optical coupler U3 through resistors R8 and R9 in parallel, one end of the resistor R11 is connected between resistors R8 and R9, the other end of the resistor R11 is connected to the output end of the operational amplifier U4A, port 2 of the optical coupler U3 is connected between R11 and the operational amplifier U4A, one end of the resistor R10 is connected to port 4 of the optical coupler U3, and one end of the resistor R16 is connected to port 1 of the operational amplifier U4A through one end of C10. The positive phase input terminal of the operational amplifier U4A, one end of the resistor R15 is connected between C10 and the operational amplifier U4A, and the other end is connected between the resistor R11 and the operational amplifier U4A, one end of the capacitor C12 is connected to the positive phase input terminal of the operational amplifier U4B, one end of the resistors R22 and C13 are connected in parallel and connected between R16 and C10 through R20, and the other end is connected to the inverting input terminal of the operational amplifier U4B, the negative input terminal of the operational amplifier U4A is connected to the positive phase input terminal of the operational amplifier U4B through one end of the resistor R21, and the output terminal of the operational amplifier U4B is connected to the output terminal of the operational amplifier U4A through the other end of the resistor R21.
[0010] Furthermore, the model of the optical coupler U3 is PS2501L.
[0011] Furthermore, the operational amplifiers U4A and U4B are of the type LM393DR2G.
[0012] Furthermore, the buffer circuit includes a resistor R23, a capacitor C15, and an inverter U5, and the resistor R23 is connected to the inverter U5 via one end of the capacitor C15.
[0013] Furthermore, the inverter U5 has a model of 74HC14D.
[0014] It can be seen from the above technical solution that the present invention has the following beneficial effects: The inverter output overcurrent protection circuit detects the output current through the current detection circuit, uses a comparator to compare the real-time current value, controls the output overcurrent signal, and uses an inverter to shape the output signal waveform to ensure the integrity of the signal. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 This is the reference power supply circuit diagram of the present invention; Figure 2 This is a current sampling circuit diagram of the present invention; Figure 3 A comparison circuit diagram of the present invention; Figure 4This is a buffer circuit diagram of the present invention. DETAILED DESCRIPTION
[0016] In the description of the present invention, it should be noted that the terms "upper", "lower", "inner", "outer", "front end", "rear end", "two ends", "one end", "the other end" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.
[0017] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "provided with", "connected", etc. should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0018] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0019] See also Figure 1-4 The present invention provides an inverter output overcurrent protection circuit, including a reference power supply circuit, a current sampling circuit, a comparison circuit and a buffer circuit, wherein the reference power supply circuit includes TL431, resistors R1, R2, R3, R6, C1, C2, and C4, one end of the capacitor C1 is connected to the cathode of TL431 through R1, the resistor R2 is connected to R1 in parallel and then connected to the anode of TL431 through R3 and R6 in sequence, the reference electrode of TL431 is connected between the resistors R6 and R3, the capacitor C4 is connected to R6 in parallel, one end of the capacitor C2 is connected between R2 and R3, and the other end is connected to C4.
[0020] When the +5ref reference power supply circuit starts working, +VWP will first charge the back-end capacitor C2. At this time, the output voltage of this reference power supply circuit is less than 5V, and the voltage divided by R3 and R6 (in this circuit, R1=R2=R3=R6) on the TL431 reference voltage pin is also less than 2.5V, so the cathode and anode of TL431 are in an open circuit state; when the voltage across the capacitor (that is, the output voltage of the entire 5V reference power supply circuit) is charged to a state greater than 5V, the voltage divided by R3 and R6 on the TL431 reference voltage pin is The voltage will be greater than 2.5V, at this time, the anode and cathode of TL431 are in the on state, and the back-end load circuit is powered by C2. When the back-end load consumes the voltage across the capacitor to below 5V, the voltage divided on the reference voltage pin of TL431 will be less than 2.5V again. At this time, the anode and cathode of TL431 are restored to the open circuit state, and +VWP will charge the back-end capacitor C2 again, thereby dynamically adjusting the output voltage of the +5ref reference power supply circuit, stabilizing the output voltage at 5V, and achieving a stable output voltage of 5V.
[0021] The current sampling circuit includes operational amplifiers U2A, U2B, resistors R4, R5, R7, RA1, RA2, RA3, R13, R17, R18, R14, R12, capacitors C6, C3, and C11. One end of the resistor R4 is connected to the non-inverting input terminal of the operational amplifier U2B through resistor R5 and capacitor C3 in sequence. The resistor R5 and capacitor C3 are connected in parallel. After the resistors RA1, RA2, and RA3 are connected in parallel, one end is connected to the non-inverting input terminal of the operational amplifier U2A through resistor R13, and the other end is connected to the inverting input terminal of the operational amplifier U2A through resistor R17. The output end of the operational amplifier U2B is connected between R13 and the operational amplifier U2A through the capacitor C6, one end of the resistor R7 is connected to the inverting input end of the operational amplifier U2B, and the other end is connected between the capacitor C6 and the operational amplifier U2B, one end of the resistor R12 is connected between C6 and R7, and the other end of the resistor R12 is connected between C6 and R13, one end of the resistor R18 is connected in parallel with C11 and connected between R17 and the operational amplifier U2A, and the other end is connected to the output end of the operational amplifier U2A, and one end of the resistor R14 is connected to the output end of the operational amplifier U2A. The model of the operational amplifiers U2A and U2B is TL082IDR.
[0022] Part of the U2B circuit is used as a voltage follower, where R4=R5=R7, and +5ref is divided by voltage and the operational amplifier U2B to obtain a +2.5ref reference voltage; Part U2A is a differential amplifier circuit, RA1, RA2, RA3 are sampling resistors, assuming that the voltage across RA3 is Vin, Vin=I*1.414*2.5*R, where I is the rated current of the W phase output, 2.5 times is the overcurrent point, and R is the parallel equivalent resistance of RA1, RA2, RA3; According to the principle of the same-phase amplifier circuit, it can be obtained that: V_out=[(2.5-Vin)*R13 / (R13+R12)+Vin]*(R18 / R17+1), the current sampling circuit obtains 5V voltage and outputs it after voltage division.
[0023] The comparison circuit includes an optocoupler U3, resistors R8, R9, R16, R20, R22, R11, R10, R15, R21, capacitors C5, C12, C10, C13, and operational amplifiers U4A and U4B. One end of the capacitor C5 is connected to port 1 of the optocoupler U3 through parallel resistors R8 and R9, one end of the resistor R11 is connected between resistors R8 and R9, the other end of the resistor R11 is connected to the output end of the operational amplifier U4A, port 2 of the optocoupler U3 is connected between R11 and the operational amplifier U4A, one end of the resistor R10 is connected to port 4 of the optocoupler U3, and one end of the resistor R16 is connected to the operational amplifier through one end of C10. The positive phase input terminal of U4A, one end of the resistor R15 is connected between C10 and the operational amplifier U4A, and the other end is connected between the resistor R11 and the operational amplifier U4A, one end of the capacitor C12 is connected to the positive phase input terminal of the operational amplifier U4B, one end of the resistor R22 and C13 is connected in parallel and connected between R16 and C10 through R20, and the other end is connected to the inverting input terminal of the operational amplifier U4B, the negative input terminal of the operational amplifier U4A is connected to the positive phase input terminal of the operational amplifier U4B through one end of the resistor R21, and the output terminal of the operational amplifier U4B is connected to the output terminal of the operational amplifier U4A through the other end of the resistor R21. The model of the optocoupler U3 is PS2501L, and the models of the operational amplifiers U4A and U4B are LM393DR2G.
[0024] The comparison circuit obtains the divided voltage and outputs a level signal after comparison. Specifically, R8, R9, R16, R20, and R22 are voltage-dividing resistors, R11 is a current-limiting resistor, and R10 is a pull-up resistor; the voltage of U4A pin 3 is: V3=5*(R20+R22) / (R16+R20+R22), and the voltage of U4B pin 6 is: V6=5*R22 / (R16+R20+R22); when V_out<V6, U4 outputs a low level; when V_out>V3, U4 outputs a low level; when V6<V_out<V3, U4 outputs a high level; when U4 outputs a low level, the U3 optocoupler is turned on, and the FAULT signal is pulled low.
[0025] The buffer circuit includes a resistor R23, a capacitor C15, and an inverter U5. The resistor R23 is connected to the inverter U5 through one end of the capacitor C15. The model of the inverter U5 is 74HC14D. R23 and C15 form an RC filter. The 74HC14D is an inverter. Pins 2 and 3 of the inverter are connected. When the input FAULT signal is low, the output VCE signal is also low; when the input FAULT signal is high, the output VCE signal is also high. The inverter is added here to shape the waveform so that the VCE signal becomes a standard level signal output.
[0026] The inverter output overcurrent protection circuit uses a logic circuit composed of TL431, TL082IDR, LM393DR2G, and 74HC14D to sample, compare, and output overcurrent protection signals. The overcurrent protection implemented by hardware has a fast response speed and does not occupy DSP resources. The 74HC14D inverter is used for waveform shaping to ensure that the VCE signal becomes a standard level signal output.
[0027] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.
Claims
1. A frequency converter output overcurrent protection circuit, characterized in that: include: Current sampling circuit, used to collect IGBT output current and convert it into voltage signal output; A comparison circuit, used for comparing the acquired voltage signal with a set value and then outputting a level signal; as well as A buffer circuit, used for obtaining a level signal, performing waveform shaping, and then outputting a VCE signal; and The reference power supply circuit is used to stably output a 5V voltage to power the current sampling circuit, the comparison circuit and the buffer circuit.
2. The inverter output overcurrent protection circuit according to claim 1, characterized in that: The reference power supply circuit includes TL431, resistors R1, R2, R3, R6, C1, C2, and C4. One end of the capacitor C1 is connected to the cathode of TL431 through R1. Resistors R2 and R1 are connected in parallel and then connected to the anode of TL431 through R3 and R6 in sequence. The reference electrode of TL431 is connected between resistors R6 and R3. The capacitor C4 is connected to R6 in parallel. One end of the capacitor C2 is connected between R2 and R3, and the other end is connected to C4.
3. The inverter output overcurrent protection circuit according to claim 1, characterized in that: The current sampling circuit includes operational amplifiers U2A, U2B, resistors R4, R5, R7, RA1, RA2, RA3, R13, R17, R18, R14, R12, capacitors C6, C3, and C11. One end of the resistor R4 is connected to the non-inverting input terminal of the operational amplifier U2B through resistor R5 and capacitor C3 in sequence. The resistor R5 and capacitor C3 are connected in parallel. After the resistors RA1, RA2, and RA3 are connected in parallel, one end is connected to the non-inverting input terminal of the operational amplifier U2A through resistor R13, and the other end is connected to the inverting input terminal of the operational amplifier U2A through resistor R17. The output end of the operational amplifier U2B is connected between R13 and the operational amplifier U2A through the capacitor C6, one end of the resistor R7 is connected to the inverting input end of the operational amplifier U2B, and the other end is connected between the capacitor C6 and the operational amplifier U2B, one end of the resistor R12 is connected between C6 and R7, and the other end of the resistor R12 is connected between C6 and R13, one end of the resistor R18 is connected in parallel with C11 and connected between R17 and the operational amplifier U2A, and the other end is connected to the output end of the operational amplifier U2A, and one end of the resistor R14 is connected to the output end of the operational amplifier U2A.
4. The inverter output overcurrent protection circuit according to claim 3, characterized in that: The operational amplifiers U2A and U2B are of the type TL082IDR.
5. The inverter output overcurrent protection circuit according to claim 1, characterized in that: The comparison circuit includes an optocoupler U3, resistors R8, R9, R16, R20, R22, R11, R10, R15, R21, capacitors C5, C12, C10, C13, and operational amplifiers U4A and U4B. One end of the capacitor C5 is connected to port 1 of the optocoupler U3 through parallel resistors R8 and R9, one end of the resistor R11 is connected between resistors R8 and R9, the other end of the resistor R11 is connected to the output end of the operational amplifier U4A, port 2 of the optocoupler U3 is connected between R11 and the operational amplifier U4A, one end of the resistor R10 is connected to port 4 of the optocoupler U3, and one end of the resistor R16 is connected to the operational amplifier through one end of C10. The positive phase input terminal of the operational amplifier U4A is connected to the positive phase input terminal of the operational amplifier U4A, one end of the resistor R15 is connected between C10 and the operational amplifier U4A, and the other end is connected between the resistor R11 and the operational amplifier U4A, one end of the capacitor C12 is connected to the positive phase input terminal of the operational amplifier U4B, one end of the resistors R22 and C13 are connected in parallel and connected between R16 and C10 through R20, and the other end is connected to the inverting input terminal of the operational amplifier U4B, the negative input terminal of the operational amplifier U4A is connected to the positive phase input terminal of the operational amplifier U4B through one end of the resistor R21, and the output terminal of the operational amplifier U4B is connected to the output terminal of the operational amplifier U4A through the other end of the resistor R21.
6. The inverter output overcurrent protection circuit according to claim 5, characterized in that: The model of the optical coupler U3 is PS2501L.
7. The inverter output overcurrent protection circuit according to claim 5, characterized in that: The operational amplifiers U4A and U4B are of the type LM393DR2G.
8. The inverter output overcurrent protection circuit according to claim 1, characterized in that: The buffer circuit includes a resistor R23, a capacitor C15, and an inverter U5. The resistor R23 is connected to the inverter U5 via one end of the capacitor C15.
9. The inverter output overcurrent protection circuit according to claim 8, characterized in that: The model of the inverter U5 is 74HC14D.