Digital / analog conversion circuit

Abstract

The digital / analog conversion circuit comprises a first DAC, the output end of which is connected with the first end of a first resistor; the output end of the second DAC is connected with the first end of the second resistor, the second end of the first resistor and the second end of the second resistor are connected with the first end of the first trimming resistor, and the second end of the first trimming resistor is connected with the first end of the third resistor; the output end of the third DAC is connected with the first end of a second trimming resistor, the second end of the second trimming resistor is connected with the first end of a fourth resistor, the second end of the third resistor and the second end of the fourth resistor are connected with the first end of a third trimming resistor, and the second end of the third trimming resistor is connected with the first end of a fifth resistor; the output end of the fourth DAC is connected with the first end of a fourth trimming resistor, the second end of the fourth trimming resistor is connected with the first end of a sixth resistor, and the second end of the fifth resistor and the second end of the sixth resistor are connected with the positive electrode input end of the operational amplifier.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor devices and integrated circuits, and in particular to a digital / analog conversion circuit. Background Art

[0002] Resolution is the minimum analog signal change that a digital-to-analog converter (DAC) can distinguish and convert, and is an important parameter for measuring the conversion accuracy of a digital-to-analog converter. It represents the number of different output levels that a digital-to-analog converter can provide within the analog signal range. The higher the resolution, the more detailed the digital-to-analog converter can express the tiny changes in the analog signal, thereby outputting an analog waveform that is closer to the original signal.

[0003] Resolution is usually described in bits. The more bits there are, the higher the resolution. For example, an 8-bit D / A converter can provide 2 8 = 256 different output levels, and a 16-bit D / A converter can provide 2 16 = 65536 different output levels. This means that the resolution of a 16-bit D / A converter is 256 times that of an 8-bit D / A converter, and it can more accurately express subtle changes in analog signals.

[0004] In the related art, a high-resolution digital / analog conversion circuit is provided, which is composed of multiple low-resolution digital / analog converters. The typical implementation method is to design the circuit as a cascaded digital / analog converter, and use an adder to perform a summing circuit and weight adjustment. However, due to the mismatch between the low-resolution digital / analog converters (for example, inconsistent gain, linearity differences and different temperature drift characteristics), the resolution may be lower than the theoretical value; at the same time, as mentioned above, since each digital / analog converter usually has its own linearity characteristics, these nonlinear errors may be amplified during the combination process, resulting in a large error between the output signal and the ideal signal. In order to ensure that the outputs of multiple digital / analog converters can be accurately matched, a more complicated calibration process is often required, so the requirements for resolution enhancement technology are relatively high. Summary of the invention

[0005] The present application provides a digital / analog conversion circuit, which can solve the problem of poor accuracy of a high-resolution digital / analog conversion circuit composed of multiple low-resolution digital / analog converters provided in the related art. The circuit includes:

[0006] a first digital / analog converter, wherein an output terminal of the first digital / analog converter is connected to a first terminal of a first resistor;

[0007] a second digital / analog converter, wherein an output end of the second digital / analog converter is connected to a first end of a second resistor, a second end of the first resistor and a second end of the second resistor are connected to a first end of a first fine-tuning resistor, and a second end of the first fine-tuning resistor is connected to a first end of a third resistor;

[0008] a third digital / analog converter, wherein an output end of the third digital / analog converter is connected to a first end of a second fine-tuning resistor, a second end of the second fine-tuning resistor is connected to a first end of a fourth resistor, a second end of the third resistor and a second end of the fourth resistor are connected to a first end of the third fine-tuning resistor, and a second end of the third fine-tuning resistor is connected to a first end of a fifth resistor;

[0009] a fourth digital / analog converter, wherein the output end of the fourth digital / analog converter is connected to the first end of a fourth fine-tuning resistor, the second end of the fourth fine-tuning resistor is connected to the first end of a sixth resistor, the second end of the fifth resistor and the second end of the sixth resistor are connected to the positive input end of an operational amplifier, and the negative input end of the operational amplifier is connected to the output end thereof;

[0010] Among them, the output resolution of the first digital / analog converter, the second digital / analog converter, the third digital / analog converter and the fourth digital / analog converter is 4 bits, and the output resolution of the digital / analog conversion circuit is 16 bits.

[0011] In some embodiments, the output voltage ranges of the second digital / analog converter, the third digital / analog converter, and the fourth digital / analog converter are the same.

[0012] In some embodiments, an output voltage range of the first digital / analog converter is smaller than an output voltage range of the second digital / analog converter, the third digital / analog converter, and the fourth digital / analog converter.

[0013] In some embodiments, resistance values ​​of the first resistor, the second resistor, the third resistor, the fourth resistor, the fifth resistor, and the sixth resistor are integer multiples of a unit resistance value.

[0014] In some embodiments, the ratio of the resistance value of the first resistor to the resistance value of the second resistor is an integer, the ratio of the resistance value of the third resistor to the resistance value of the fourth resistor is an integer, and the ratio of the resistance value of the fifth resistor to the resistance value of the sixth resistor is an integer.

[0015] In some embodiments, the first fine-tuning resistor, the second fine-tuning resistor, the third fine-tuning resistor, and the fourth fine-tuning resistor are used to compensate for the accuracy of the digital / analog conversion circuit.

[0016] In some embodiments, the resistance values ​​of the second resistor, the fourth resistor, and the sixth resistor are equal.

[0017] The technical solution of this application has at least the following advantages:

[0018] A second digital / analog converter, a third digital / analog converter and a fourth digital / analog converter having an output resolution of 4 bits are connected in parallel to the output circuit of the first digital / analog converter having an output resolution of 4 bits to construct a digital / analog conversion circuit having an output resolution of 16 bits. Resistors are set in the circuit to adjust the output weights of each digital / analog converter. Fine-tuning resistors are added in the circuit to adjust the problem of decreased accuracy of each resistor due to the resistance value being an integer multiple of the potential resistance value, thereby achieving easy matching while ensuring high-precision output. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0020] Figure 1 Schematic diagram of a digital / analog conversion circuit provided by an exemplary embodiment of the present application. DETAILED DESCRIPTION

[0021] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in this application. Obviously, the described embodiments are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0022] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0023] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0024] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0025] refer to Figure 1 , which shows a schematic diagram of a digital / analog conversion circuit provided by an exemplary embodiment of the present application, such as Figure 1 As shown, the circuit includes:

[0026] An output terminal of the first digital / analog converter DAC0 is connected to a first terminal of the first resistor R1 .

[0027] The output end of the second digital / analog converter DAC1 is connected to the first end of the second resistor R2, the second end of the first resistor R1 and the second end of the second resistor R1 are connected to the first end of the first trimming resistor R3', and the second end of the first trimming resistor R3' is connected to the first end of the third resistor R3.

[0028] The output end of the third digital / analog converter DAC2 is connected to the first end of the second fine-tuning resistor R4', the second end of the second fine-tuning resistor R4' is connected to the first end of the fourth resistor R4, the second end of the third resistor R3 and the second end of the fourth resistor R4 are connected to the first end of the third fine-tuning resistor R5', and the second end of the third fine-tuning resistor R5' is connected to the first end of the fifth resistor R5.

[0029] The fourth digital / analog converter DAC3 has its output end connected to the first end of the fourth fine-tuning resistor R6', the second end of the fourth fine-tuning resistor R6' is connected to the first end of the sixth resistor R6, the second end of the fifth resistor R5 and the second end of the sixth resistor R6 are connected to the positive input end of an operational amplifier (abbreviated as "op amp"), and the negative input end of the operational amplifier is connected to its output end.

[0030] Among them, the output resolution of the first digital / analog converter DAC0, the second digital / analog converter DAC1, the third digital / analog converter DAC2 and the fourth digital / analog converter DAC3 is 4 bits, and the output resolution of the digital / analog conversion circuit is 16 bits.

[0031] Optionally, in an embodiment of the present application, the output voltage ranges of the second digital / analog converter DAC1, the third digital / analog converter DAC2 and the fourth digital / analog converter DAC3 are the same, and the output voltage range of the first digital / analog converter DAC0 is smaller than the output voltage range of the second digital / analog converter DAC1, the third digital / analog converter DAC2 and the fourth digital / analog converter DAC3.

[0032] For example, the output voltage range of the second digital / analog converter DAC1, the third digital / analog converter DAC2 and the fourth digital / analog converter DAC3 can be 0 volts (V) to 2.5 volts, and the output voltage range of the first digital / analog converter DAC0 can be 0 volts to 40 / 17 volts.

[0033] In view of this, the output voltage of the ideal digital / analog conversion circuit and the output voltage of each digital / analog converter satisfy the following relationship:

[0034]

[0035] Among them, V OUT is the output voltage of the digital / analog conversion circuit, V OUT0 is the output voltage of the first digital / analog converter DAC0, V OUT1 is the output voltage of the second digital / analog converter DAC2, V OUT2 is the output voltage of the third digital / analog converter DAC2, V OUT3 is the output voltage of the fourth digital / analog converter DAC3, and A is a coefficient, which can be set according to the actual application scenario.

[0036] Ignoring the resistance value of the trimming resistor, the output voltage of the ideal digital / analog conversion circuit, the output voltage of each digital / analog converter, and the resistance value of each resistor satisfy the following relationship:

[0037]

[0038] Among them, R1 is the resistance value of the first resistor R1, R2 is the resistance value of the second resistor R2, R3 is the resistance value of the third resistor R3, R4 is the resistance value of the fourth resistor R4, R5 is the resistance value of the fifth resistor R5, and R6 is the resistance value of the sixth resistor R6.

[0039] Combined with formula (1.1), we can get R1, R2, R3, R4, R5, and R6 satisfy the following formula:

[0040]

[0041] By using formulas (1.5) to (1.7), the resistance value of each resistor can be set according to the actual application, and the resistance value of each resistor can be set to an integer multiple of the unit resistance value. For example, if R2 = R and R4 = R, then R1 = 16R can be calculated; if R4 = R, then R3 = 240 / 17R can be calculated; if R6 = R, then R5 = 1280 / 91R can be calculated, where R is the unit resistance value.

[0042] However, in practical applications, resistors with proportional relationships are generally realized by using resistors of the same resistance value in series and / or in parallel. Therefore, it is almost impossible to match the proportional relationship of the above-mentioned resistance values ​​R1:R2:R3:R4:R5:R6=16:1:240 / 17:1:1280 / 91:1. If the resistors are matched according to this proportional relationship, a large amount of layout area will inevitably be consumed, and the overall power consumption of the circuit will be increased, which will cause the linearity and accuracy of the 16-bit digital / analog conversion to be out of control.

[0043] In view of this, the ratio of the resistance value R1 of the first resistor R1 and the resistance value R2 of the second resistor R2 can be set to an integer, the ratio of the resistance value R3 of the third resistor R3 and the resistance value R4 of the fourth resistor R4 can be set to an integer, and the ratio of the resistance value of the fifth resistor R5 and the resistance value of the sixth resistor R6 can be set to an integer. At the same time, R1, R2, R3, R4, R5 and R6 satisfy formulas (1.5) to (1.7). The first fine-tuning resistor R3', the second fine-tuning resistor R4', the third fine-tuning resistor R5' and the fourth fine-tuning resistor R6' are set to compensate for the problem of decreased accuracy caused by setting the proportional relationship of the resistance values ​​of the above-mentioned resistors to integers.

[0044] For example, the resistance value R1 of the first resistor R1, the resistance value R2 of the second resistor R2, the resistance value R3 of the third resistor R3, the resistance value R4 of the fourth resistor R4, the resistance value R5 of the fifth resistor R5 and the resistance value R6 of the sixth resistor R6 can satisfy R1:R2:R3:R4:R5:R6=15:1:14:1:14:1, and the following can be obtained:

[0045]

[0046] Rewriting formula (1.8), we can get:

[0047]

[0048] Comparing formula (1.9) with formula (1.1), it is not difficult to obtain: The coefficients on the right side of formula (1.9) do not strictly follow the ratio of 4069:256:16:1 to assign different weights to the output voltages of the four digital / analog converters, but the resistor matching method becomes easier to implement. In order to eliminate the weight deviation caused by the increase in resolution, fine-tuning resistors R3', R4', R5' and R6' are introduced for focused ion beam (FIB) adjustment, so that R1: R2: (R3'+R3): (R4'+R4): (R5'+R5): (R6'+R6) = 15: 1: 225 / 16: 1: 225 / 16: 1, so the final digital / analog conversion will have higher accuracy. Wherein, R3' is the resistance value of the fine-tuning resistor R3', R4' is the resistance value of the fine-tuning resistor R4', R5' is the resistance value of the fine-tuning resistor R5', and R6' is the resistance value of the fine-tuning resistor R6'.

[0049] In practical applications, the final resistance value can be made close to the above ratio. For example, the resistance value obtained by fine-tuning satisfies R1:R2:(R3'+R3):(R4'+R4):(R5'+R5):(R6'+R6)=15:1:(14.0615-14.0635):1:(14.0615-14.0635):1.

[0050] To summarize, in the embodiment of the present application, branches of a second digital / analog converter, a third digital / analog converter and a fourth digital / analog converter having an output resolution of 4 bits are connected in parallel to the output circuit of a first digital / analog converter having an output resolution of 4 bits to construct a digital / analog conversion circuit having an output resolution of 16 bits. Resistors are set in the circuit to adjust the output weights of each digital / analog converter, and fine-tuning resistors are added in the circuit to adjust the problem of decreased accuracy of each resistor due to the resistance value being an integer multiple of the potential resistance value, thereby achieving easy matching while ensuring high-precision output.

[0051] Exemplarily, the output voltage range of the first digital / analog converter DAC0 is set to 0 volts to 40 / 17 volts, the output voltage range of the second digital / analog converter DAC1 is set to 0 volts to 2.5 volts, the output voltage range of the third digital / analog converter DAC2 is set to 0 volts to 2.5 volts, and the output voltage range of the fourth digital / analog converter DAC3 is set to 0 volts to 2.5 volts, and the input-output relationship (typical value) of the digital / analog conversion circuit without trimming resistor adjustment is shown in Table 1 below:

[0052] Table 1

[0053] Digital Input Output voltage 0000 0000 0000 0000 0 0000 0000 0000 0001 38.447 microvolts (μV) …… …… 0000 0000 0000 1111 576.710 microvolts 0000 0000 0001 0000 615.157 microvolts 0000 0000 0001 0001 653.604 microvolts …… …… 0000 0000 1111 1111 9.804072 millivolts (mV) 0000 0001 0000 0000 9.801509 mV 0000 0001 0000 0001 9.839956 mV …… …… 0000 1111 1111 1111 156.865157 mV 0001 0000 0000 0000 156.208989 mV 0001 0000 0000 0001 156.247436 mV …… …… 1111 1111 1111 1111 2.5 volts

[0054] On this basis, the error of 16-bit digital / analog conversion can be reduced by using fine-tuning resistors for FIB trimming, ultimately making the digital / analog conversion circuit have higher linearity.

[0055] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection created by this application.

Claims

1. A digital / analog conversion circuit, characterized in that: include: a first digital / analog converter, wherein an output terminal of the first digital / analog converter is connected to a first terminal of a first resistor; a second digital / analog converter, wherein an output end of the second digital / analog converter is connected to a first end of a second resistor, a second end of the first resistor and a second end of the second resistor are connected to a first end of a first fine-tuning resistor, and a second end of the first fine-tuning resistor is connected to a first end of a third resistor; a third digital / analog converter, wherein an output end of the third digital / analog converter is connected to a first end of a second fine-tuning resistor, a second end of the second fine-tuning resistor is connected to a first end of a fourth resistor, a second end of the third resistor and a second end of the fourth resistor are connected to a first end of the third fine-tuning resistor, and a second end of the third fine-tuning resistor is connected to a first end of a fifth resistor; a fourth digital / analog converter, wherein the output end of the fourth digital / analog converter is connected to the first end of a fourth fine-tuning resistor, the second end of the fourth fine-tuning resistor is connected to the first end of a sixth resistor, the second end of the fifth resistor and the second end of the sixth resistor are connected to the positive input end of an operational amplifier, and the negative input end of the operational amplifier is connected to the output end thereof; Among them, the output resolution of the first digital / analog converter, the second digital / analog converter, the third digital / analog converter and the fourth digital / analog converter is 4 bits, and the output resolution of the digital / analog conversion circuit is 16 bits.

2. The circuit according to claim 1, characterized in that The output voltage ranges of the second digital / analog converter, the third digital / analog converter and the fourth digital / analog converter are the same.

3. The circuit according to claim 2, characterized in that An output voltage range of the first digital / analog converter is smaller than an output voltage range of the second digital / analog converter, the third digital / analog converter, and the fourth digital / analog converter.

4. The circuit according to any one of claims 1 to 3, characterized in that: Resistance values ​​of the first resistor, the second resistor, the third resistor, the fourth resistor, the fifth resistor, and the sixth resistor are integer multiples of a unit resistance value.

5. The circuit according to claim 4, characterized in that The ratio of the resistance value of the first resistor to the resistance value of the second resistor is an integer, the ratio of the resistance value of the third resistor to the resistance value of the fourth resistor is an integer, and the ratio of the resistance value of the fifth resistor to the resistance value of the sixth resistor is an integer.

6. The circuit according to claim 5, characterized in that The first fine-tuning resistor, the second fine-tuning resistor, the third fine-tuning resistor and the fourth fine-tuning resistor are used to compensate for the accuracy of the digital / analog conversion circuit.

7. The circuit according to claim 6, characterized in that The resistance values ​​of the second resistor, the fourth resistor and the sixth resistor are equal.

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