Multi-channel integrated radio frequency microsystem supporting fast frequency hopping

Abstract

The invention discloses a multichannel comprehensive radio frequency microsystem supporting fast frequency hopping, a multichannel receiving module, a transmitting module, a fast frequency hopping source, a processor SOC and an external interface IO are integrated in the multichannel comprehensive radio frequency microsystem, and the multichannel receiving module comprises an amplitude limiter, a power divider, a first balun 1, a second balun 2, a third balun 3, a fourth balun 4, a first transceiver chip 1 and a second transceiver chip 2. The transmitting module comprises a third transceiver chip 3, a fifth balun 5, a low noise amplifier and a first filter 1. The invention has the advantages of miniaturization, generalization, reconfiguration and the like, and can be widely applied to the field of wireless communication.

Description

Technical Field

[0001] The invention belongs to the technical field of wireless communications, and in particular relates to a multi-channel integrated radio frequency microsystem supporting fast frequency hopping. Background Art

[0002] In the prior art, the RF system usually adopts a hardware link discrete design, that is, the RF preprocessing, signal processing, digital interface and other links are implemented independently, which has the disadvantages of low integration, high power consumption, high cost, poor reliability and maintainability, and does not support built-in fast frequency modulation source (mostly implemented by external DDS or multi-channel PLL switching), and has defects such as excessive system spurious and large frequency switching delay. Summary of the invention

[0003] The purpose of the invention is to provide a multi-channel integrated radio frequency microsystem that supports fast frequency hopping. It is based on radio frequency digital integrated design, has excellent anti-band interference, anti-multipath fading, and anti-interception capabilities, and achieves the advantages of miniaturization, generalization, and reconfigurability, and can be widely used in the field of wireless communications.

[0004] The object of the present invention is achieved through the following technical solutions:

[0005] A multi-channel integrated radio frequency microsystem supporting fast frequency hopping, which internally integrates a multi-channel receiving module, a transmitting module, a fast hopping frequency source, a processor SOC, and an external interface IO;

[0006] The multi-channel receiving module includes a limiter, a power divider, a first balun 1, a second balun 2, a third balun 3, a fourth balun 4, a first transceiver chip 1 and a second transceiver chip 2. When receiving a signal, the RF signal is divided into four paths after passing through the limiter and the power divider in sequence, and enters the first balun 1, the second balun 2, the third balun 3, and the fourth balun 4 respectively, and then enters the first transceiver chip 1 or the second transceiver chip 2. After the first transceiver chip 1 and the second transceiver chip 2 down-convert and sample the RF signal, they are sent to the processor SOC for signal processing, and the processed service data is transmitted to the external system through the external interface IO;

[0007] The transmitting module includes a third transceiver chip 3, a fifth balun 5, a low noise amplifier and a first filter 1. When the signal is transmitted, the processor SOC generates a transmitting signal baseband data and sends it to the third transceiver chip 3. After the baseband signal is digital-to-analog converted and up-converted to the RF frequency band by the third transceiver chip 3, it is amplified and filtered by the fifth balun 5, the low noise amplifier and the first filter 1 in turn and then transmitted to the external RF signal transmission system. At the same time, the fast hopping frequency source provides a local oscillator reference signal for the third transceiver chip 3.

[0008] Furthermore, the processor SOC parses external control information, adjusts the processing algorithm and working mode, and controls the frequency of the fast hopping frequency source according to the control instructions. The local oscillator reference signal output by the fast hopping frequency source is provided to the third transceiver chip 3 after passing through the second filter 2 and the sixth balun 6.

[0009] Preferably, the first transceiver chip 1, the second transceiver chip 2, and the third transceiver chip 3 use zero intermediate frequency transceiver chips, the low noise amplifier uses a broadband low noise amplifier, the first filter 1 and the second filter 2 use broadband low pass filters, and the fast hopping frequency source uses a high speed DDS chip.

[0010] Furthermore, a clock circuit is also integrated, and the clock circuit includes a first local reference clock 1, a second local reference clock 2, a clock detection circuit, a clock distribution circuit, a phase-locked loop circuit and a switch; the local reference clock 1 provides a reference clock for the general processor end of the processor SOC; the clock detection circuit detects the external clock input signal, and when the external clock signal input is detected, the switch is connected to the external clock signal, otherwise, the switch is connected to the second local reference clock 2; the clock distribution circuit distributes the connected external clock signal or the clock signal of the second local reference clock 2 to the programmable logic end of the processor SOC, the phase-locked loop circuit, and the third transceiver chip 3; the phase-locked loop circuit performs frequency synthesis with reference to the clock signal to provide a high-speed reference for the fast-hopping frequency source.

[0011] Preferably, the phase-locked loop circuit uses a high-frequency phase-locked loop chip, the clock distribution circuit uses a multi-channel clock distribution chip, the switch uses a single-pole double-throw switch, and the clock detection circuit uses a detector and a comparator.

[0012] Furthermore, a power conversion circuit is integrated, and the power conversion circuit converts the external power supply into various power supplies required internally.

[0013] The beneficial effects of the present invention are:

[0014] Traditional microsystem packaging uses PLL switching inside a single chip to achieve frequency hopping function, but its switching speed is limited and is not suitable for burst reception and tracking scenarios. The present invention integrates a fast frequency hopping source based on a high-speed DAC, and the frequency switching time can reach nanoseconds with low spurious.

[0015] The present invention adopts a digital RF integrated design, and replaces the discrete RF circuit in the prior art by integrating multiple RF transceiver chips, amplification, frequency conversion, filtering, and sampling functional circuits; in addition, a processor SOC is integrated at the signal processing end to provide programmable logic resources and general processing resources, which can complete circuit control and signal processing functions, saving circuit control chips in traditional RF systems.

[0016] The present invention integrates a radio frequency transceiver chip and a processor SOC to replace discrete devices, and integrates digital and radio frequency designs to achieve miniaturization.

[0017] The RF transceiver chip can be configured to the working mode required by the system. The processor SOC has programmable logic resources and general processing resources, and is equipped with a fast frequency hopping source. It can be configured according to the communication standard to achieve universality and reconfiguration. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 Architectural diagram of a multi-channel integrated RF microsystem supporting fast frequency hopping.

[0019] Figure 2 Detailed scheme of a multi-channel integrated RF microsystem supporting fast frequency hopping. DETAILED DESCRIPTION

[0020] The present invention is further described in detail below in conjunction with the accompanying drawings and embodiments.

[0021] See also Figure 1 As shown in the figure, a multi-channel integrated RF microsystem supporting fast frequency hopping is realized based on the RF digital integration design method to realize a miniaturized, universal and reconfigurable integrated RF microsystem. It integrates a multi-channel receiving module, a transmitting module, a fast hopping frequency source, a clock circuit, a processor SOC, DDR, Flash and external interface IO, etc.

[0022] The multi-channel receiving module includes a limiter, a power divider, a first balun 1, a second balun 2, a third balun 3, a fourth balun 4, a first transceiver chip 1 and a second transceiver chip 2. When receiving a signal, the RF signal is divided into four paths after passing through the limiter and the power divider in sequence, and enters the first balun 1, the second balun 2, the third balun 3, and the fourth balun 4 respectively, and then enters the first transceiver chip 1 or the second transceiver chip 2. After the first transceiver chip 1 and the second transceiver chip 2 down-convert and sample the RF signal, they are sent to the processor SOC for signal processing, and the processed business data is transmitted to the external system via the bus. The limiter protects the subsequent circuit to prevent it from being burned by high-power signals. The receiving channel is divided into four paths, which can realize the simultaneous reception of four different frequency band signals.

[0023] The transmitting module includes a third transceiver chip 3, a fifth balun 5, a low noise amplifier and a first filter 1. When transmitting a signal, the processor SOC generates a transmitting signal baseband data and sends it to the third transceiver chip 3. After the baseband signal is digital-to-analog converted and up-converted to the RF frequency band by the third transceiver chip 3, it is amplified and filtered by the fifth balun 5, the low noise amplifier and the first filter 1 in turn and then transmitted to the external RF signal transmission system. At the same time, the fast hopping frequency source provides a local oscillator reference signal for the third transceiver chip 3.

[0024] The processor SOC adjusts the processing algorithm and working mode by analyzing the external control information, and controls the frequency of the fast hopping frequency source according to the control instruction. The local oscillator reference signal output by the fast hopping frequency source is provided to the third transceiver chip 3 after passing through the second filter 2 and the sixth balun 6.

[0025] The clock circuit includes a first local reference clock 1, a second local reference clock 2, a clock detection circuit, a clock distribution circuit, a phase-locked loop circuit and a switch. The local reference clock 1 provides a reference clock for the general processor end of the processor SOC. The clock detection circuit detects an external clock input signal. When the external clock signal input is detected, the switch is connected to the external clock signal, otherwise, the switch is connected to the second local reference clock 2. The clock distribution circuit distributes the connected external clock signal or the clock signal of the second local reference clock 2 to the programmable logic end of the processor SOC, the phase-locked loop circuit, and the third transceiver chip 3. The phase-locked loop circuit performs frequency synthesis with reference to the clock signal to provide a high-speed reference for the fast-hopping frequency source.

[0026] refer to Figure 2 As shown, as an example, the limiter limits the output power ≤6dBm, the power divider uses four power dividers, the first balun 1, the second balun 2, the third balun 3, and the fourth balun 4 use 50Ω broadband 1:1 baluns, the fifth balun 5 and the sixth balun 6 use 50Ω broadband 1:2 baluns, the first transceiver chip 1, the second transceiver chip 2, and the third transceiver chip 3 use zero intermediate frequency transceiver chips, the low noise amplifier uses a broadband low noise amplifier, the first filter 1 and the second filter 2 use broadband low-pass filters, the fast jump frequency source uses a high-speed DDS chip, the phase-locked loop circuit uses a high-frequency phase-locked loop chip, the clock distribution circuit uses a multi-channel clock distribution chip, the switch uses a single-pole double-throw switch, the clock detection circuit uses a detector and a comparator to implement, the first local reference clock 1 uses a 33.3333MHz crystal oscillator, the second local reference clock 2 uses a 40MHz crystal oscillator, the processor SOC uses an integrated processing chip, the Flash uses a 512Mb capacity, and the DDR3 uses a 4Gb capacity.

[0027] The external interface uses differential discrete lines, single-ended discrete lines, GTX, Ethernet, CAN, SPI, SDIO, UART, I2C expansion interface, and JTAG debugging port.

[0028] The power conversion circuit converts the external 12V DC power supply into the internally required 0.75V, 1V, 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V DC power supplies.

[0029] The implementation indicators are as follows:

[0030] 1) RF transceiver frequency: 70MHz~2700MHz;

[0031] 2) Number of channels: 4 receive and 1 transmit;

[0032] 3) Channel bandwidth: 20KHz~60MHz;

[0033] 4) Frequency hopping rate: ≤3μs;

[0034] 5) Maximum main frequency of integrated processing chip general processor: 800MHz;

[0035] 6) Integrated processing chip programmable logic resources: 444K programmable logic units;

[0036] 7) Storage capacity:

[0037] DDR3: 4Gb;

[0038] Nor Flash: 512Mb;

[0039] It is understandable that those skilled in the art can make equivalent substitutions or changes based on the technical solution and inventive concept of the present invention, and all these changes or substitutions should fall within the protection scope of the claims attached to the present invention.

Claims

1. A multi-channel integrated radio frequency microsystem supporting fast frequency hopping, which internally integrates a multi-channel receiving module, a transmitting module, a fast frequency hopping source, a processor SOC, and an external interface IO, characterized in that: The multi-channel receiving module includes a limiter, a power divider, a first balun 1, a second balun 2, a third balun 3, a fourth balun 4, a first transceiver chip 1 and a second transceiver chip 2. When receiving a signal, the RF signal is divided into four paths after passing through the limiter and the power divider in sequence, and enters the first balun 1, the second balun 2, the third balun 3, and the fourth balun 4 respectively, and then enters the first transceiver chip 1 or the second transceiver chip 2. After the first transceiver chip 1 and the second transceiver chip 2 down-convert and sample the RF signal, they are sent to the processor SOC for signal processing, and the processed service data is transmitted to the external system through the external interface IO; The transmitting module includes a third transceiver chip 3, a fifth balun 5, a low noise amplifier and a first filter 1. When the signal is transmitted, the processor SOC generates a transmitting signal baseband data and sends it to the third transceiver chip 3. After the baseband signal is digital-to-analog converted and up-converted to the RF frequency band by the third transceiver chip 3, it is amplified and filtered by the fifth balun 5, the low noise amplifier and the first filter 1 in turn and then transmitted to the external RF signal transmission system. At the same time, the fast hopping frequency source provides a local oscillator reference signal for the third transceiver chip 3.

2. A multi-channel integrated radio frequency microsystem supporting fast frequency hopping according to claim 1, characterized in that: The processor SOC parses external control information, adjusts the processing algorithm and working mode, and controls the frequency of the fast hopping frequency source according to the control instructions. The local oscillator reference signal output by the fast hopping frequency source is provided to the third transceiver chip 3 after passing through the second filter 2 and the sixth balun 6.

3. A multi-channel integrated radio frequency microsystem supporting fast frequency hopping according to claim 1, characterized in that The first transceiver chip 1, the second transceiver chip 2, and the third transceiver chip 3 use zero intermediate frequency transceiver chips, the low noise amplifier uses a broadband low noise amplifier, the first filter 1 and the second filter 2 use broadband low pass filters, and the fast hopping frequency source uses a high speed DDS chip.

4. A multi-channel integrated radio frequency microsystem supporting fast frequency hopping according to claim 1, characterized in that A clock circuit is also integrated, the clock circuit comprising a first local reference clock 1, a second local reference clock 2, a clock detection circuit, a clock distribution circuit, a phase-locked loop circuit and a switch; The local reference clock 1 provides a reference clock for the general processor end of the processor SOC; The clock detection circuit detects an external clock input signal. When an external clock signal input is detected, the switch is connected to the external clock signal. Otherwise, the switch is connected to the second local reference clock 2. The clock distribution circuit distributes the connected external clock signal or the clock signal of the second local reference clock 2 to the programmable logic end of the processor SOC, the phase-locked loop circuit, and the third transceiver chip 3; the phase-locked loop circuit references the clock signal for frequency synthesis to provide a high-speed reference for the fast-hopping frequency source.

5. A multi-channel integrated radio frequency microsystem supporting fast frequency hopping according to claim 4, characterized in that The phase-locked loop circuit uses a high-frequency phase-locked loop chip, the clock distribution circuit uses a multi-channel clock distribution chip, the switch uses a single-pole double-throw switch, and the clock detection circuit uses a detector and a comparator.

6. A multi-channel integrated radio frequency microsystem supporting fast frequency hopping according to claim 1, characterized in that A power conversion circuit is also integrated, which converts external power into various power supplies required internally.

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