Photoelectric detector and manufacturing method thereof
By forming a doped semiconductor layer on the germanium absorption layer of the germanium silicon photodetector and introducing tensile stress, the problems of low response in the L-band and insufficient 3dB bandwidth are solved, and ultra-high-speed optical signal transmission is achieved .
Patent Information
- Application Number
- CN202411461136.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-18
- Publication Date
- 2025-02-07
AI Technical Summary
The existing silicon germanium photodetectors have low responsiveness in the L-band and insufficient 3dB bandwidth, making it difficult to achieve ultra-high-speed optical signal transmission.
By forming a semiconductor layer with a second doped on the germanium absorbing layer of the photodetector, a vertical PIN structure is formed, and a tensile stress is introduced on the surface of the germanium absorbing layer, the size of the germanium absorbing layer is reduced to improve the response speed.
It effectively improves the responsiveness of the photodetector in the L-band and increases the bandwidth of 3dB, making the photodetector have an ultra-high-speed response speed.
Smart Images
Figure CN119403246A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present disclosure relate to the technical field of photoelectric detectors, and in particular, to a photoelectric detector and a method for manufacturing the same. Background Art
[0002] Modern fiber-optic communication technology has achieved ultra-high-speed transmission over long distances and with large capacity. In each network node of the fiber-optic communication system, the integration and miniaturization of optical modules has become a major trend. At the same time, optical interconnection technology based on silicon photonics has the characteristics of low latency, low power consumption, and large capacity, and has gradually become an alternative to traditional electrical interconnection technology in large data centers and high-performance computers. Silicon-based photodetectors can convert optical signals into electrical signals and are one of the core components of silicon photonic chips, with broad application prospects. Summary of the invention
[0003] In view of this, an embodiment of the present disclosure provides a photodetector and a method for manufacturing the same.
[0004] To achieve the above objectives, the technical solution of the present disclosure is implemented as follows:
[0005] In a first aspect, an embodiment of the present disclosure provides a photodetector, the photodetector comprising:
[0006] A substrate, wherein a surface of the substrate is a waveguide layer having a first doping layer;
[0007] A germanium absorption layer and a semiconductor layer with a second doping layer are sequentially stacked on the substrate; the waveguide layer, the germanium absorption layer and the semiconductor layer form a vertical PIN structure;
[0008] The length of the germanium absorption layer in the first direction is smaller than the length of the semiconductor layer in the first direction; the first direction is perpendicular to the transmission direction of the optical signal and perpendicular to the stacking direction.
[0009] In some embodiments, a groove is disposed on the surface of the waveguide layer, and at least a portion of the germanium absorption layer is located in the groove.
[0010] In some embodiments, the germanium absorption layer has a first side and a second side opposite to each other in the first direction; the waveguide layer includes a first waveguide located on the first side and a second waveguide located on the second side; a first gap is provided between the first waveguide and the germanium absorption layer, and a second gap is provided between the second waveguide and the germanium absorption layer; the first waveguide and the second waveguide are used to couple the optical signal received by the photodetector to the germanium absorption layer via the first gap and the second gap, respectively.
[0011] In some embodiments, a length of the germanium absorption layer along the first direction is less than or equal to a first threshold, and a length of the germanium absorption layer along the stacking direction is less than or equal to a second threshold.
[0012] In some embodiments, the thermal expansion coefficient of the germanium absorber layer is different from the thermal expansion coefficient of the semiconductor layer.
[0013] In some embodiments, the material of the semiconductor layer includes polysilicon.
[0014] In some embodiments, the substrate further includes a stacked silicon substrate layer and a buried oxide layer, and the waveguide layer is located on the buried oxide layer.
[0015] In a second aspect, an embodiment of the present disclosure provides a method for manufacturing a photoelectric detector, the method for manufacturing the photoelectric detector comprising:
[0016] Providing a substrate, wherein a surface of the substrate is a waveguide layer having a first doping layer;
[0017] A germanium absorption layer and a semiconductor layer with a second doping are sequentially stacked on the substrate; the waveguide layer, the germanium absorption layer and the semiconductor layer form a vertical PIN structure;
[0018] The length of the germanium absorption layer in the first direction is smaller than the length of the semiconductor layer in the first direction; the first direction is perpendicular to the transmission direction of the optical signal and perpendicular to the stacking direction.
[0019] In some embodiments, the step of sequentially stacking a germanium absorption layer and a semiconductor layer having a second doping layer on the substrate comprises:
[0020] forming an oxide layer on the substrate;
[0021] Etching and removing a portion of the waveguide layer and the oxide layer along the stacking direction to form a first groove penetrating the oxide layer and extending into the waveguide layer;
[0022] forming the germanium absorption layer in the first groove;
[0023] The semiconductor layer is formed on the germanium absorption layer.
[0024] In some embodiments, forming the semiconductor layer on the germanium absorption layer includes:
[0025] Removing part of the oxide layer located on the side wall of the first groove to form a second groove; the top area of the second groove is larger than the top area of the first groove;
[0026] Depositing a semiconductor material in the second groove and on the germanium absorption layer to form a semiconductor material layer;
[0027] Performing a second doping on the semiconductor material layer;
[0028] The semiconductor material layer is subjected to high temperature annealing to form a semiconductor layer.
[0029] In some embodiments, a length of the germanium absorption layer along the first direction is less than or equal to a first threshold, and a length of the germanium absorption layer along the stacking direction is less than or equal to a second threshold.
[0030] In some embodiments, the thermal expansion coefficient of the germanium absorber layer is different from the thermal expansion coefficient of the semiconductor layer.
[0031] In some embodiments, the material of the semiconductor layer includes polysilicon.
[0032] The disclosed embodiment provides a photodetector, which includes: a substrate, the surface of which is a waveguide layer with a first doping; a germanium absorption layer and a semiconductor layer with a second doping stacked on the substrate in sequence; the waveguide layer, the germanium absorption layer and the semiconductor layer constitute a vertical PIN structure; wherein the length of the germanium absorption layer in the first direction is less than the length of the semiconductor layer in the first direction; the first direction is perpendicular to the transmission direction of the optical signal and perpendicular to the stacking direction. In the disclosed embodiment, a semiconductor layer with a second doping is formed on the germanium absorption layer, and the semiconductor layer can be used to provide tensile stress to the surface of the germanium absorption layer, thereby effectively improving the responsivity of the photodetector in the L band. The semiconductor layer, as a doping layer, forms a vertical PIN structure together with the waveguide layer and the germanium absorption layer, which is conducive to reducing the height of the germanium absorption layer in the stacking direction. At the same time, the length of the germanium absorption layer in the first direction is designed to be less than the length of the semiconductor layer in the first direction, ensuring that even if the germanium absorption layer has an ultra-small size in the first direction, the metal electrode can achieve a stable connection with the semiconductor layer. In this way, the germanium absorption layer can be designed to have an ultra-small size in the first direction and the stacking direction, thereby effectively improving the response speed of the photodetector in the L band. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] Figure 1 The structure of the photodetector provided in the embodiment of the present disclosure is shown in FIG. Figure 1 ;
[0034] Figure 2 The structure of the photodetector provided in the embodiment of the present disclosure is shown in FIG. Figure 2 ;
[0035] Figure 3 A flow chart of a method for manufacturing a photodetector provided in an embodiment of the present disclosure;
[0036] 4A to 4DA step diagram of a method for manufacturing a photodetector provided in an embodiment of the present disclosure. DETAILED DESCRIPTION
[0037] The following will be combined with the embodiments of the present disclosure and the accompanying drawings to clearly and completely describe the technical solutions in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.
[0038] In the following description, a large number of specific details are given to provide a more thorough understanding of the present disclosure. However, it is obvious to those skilled in the art that the present disclosure can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present disclosure, some technical features known in the art are not described; that is, all features of actual embodiments are not described here, and well-known functions and structures are not described in detail.
[0039] In the drawings, the sizes of layers, regions, elements and their relative sizes may be exaggerated for clarity. Like reference numerals denote like elements throughout.
[0040] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present disclosure, the first element, component, region, layer or part discussed below can be represented as the second element, component, region, layer or part. And when the second element, component, region, layer or part is discussed, it does not indicate that the present disclosure necessarily has the first element, component, region, layer or part.
[0041] Spatially relative terms such as "under", "beneath", "below", "under", "above", "above", etc., may be used here for convenience of description to describe the relationship between an element or feature shown in the figure and other elements or features. It should be understood that in addition to the orientation shown in the figure, the spatial relationship terms are intended to also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is turned over, then the elements or features described as "under other elements" or "under it" or "under it" will be oriented as "on" other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device can be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.
[0042] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be a limitation of the present disclosure. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.
[0043] In order to thoroughly understand the present disclosure, detailed steps and detailed structures will be presented in the following description to illustrate the technical solution of the present disclosure. The preferred embodiments of the present disclosure are described in detail below, but in addition to these detailed descriptions, the present disclosure may also have other implementations.
[0044] There are two main types of silicon-based photodetectors used for high-speed integration: one is the germanium-silicon photodetector that is compatible with CMOS technology, and the other is the III-V group photodetector that uses heterogeneous integration. Thanks to the development of silicon-based germanium material epitaxial technology, germanium-silicon photodetectors are widely used in silicon photonic integration, and waveguide-type PIN-structured germanium-silicon photodetectors have become their mainstream structure.
[0045] In response to the demand for massive data in the development of optical interconnection services in data centers, with the goals of ultra-high speed, large capacity and large bandwidth, in the application of coherent optical communication receivers, how to achieve ultra-high-speed germanium silicon photodetectors covering higher bands has become an urgent problem to be solved.
[0046] In the germanium silicon photodetector, the material of the light absorption layer used to absorb light is germanium. Hereinafter, the light absorption layer will be collectively referred to as the germanium absorption layer. Since germanium is an indirect bandgap semiconductor material, its absorption of light in the wavelength band above 1550nm will be significantly reduced. As a result, the responsivity of the germanium silicon photodetector in the L band (wavelength 1565nm~1625nm) is sharply reduced. In order to improve the responsivity of the germanium silicon photodetector and realize a germanium silicon photodetector covering the C+L band, the following solutions can be adopted.
[0047] The details are as follows:
[0048] 1. Use the Franz-Keldysh effect produced by germanium materials under high electric field strength to improve the absorption efficiency of germanium in the long wavelength direction, thereby improving the responsivity of germanium silicon photodetectors. Here, the Franz-Keldysh effect refers to the effect that the light absorption of semiconductors changes when an electric field is applied.
[0049] In one example, a high voltage can be added to the germanium absorption layer to directly increase the internal field strength of the germanium absorption layer, thereby increasing the absorption efficiency of germanium in the long wavelength direction, and further increasing the responsivity of the germanium silicon photodetector. However, the power supply voltage used to power the optical chip in the actual optical communication chip is generally fixed at 3.3V and is not easy to change. Therefore, this method is difficult to implement.
[0050] In another example, a doping region with a high concentration difference can be formed inside the germanium absorption layer, so that a higher internal field strength of the germanium absorption layer can be achieved even at a lower bias voltage. This solution requires a special doping design for the germanium absorption layer.
[0051] 2. Adding tensile strain to the surface of the germanium absorption layer can redshift the optical absorption edge of germanium, thereby improving the absorption efficiency of germanium in the L band and further improving the responsivity of the germanium silicon photodetector.
[0052] In one example, a material with a higher lattice density can be deposited on the surface of the germanium absorption layer, for example, a layer of silicon nitride can be deposited on the surface of the germanium absorption layer. Due to the different lattice densities of the two materials, the silicon nitride deposited on the germanium absorption layer can cause a certain tensile stress to be generated on the surface of the germanium absorption layer, thereby red-shifting the optical absorption edge of germanium, thereby improving the responsivity of the germanium silicon photodetector.
[0053] In another example, a layer of semiconductor material can be deposited on the surface of the germanium absorption layer, and the semiconductor material has a different thermal expansion coefficient from germanium. After a subsequent high-temperature annealing process, a lattice mismatch phenomenon will occur at the contact interface between the semiconductor material and the germanium absorption layer. This lattice mismatch will cause the semiconductor material deposited on the germanium absorption layer to cause a certain tensile stress on the surface of the germanium absorption layer, thereby red-shifting the optical absorption edge of germanium to improve the responsivity of the germanium silicon photodetector.
[0054] On the other hand, if the germanium silicon photodetector wants to achieve ultra-high-speed detection, its 3dB bandwidth needs to be improved. In other words, by improving the 3dB bandwidth of the germanium silicon photodetector, the response speed of the germanium silicon photodetector can be improved. The following solutions can be used to improve the 3dB bandwidth.
[0055] The details are as follows:
[0056] 1. Using the Inductive Gain Peaking technology, inductors are added to the peripheral circuit structure to increase the output power attenuation caused by RC delay at high frequencies, thereby increasing the bandwidth. However, this method will cause phase group velocity delay in high-speed data transmission, resulting in dispersion.
[0057] 2. By reducing the size of the germanium absorption layer, the transit time of the photogenerated carriers in the germanium absorption layer is reduced, thereby increasing the bandwidth. This method has high requirements on the process.
[0058] An embodiment of the present disclosure provides a photodetector, which is an ultra-high-speed photodetector with high responsivity in the L band.
[0059] Before introducing the photodetector and the manufacturing method thereof provided by the embodiment of the present disclosure, various directions that may be involved in the embodiment of the present disclosure are first defined. The stacking direction is defined as the Z direction, and the X direction and the Y direction are defined in a plane perpendicular to the Z direction, and the X direction and the Y direction may intersect. In a specific embodiment, the X direction and the Y direction may be perpendicular to each other, so that the X direction, the Y direction and the Z direction are perpendicular to each other.
[0060] Figure 1 The structure of the photodetector provided in the embodiment of the present disclosure is shown in FIG. Figure 1 .like Figure 1As shown, an embodiment of the present disclosure provides a photodetector 100, which includes: a substrate 101, a surface of the substrate 101 is a waveguide layer 102 with a first doping; a germanium absorption layer 103 and a semiconductor layer 104 with a second doping are sequentially stacked on the substrate 101; the waveguide layer 102, the germanium absorption layer 103 and the semiconductor layer 104 form a vertical PIN structure; wherein the length of the germanium absorption layer 103 in the first direction is less than the length of the semiconductor layer 104 in the first direction; the first direction is perpendicular to the transmission direction of the optical signal and perpendicular to the stacking direction.
[0061] In some embodiments of the present disclosure, the substrate 101 may be a silicon on insulator (SOI) substrate. In other embodiments of the present disclosure, the substrate 101 may be a substrate including a bulk silicon substrate. The substrate 101 includes a waveguide layer 102, and the waveguide layer 102 is located on the surface of the substrate 101. In some embodiments, the material of the waveguide layer 102 includes silicon. The waveguide layer 102 has a first doping to form a first doping region on the surface of the waveguide layer 102. The first doping region may be a P-type doping region or an N-type doping region. Among them, the doping elements of the P-type doping region include boron, gallium, etc., and the doping elements of the N-type doping region include phosphorus, arsenic, etc. Figure 1 The illustrated first doped region is a P-type doped region.
[0062] The germanium absorption layer 103 is located on the substrate 101 and contacts the first doped region of the substrate 101. Here, the material of the germanium absorption layer 103 includes a single germanium. In the embodiment of the present disclosure, the germanium absorption layer 103 does not have ion doping, and the germanium absorption layer 103 can be used as an intrinsic region in the PIN structure.
[0063] The semiconductor layer 104 is located on the germanium absorption layer 103 and covers the surface of the germanium absorption layer 103. In the embodiment of the present disclosure, the material of the semiconductor layer 104 includes but is not limited to polysilicon. In some embodiments, the thickness of the semiconductor layer 104 can be between 200nm and 300nm. The semiconductor layer 104 has a second doping to form a second doping region in the semiconductor layer 104. The second doping region can be a P-type doping region or an N-type doping region, and the second doping region has a different doping type from the first doping region. In other words, when the first doping region is a P-type doping region, the second doping region is an N-type doping region, and vice versa. Figure 1The second doped region shown is an N-type doped region. Here, the second doped region can extend from the top of the semiconductor layer 104 to the bottom of the semiconductor layer 104 in the Z direction to achieve contact between the second doped region and the germanium absorption layer 103. At this time, the waveguide layer 102, the germanium absorption layer 103 and the semiconductor layer 104 together form a vertical PIN structure. Specifically, the first doped region in the waveguide layer 102, the intrinsic region in the germanium absorption layer 103 and the second doped region in the semiconductor layer 104 together form a vertical PIN structure.
[0064] It should be noted that, usually, in the manufacturing process of the photodetector, a method of performing ion implantation on the germanium absorption layer to form a second doped region on the surface of the germanium absorption layer is often used to obtain a vertical PIN structure. However, it is difficult to control the depth of ion implantation using this method, which makes it difficult to determine the thickness of the undoped intrinsic region in the germanium absorption layer. In the embodiment of the present disclosure, ion implantation is performed on the semiconductor layer 104 so that the second doped region is formed in the semiconductor layer 104 rather than in the germanium absorption layer 103. In this way, the thickness of the intrinsic region can be directly determined according to the thickness of the germanium absorption layer 103 in the Z direction. In addition, since the germanium absorption layer 103 only includes the intrinsic region and does not include the second doped region located on the intrinsic region, the germanium absorption layer 103 can be designed to have a smaller thickness in the Z direction. In this way, it is beneficial to reduce the transit time of carriers in the germanium absorption layer 103 to improve the 3dB bandwidth of the photodetector 100.
[0065] In the embodiment of the present disclosure, the first direction is defined as the X direction, the transmission direction of the optical signal is defined as the Y direction, and the X direction is perpendicular to the Y direction. Figure 1As shown, the length of the germanium absorption layer 103 in the X direction is less than the length of the semiconductor layer 104 in the X direction. In the embodiment of the present disclosure, during the manufacturing process of the photodetector 100, after the PIN structure is formed, it is necessary to prepare a metal electrode 105 for realizing the electrical connection between the PIN structure and the external circuit. The metal electrode 105 includes a first metal electrode 105a and a second metal electrode 105b located on the first doping region, and a third metal electrode 105c located on the second doping region. Among them, the first metal electrode 105a and the second metal electrode 105b are respectively located on two opposite sides of the germanium absorption layer 103 in the X direction. It should be noted that, with the current technology node in the industry, the size of the first metal electrode 105a, the second metal electrode 105b and the third metal electrode 105c in the X direction can be 400nm, and the size of the first metal electrode 105a, the second metal electrode 105b and the third metal electrode 105c in the X direction is difficult to be made smaller. Furthermore, it should be noted that if the third metal electrode 105c is to achieve a stable connection with the PIN structure, the size of the third metal electrode 105c in the X direction needs to be less than or equal to one-half of the size of the semiconductor layer 104 in the X direction. In other words, the size of the semiconductor layer 104 in the X direction needs to be maintained at at least 800nm. It can be understood that if the solution of forming the second doping region in the germanium absorption layer 103 is adopted, the size of the germanium absorption layer 103 in the X direction needs to be at least 800nm. Therefore, when the size of the germanium absorption layer 103 in the X direction is less than 800nm, it is difficult to lead out the electrode above the germanium absorption layer 103. In the embodiment of the present disclosure, since the second doping region is formed in the semiconductor layer 104, the length of the germanium absorption layer 103 in the X direction will not affect the connection between the PIN structure and the third metal electrode 105c. In this way, it is beneficial to reduce the length of the germanium absorption layer 103 in the X direction, effectively avoiding the problem that it is difficult to lead out the electrode when the length of the germanium absorption layer 103 in the X direction is small, thereby facilitating the improvement of the 3dB bandwidth of the photodetector 100. Based on the above, even if the length of the germanium absorption layer 103 in the X direction is smaller than the length of the semiconductor layer 104 in the X direction, the PIN structure can achieve a stable connection with the third metal electrode 105 c.
[0066] As can be seen from the foregoing, the embodiment of the present disclosure improves the 3 dB bandwidth of the photodetector 100 by designing a germanium absorption layer 103 with an ultra-small size. The following specifically describes the effect of the length of the germanium absorption layer 103 in the X direction and the thickness of the germanium absorption layer 103 in the Z direction on the 3 dB bandwidth of the photodetector 100.
[0067] In the theoretical calculation of the photodetector bandwidth, the 3 dB bandwidth of the photodetector 100 can be expressed as the following formula (1):
[0068]
[0069] Among them, f RC represents the contribution of RC delay time to 3dB bandwidth, f tr represents the contribution of the carrier transit time to the 3dB bandwidth. Here, the transit time refers to the time required for the photogenerated carriers in the intrinsic region to be generated and collected by the electrode under the action of the electric field, which is affected by the thickness of the intrinsic region and the saturation velocity of the photogenerated carriers. And, f tr It can be expressed by the following formula (2):
[0070]
[0071] Here, v is the saturation average velocity of carriers. d is the width of the intrinsic region, that is, the thickness of the germanium absorption layer 103 in the Z direction. It can be seen from the above formula that when the saturation average velocity of carriers remains unchanged, reducing the thickness of the germanium absorption layer 103 in the Z direction can improve the 3dB bandwidth of the photodetector 100. For example, when designing f RC f tr When d is reduced to 250 nm, a photodetector with a 3 dB bandwidth of 100 GHz can be obtained. The photodetector with a bandwidth of 100 GHz belongs to the category of ultra-high-speed photodetectors.
[0072] Furthermore, f RC It can be expressed by the following formula (3):
[0073]
[0074] Wherein, R represents the total equivalent resistance of the PIN structure, and C represents the total equivalent capacitance of the PIN structure. The total equivalent capacitance C includes the capacitance added between the waveguide layer 102 and the semiconductor layer 104, which can be regarded as a flat plate capacitor. The calculation formula of the flat plate capacitor is formula (4):
[0075]
[0076] It can be understood that, under the condition that other conditions remain unchanged, when the length of the germanium absorption layer 103 in the X direction decreases (corresponding to the decrease of S in the above formula), the total equivalent capacitance decreases, resulting in f RC increases, which in turn leads to an increase in the 3dB bandwidth.
[0077] It can be seen that reducing the thickness of the germanium absorption layer 103 in the Z direction and reducing the length of the germanium absorption layer 103 in the X direction are both beneficial to improving the 3 dB bandwidth of the photodetector 100 .
[0078] In the embodiment of the present disclosure, the size of the germanium absorption layer 103 in the Z direction can be designed to be very small by forming the second doping region in the semiconductor layer 104. At the same time, by controlling the size of the germanium absorption layer 103 in the X direction, the prepared photodetector 100 can have a larger bandwidth, thereby improving the response speed of the photodetector 100.
[0079] In some embodiments, the thermal expansion coefficient of the germanium absorber layer 103 is different from the thermal expansion coefficient of the semiconductor layer 104 .
[0080] In the disclosed embodiment, the thermal expansion coefficient of the germanium absorption layer 103 may be smaller than the thermal expansion coefficient of the semiconductor layer 104. In this way, the semiconductor layer 104 is formed on the germanium absorption layer 103 by utilizing the difference in thermal expansion coefficients of the two. After the semiconductor layer 104 is subjected to high temperature annealing in the subsequent process, a lattice mismatch phenomenon occurs at the contact interface between the germanium absorption layer 103 and the semiconductor layer 104. This lattice mismatch forms tensile stress at the contact interface between the two, thereby facilitating the red shift of the absorption optical sideband of germanium and improving the responsivity of the photodetector 100 in the L band.
[0081] In some embodiments, the material of the semiconductor layer 104 includes polysilicon.
[0082] like Figure 1 As shown, in some embodiments, the substrate 101 further includes a stacked silicon substrate layer 106 and a buried oxide layer 107, and the waveguide layer 102 is located on the buried oxide layer 107. The material of the silicon substrate layer 106 includes silicon, and the material of the buried oxide layer 107 includes silicon dioxide (SiO2). The waveguide layer 102 covers the surface of the buried oxide layer 107.
[0083] In some embodiments, a groove 108 is disposed on the surface of the waveguide layer 102 , and at least a portion of the germanium absorption layer 103 is located in the groove 108 .
[0084] In the embodiment of the present disclosure, at least a portion of the germanium absorption layer 103 is located in the groove 108, which means that the germanium absorption layer 103 may be partially located in the groove 108, or the germanium absorption layer 103 may be entirely located in the groove 108. When the germanium absorption layer 103 is partially located in the groove 108, the remaining portion of the germanium absorption layer 103 may extend to the outside of the groove 108 in a direction away from the substrate 101.
[0085] like Figure 1As shown, a groove 108 is provided on the surface of the waveguide layer 102, the bottom of the germanium absorption layer 103 is located in the groove 108, and the top of the germanium absorption layer 103 is located outside the groove 108. In other words, the germanium absorption layer 103 is partially embedded in the waveguide layer 102. In this way, at least a portion of the germanium absorption layer 103 is in contact with the side wall of the groove 108, so that the optical signal from the waveguide layer 102 can be directly incident on the germanium absorption layer 103 along the X direction, thereby improving the optical coupling efficiency of the germanium absorption layer 103.
[0086] In some embodiments, the germanium absorption layer 103 has a first side and a second side opposite to each other in a first direction; the waveguide layer 102 includes a first waveguide 109 located on the first side and a second waveguide 110 located on the second side; a first gap 111 is provided between the first waveguide 109 and the germanium absorption layer 103, and a second gap 112 is provided between the second waveguide 110 and the germanium absorption layer 103; the first waveguide 109 and the second waveguide 110 are used to couple the optical signal received by the photodetector 100 to the germanium absorption layer 103 via the first gap 111 and the second gap 112, respectively.
[0087] It should be noted that, in one example, the optical signal of the waveguide-type silicon-based germanium photodetector is input from one end of the waveguide layer along the Y direction (i.e., the optical input end of the waveguide layer) and then coupled to the germanium absorption layer. However, in the photodetector of this structure, most of the light absorption is concentrated in the region of the germanium absorption zone in the first few microns near the input end of the waveguide layer. Therefore, under the action of high input light power, it is easy to cause uneven distribution of the light field in the germanium absorption layer. In addition, due to the existence of the space charge effect, a large number of photogenerated carriers generated in the local area of the germanium absorption layer will break its built-in electric field distribution, affecting the timely transport of the photogenerated carriers, resulting in a serious decrease in the response speed of the photodetector.
[0088] Here, the space charge effect refers to the photogenerated carriers in the germanium absorption layer being separated quickly and drifting under the action of the external electric field. Due to the different mobility of electrons and holes in the germanium absorption layer, there is a natural difference in the carrier movement speed in the intrinsic region, which leads to charge imbalance inside the intrinsic region, thus affecting the distribution of the external electric field.
[0089] Figure 2 The structure of the photodetector provided in the embodiment of the present disclosure is shown in FIG. Figure 2 It should be noted that Figure 2 The schematic diagram shown is not the actual structure diagram of the photodetector, it is only to illustrate the relative position relationship between the first waveguide, the second waveguide and the germanium absorption layer. The specific structure of the photodetector can be referred to Figure 1 , Figure 1 Corresponds to Figure 2 Cross-sectional structure diagram of the photodetector along section AA.
[0090] Combination Figure 1 and Figure 2 As shown, in the embodiment of the present disclosure, a first waveguide 109 is arranged on the first side of the germanium absorption layer 103 along the X direction, and a second waveguide 110 is arranged on the second side of the germanium absorption layer 103 along the X direction, and the first waveguide 109 and the second waveguide 110 are respectively used to couple the optical signal received by the photodetector 100 to the germanium absorption layer 103 through the first gap 111 and the second gap 112. That is, the embodiment of the present disclosure provides a photodetector 100 with bidirectional silicon waveguide evanescent field lateral coupling, so that the optical signal transmitted in the waveguide layer 102 can be coupled to the germanium absorption layer 103 from the first side and the second side of the germanium absorption layer 103 along the X direction, respectively, thereby significantly improving the electric field intensity in the germanium absorption layer 103, making the optical field distribution more uniform, balancing the spatial distribution of photogenerated carriers, reducing the influence of the space charge effect, and improving the response speed of the photodetector 100.
[0091] In the embodiment of the present disclosure, the optical signal from the outside can be provided to the photodetector 100 through the two output ends 202 of the optical beam splitter 201, respectively. And the two output ends 202 of the optical beam splitter 201 are respectively connected to the first waveguide 109 and the second waveguide 110. Specifically, the first waveguide 109 has a first end 109a and a second end 109b opposite to each other along the Y direction, and the second waveguide 110 has a first end 110a and a second end 110b opposite to each other along the Y direction. The first end 109a of the first waveguide 109 and the second end 110b of the second waveguide 110 can be respectively connected to the two output ends 202 of the optical beam splitter 201. Alternatively, the second end 109b of the first waveguide 109 and the first end 110a of the second waveguide 110 can be respectively connected to the two output ends 202 of the optical beam splitter 201.
[0092] In some embodiments, the length of the germanium absorption layer 103 along the first direction is less than or equal to a first threshold, and the length of the germanium absorption layer 103 along the stacking direction is less than or equal to a second threshold.
[0093] In the embodiment of the present disclosure, the first threshold value may be 400 nm, and the second threshold value may be 300 nm. It should be noted that, in the process of forming the germanium absorption layer 103, compared with the length of the germanium absorption layer 103 along the first direction, the length of the germanium absorption layer 103 along the stacking direction can be easily made smaller, therefore, preparing a photodetector 100 having a vertical PIN structure is more conducive to improving the 3dB bandwidth of the photodetector 100.
[0094] In a specific embodiment, when the length of the germanium absorption layer 103 along the X direction is 400nm, and the length of the germanium absorption layer 103 along the Z direction is 300nm, the 3dB bandwidth of the photodetector 100 can reach 100GHz, and at this time, the photodetector 100 is an ultra-high-speed germanium silicon photodetector. It can be understood that in the process of manufacturing the photodetector, according to a special process, the size of the germanium absorption layer 103 in the X direction and the Z direction can be further reduced on the basis of the first threshold and the second threshold, respectively. At this time, the 3dB bandwidth of the photodetector 100 can be further increased, and the response speed of the photodetector 100 is also improved.
[0095] Figure 3 Flow chart of the method for manufacturing a photodetector provided in an embodiment of the present disclosure. Figure 3 As shown, the present disclosure provides a method for manufacturing a photodetector, the manufacturing method comprising:
[0096] Step S301: providing a substrate, wherein a surface of the substrate is a waveguide layer having a first doping layer;
[0097] Step S302: stacking a germanium absorption layer and a semiconductor layer with a second doping in sequence on a substrate; the waveguide layer, the germanium absorption layer and the semiconductor layer constitute a vertical PIN structure; wherein the length of the germanium absorption layer in a first direction is smaller than the length of the semiconductor layer in the first direction; the first direction is perpendicular to the transmission direction of the optical signal and perpendicular to the stacking direction.
[0098] 4A to 4D A step diagram of a method for manufacturing a photodetector provided in an embodiment of the present disclosure.
[0099] like Figure 4AAs shown, in some embodiments of the present disclosure, the substrate 401 can be prepared based on an SOI substrate. The SOI substrate includes a stacked silicon substrate layer 406, a buried oxide layer 407 and a waveguide layer 402. Among them, the waveguide layer 402 is located on the surface of the SOI substrate. The waveguide layer 402 in the SOI substrate can be doped and etched in sequence to form a waveguide layer 402 with a first doping in the SOI substrate. Specifically, the waveguide layer 402 can be first doped to form a first doping region in the waveguide layer 402. Thereafter, the waveguide layer 402 with the first doping is etched to form a main body 402a, a metal electrode connecting portion 402b and an optical coupling portion 402c in the waveguide layer 402. The optical coupling portion 402c is located between the main body portion 402a and the metal electrode connecting portion 402b, and the main body portion 402a, the metal electrode connecting portion 402b and the optical coupling portion 402c are connected to each other through the waveguide material located at the bottom of the waveguide layer 402. The optical coupling portion 402c is used to receive an optical signal from the outside and couple it to the main body portion 402a. The main body portion 402a can contact the germanium absorption layer 403 formed later, and is used to transmit the optical signal to the germanium absorption layer 403. The metal electrode connecting portion 402b can contact the metal electrode formed later, and is used to realize the electrical connection between the first doped region and the external circuit.
[0100] In some other embodiments of the present disclosure, the substrate 401 can be prepared by a multi-step deposition process and an etching process. Specifically, a buried oxide layer 407 and a waveguide layer 402 can be deposited in sequence on a silicon substrate layer 406. Then, the waveguide layer 402 is ion-doped to form a waveguide layer 402 having a first doping on the buried oxide layer 407. Thereafter, the waveguide layer 402 having the first doping is etched to form a main body 402a, a metal electrode connecting portion 402b, and an optical coupling portion 402c in the waveguide layer 402. Here, the description of the main body 402a, the metal electrode connecting portion 402b, and the optical coupling portion 402c can refer to the above, and will not be repeated here.
[0101] In some embodiments, a germanium absorption layer and a semiconductor layer with a second doping are sequentially stacked on a substrate, including: forming an oxide layer on the substrate; etching and removing a portion of the waveguide layer and the oxide layer along the stacking direction to form a first groove that penetrates the oxide layer and extends into the waveguide layer; forming a germanium absorption layer in the first groove; and forming a semiconductor layer on the germanium absorption layer.
[0102] In the embodiment of the present disclosure, the material of the oxide layer 413 may be the same as the material of the buried oxide layer 407. The material of the oxide layer 413 includes but is not limited to silicon dioxide.
[0103] like Figure 4AAs shown, an oxide layer 413 is formed on the waveguide layer 402 by a deposition process, and the oxide layer 413 can cover the surface and sidewalls of the main body 402a, the metal electrode connection part 402b and the optical coupling part 402c in the waveguide layer 402. In the embodiment of the present disclosure, after the oxide layer 413 is formed, the surface of the oxide layer 413 can be planarized using a chemical mechanical polishing (CMP) process. Thereafter, along the Z direction, a portion of the waveguide layer 402 and the oxide layer 413 are etched away to form a first groove 414 that penetrates the oxide layer 413 and extends into the waveguide layer 402. Here, the etching process for removing a portion of the waveguide layer 402 and the oxide layer 413 includes dry etching. Next, a germanium absorption layer 403 can be formed in the first groove 414 using an epitaxial growth process, and the material of the germanium absorption layer 403 includes a single germanium substance. In the embodiment of the present disclosure, the surface of the germanium absorption layer 403 may be flush with the surface of the oxide layer 413, or the height of the surface of the germanium absorption layer 403 in the Z direction is lower than the height of the surface of the oxide layer 413 in the Z direction. Figure 4A Since the germanium single substance grows from the bottom of the first groove 414 in a direction away from the substrate 401 , a gap may exist between the germanium absorption layer 403 and the sidewall of the first groove 414 .
[0104] In some embodiments, a semiconductor layer is formed on a germanium absorption layer, including: removing a portion of an oxide layer located on a sidewall of a first groove to form a second groove; the top area of the second groove is larger than the top area of the first groove; depositing semiconductor material in the second groove and on the germanium absorption layer to form a semiconductor material layer; performing a second doping on the semiconductor layer; and performing high-temperature annealing on the semiconductor material layer to form a semiconductor layer.
[0105] like Figure 4B As shown, a portion of the oxide layer 413 is removed by an etching process to form a second groove 415. Here, the etching process includes dry etching. Figure 4A and Figure 4B In the etching process, the removed portion of the oxide layer 413 is located on the sidewall of the first groove 414 and on the surface of the oxide layer 413. In this way, the top area of the formed second groove 415 is larger than the top area of the first groove 414. Further, since the top area of the second groove 415 is larger than the top area of the first groove 414, in the subsequent process, the semiconductor layer formed on the germanium absorption layer 403 can have a larger size in the X direction than the germanium absorption layer 403. In this way, the problem that the germanium absorption layer 403 with a small size in the X direction is difficult to lead out the metal electrode is avoided, and a stable connection between the PIN structure and the metal electrode is achieved.
[0106] like Figure 4CAs shown, after forming the second groove 415, a semiconductor material different from the material of the germanium absorption layer 403 is deposited in the second groove 415 and on the germanium absorption layer 403 to form a semiconductor material layer. Here, the deposition process for forming the semiconductor material layer includes a non-selective epitaxial process. In some embodiments, the size of the semiconductor material layer can be adjusted by controlling the deposition time and deposition area of the semiconductor material in the deposition process.
[0107] In the embodiment of the present disclosure, after forming the semiconductor material layer, the semiconductor material layer may be second doped to form a second doped region in the semiconductor material layer. Here, the second doped region has a different doping type from the first doped region. For details, please refer to Figure 1 , which will not be elaborated here.
[0108] After the semiconductor material layer is second-doped, the semiconductor material layer with the second doping may be subjected to high-temperature annealing to form a semiconductor layer 404 with the second doping. Here, the temperature and time of the annealing may be controlled to achieve control of the degree of lattice mismatch between the semiconductor layer 404 and the germanium absorption layer 403, so that the semiconductor layer 404 may provide a tensile stress that meets the design requirements for the surface of the germanium absorption layer 403. In one embodiment, the annealing temperature may be 700°C, and the annealing time may be 30 minutes. In other embodiments, the annealing temperature and the annealing time may also be set according to specific circumstances. After the annealing is completed, the magnitude of the tensile stress provided by the semiconductor layer 404 to the surface of the germanium absorption layer 403 no longer changes. At this point, the waveguide layer 402, the germanium absorption layer 403, and the semiconductor layer 404 together constitute a vertical PIN structure. In some embodiments, the semiconductor material includes polycrystalline silicon, so that the material of the semiconductor layer 404 includes polycrystalline silicon.
[0109] In some embodiments, the length of the germanium absorption layer 403 along the first direction (X direction) is less than or equal to a first threshold, and the length of the germanium absorption layer 403 along the stacking direction (Z direction) is less than or equal to a second threshold.
[0110] In the disclosed embodiment, the first threshold value includes 400 nm, and the second threshold value includes 300 nm.
[0111] In some embodiments, the thermal expansion coefficient of the germanium absorber layer 403 is different from the thermal expansion coefficient of the semiconductor layer 404 .
[0112] In a specific embodiment, the thermal expansion coefficient of the germanium absorption layer 403 may be smaller than the thermal expansion coefficient of the semiconductor layer 404 .
[0113] In the embodiment of the present disclosure, after the semiconductor layer 404 is formed, a metal electrode 405 for realizing electrical connection between the PIN structure and an external circuit may be formed. Figure 4DAs shown. Specifically, a dielectric layer 416 covering the surface of the oxide layer 413 and the surface of the semiconductor layer 404 may be formed first. The material of the dielectric layer 416 may be the same as that of the oxide layer 413. Afterwards, the surface of the dielectric layer 416 may be planarized using a chemical mechanical polishing process. Subsequently, the dielectric layer 416 and the oxide layer 413 may be etched using an etching process to form a plurality of metal-filled holes extending to the surfaces of the waveguide layer 402 and the semiconductor layer 404, respectively. Metal materials may be filled into the plurality of metal-filled holes at the same time to form a plurality of metal electrodes 405.
[0114] like Figure 4D As shown, the metal electrode 405 includes a first metal electrode 405a and a second metal electrode 405b located on the first doped region, and a third metal electrode 405c located on the second doped region. The first metal electrode 405a and the second metal electrode 405b are respectively located on opposite sides of the germanium absorption layer 403 in the X direction. In some embodiments, before forming the metal electrode 405, a metal silicide 417 can be formed at the positions where the first doped region and the second doped region are used to contact the metal electrode 405, so as to reduce the contact resistance between each doped region and the metal electrode 405. The metal silicide 417 includes cobalt silicide (Cobal-Silicide), nickel silicide (Nickel-Silicide), etc.
[0115] In the embodiments of the present disclosure, the deposition process for forming each layer in the photodetector includes but is not limited to chemical vapor deposition (CVD), physical vapor deposition (PVD) or atomic layer deposition (ALD).
[0116] The embodiment of the present disclosure provides a photodetector, which includes: a substrate, the surface of the substrate is a waveguide layer with a first doping; a germanium absorption layer and a semiconductor layer with a second doping stacked on the substrate in sequence; the waveguide layer, the germanium absorption layer and the semiconductor layer constitute a vertical PIN structure; wherein the length of the germanium absorption layer in the first direction is less than the length of the semiconductor layer in the first direction; the first direction is perpendicular to the transmission direction of the optical signal and perpendicular to the stacking direction. In the embodiment of the present disclosure, a semiconductor layer with a second doping is formed on the germanium absorption layer, and the semiconductor layer can be used to provide tensile stress to the surface of the germanium absorption layer, thereby effectively improving the responsivity of the photodetector in the L band. The semiconductor layer, as a doping layer, forms a vertical PIN structure together with the waveguide layer and the germanium absorption layer, which is conducive to reducing the height of the germanium absorption layer in the stacking direction. At the same time, the length of the germanium absorption layer in the first direction is designed to be less than the length of the semiconductor layer in the first direction, ensuring that even if the germanium absorption layer has an ultra-small size in the first direction, the metal electrode can also be stably connected to the semiconductor layer. In this way, the germanium absorption layer can be designed to have an ultra-small size in the first direction and the stacking direction, thereby effectively improving the response speed of the photodetector in the L band.
[0117] It should be understood that "one embodiment" or "an embodiment" mentioned throughout the specification means that specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present disclosure. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in the various embodiments of the present disclosure, the size of the serial number of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present disclosure. The serial numbers of the embodiments of the present disclosure are for description only and do not represent the advantages and disadvantages of the embodiments.
[0118] The above description is only a preferred embodiment of the present disclosure, and does not limit the patent scope of the present disclosure. All equivalent structural changes made by using the contents of the present disclosure and the drawings under the inventive concept of the present disclosure, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present disclosure.
Claims
1. A photoelectric detector, characterized in that: include: A substrate, wherein a surface of the substrate is a waveguide layer having a first doping layer; A germanium absorption layer and a semiconductor layer with a second doping layer are sequentially stacked on the substrate; the waveguide layer, the germanium absorption layer and the semiconductor layer form a vertical PIN structure; The length of the germanium absorption layer in the first direction is smaller than the length of the semiconductor layer in the first direction; the first direction is perpendicular to the transmission direction of the optical signal and perpendicular to the stacking direction.
2. The photodetector according to claim 1, characterized in that: A groove is provided on the surface of the waveguide layer, and at least a portion of the germanium absorption layer is located in the groove.
3. The photodetector according to claim 1, characterized in that: The germanium absorption layer has a first side and a second side opposite to each other in the first direction; the waveguide layer includes a first waveguide located on the first side and a second waveguide located on the second side; a first gap is provided between the first waveguide and the germanium absorption layer, and a second gap is provided between the second waveguide and the germanium absorption layer; the first waveguide and the second waveguide are used to couple the optical signal received by the photodetector to the germanium absorption layer via the first gap and the second gap, respectively.
4. The photodetector according to claim 1, characterized in that: The length of the germanium absorption layer along the first direction is less than or equal to a first threshold, and the length of the germanium absorption layer along the stacking direction is less than or equal to a second threshold.
5. The photodetector according to claim 1, characterized in that: The thermal expansion coefficient of the germanium absorption layer is different from the thermal expansion coefficient of the semiconductor layer.
6. The photodetector according to claim 5, characterized in that: The material of the semiconductor layer includes polysilicon.
7. The photoelectric detector according to any one of claims 1 to 6, characterized in that: The substrate further comprises a stacked silicon substrate layer and a buried oxide layer, and the waveguide layer is located on the buried oxide layer.
8. A method for manufacturing a photodetector, characterized in that: include: Providing a substrate, wherein a surface of the substrate is a waveguide layer having a first doping layer; A germanium absorption layer and a semiconductor layer with a second doping are sequentially stacked on the substrate; the waveguide layer, the germanium absorption layer and the semiconductor layer form a vertical PIN structure; The length of the germanium absorption layer in the first direction is smaller than the length of the semiconductor layer in the first direction; the first direction is perpendicular to the transmission direction of the optical signal and perpendicular to the stacking direction.
9. The manufacturing method according to claim 8, characterized in that: The step of sequentially stacking a germanium absorption layer and a semiconductor layer having a second doping on the substrate comprises: forming an oxide layer on the substrate; Etching and removing a portion of the waveguide layer and the oxide layer along the stacking direction to form a first groove penetrating the oxide layer and extending into the waveguide layer; forming the germanium absorption layer in the first groove; The semiconductor layer is formed on the germanium absorption layer.
10. The manufacturing method according to claim 9, characterized in that: The step of forming the semiconductor layer on the germanium absorption layer comprises: Removing part of the oxide layer located on the side wall of the first groove to form a second groove; the top area of the second groove is larger than the top area of the first groove; Depositing a semiconductor material in the second groove and on the germanium absorption layer to form a semiconductor material layer; Performing a second doping on the semiconductor material layer; The semiconductor material layer is subjected to high temperature annealing to form a semiconductor layer.
11. The manufacturing method according to claim 8, characterized in that: The length of the germanium absorption layer along the first direction is less than or equal to a first threshold, and the length of the germanium absorption layer along the stacking direction is less than or equal to a second threshold.
12. The manufacturing method according to any one of claims 8 to 11, characterized in that: The thermal expansion coefficient of the germanium absorption layer is different from the thermal expansion coefficient of the semiconductor layer.
13. The manufacturing method according to claim 8, characterized in that: The material of the semiconductor layer includes polysilicon.