Processing method of passive chip for magnetic field energy collection

By adopting three-dimensional spiral coil and asymmetric coil design, combined with high-efficiency rectifier circuit and power management module, the problems of low magnetic field induction and energy collection efficiency, inability to adapt to different frequency magnetic fields, and unstable output voltage in the existing magnetic field energy collection technology are solved. , achieving efficient and stable magnetic field energy collection and conversion effects.

CN119403431AInactive Publication Date: 2025-02-07GUIZHOU XINGQIAN INFORMATION TECH CO LTD

Patent Information

Application Number
CN202411465800.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-21
Publication Date
2025-02-07
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

The existing magnetic field energy collection technology has problems such as low magnetic field induction and energy collection efficiency, inability to adapt to magnetic fields of different frequencies, and unstable output voltage.

Method used

The three-dimensional helical coil and asymmetric coil design are adopted, combined with the multi-wire harness cross-arrangement design, optimize the inductance value and magnetic field distribution. It integrates high-efficiency rectifier circuit and power management module, adopts a full-wave rectifier structure and DC-DC conversion circuit to achieve efficient conversion and output stability of magnetic field energy.

Benefits of technology

It significantly improves the induction and collection efficiency of magnetic field energy, enhances the adaptability to magnetic fields with different frequencies, and ensures the stability of the output voltage and efficient energy utilization.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119403431A_ABST
    Figure CN119403431A_ABST
Patent Text Reader

Abstract

The invention relates to the technical field of microelectronics, and discloses a processing method of a passive chip for magnetic field energy collection, which comprises the following steps: S1, providing a chip with a flexible substrate, and depositing a first dielectric layer on the surface of the substrate to isolate the substrate from a coil; s2, forming a three-dimensional spiral coil structure on the dielectric layer by adopting a three-dimensional micro-nano processing technology, wherein the coils are stacked layer by layer in an asymmetric spiral form along a direction perpendicular to the substrate; and S3, in the forming process of the coil, a multi-wire-harness cross arrangement design is used, so that the inductance increment of a unit area is maximized. Through the design of the three-dimensional spiral coils and the asymmetric coils, the limitation of a traditional planar coil structure on magnetic field coupling and induction efficiency is broken through, the three-dimensional spiral coils are arranged in a multi-layer mode in the vertical direction, magnetic flux coupling between the coils is tighter, and the inductance value and the induced electromotive force are remarkably improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The invention relates to the field of microelectronic technology, in particular to a method for processing a passive chip for collecting magnetic field energy. Background Art

[0002] Magnetic field energy harvesting is a technology that converts magnetic field energy in the environment into electrical energy. It is widely used in wireless sensing, smart device power supply, Internet of Things and wearable devices. The development of integrated circuits and microsystems has improved the efficiency of magnetic field energy harvesting, realized multi-band energy capture and output energy stably. Existing magnetic field energy harvesting technology usually relies on traditional planar coil structures, which have limitations in magnetic field sensing and energy harvesting efficiency. Due to the planar arrangement of the coil, the magnetic flux coupling efficiency is low and the induced electromotive force is small. In low-intensity or non-uniform magnetic field environments, it is impossible to effectively sense and collect magnetic field energy. In addition, traditional designs lack the ability to adapt to magnetic fields of different frequencies and cannot achieve multi-band energy collection and management.

[0003] In the prior art, patent document CN116536635A discloses a chip processing method, including: plasma cleaning the chip to obtain a cleaned chip; using a first coating material to form a pre-coating layer on the cleaned chip to obtain a pre-plated chip; wherein the first coating material is silicon or titanium; using a second coating material to form a coating layer on the pre-plated chip to obtain a coated chip; wherein the second coating material is one or more of silicon dioxide, titanium dioxide, and aluminum oxide.

[0004] This document mainly focuses on the coating treatment of the chip surface, and does not involve the relevant technologies of coil structure optimization and magnetic field sensing efficiency improvement. Since it does not adopt a three-dimensional spiral or multi-layer coil structure, it cannot effectively increase the magnetic field coupling area, so it performs poorly in weak magnetic fields or non-uniform magnetic fields;

[0005] The technical solution of this document does not integrate the magnetic field energy conversion circuit and power management module, and cannot effectively convert the collected induced electromotive force into a stable DC output. The traditional solution lacks efficient rectification and energy management circuits, resulting in low energy utilization and low output voltage stability.

[0006] The literature does not mention the sensing and collection capabilities of magnetic fields of different frequencies. Traditional single-frequency or narrow-band sensing structures cannot adapt to the energy collection of magnetic fields of different frequencies, and cannot achieve efficient energy conversion within a wide frequency range, and the application scenarios are limited.

[0007] Therefore, those skilled in the art provide a method for processing a passive chip for magnetic field energy collection to solve the problems raised in the above background technology. Summary of the invention

[0008] In view of the shortcomings of the prior art, the present invention provides a method for processing a passive chip for magnetic field energy collection to solve the problems raised in the above background technology.

[0009] To achieve the above objectives, the present invention is implemented through the following technical solutions: A method for processing a passive chip for magnetic field energy collection, comprising the following steps: S1, providing a chip with a flexible substrate, and depositing a first dielectric layer on the surface of the substrate to isolate the substrate from the coil;

[0010] S2, using three-dimensional micro-nano processing technology to form a three-dimensional spiral coil structure on the dielectric layer, and the coils are stacked layer by layer in an asymmetric spiral form along a direction perpendicular to the substrate;

[0011] S3. In the process of forming the coil, a multi-wire cross-arrangement design is used to maximize the inductance increment per unit area. The optimized inductance value L is calculated by the following formula:

[0012]

[0013] Where μ0 is the vacuum magnetic permeability, N is the total number of coil turns, A is the cross-sectional area of ​​the coil, l is the coil length, k i is the coil coupling coefficient of the i-th layer, and n is the number of wiring harness layers;

[0014] S4, forming nanomaterial electrodes at the upper and lower ends of the coil, and reducing the electrode contact resistance through plasma surface treatment technology;

[0015] S5, introducing a flexible composite material layer between each coil layer, wherein the flexible composite material layer is composed of polyimide and carbon nanotubes;

[0016] S6. Using a polymer packaging material with good thermal conductivity on the chip surface, and doping boron nitride nanosheets into the packaging material;

[0017] S7. Integrate a high-efficiency rectifier circuit and a power management module inside the chip. The rectifier circuit adopts a full-wave rectifier structure and cooperates with a DC-DC conversion circuit to achieve efficient conversion of magnetic field energy and output stability.

[0018] S8, performing plasma treatment on the entire passive chip to remove impurities;

[0019] S9, performing laser annealing treatment on the processed chip;

[0020] S10. During the chip manufacturing process, real-time optical detection and automatic alignment technology are used to achieve precise alignment of each layer of coils.

[0021] Preferably, the step of forming the three-dimensional spiral coil includes using laser direct writing technology, and the three-dimensional spiral structure manufacturing process includes laser beam trajectory, focus control and laser processing path. The following is an algorithm formula:

[0022] The laser focus trajectory formula refers to the movement path of the laser focus in space during the processing process. The calculation formula of the focus trajectory is as follows:

[0023] x(t)=r(t)·cos(ωt), y(t)=r(t)·sin(ωt), z(t)=h(t),

[0024] Among them, t is the time variable;

[0025] r(t) is the time-varying radius, defined as r(t) = r0 + αt (where r0 is the initial radius and α is the expansion coefficient);

[0026] ω is the angular velocity, which determines the rotation speed of the spiral;

[0027] h(t) is the change in focal height, defined as a linear function h(t)=h0+βt (where h0 is the initial height and β is the rate of change of height);

[0028] The focus control and dynamic compensation algorithm, in a three-dimensional structure, the dynamic compensation algorithm of the focus is used to correct the focal length offset, and the dynamic compensation formula of the focus position is as follows:

[0029] z′(t)=z(t)+Δz(t), where z(t) is the height of the target processing surface; Δz(t) is the focus compensation amount, and the calculation formula is as follows:

[0030] Where n is the refractive index; λ is the laser wavelength; d(t) is the distance between the laser focus and the target surface; D is the dynamically adjusted reference distance;

[0031] The laser processing path optimization algorithm needs to optimize the laser processing path during the laser direct writing process. The path optimization formula is expressed as:

[0032]

[0033] Where, E(x,y,z) is the laser energy consumption function; γ is the path weight coefficient;

[0034] is the speed of the laser focus in the x, y, and z directions.

[0035] Preferably, the thickness of the flexible composite material layer is in the range of 10 μm to 50 μm, wherein the content of the carbon nanotubes accounts for 1% to 5% of the total volume of the composite material layer.

[0036] Preferably, the coil is made of copper or silver material, and surface nano-processing technology is used during the processing. In the surface nano-processing of conductive materials such as copper or silver, an algorithm is used to control the formation and growth process of the nanostructure. The following is the algorithm formula for the surface nano-processing:

[0037] Kinetic model of nanoparticle growth: Nanoparticle processing usually involves the deposition and growth of nanoparticles, and the growth rate is described by the Ostwald ripening equation:

[0038]

[0039] Where R(t) is the average radius of the nanoparticles at time t; γ is the surface energy of the particles; V m is the molar volume of the particle; D is the diffusion coefficient; C s is the surface saturation concentration; R is the gas constant; T is the temperature;

[0040] The nanostructure formation formula during the electrodeposition process: During the electrodeposition process, the local current density j(x, y, t) is described by the following differential equation:

[0041]

[0042] Wherein, j(x, y, t) is the current density; D is the ion diffusion coefficient; C(x, y, t) is the ion concentration distribution; z is the valence state of the deposited ion; F is the Faraday constant; R is the gas constant; T is the absolute temperature; φ(x, y, t) is the potential distribution;

[0043] Phase field model of nanowire growth: The dynamics of nanowire growth is described using a phase field model. The evolution equation of the phase field variable φ(x, y, z, t) is as follows:

[0044]

[0045] Where M is the momentum coefficient; ∈ is the interface width parameter; f′(φ) is the derivative of the free energy density, usually in the form of f′(φ)=2φ(1-φ)(1-2φ).

[0046] Preferably, the electrode forming step includes performing laser etching on the surface of the nanomaterial electrode; the specific implementation steps of the laser etching process are as follows:

[0047] Step 1: Clean the surface of the electrode material to remove the oxide layer and impurities; fix the nanomaterial electrode on the laser etching table and use an optical microscope to focus on the electrode surface;

[0048] Step 2: Set the wavelength, pulse width and power of the laser; adjust the optical path of the laser, adjust the laser focus to the electrode surface through the focusing lens group, and calibrate the laser spot size;

[0049] Step 3: Design the laser etching pattern; use computer-aided design software to generate the laser scanning path and import it into the laser etching control system;

[0050] Step 4: Start laser etching, perform point-by-point or continuous etching according to the preset scanning path, and monitor the energy distribution and thermal effect during the etching process in real time;

[0051] Step 5: During the laser etching process, the photothermal effect is used to form nanometer-sized holes, grooves or other structures, and the laser power and scanning speed are adjusted; through multiple etching cycles, complex nanostructures are built layer by layer;

[0052] Step 6: After laser etching is completed, the electrical properties of the electrode surface are tested; according to the test results, the laser etching parameters are adjusted or secondary etching is performed;

[0053] Step 7: Use atomic force microscopy and scanning electron microscopy to characterize the morphology and microstructure of the electrode surface, and analyze the morphology of the nanostructure after etching; optimize the laser etching process parameters based on the characterization results.

[0054] Preferably, the surface roughness R in step 1 is q The calculation formula is:

[0055]

[0056] Where N is the number of sampling points, z i is the height of the i-th sampling point, is the average surface height;

[0057] The scanning path optimization algorithm formula in step 3 is:

[0058]

[0059] Among them, (x i ,y i ) is the coordinate of the i-th etching point, and n is the number of etching points;

[0060] Photothermal effect model of the nanostructure formed in step 5:

[0061]

[0062] Where T(x,y,z,t) is the temperature at point (x,y,z) at time t, D is the thermal diffusion coefficient of the material, and (x0,y0) is the laser focus position.

[0063] Preferably, the thickness of the packaging material ranges from 50 μm to 200 μm, and the volume fraction of the boron nitride nanosheets ranges from 5% to 10%.

[0064] Preferably, the full-wave rectifier used in the high-efficiency rectification circuit adopts a Schottky diode, and a capacitor filter is integrated after the rectifier to reduce ripple.

[0065] Preferably, the real-time optical detection technology uses a laser interferometry method to dynamically monitor the alignment accuracy of each coil layer and automatically adjust the system to correct the processing deviation. The algorithm formula is as follows:

[0066] The basic formula of laser interferometry is to detect surface topography or displacement based on the phase difference of light. For the interference light, the interference intensity I(x,y) is calculated by the following formula:

[0067]

[0068] Where, I(x,y) is the interference intensity at point (x,y); I0 is the average intensity of the incident light; λ is the wavelength of the laser; d(x,y) is the interference optical path difference; Δφ is the phase difference;

[0069] The phase unwrapping algorithm is based on the phase φ(x, y) in the interference pattern, which is limited to [-π, π], resulting in phase jumps. The actual phase distribution must be calculated using the phase unwrapping algorithm. The formula is as follows:

[0070] φ unwrap (x,y)=φ(x,y)+2π·N(x,y),

[0071] Among them, φ(x, y) is the measured phase value; φ(x, y) is an integer multiple of 2π, and its value is determined by the phase difference between adjacent pixels and is determined by the following rules:

[0072]

[0073] Preferably, the processing deviation feedback and automatic adjustment system, through dynamic detection of deviation, automatically adjusts the system to correct the position error in the processing process, and uses a proportional-integral-differential controller to adjust the position of the processing equipment or other processing parameters, and its control algorithm is:

[0074]

[0075] Where, u(t) is the control output; K p is the proportional gain; K i is the integral gain; K d is the differential gain;

[0076] The Fourier transform analysis of the interference image is to detect high-frequency noise and periodic errors. The two-dimensional Fourier transform of the interference image I(x, y) is for:

[0077]

[0078] Through Fourier spectrum analysis, high-frequency noise components are identified and filtered out, and useful low-frequency displacement information is extracted for feedback adjustment.

[0079] The present invention provides a method for processing a passive chip for collecting magnetic field energy, which has the following beneficial effects:

[0080] 1. The present invention breaks through the limitations of traditional planar coil structures in magnetic field coupling and induction efficiency through the three-dimensional spiral coil and asymmetric coil design. The three-dimensional spiral coil is arranged in multiple levels in the vertical direction, which makes the magnetic flux coupling between coils tighter, significantly improving the inductance value and induced electromotive force. In addition, the asymmetric coil design can optimize the magnetic field distribution inside the chip, reduce eddy current loss, and further improve the magnetic field energy collection efficiency. Combined with the multi-beam cross-arrangement design, the inductance per unit area is significantly improved. It is particularly sensitive to weak magnetic fields or non-uniform magnetic fields, and can more efficiently capture the electromotive force generated by magnetic field changes.

[0081] 2. The present invention integrates a high-efficiency rectification circuit and a power management module inside the chip and adopts a full-wave rectifier structure to effectively convert the AC component in the induced electromotive force into direct current. Combined with the DC-DC conversion circuit, the output voltage is dynamically adjusted according to different load requirements to ensure the stability of the output voltage and efficient energy utilization. At the same time, the integrated power management module can monitor the energy collection status and load conditions in real time, intelligently adjust energy distribution, avoid energy waste, and automatically switch to energy storage mode when the energy input is low, thereby improving the overall efficiency of the system.

[0082] 3. The present invention realizes efficient induction and energy collection of magnetic fields of different frequencies through a multi-layer spiral coil design combined with multi-band inductance optimization. The structure effectively captures and converts magnetic field energy within different frequency ranges through inductive coupling and transformer coupling technology of different coil layers. In addition, the integrated inductor switching circuit can flexibly switch between different frequency bands, so that the chip can perform efficient energy collection within a wide frequency range, thereby improving the magnetic field response capability of the chip and expanding its applicability in different magnetic field environments. BRIEF DESCRIPTION OF THE DRAWINGS

[0083] Figure 1 It is a flow chart of the present invention. DETAILED DESCRIPTION

[0084] In order to make the technical personnel in the technical field understand the scheme of the present invention, the technical scheme in the embodiment of the present invention will be clearly and completely described below in combination with the drawings in the embodiment of the present invention. Obviously, the described embodiment is a partial embodiment of the present invention, not a complete embodiment. Based on the embodiment of the present invention, other embodiments obtained by ordinary technicians in the field without creative work should fall within the scope of protection of the present invention.

[0085] The present invention is described in detail below in conjunction with the accompanying drawings:

[0086] Example:

[0087] Please see attached Figure 1 , an embodiment of the present invention provides a method for processing a passive chip for magnetic field energy collection, comprising the following steps: S1, providing a chip with a flexible substrate, and depositing a first dielectric layer on the surface of the substrate to isolate the substrate from the coil;

[0088] S2, using three-dimensional micro-nano processing technology to form a three-dimensional spiral coil structure on the dielectric layer, and the coils are stacked layer by layer in an asymmetric spiral form along a direction perpendicular to the substrate;

[0089] S3. In the process of forming the coil, a multi-wire cross-arrangement design is used to maximize the inductance increment per unit area. The optimized inductance value L is calculated by the following formula:

[0090]

[0091] Where μ0 is the vacuum magnetic permeability, N is the total number of coil turns, A is the cross-sectional area of ​​the coil, l is the coil length, k i is the coil coupling coefficient of the i-th layer, and n is the number of wiring harness layers;

[0092] S4, forming nanomaterial electrodes at the upper and lower ends of the coil, and reducing the electrode contact resistance through plasma surface treatment technology;

[0093] S5, introducing a flexible composite material layer between each coil layer, wherein the flexible composite material layer is composed of polyimide and carbon nanotubes;

[0094] S6. Using a polymer packaging material with good thermal conductivity on the chip surface, and doping boron nitride nanosheets into the packaging material;

[0095] S7. Integrate a high-efficiency rectifier circuit and a power management module inside the chip. The rectifier circuit adopts a full-wave rectifier structure and cooperates with a DC-DC conversion circuit to achieve efficient conversion of magnetic field energy and output stability.

[0096] S8, performing plasma treatment on the entire passive chip to remove impurities;

[0097] S9, performing laser annealing treatment on the processed chip;

[0098] S10. During the chip manufacturing process, real-time optical detection and automatic alignment technology are used to achieve precise alignment of each layer of coils.

[0099] The benefit of S1 is to reduce chip damage caused by mechanical stress and improve the electrical performance and overall stability of the coil; the benefit of S2 is to significantly increase the magnetic flux coupling area between coils, enhance the induction and collection capabilities of magnetic field energy, reduce local eddy current effects, and improve the overall induction efficiency; the benefit of S3 is to significantly increase the inductance per unit area, so that the chip can obtain a higher induced electromotive force in a limited space, efficiently capture magnetic field changes, and thus improve energy collection efficiency; the benefit of S4 is to improve the surface finish of the electrode, reduce contact resistance, improve current transmission efficiency, reduce energy loss, and extend chip life; the benefit of S5 is to prevent physical damage or The benefit of S6 is to avoid overheating damage and effectively protect the internal structure of the chip from the influence of the external environment; the benefit of S7 is to make dynamic adjustments according to load requirements to improve the overall efficiency and stability of the system; the benefit of S8 is to improve the smoothness and bonding strength of the chip surface, provide a high-quality foundation for subsequent processes, and reduce defects in the processing process; the benefit of S9 is to improve the microstructure of the material, enhance the bonding strength and conductivity of the coil and electrode, and help improve the reliability of long-term use; the benefit of S10 is to ensure high-precision alignment during the processing process, reduce interlayer misalignment, and improve the overall qualification rate of the product.

[0100] The steps for forming a three-dimensional spiral coil include using laser direct writing technology. The three-dimensional spiral structure manufacturing process includes laser beam trajectory, focus control and laser processing path. The following is the algorithm formula:

[0101] The laser focus trajectory formula refers to the movement path of the laser focus in space during the processing process. The calculation formula of the focus trajectory is as follows:

[0102] x(t)=r(t)·cos(ωt), y(t)=r(t)·sin(ωt), z(t)=h(t),

[0103] Among them, t is the time variable;

[0104] r(t) is the time-varying radius, defined as r(t) = r0 + αt (where r0 is the initial radius and α is the expansion coefficient);

[0105] ω is the angular velocity, which determines the rotation speed of the spiral;

[0106] h(t) is the change in focal height, defined as a linear function h(t)=h0+βt (where h0 is the initial height and β is the rate of change of height);

[0107] Focus control and dynamic compensation algorithm. In the three-dimensional structure, the dynamic compensation algorithm of the focus is used to correct the focal length offset. The dynamic compensation formula of the focus position is as follows:

[0108] z′(t)=z(t)+Δz(t), where z(t) is the height of the target processing surface; Δz(t) is the focus compensation amount, and the calculation formula is as follows:

[0109] Where n is the refractive index; λ is the laser wavelength; d(t) is the distance between the laser focus and the target surface; D is the dynamically adjusted reference distance;

[0110] Laser processing path optimization algorithm,In the laser direct writing process, the laser processing path needs to be optimized, and the path optimization formula is expressed as:

[0111]

[0112] Among them, E(x, y, z) is the laser energy consumption function; γ is the path weight coefficient.

[0113] In the manufacturing process of the 3D spiral structure, the algorithms work together to accurately control the position and motion trajectory of the laser focus and optimize the laser processing path, which is specifically manifested as follows:

[0114] Control the movement of the laser focus in three-dimensional space to determine the generation and morphology of the spiral structure;

[0115] Adjust the laser focus position in real time to ensure that the laser is accurately focused on the processing surface and improve processing accuracy;

[0116] Optimize the movement path of the laser focus, reduce processing time and energy consumption, and improve processing efficiency.

[0117] The thickness of the flexible composite material layer is in the range of 10 μm to 50 μm, wherein the content of the carbon nanotubes accounts for 1% to 5% of the total volume of the composite material layer.

[0118] The flexible composite material layer is located between the multi-layer coils, which can effectively absorb the mechanical stress caused by temperature changes, external pressure or differences in the thermal expansion coefficient of the material, prevent the coil from deforming, breaking or separating between layers under stress, and protect the structural integrity of the chip;

[0119] Carbon nanotubes have excellent thermal conductivity. The carbon nanotubes in the composite material layer can quickly transfer heat, which helps to effectively remove the heat generated during the operation of the chip, reduce the risk of local overheating, keep the chip temperature stable, and avoid performance degradation or damage caused by overheating;

[0120] The carbon nanotubes in the composite material layer have good electrical conductivity, forming a current path between the multi-layer coils, effectively reducing the interlayer resistance, improving the overall conductivity, and enhancing the coil inductance performance. At the same time, the presence of carbon nanotubes can reduce the electromagnetic shielding effect and improve the magnetic field coupling efficiency;

[0121] As a flexible matrix material, polyimide has good flexibility and mechanical strength. It can withstand complex mechanical deformations such as bending and stretching while maintaining the stability of the chip structure. The introduction of carbon nanotubes further enhances the mechanical strength and toughness of the material and improves the durability and crack resistance of the composite material.

[0122] The coil is made of copper or silver material, and the surface nano-processing technology is used in the processing. In the surface nano-processing of conductive materials such as copper or silver, an algorithm is used to control the formation and growth process of the nanostructure. The following is the algorithm formula for surface nano-processing:

[0123] Kinetic model of nanoparticle growth: Nano-sizing processes usually involve the deposition and growth of nanoparticles, and the growth rate is described by the Ostwald ripening equation:

[0124]

[0125] Where R(t) is the average radius of the nanoparticles at time t; γ is the surface energy of the particles; V m is the molar volume of the particle; D is the diffusion coefficient; C s is the surface saturation concentration; R is the gas constant; T is the temperature;

[0126] Formula for nanostructure formation during electrodeposition: During electrodeposition, the local current density j(x,y,t) is described by the following differential equation:

[0127]

[0128] Wherein, j(x, y, t) is the current density; D is the ion diffusion coefficient; C(x, y, t) is the ion concentration distribution; z is the valence state of the deposited ion; F is the Faraday constant; R is the gas constant; T is the absolute temperature; φ(x, y, t) is the potential distribution;

[0129] Phase field model of nanowire growth: The dynamics of nanowire growth is described using the phase field model. The evolution equation of the phase field variables φ(x, y, z, t) is as follows:

[0130]

[0131] Where M is the momentum coefficient; ∈ is the interface width parameter; f′(φ) is the derivative of the free energy density, usually in the form of f′(φ)=2φ(1-φ)(1-2φ).

[0132] Through modeling and simulation of the growth process of nanoparticles, nanowires and other structures, the size, morphology and distribution of nanostructures can be precisely controlled to achieve customized regulation of material surface properties;

[0133] Through algorithm calculation and simulation, the influence of different process parameters on the formation of nanostructures can be predicted, providing a scientific basis for parameter selection and optimization in the actual processing process;

[0134] Reasonable design and control of surface nanostructure can significantly improve the conductivity, corrosion resistance, mechanical strength and surface activity of copper or silver materials, providing strong support for the manufacture of high-performance passive chips.

[0135] The electrode forming step includes laser etching on the surface of the nanomaterial electrode; the specific implementation steps of the laser etching process are as follows:

[0136] Step 1: Clean the surface of the electrode material to remove the oxide layer and impurities; fix the nanomaterial electrode on the laser etching table and use an optical microscope to focus on the electrode surface;

[0137] Step 2: Set the wavelength, pulse width and power of the laser; adjust the optical path of the laser, adjust the laser focus to the electrode surface through the focusing lens group, and calibrate the laser spot size;

[0138] Step 3: Design the laser etching pattern; use computer-aided design software to generate the laser scanning path and import it into the laser etching control system;

[0139] Step 4: Start laser etching, perform point-by-point or continuous etching according to the preset scanning path, and monitor the energy distribution and thermal effect during the etching process in real time;

[0140] Step 5: During the laser etching process, the photothermal effect is used to form nanometer-sized holes, grooves or other structures, and the laser power and scanning speed are adjusted; through multiple etching cycles, complex nanostructures are built layer by layer;

[0141] Step 6: After laser etching is completed, the electrical properties of the electrode surface are tested; according to the test results, the laser etching parameters are adjusted or secondary etching is performed;

[0142] Step 7: Use atomic force microscopy and scanning electron microscopy to characterize the morphology and microstructure of the electrode surface, and analyze the morphology of the nanostructure after etching; optimize the laser etching process parameters based on the characterization results.

[0143] The benefit of step 1 is to reduce the influence of irregular surfaces on etching accuracy, improve the focusing accuracy and energy utilization of the laser beam on the electrode surface, and avoid etching errors caused by electrode displacement or focus offset during etching; the benefit of step 2 is to avoid over-etching or under-etching, so that the laser energy is evenly distributed on the processed surface to obtain a more uniform nanostructure; the benefit of step 3 is to improve the conductivity and mechanical properties of the electrode, reduce unnecessary path repetition and energy consumption, improve processing efficiency, and avoid errors caused by manual operation; the benefit of step 4 is to avoid local overheating and material ablation, improve processing stability and consistency, and meet the microstructure requirements of different electrode designs; the benefit of step 5 is to increase the specific surface area and surface activity of the electrode, and improve the mechanical bonding force between the electrode and external connectors; the benefit of step 6 is to verify whether the processing has achieved the expected effect and further optimize the performance of the electrode; the benefit of step 7 is to adjust the laser parameters and optimize the laser etching process.

[0144] Surface roughness R in step 1 q The calculation formula is:

[0145]

[0146] Where N is the number of sampling points, z i is the height of the ith sampling point, is the average surface height;

[0147] The scanning path optimization algorithm formula in step 3 is:

[0148]

[0149] Among them, (x i ,y i ) is the coordinate of the i-th etching point, and n is the number of etching points;

[0150] Photothermal effect model of nanostructure formation in step 5:

[0151]

[0152] Where T(x,y,z,t) is the temperature at point (x,y,z) at time t, D is the thermal diffusion coefficient of the material, and (x0,y0) is the laser focus position.

[0153] Used to evaluate and optimize the initial surface state of electrode materials to provide good surface conditions for subsequent laser etching;

[0154] Improve the efficiency and accuracy of laser etching, reduce unnecessary energy consumption and time waste, and improve the quality of nanostructures;

[0155] By precisely controlling the distribution of laser energy and the material temperature field, high-quality nanostructures are formed to optimize the electrical properties and mechanical strength of the electrode.

[0156] The thickness of the packaging material ranges from 50 μm to 200 μm, and the volume fraction of the boron nitride nanosheets ranges from 5% to 10%.

[0157] The thickness of the packaging material and the volume fraction of the boron nitride nanosheets work together to significantly improve the heat dissipation capacity of the chip. Boron nitride nanosheets have excellent thermal conductivity and form a thermal conductive network in the packaging material, which can quickly transfer the heat generated inside the chip to the outside and reduce the operating temperature of the chip.

[0158] The packaging material itself has excellent electrical insulation properties, which can effectively isolate the internal circuit of the chip from external electromagnetic interference and ensure the electromagnetic compatibility of the chip. The introduction of boron nitride nanosheets improves the mechanical properties of the material, further optimizes the electrical insulation, and prevents the electromagnetic field inside the chip from interfering with external devices.

[0159] Boron nitride nanosheets as a reinforcement phase can significantly improve the mechanical strength and impact resistance of packaging materials, preventing chips from being damaged by mechanical stress during transportation, installation or use. The packaging layer with a thickness of 50 to 200 microns can effectively protect the chip from external physical damage, such as scratches, vibrations and impacts.

[0160] The addition of boron nitride nanosheets in the packaging material improves the material's resistance to chemical corrosion, which can resist the erosion of the chip by harsh conditions such as moisture, acid and alkali environments, ensuring the long-term stable operation of the chip in various environments.

[0161] The full-wave rectifier used in the high-efficiency rectification circuit adopts Schottky diodes, and a capacitor filter is integrated after the rectifier to reduce ripple.

[0162] The combination of full-wave rectifier and capacitor filter can efficiently convert the input AC signal into a smooth DC signal, significantly improving the rectification effect, and is used in situations where efficient energy conversion is required;

[0163] By using Schottky diodes and capacitor filters, the energy loss in the rectification process can be minimized, and the ripple in the rectifier output can be effectively filtered to improve the overall efficiency of energy conversion;

[0164] The use of Schottky diodes in the rectifier can significantly reduce voltage loss and heat loss, improve rectification efficiency, and the integration of capacitor filters makes the output voltage more stable, further improving the utilization efficiency and power quality of the power supply;

[0165] Capacitor filters can effectively reduce ripples and noise in the output voltage, avoid affecting subsequent circuits, and improve system stability and reliability. They are used in microelectronic systems that have high requirements for power supply stability.

[0166] Real-time optical detection technology uses laser interferometry to dynamically monitor the alignment accuracy of each coil layer and automatically adjust the system to correct processing deviations. The algorithm formula is as follows:

[0167] The basic formula of laser interferometry is based on the phase difference of light to detect surface topography or displacement. For interfering light, the interference intensity I(x,y) is calculated by the following formula:

[0168]

[0169] Where, I(x,y) is the interference intensity at point (x,y); I0 is the average intensity of the incident light; λ is the wavelength of the laser; d(x,y) is the interference optical path difference; Δφ is the phase difference;

[0170] The phase unwrapping algorithm is based on the phase φ(x, y) in the interference pattern, which will be limited to [-π, π], resulting in phase jumps. The actual phase distribution must be calculated using the phase unwrapping algorithm. The formula is as follows:

[0171] φ unwrap (x,y)=φ(x,y)+2π·N(x,y),

[0172] Among them, φ(x, y) is the measured phase value; φ(x, y) is an integer multiple of 2π, and its value is determined by the phase difference between adjacent pixels and is determined by the following rules:

[0173]

[0174] Through the laser interferometry measurement formula, the changes in sample surface or displacement can be monitored with high precision, providing support for real-time monitoring of multi-layer structure processing accuracy;

[0175] Through the phase unwrapping algorithm, the phase jump phenomenon in the measurement is eliminated, and the continuous phase distribution corresponding to the actual structural change is obtained, ensuring the accuracy of morphology reconstruction and displacement detection;

[0176] Laser interferometry is used to monitor the alignment accuracy of each coil layer in real time, and the automatic adjustment system is used to dynamically correct the processing deviation, improve the stability and accuracy of the processing process, and avoid performance degradation caused by poor alignment during the processing.

[0177] The feedback and automatic adjustment system of processing deviation can automatically adjust the position error in the processing process by dynamically detecting the deviation. The proportional-integral-differential controller is used to adjust the position of the processing equipment or other processing parameters. The control algorithm is as follows:

[0178]

[0179] Where, u(t) is the control output; K p is the proportional gain; K i is the integral gain; K d is the differential gain;

[0180] Fourier transform analysis of interference image. To detect high-frequency noise and periodic errors, Fourier transform analysis is performed on the interference image. The two-dimensional Fourier transform of the interference image I(x,y) for:

[0181]

[0182] Through Fourier spectrum analysis, high-frequency noise components are identified and filtered out, and useful low-frequency displacement information is extracted for feedback adjustment.

[0183] The proportional-integral-differential controller detects position deviations during processing in real time and dynamically adjusts processing parameters and equipment positions to improve processing accuracy and consistency;

[0184] Fourier transform can identify high-frequency noise and periodic errors in interference images, filter out noise through spectrum analysis, and extract useful low-frequency information for feedback adjustment;

[0185] Using the results of Fourier spectrum analysis in the feedback signal of the proportional-integral-differential controller can accurately correct the periodic errors and random deviations in the machining process and improve the stability and accuracy of the overall machining process.

[0186] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A method for processing a passive chip for magnetic field energy collection, characterized in that: The method comprises the following steps: S1, providing a chip having a flexible substrate, and depositing a first dielectric layer on the surface of the substrate to isolate the substrate from the coil; S2, using three-dimensional micro-nano processing technology to form a three-dimensional spiral coil structure on the dielectric layer, and the coils are stacked layer by layer in an asymmetric spiral form along a direction perpendicular to the substrate; S3. In the process of forming the coil, a multi-wire cross-arrangement design is used to maximize the inductance increment per unit area. The optimized inductance value L is calculated by the following formula: Where μ0 is the vacuum magnetic permeability, N is the total number of coil turns, A is the cross-sectional area of ​​the coil, l is the coil length, k i is the coil coupling coefficient of the i-th layer, and n is the number of wiring harness layers; S4, forming nanomaterial electrodes at the upper and lower ends of the coil, and reducing the electrode contact resistance through plasma surface treatment technology; S5, introducing a flexible composite material layer between each coil layer, wherein the flexible composite material layer is composed of polyimide and carbon nanotubes; S6. Using a polymer packaging material with good thermal conductivity on the chip surface, and doping boron nitride nanosheets into the packaging material; S7. Integrate a high-efficiency rectifier circuit and a power management module inside the chip. The rectifier circuit adopts a full-wave rectifier structure and cooperates with a DC-DC conversion circuit to achieve efficient conversion of magnetic field energy and output stability. S8, performing plasma treatment on the entire passive chip to remove impurities; S9, performing laser annealing treatment on the processed chip; S10. During the chip manufacturing process, real-time optical detection and automatic alignment technology are used to achieve precise alignment of each layer of coils.

2. The method for processing a passive chip for collecting magnetic field energy according to claim 1, characterized in that: The steps of forming the three-dimensional spiral coil include using laser direct writing technology. The three-dimensional spiral structure manufacturing process includes laser beam trajectory, focus control and laser processing path. The algorithm formula is as follows: The laser focus trajectory formula refers to the movement path of the laser focus in space during the processing process. The calculation formula of the focus trajectory is as follows: x(t)=r(t)·cos(ωt), y(t)=r(t)·sin(ωt), z(t)=h(t), Among them, t is the time variable; r(t) is the time-varying radius, defined as r(t) = r0 + αt (where r0 is the initial radius and α is the expansion coefficient); ω is the angular velocity, which determines the rotation speed of the spiral; h(t) is the change in focal height, defined as a linear function h(t)=h0+βt (where h0 is the initial height and β is the rate of change of height); The focus control and dynamic compensation algorithm, in a three-dimensional structure, the dynamic compensation algorithm of the focus is used to correct the focal length offset, and the dynamic compensation formula of the focus position is as follows: z′(t)=z(t)+Δz(t), where z(t) is the height of the target processing surface; Δz(t) is the focus compensation amount, and the calculation formula is as follows: Where n is the refractive index; λ is the laser wavelength; d(t) is the distance between the laser focus and the target surface; D is the dynamically adjusted reference distance; The laser processing path optimization algorithm needs to optimize the laser processing path during the laser direct writing process. The path optimization formula is expressed as: Where, E(x,y,z) is the laser energy consumption function; γ is the path weight coefficient; is the speed of the laser focus in the x, y, and z directions.

3. The method for processing a passive chip for collecting magnetic field energy according to claim 1, characterized in that: The thickness of the flexible composite material layer is in the range of 10 μm to 50 μm, wherein the content of the carbon nanotubes accounts for 1% to 5% of the total volume of the composite material layer.

4. The method for processing a passive chip for collecting magnetic field energy according to claim 1, characterized in that: The coil is made of copper or silver material, and surface nano-processing technology is used in the processing process. In the surface nano-processing of conductive materials such as copper or silver, an algorithm is used to control the formation and growth process of the nanostructure. The following is the algorithm formula for surface nano-processing: Kinetic model of nanoparticle growth: Nanoparticle processing usually involves the deposition and growth of nanoparticles, and the growth rate is described by the Ostwald ripening equation: Where R(t) is the average radius of the nanoparticles at time t; γ is the surface energy of the particles; V m is the molar volume of the particle; D is the diffusion coefficient; C s is the surface saturation concentration; R is the gas constant; T is the temperature; The nanostructure formation formula during the electrodeposition process: During the electrodeposition process, the local current density j(x, y, t) is described by the following differential equation: Wherein, j(x, y, t) is the current density; D is the ion diffusion coefficient; C(x, y, t) is the ion concentration distribution; z is the valence state of the deposited ion; F is the Faraday constant; R is the gas constant; T is the absolute temperature; φ(x, y, t) is the potential distribution; Phase field model of nanowire growth: The dynamics of nanowire growth is described using a phase field model. The evolution equation of the phase field variable φ(x, y, z, t) is as follows: Where M is the momentum coefficient; ∈ is the interface width parameter; f′(φ) is the derivative of the free energy density, usually in the form of f′(φ)=2φ(1-φ)(1-2φ).

5. The method for processing a passive chip for collecting magnetic field energy according to claim 1, characterized in that: The electrode forming step includes performing laser etching on the surface of the nanomaterial electrode; the specific implementation steps of the laser etching process are as follows: Step 1: Clean the surface of the electrode material to remove the oxide layer and impurities; fix the nanomaterial electrode on the laser etching table and use an optical microscope to focus on the electrode surface; Step 2: Set the wavelength, pulse width and power of the laser; adjust the optical path of the laser, adjust the laser focus to the electrode surface through the focusing lens group, and calibrate the laser spot size; Step 3: Design the laser etching pattern; use computer-aided design software to generate the laser scanning path and import it into the laser etching control system; Step 4: Start laser etching, perform point-by-point or continuous etching according to the preset scanning path, and monitor the energy distribution and thermal effect during the etching process in real time; Step 5: During the laser etching process, the photothermal effect is used to form nanometer-sized holes, grooves or other structures, and the laser power and scanning speed are adjusted; through multiple etching cycles, complex nanostructures are built layer by layer; Step 6: After laser etching is completed, the electrical performance of the electrode surface is tested; According to the test results, adjust the laser etching parameters or perform secondary etching; Step 7: Use atomic force microscopy and scanning electron microscopy to characterize the morphology and microstructure of the electrode surface and analyze the morphology of the nanostructure after etching; Optimize laser etching process parameters based on the characterization results.

6. The method for processing a passive chip for collecting magnetic field energy according to claim 5, characterized in that: The surface roughness R in step 1 q The calculation formula is: Where N is the number of sampling points, z i is the height of the i-th sampling point, is the average surface height; The scanning path optimization algorithm formula in step 3 is: Among them, (x i ,y i ) is the coordinate of the i-th etching point, and n is the number of etching points; Photothermal effect model of the nanostructure formed in step 5: Where T(x,y,z,t) is the temperature at point (x,y,z) at time t, D is the thermal diffusion coefficient of the material, and (x0,y0) is the laser focus position.

7. The method for processing a passive chip for collecting magnetic field energy according to claim 1, characterized in that: The thickness of the packaging material is in the range of 50 μm to 200 μm, and the volume fraction of the boron nitride nanosheets is in the range of 5% to 10%.

8. The method for processing a passive chip for collecting magnetic field energy according to claim 1, characterized in that: The full-wave rectifier used in the high-efficiency rectification circuit adopts a Schottky diode, and a capacitor filter is integrated after the rectifier to reduce ripples.

9. The method for processing a passive chip for collecting magnetic field energy according to claim 1, characterized in that: The real-time optical detection technology uses a laser interferometry method to dynamically monitor the alignment accuracy of each coil layer and automatically adjust the system to correct the processing deviation. The algorithm formula is as follows: The basic formula of laser interferometry is to detect surface topography or displacement based on the phase difference of light. For the interference light, the interference intensity I(x,y) is calculated by the following formula: Where, I(x,y) is the interference intensity at point (x,y); I0 is the average intensity of the incident light; λ is the wavelength of the laser; d(x,y) is the interference optical path difference; Δφ is the phase difference; The phase unwrapping algorithm is based on the phase φ(x, y) in the interference pattern, which is limited to [-π, π], resulting in phase jumps. The actual phase distribution must be calculated using the phase unwrapping algorithm. The formula is as follows: φ unwrap (x,y)=φ(x,y)+2π·N(x,y), Among them, φ(x, y) is the measured phase value; φ(x, y) is an integer multiple of 2π, and its value is determined by the phase difference between adjacent pixels and is determined by the following rules:

10. The method for processing a passive chip for collecting magnetic field energy according to claim 9, characterized in that: The feedback and automatic adjustment system of the processing deviation dynamically detects the deviation, and the automatic adjustment system corrects the position error in the processing process, and uses a proportional-integral-differential controller to adjust the position of the processing equipment or other processing parameters. The control algorithm is: Where, u(t) is the control output; K p is the proportional gain; K i is the integral gain; K d is the differential gain; The Fourier transform analysis of the interference image is to detect high-frequency noise and periodic errors. The two-dimensional Fourier transform of the interference image I(x, y) is for: Through Fourier spectrum analysis, high-frequency noise components are identified and filtered out, and useful low-frequency displacement information is extracted for feedback adjustment.

Citation Information

Patent Citations

  • Chip processing method

    CN116536635A

Cited By

  • Photoelectric chip surface high-precision etching method and device

    CN119566554A

  • A method and device for high-precision etching of the surface of an optoelectronic chip

    CN119566554B