Spin orbit moment magnetic tunnel junction and majority gate spin logic device and cascade thereof

Abstract

The invention discloses a spin orbit moment magnetic tunnel junction, a majority gate spin logic device and cascade of the majority gate spin logic device, and the magnetic tunnel junction comprises an electrode layer, an artificial antiferromagnetic reference layer, an insulating tunneling layer, a magnetization free layer and an abnormal spin orbit moment layer which are sequentially stacked from top to bottom, the artificial antiferromagnetic reference layer comprises a first ferromagnetic layer, a non-magnetic spacer layer and a second ferromagnetic layer which are sequentially stacked from top to bottom, and the first ferromagnetic layer has vertical magnetization with a fixed direction; the electrode layer in contact with the first ferromagnetic layer has in-plane polarization to adjust the magnetization direction of the second ferromagnetic layer, and the magnetic free layer has vertical magnetization with variable direction; and the abnormal spin-orbit moment layer in contact with the magnetic free layer has an in-plane magnetization direction to generate an abnormal spin Hall effect, so that the magnetization of the magnetic free layer is overturned, the resistance state of the spin-orbit moment magnetic tunnel junction is changed, and a logic function is realized.

Description

Technical Field

[0001] The invention relates to the technical field of magnetic tunnel junction based on electric field regulation of RKKY and spin-orbit moment, in particular to a spin-orbit moment magnetic tunnel junction and a majority gate spin logic device and a cascade thereof. Background Art

[0002] Traditional logic devices have encountered a series of challenges on the road to development, mainly focusing on energy consumption, manufacturing complexity, and the limitations of atomic-scale physical limits. These problems restrict the performance of traditional semiconductor devices in meeting the needs of artificial intelligence. However, with the deepening of scientific research and the advancement of technology, logic devices based on electron spins provide a new path to solve these challenges.

[0003] The magnetic tunnel junction (MTJ) is the core part of the spin logic device. Currently, logic is mostly achieved by flipping the magnetic moment of the free layer through an external magnetic field, the STT effect, the SOT effect, and flipping the reference layer through the SOT effect. Using an external magnetic field to achieve deterministic flipping is not conducive to the production of high-density and large-capacity memory, and the performance and power consumption will also be affected. Although the power consumption of logic devices based on the STT effect has been greatly reduced compared to CMOS devices, it is still much greater than that of logic devices based on the SOT effect. However, ordinary SOT effect logic devices cannot achieve deterministic flipping of the magnetic free layer, which has become the main reason restricting the development of SOT effect logic devices.

[0004] The information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known to a person of ordinary skill in the art. Summary of the invention

[0005] In view of the shortcomings or defects of the above-mentioned prior art, a spin-orbit moment magnetic tunnel junction and a majority gate spin logic device and their cascade are provided, which adopt the anomalous spin Hall effect to realize the magnetization reversal of the magnetic free layer, and utilize the ferroelectric polarization electric field to regulate the RKKY effect to flip the magnetization direction of the reference layer. A logic device capable of realizing Boolean logic is proposed based on the MTJ, which effectively solves the problems of energy consumption and indeterminate reversal.

[0006] The purpose of the present invention is achieved through the following technical solutions.

[0007] A spin-orbit moment magnetic tunnel junction comprises an electrode layer, an artificial antiferromagnetic reference layer, an insulating tunnel layer, a magnetization free layer, and an anomalous spin-orbit moment layer stacked in sequence from top to bottom, wherein the artificial antiferromagnetic reference layer comprises a first ferromagnetic layer, a non-magnetic spacer layer, and a second ferromagnetic layer stacked in sequence from top to bottom, the first ferromagnetic layer has a vertical magnetization with a fixed direction; the electrode layer in contact with the first ferromagnetic layer has an in-plane polarization to adjust the magnetization direction of the second ferromagnetic layer, the magnetic free layer has a vertical magnetization with a variable direction, and the electrode layer is subjected to a polarization to adjust the magnetization direction of the second ferromagnetic layer. A voltage is applied to adjust the polarization direction to a vertical direction, so as to generate charge transfer and ferroelectric polarization electric field in the vertical direction, so as to flip the artificial antiferromagnetic reference layer between the antiferromagnetic coupling state and the ferromagnetic coupling state, thereby changing the magnetization direction of the second ferromagnetic layer in the artificial antiferromagnetic reference layer to realize the logic function; the anomalous spin-orbit moment layer in contact with the magnetic free layer has an in-plane magnetization direction to generate an anomalous spin Hall effect, so as to flip the magnetization of the magnetic free layer, thereby changing the spin-orbit moment magnetic tunnel junction resistance state to realize the logic function.

[0008] In the spin-orbit moment magnetic tunnel junction, an in-plane current is applied to the anomalous spin-orbit moment layer to generate an out-of-plane spin current based on the anomalous spin Hall effect. After the spin current flows into the magnetic free layer, the magnetization direction of the magnetic free layer is flipped to be the same direction as the spin polarization direction, thereby realizing the switching of the spin-orbit moment magnetic tunnel junction between a high resistance state and a low resistance state.

[0009] In the spin-orbit moment magnetic tunnel junction, the anomalous spin-orbit moment layer is composed of magnetic point groups 1, , , and The magnetic material composition includes Mn 2 SbO 6 Cr 2 S 3 , Fe 4 O 5 、GaFeO 3 ScFeO 3 , FeF 3 、NdFeO 3 .

[0010] In the spin-orbit moment magnetic tunnel junction, the electrode layer is formed by an insulating or semiconductor ferroelectric material, and the semiconductor ferroelectric material includes BaTiO 3 、BiFeO 3 、 PbTiO 3 、SrTiO 3 、HZO.

[0011] In the spin-orbit moment magnetic tunnel junction, the magnetization free layer includes a magnetic material that provides TMR and perpendicular anisotropy, and the perpendicular anisotropy magnetic material includes CoFe, CoCrPt, and CoFeB.

[0012] In the spin-orbit moment magnetic tunnel junction, the first ferromagnetic layer and the second ferromagnetic layer are perpendicularly anisotropic magnetic materials with interlayer coupling strength, which include Ni, CoCrPt, (Co / Pd) m or (Co / Pt) n , where m and n refer to the number of repetitions of multilayer stacking; the non-magnetic spacer layers include Au, Cu, Ag, Re, Ru, Os, and Rh.

[0013] A majority gate spin logic device comprises four spin-orbit moment magnetic tunnel junctions, which are sequentially recorded as input MTJ1, input MTJ2, control MTJ and output MTJ. The free layer magnetization direction of the input MTJ1, the free layer magnetization direction of the input MTJ2 and the free magnetization direction of the control MTJ are determined by the direction and magnitude of the in-plane current applied by injecting an abnormal spin-orbit moment layer. The free layer magnetization direction of the output MTJ is jointly determined by the free layer magnetization direction of the input MTJ1, the free layer magnetization direction of the input MTJ2 and the free magnetization direction of the control MTJ. The resistance state of the output MTJ is determined according to the magnetization direction of the free layer and the magnetization direction of the insulating tunnel layer. After the in-plane current is applied to the abnormal spin-orbit moment layer, the domain wall moves from the input MTJ1, the input MTJ2 and the control MTJ to the output MTJ4. The free layer magnetization direction is determined by the movement of the domain wall. The dynamic situation determines that when the control MTJ is controlled to be in a high-resistance state, the output MTJ and the input MTJ1 and the input MTJ2 realize an "OR" logic, at this time, the first ferromagnetic layer and the second ferromagnetic layer of the output MTJ are flipped from the antiferromagnetic coupling state to the ferromagnetic coupling state, and the output MTJ and the input MTJ1 and the input MTJ2 realize an "OR" logic; when the control MTJ is controlled to be in a low-resistance state, the output MTJ and the output MTJ1 and the output MTJ2 realize an "AND" logic, at this time, the first ferromagnetic layer and the second ferromagnetic layer of the output MTJ are flipped from the antiferromagnetic coupling state to the ferromagnetic coupling state, and the output MTJ and the input MTJ1 and the input MTJ2 realize an "AND" logic.

[0014] The majority gate spin logic device has a cross structure with four branches, two of which are input branches, one is a control branch, and one is an output branch; the input MTJ1 and the input MTJ2 are respectively located at the endpoints of the two input branches, the control MTJ is located at the endpoint of the control branch, and the output MTJ is located at the endpoint of the output branch.

[0015] A cascaded majority gate spin logic device includes four majority gate spin logic devices, which are respectively recorded as majority gate spin logic device 1, majority gate spin logic device 2, majority gate spin logic device 3, and majority gate spin logic device 4. The output MTJ free layer of majority gate spin logic device 1 is cascaded with the input MTJ1 free layer of majority gate spin logic device 3 through copper wires, the output MTJ free layer of majority gate spin logic device 2 is cascaded with the input MTJ2 free layer of majority gate spin logic device 3 through copper wires, majority gate spin logic device 1, majority gate spin logic device 2, and majority gate spin logic device 3 together constitute a "Diff" output group, and majority gate spin logic device 4 serves as a "Borrow" output group; An input current I1 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ1 of the majority gate spin logic device 1; an input current I2 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ2 of the majority gate spin logic device 1; a control current J1 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the control MTJ of the majority gate spin logic device 1 to put it in a low resistance state, and the majority gate spin logic device 1 realizes "AND" logic; An input current I3 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ1 of the majority gate spin logic device 2, and the input current I3 is the same as the input current I1 in magnitude and opposite in direction; an input current I4 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ2 of the majority gate spin logic device 2, and the input current I4 is the same as the input current I2 in magnitude and opposite in direction; a control current J2 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the control MTJ of the majority gate spin logic device 2 to put it in a low resistance state, and the control current J1 is the same as the control current J2 in magnitude and direction, so that the majority gate spin logic device 2 realizes "AND" logic; A control current J3 parallel to the membrane surface is injected into the abnormal orbital moment layer of the control MTJ of the majority gate spin logic device 3 to make it in a high resistance state, wherein the control current J3 is equal to the control current J1 and the control current J2 in magnitude and opposite in direction, and the "exclusive OR" logic of the cascade majority gate spin logic device is realized; An input current I5 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ1 of the majority gate spin logic device 4, and the input current I5 is the same as the input current I1 in magnitude and opposite in direction; an input current I6 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ2 of the majority gate spin logic device 4, and the input current I6 is the same as the input current I2 in magnitude and opposite in direction; a control current J4 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the control MTJ of the majority gate spin logic device 1 to put it in a low resistance state, and the control current J4 is the same as the control current J1 and the control current J2 in magnitude and direction, and the majority gate spin logic device 4 implements "AND" logic; The output MTJ of the majority gate spin logic device 3 serves as the "Diff" output terminal for implementing the half subtractor logic, the output MTJ of the majority gate spin logic device 4 serves as the "Borrow" output terminal for implementing the half subtractor logic, the input MTJ1 of the majority gate spin logic device 1, the input MTJ1 of the majority gate spin logic device 2 and the input MTJ1 of the majority gate spin device 4 serve together as the subtrahend input terminal for implementing the half subtractor logic, and the input MTJ2 of the majority gate spin logic device 1, the input MTJ2 of the majority gate spin logic device 2 and the input MTJ2 of the majority gate spin device 4 serve together as the minuend input terminal for implementing the half subtractor logic.

[0016] The cascade majority gate spin logic device is a symmetrical structure that realizes the function of a one-bit half-subtractor.

[0017] Compared with the prior art, the present invention has the following beneficial effects: The spin-orbit moment magnetic tunnel junction with flippable magnetization of the reference layer of the present invention adopts an elliptical structure, increases the shape anisotropy in the free layer, effectively improves the flipping speed, and reduces power consumption. Since the anomalous spin Hall effect is used to realize the data writing of MTJ, compared with the STT assisted flipping, the current density passing through the memory is effectively reduced, and the possibility of damage to the device due to breakdown is avoided to a great extent, the reliability of the device is effectively improved, and the power consumption is reduced. The majority gate spin logic device supports the cascading of devices to form a logic circuit and performs more complex logic functions such as half-subtractors. The majority gate spin logic device based on the spin-orbit moment can realize the directional flipping of the free layer in the MTJ without an external magnetic field, which is conducive to the production of low-cost, high-density, and large-capacity logic devices, and improves the performance, and has the functions of non-volatile storage and reprogrammable. The present invention adjusts the polarization direction of the electrode layer by applying a voltage, so that the polarization direction is regulated to the vertical direction, thereby generating a large charge transfer and ferroelectric polarization electric field in the vertical direction, changing the coupling state of the artificial antiferromagnetic reference layer and realizing the magnetization flipping of the reference layer, effectively improving the reliability of the device and reducing power consumption. As a majority gate spin device array, the manufacturing process of MTJ is compatible with CMOS process and is easy to integrate. Most importantly, the present invention can realize the functions of storage and operation in 4 MTJ units, thereby reducing the demand for multiple memories, reducing the area of ​​corresponding bodies and equipment, reducing the complexity of the system, improving cost-effectiveness and extending battery life. In addition, this device design is less affected by accidental errors, and when there is a certain deviation in the parameters, the device can still work normally.

[0018] The above description is only an overview of the technical solution of the present invention. In order to make the technical means of the present invention clearer and to achieve the extent that those skilled in the art can implement it according to the contents of the specification, and in order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are exemplified below. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] By reading the detailed description of the preferred specific embodiments below, various other advantages and benefits of the present invention will become clear to those of ordinary skill in the art. The drawings in the specification are only for the purpose of illustrating the preferred embodiments and are not considered to be limitations of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings without creative work. Moreover, the same reference numerals are used to represent the same components throughout the drawings.

[0020] In the attached picture: Figure 1 A structural diagram of a spin-orbit moment magnetic tunnel junction with flippable reference layer magnetization is provided for an embodiment of the present invention; Figure 2 Schematic diagram of the principle of injecting current into the anomalous orbital moment layer to achieve the flipping of the free layer of the magnetic tunnel junction; Figure 3 Schematic diagram of the reference layer flipping of the magnetic tunnel junction by applying voltage to the electrode layer; Figure 4 A top view of a majority gate spin logic device based on a spin-orbit moment magnetic tunnel junction with flippable reference layer magnetization provided by an embodiment of the present invention; Figure 5 A side structural diagram of a majority gate spin logic device based on a spin-orbit moment magnetic tunnel junction with flippable reference layer magnetization provided by an embodiment of the present invention; Figure 6 A logic circuit diagram of a cascaded majority gate spin logic device implementing a "half-subtractor" logic according to an embodiment of the present invention.

[0021] The present invention is further explained below in conjunction with the accompanying drawings and embodiments. DETAILED DESCRIPTION

[0022] The specific embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although the specific embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided in order to enable a more thorough understanding of the present invention and to enable the scope of the present invention to be fully communicated to those skilled in the art.

[0023] It should be noted that certain words are used in the specification and claims to refer to specific components. Those skilled in the art should understand that technicians may use different nouns to refer to the same component. This specification and claims do not use the difference in nouns as a way to distinguish components, but use the difference in the functions of the components as the criterion for distinction. As mentioned throughout the specification and claims, "including" or "comprising" is an open term, so it should be interpreted as "including but not limited to". The subsequent description of the specification is a preferred embodiment of the present invention, but the description is based on the general principles of the specification and is not intended to limit the scope of the present invention. The scope of protection of the present invention shall be determined by the attached claims.

[0024] To facilitate understanding of the embodiments of the present invention, several specific embodiments will be further explained below with reference to the accompanying drawings, and each of the accompanying drawings does not constitute a limitation on the embodiments of the present invention.

[0025] For a better understanding, Figures 1 to 6 As shown, a spin-orbit moment magnetic tunnel junction includes an electrode layer, an artificial antiferromagnetic reference layer, an insulating tunnel layer, a magnetization free layer, and an anomalous spin-orbit moment layer stacked in sequence from top to bottom, wherein the artificial antiferromagnetic reference layer includes a first ferromagnetic layer, a non-magnetic spacer layer, and a second ferromagnetic layer stacked in sequence from top to bottom, the first ferromagnetic layer has a vertical magnetization with a fixed direction; the electrode layer in contact with the first ferromagnetic layer has an in-plane polarization to adjust the magnetization direction of the second ferromagnetic layer, the magnetic free layer has a vertical magnetization with a variable direction, and the electrode layer is connected to the magnetic field of the second ferromagnetic layer. A voltage is applied to adjust the polarization direction to a vertical direction, so as to generate charge transfer and ferroelectric polarization electric field in the vertical direction, so as to flip the artificial antiferromagnetic reference layer between the antiferromagnetic coupling state and the ferromagnetic coupling state, thereby changing the magnetization direction of the second ferromagnetic layer in the artificial antiferromagnetic reference layer to realize the logic function; the anomalous spin-orbit moment layer in contact with the magnetic free layer has an in-plane magnetization direction to generate an anomalous spin Hall effect, so as to flip the magnetization of the magnetic free layer, thereby changing the spin-orbit moment magnetic tunnel junction resistance state to realize the logic function.

[0026] In a preferred embodiment of the spin-orbit moment magnetic tunnel junction, an in-plane current is applied to the anomalous spin-orbit moment layer to generate an out-of-plane spin current based on the anomalous spin Hall effect. After the spin current flows into the magnetic free layer, the magnetization direction of the magnetic free layer is flipped to be the same as the spin polarization direction, thereby realizing the switching of the spin-orbit moment magnetic tunnel junction between a high-resistance state and a low-resistance state.

[0027] In the preferred embodiment of the spin-orbit moment magnetic tunnel junction, the anomalous spin-orbit moment layer is composed of magnetic point groups 1, , , and The magnetic material composition includes Mn 2 SbO 6 Cr 2 S 3 , Fe 4 O 5 、GaFeO 3 ScFeO 3 , FeF 3 、NdFeO 3 .

[0028] In a preferred embodiment of the spin-orbit moment magnetic tunnel junction, the electrode layer is formed of an insulating or semiconductor ferroelectric material, and the semiconductor ferroelectric material includes BaTiO 3 、BiFeO 3 、 PbTiO 3 、SrTiO 3 、HZO.

[0029] In a preferred embodiment of the spin-orbit moment magnetic tunnel junction, the magnetization free layer includes a magnetic material that provides TMR and perpendicular anisotropy, and the magnetic material with perpendicular anisotropy includes CoFe, CoCrPt, and CoFeB.

[0030] In the preferred embodiment of the spin-orbit moment magnetic tunnel junction, the first ferromagnetic layer and the second ferromagnetic layer are perpendicularly anisotropic magnetic materials with interlayer coupling strength, which include Ni, CoCrPt, (Co / Pd) m or (Co / Pt) n , where m and n refer to the number of repetitions of multilayer stacking; the non-magnetic spacer layers include Au, Cu, Ag, Re, Ru, Os, and Rh.

[0031] A majority gate spin logic device comprises four spin-orbit moment magnetic tunnel junctions, which are sequentially recorded as input MTJ1, input MTJ2, control MTJ and output MTJ. The free layer magnetization direction of the input MTJ1, the free layer magnetization direction of the input MTJ2 and the free magnetization direction of the control MTJ are determined by the direction and magnitude of the in-plane current applied by injecting an abnormal spin-orbit moment layer. The free layer magnetization direction of the output MTJ is jointly determined by the free layer magnetization direction of the input MTJ1, the free layer magnetization direction of the input MTJ2 and the free magnetization direction of the control MTJ. The resistance state of the output MTJ is determined according to the magnetization direction of the free layer and the magnetization direction of the insulating tunnel layer. After the in-plane current is applied to the abnormal spin-orbit moment layer, the domain wall moves from the input MTJ1, the input MTJ2 and the control MTJ to the output MTJ4. The free layer magnetization direction is determined by the movement of the domain wall. The dynamic situation determines that when the control MTJ is controlled to be in a high-resistance state, the output MTJ and the input MTJ1 and the input MTJ2 realize an "OR" logic, at this time, the first ferromagnetic layer and the second ferromagnetic layer of the output MTJ are flipped from the antiferromagnetic coupling state to the ferromagnetic coupling state, and the output MTJ and the input MTJ1 and the input MTJ2 realize an "OR" logic; when the control MTJ is controlled to be in a low-resistance state, the output MTJ and the output MTJ1 and the output MTJ2 realize an "AND" logic, at this time, the first ferromagnetic layer and the second ferromagnetic layer of the output MTJ are flipped from the antiferromagnetic coupling state to the ferromagnetic coupling state, and the output MTJ and the input MTJ1 and the input MTJ2 realize an "AND" logic.

[0032] In a preferred embodiment of the majority gate spin logic device, it is a cross-shaped structure with four branches, two of which are input branches, one is a control branch, and one is an output branch; the input MTJ1 and the input MTJ2 are respectively located at the end points of the two input branches, the control MTJ is located at the end point of the control branch, and the output MTJ is located at the end point of the output branch.

[0033] A cascaded majority gate spin logic device comprises four majority gate spin logic devices, which are respectively recorded as majority gate spin logic device 1, majority gate spin logic device 2, majority gate spin logic device 3, and majority gate spin logic device 4. The output MTJ free layer of majority gate spin logic device 1 is cascaded with the input MTJ1 free layer of majority gate spin logic device 3 through copper wires, the output MTJ free layer of majority gate spin logic device 2 is cascaded with the input MTJ2 free layer of majority gate spin logic device 3 through copper wires, majority gate spin logic device 1, majority gate spin logic device 2, and majority gate spin logic device 3 together constitute a "Diff" output group, and the majority gate spin logic devices serve as a "Borrow" output group; An input current I1 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ1 of the majority gate spin logic device 1; an input current I2 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ2 of the majority gate spin logic device 1; a control current J1 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the control MTJ of the majority gate spin logic device 1 to put it in a low resistance state, and the majority gate spin logic device 1 realizes "AND" logic; An input current I3 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ1 of the majority gate spin logic device 2, and the input current I3 is the same as the input current I1 in magnitude and opposite in direction; an input current I4 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ2 of the majority gate spin logic device 2, and the input current I4 is the same as the input current I2 in magnitude and opposite in direction; a control current J2 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the control MTJ of the majority gate spin logic device 2 to put it in a low resistance state, and the control current J1 is the same as the control current J2 in magnitude and direction, so that the majority gate spin logic device 2 realizes "AND" logic; A control current J3 parallel to the membrane surface is injected into the abnormal orbital moment layer of the control MTJ of the majority gate spin logic device 3 to make it in a high resistance state, wherein the control current J3 is equal to the control current J1 and the control current J2 in magnitude and opposite in direction, and the "exclusive OR" logic of the cascade majority gate spin logic device is realized; An input current I5 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ1 of the majority gate spin logic device 4, and the input current I5 is the same as the input current I1 in magnitude and opposite in direction; an input current I6 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ2 of the majority gate spin logic device 4, and the input current I6 is the same as the input current I2 in magnitude and opposite in direction; a control current J4 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the control MTJ of the majority gate spin logic device 1 to put it in a low resistance state, and the control current J4 is the same as the control current J1 and the control current J2 in magnitude and direction, and the majority gate spin logic device 4 implements "AND" logic; The output MTJ of the majority gate spin logic device 3 serves as the "Diff" output terminal for implementing the half subtractor logic, the output MTJ of the majority gate spin logic device 4 serves as the "Borrow" output terminal for implementing the half subtractor logic, the input MTJ1 of the majority gate spin logic device 1, the input MTJ1 of the majority gate spin logic device 2 and the input MTJ1 of the majority gate spin device 4 serve together as the subtrahend input terminal for implementing the half subtractor logic, and the input MTJ2 of the majority gate spin logic device 1, the input MTJ2 of the majority gate spin logic device 2 and the input MTJ2 of the majority gate spin device 4 serve together as the minuend input terminal for implementing the half subtractor logic.

[0034] In the preferred embodiment of the cascade majority gate spin logic device, it is a symmetrical structure that realizes the function of a one-bit half-subtractor.

[0035] In one embodiment, the spin-orbit moment magnetic tunnel junction adopts an elliptical structure, and the magnetization of the reference layer is flippable.

[0036] In one embodiment, Figure 1 A spin-orbit moment magnetic tunnel junction provided by the present invention comprises an electrode layer 70, artificial antiferromagnetic reference layers 60, 50, 40, an insulating tunneling layer 30, a magnetization free layer 20, and an anomalous spin-orbit moment layer 10 stacked in sequence from top to bottom, wherein the artificial antiferromagnetic reference layer is composed of a first ferromagnetic layer 60, a non-magnetic spacer layer 50, and a second ferromagnetic layer 40, the magnetic free layer has a direction-variable perpendicular magnetization, and the first ferromagnetic layer 60 of the artificial antiferromagnetic reference layer has a direction-fixed perpendicular magnetization.

[0037] Figure 2 The schematic diagram of the magnetic tunnel junction free layer flipping is shown in FIG. 1 . The first ferromagnetic layer 60 and the second ferromagnetic layer 40 are in an antiferromagnetic coupling state. An external magnetic field is applied to make the magnetization state of the first ferromagnetic layer 60 in the Z direction and the magnetization state of the second ferromagnetic layer 40 in the -Z direction. An external magnetic field is applied to make the magnetization direction of the magnetic free layer 20 in the -Z direction. The magnetization direction of the magnetic free layer 20 and the magnetization direction of the second ferromagnetic layer 40 are arranged in antiparallel. A bias voltage is applied to one of the third electrode 83 and the fourth electrode 84 and the second electrode 82. Based on the basic principle of a spin valve or a magnetic tunnel junction, the low resistance is measured to be a low resistance state (0 state), and the magnetization direction of the spin-orbit moment layer 10 is in the X direction. An in-plane current J is applied between the third electrode 83 and the fourth electrode 84 to flow through the anomalous spin-orbit moment layer 10. When the charge flow J is in the same direction as the magnetization direction of the magnetic moment M, a spin polarized current is generated with both the current direction and the magnetization direction perpendicular to the film surface according to the anomalous spin Hall effect. , spin polarized current The current flows from the anomalous spin-orbit moment layer 10 to the magnetic free layer 20, and the magnetization direction of the magnetic free layer 20 is flipped to the Z direction. The magnetization direction of the magnetic free layer 20 and the magnetization direction of the magnetic fixed layer 40 are arranged in parallel. A bias voltage is applied to one of the third electrode 83 and the fourth electrode 84 and the second electrode 82. Based on the basic principle of a spin valve or a magnetic tunnel junction, the high resistance is measured to be a high resistance state (state 1).

[0038] Figure 3The schematic diagram of the reference layer flipping of the magnetic tunnel junction is shown in FIG. 1 . The initial electrode layer 70 is in an in-plane polarization state. At this time, the coupling coefficient between the first ferromagnetic layer 60 and the second ferromagnetic layer 40 is negative, and the first ferromagnetic layer 60 is in an antiferromagnetic coupling state. The magnetization state of the first ferromagnetic layer 60 is fixed in the Z direction, and the magnetization state of the second ferromagnetic layer 40 is in the -Z direction. An external magnetic field is applied to make the magnetization direction of the magnetic free layer 20 in the -Z direction. The magnetization direction of the magnetic free layer 20 and the magnetization direction of the second ferromagnetic layer 40 are arranged in antiparallel. A bias voltage is applied to one of the third electrode 83 and the fourth electrode 84 and the second electrode 82. Based on the basic principle of the spin valve or magnetic tunnel junction, a high The resistance is in a high resistance state (state 1). A voltage is applied to the electrode layer 70 through the first electrode 81, so that the polarization direction of the electrode layer single layer is adjusted to the vertical direction, thereby generating a large charge transfer and ferroelectric polarization electric field in the vertical direction, so that the first ferromagnetic layer 60 and the second ferromagnetic layer 40 are flipped from the antiferromagnetic coupling state to the ferromagnetic coupling state. At this time, the magnetization state of the second ferromagnetic layer 40 changes to the -Z direction, and the magnetization direction of the magnetic free layer 20 and the magnetization direction of the second ferromagnetic layer 40 are arranged in parallel. A bias is applied to one of the third electrode 83 and the fourth electrode 84 and the second electrode 82. Based on the basic principle of the spin valve or magnetic tunnel junction, the low resistance is measured to be a low resistance state (state 0).

[0039] Figure 4 A top view of a majority gate spin logic device based on a spin-orbit moment magnetic tunnel junction with flippable reference layer magnetization provided by an embodiment of the present invention, Figure 5A side view of a majority gate spin logic device based on a spin-orbit moment magnetic tunnel junction with flippable reference layer magnetization provided in an embodiment of the present invention. The majority gate spin logic device includes four directionally flippable spin-orbit moment magnetic tunnel junctions, which are sequentially recorded as input MTJ1, input MTJ2, control MTJ, and output MTJ; the input MTJ1 includes an electrode layer 71, an artificial antiferromagnetic reference layer 61, 51, 41, an insulating tunneling layer 31, a magnetization free layer 21, and an anomalous spin-orbit moment layer 11 arranged in sequence, wherein the artificial antiferromagnetic reference layer is composed of a first ferromagnetic layer 61, a non-magnetic spacer layer 51, and a second ferromagnetic layer 41; the input MTJ2 includes an electrode layer 72, an artificial antiferromagnetic reference layer 62, 52, 42, an insulating tunneling layer 32, a magnetization free layer 21, and an anomalous spin-orbit moment layer 12 arranged in sequence, wherein the artificial antiferromagnetic reference layer is composed of a first ferromagnetic layer 62, a non-magnetic spacer layer 51, and a second ferromagnetic layer 41; The control MTJ comprises an electrode layer 73, an artificial antiferromagnetic reference layer 63, 53, 43, an insulating tunneling layer 33, a magnetization free layer 21, and an anomalous spin-orbit moment layer 13 arranged in sequence, wherein the artificial antiferromagnetic reference layer is composed of a first ferromagnetic layer 63, a non-magnetic spacer layer 53, and a second ferromagnetic layer 43; the output MTJ comprises an electrode layer 74, an artificial antiferromagnetic reference layer 64, 54, 44, an insulating tunneling layer 34, a magnetization free layer 21, and an anomalous spin-orbit moment layer 14 arranged in sequence, wherein the artificial antiferromagnetic reference layer is composed of a first ferromagnetic layer 64, a non-magnetic spacer layer 54, and a second ferromagnetic layer 44; the input MTJ2, the control MTJ, and the output MTJ are all spin-orbit moment magnetic tunnel junctions with flippable reference layer magnetization.

[0040] The device structure is a cross with four branches, two of which are input branches, one is a control branch, and one is an output branch; input MTJ1 and input MTJ2 are respectively located at the ends of the two input branches, the control MTJ is located at the end of the control branch, and the output MTJ is located at the end of the output branch.

[0041] The principle of realizing logic of the spin-orbit moment magnetic tunnel junction majority gate spin device based on the flippable reference layer magnetization provided by the present invention is: The initial polarization states of the electrode layer 71 in the input MTJ 1 , the electrode layer 72 in the input MTJ 2 , the electrode layer 73 in the control MTJ, and the electrode layer 74 in the output MTJ are uniformly determined to be in-plane polarization.

[0042] The initial coupling states between the first ferromagnetic layer 41 and the second ferromagnetic layer 61 in the input MTJ1, the first ferromagnetic layer 42 and the second ferromagnetic layer 62 in the input MTJ2, the first ferromagnetic layer 43 and the second ferromagnetic layer 63 in the control MTJ, and the first ferromagnetic layer 44 and the second ferromagnetic layer 64 in the output MTJ are uniformly determined to be antiferromagnetic coupling.

[0043] The initial magnetization states of the second ferromagnetic layer 41 in the input MTJ 1, the second ferromagnetic layer 42 in the input MTJ 2, the second ferromagnetic layer 43 in the control MTJ, and the second ferromagnetic layer 44 in the output MTJ are uniformly determined to be in the +z direction, and the magnetization states of the first ferromagnetic layer 61 in the input MTJ 1, the first ferromagnetic layer 62 in the input MTJ 2, the first ferromagnetic layer 63 in the control MTJ, and the first ferromagnetic layer 64 in the output MTJ are fixed to be in the -z direction.

[0044] A current parallel to the film surface is injected into the abnormal spin-orbit moment layer 13 of the control MTJ, so that the magnetization direction of the magnetization free layer 23 of the control MTJ is in the z direction. At this time, the second ferromagnetic layer 43 is arranged in parallel with the magnetization direction of the magnetization free layer 23, showing a low resistance state (0 state) with a low resistance value; a current parallel to the film surface is injected into the abnormal spin-orbit moment layers 11 and 12 of the input MTJ to change the magnetization directions of the magnetization free layers 21 and 22. At this time, through domain wall movement, according to the majority logic, the magnetization state of the output MTJ magnetization free layer 24 is jointly determined by the magnetization free layer 21 of the input MTJ1, the magnetization free layer 22 of the input MTJ2, and the magnetization free layer 23 of the control MTJ, thereby realizing the "AND" logic. At this time, a voltage is applied to the electrode layer 74 of the output MTJ through an external signal source, so that the polarization direction of the electrode layer 74 is adjusted to the vertical direction, thereby generating a larger charge transfer and ferroelectric polarization electric field in the vertical direction, so that the coupling state between the first ferromagnetic layer 64 and the second ferromagnetic layer 44 changes from an antiferromagnetic coupling state to a ferromagnetic coupling state. Since the magnetization direction of the first ferromagnetic layer is fixed to the z direction, the magnetization direction of the second ferromagnetic layer will be flipped from the -z direction to the z direction, thereby realizing a logical output opposite to the "AND" logic, which is the "NAND" logic.

[0045] A current parallel to the film surface is injected into the abnormal spin-orbit moment layer 13 of the control MTJ, so that the magnetization direction of the magnetization free layer 20 of the control MTJ is -z direction. At this time, the magnetization direction of the second ferromagnetic layer 43 and the magnetization free layer 23 are arranged in antiparallel, showing a high resistance state (1 state) with a high resistance value; a current parallel to the film surface is injected into the abnormal spin-orbit moment layers 11 and 12 of the input MTJ to change the magnetization direction of the magnetization free layers 21 and 22. At this time, through domain wall movement, according to the majority logic, the magnetization state of the output MTJ magnetization free layer 24 is jointly determined by the magnetization free layer 21 of the input MTJ1, the magnetization free layer 22 of the input MTJ2, and the magnetization free layer 23 of the control MTJ, thereby realizing the "OR" logic. At this time, a voltage is applied to the electrode layer 74 of the output MTJ through an external signal source, so that the polarization direction of the electrode layer 74 is adjusted to the vertical direction, thereby generating a larger charge transfer and ferroelectric polarization electric field in the vertical direction, so that the coupling state between the first ferromagnetic layer 64 and the second ferromagnetic layer 44 changes from an antiferromagnetic coupling state to a ferromagnetic coupling state. Since the magnetization direction of the first ferromagnetic layer is fixed to the z direction, the magnetization direction of the second ferromagnetic layer will be flipped from the -z direction to the z direction, thereby realizing a logical output opposite to the "AND" logic, which is the "NOR" logic.

[0046] Figure 6 This is the logic circuit diagram for implementing the "half-subtractor" logic using cascaded majority gate spin logic devices.

[0047] Table 1 shows the magnetization directions of the second ferromagnetic layer and free layer of each MTJ in the “half-subtractor” function.

[0048] Table 1 As shown in Table 1, the cascaded majority gate spin logic device provided by the present invention realizes the "half-subtractor" function, which includes a total of 4 majority gate spin logic devices, which are respectively recorded as majority gate spin logic device 1, majority gate spin logic device 2, majority gate spin logic device 3, and majority gate spin logic device 4.

[0049] A control current parallel to the membrane surface is injected into the abnormal orbital moment layer of the MTJ controlled by the majority gate spin logic device 1 and the abnormal orbital moment layer of the MTJ controlled by the majority gate spin logic device 2 to make them both in a low resistance state (0 state). The majority gate spin logic device 1 and the majority gate spin logic device 2 realize the "AND" logic. A control current parallel to the membrane surface is injected into the anomalous orbital moment layer of the control MTJ of the majority gate spin logic device 3 to put it in a high resistance state (state 1), the output MTJ of the majority gate spin logic device 1 and the input MTJ1 of the rotary majority gate logic device 3 are cascaded through copper wires, and the output MTJ of the majority gate spin logic device 2 and the input MTJ2 of the rotary majority gate logic device 3 are cascaded through copper wires as a "Diff" group.

[0050] A control current parallel to the membrane surface is injected into the anomalous orbital moment layer of the MTJ controlled by the majority gate spin logic device 4 to make them all in a low resistance state (0 state). The majority gate spin logic device 4 implements "AND" logic as a "Borrow" group.

[0051] The output MTJ of the majority gate spin logic device 3 serves as the "Diff" output terminal for implementing the half subtractor logic, the output MTJ of the majority gate spin logic device 4 serves as the "Borrow" output terminal for implementing the half subtractor logic, the input MTJ1 of the majority gate spin logic device 1, the input MTJ1 of the majority gate spin logic device 2 and the input MTJ1 of the majority gate spin device 4 serve together as the subtrahend input terminal for implementing the half subtractor logic, and the input MTJ2 of the majority gate spin logic device 1, the input MTJ2 of the majority gate spin logic device 2 and the input MTJ2 of the majority gate spin device 4 serve together as the minuend input terminal for implementing the half subtractor logic.

[0052] The basic principles of the present application are described above in conjunction with specific embodiments. However, it should be noted that the advantages, strengths, effects, etc. mentioned in the present application are only examples and not limitations, and it cannot be considered that these advantages, strengths, effects, etc. are required by each embodiment of the present application. In addition, the specific details disclosed above are only for the purpose of illustration and ease of understanding, not for limitation, and the above details do not limit the present application to being implemented by adopting the above specific details.

[0053] The above description has been given for the purpose of illustration and description. In addition, this description is not intended to limit the embodiments of the present application to the forms disclosed herein. Although multiple example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions and sub-combinations thereof.

Claims

1. A spin-orbit moment magnetic tunnel junction, characterized in that: The invention comprises an electrode layer, an artificial antiferromagnetic reference layer, an insulating tunneling layer, a magnetization free layer and an anomalous spin-orbit moment layer which are stacked in sequence from top to bottom, wherein the artificial antiferromagnetic reference layer comprises a first ferromagnetic layer, a non-magnetic spacer layer and a second ferromagnetic layer which are stacked in sequence from top to bottom, the first ferromagnetic layer has a vertical magnetization with a fixed direction; the electrode layer in contact with the first ferromagnetic layer has an in-plane polarization to adjust the magnetization direction of the second ferromagnetic layer, the magnetic free layer has a vertical magnetization with a variable direction, by applying a voltage to the electrode layer, the polarization direction is regulated to a vertical direction, so as to generate charge transfer and ferroelectric polarization electric field in the vertical direction, so as to switch the artificial antiferromagnetic reference layer between an antiferromagnetic coupling state and a ferromagnetic coupling state, thereby changing the magnetization direction of the second ferromagnetic layer in the artificial antiferromagnetic reference layer and realizing a logic function; the anomalous spin-orbit moment layer in contact with the magnetic free layer has an in-plane magnetization direction to generate an anomalous spin Hall effect, so as to flip the magnetization of the magnetic free layer, thereby changing the spin-orbit moment magnetic tunnel junction resistance state and realizing a logic function.

2. The spin-orbit moment magnetic tunnel junction according to claim 1, characterized in that: Preferably, an in-plane current is applied to the anomalous spin-orbit moment layer to generate an out-of-plane spin current based on the anomalous spin Hall effect. After the spin current flows into the magnetic free layer, the magnetization direction of the magnetic free layer is flipped to be the same as the spin polarization direction, thereby realizing the switching of the spin-orbit moment magnetic tunnel junction between a high-resistance state and a low-resistance state.

3. The spin-orbit moment magnetic tunnel junction according to claim 2, characterized in that: The anomalous spin-orbit moment layer consists of magnetic point group 1, , , and The magnetic materials include Mn2ScSbO6, Cr2S3, Fe4O5, GaFeO3, ScFeO3, FeF3, and NdFeO3.

4. The spin-orbit moment magnetic tunnel junction according to claim 1, characterized in that: The electrode layer is formed of insulating or semiconductor ferroelectric materials, and the semiconductor ferroelectric materials include BaTiO3, BiFeO3, PbTiO3, SrTiO3, and HZO.

5. The spin-orbit moment magnetic tunnel junction according to claim 1, characterized in that: The magnetization free layer includes a magnetic material providing TMR and perpendicular anisotropy. The magnetic material of perpendicular anisotropy includes CoFe, CoCrPt, and CoFeB.

6. The spin-orbit moment magnetic tunnel junction according to claim 1, characterized in that: The first ferromagnetic layer and the second ferromagnetic layer are perpendicularly anisotropic magnetic materials with interlayer coupling strength, which include Ni, CoCrPt, (Co / Pd) m or (Co / Pt) n , where m and n refer to the number of repetitions of multilayer stacking; the non-magnetic spacer layers include Au, Cu, Ag, Re, Ru, Os, and Rh.

7. A majority gate spin logic device, characterized in that: It comprises four spin-orbit moment magnetic tunnel junctions as described in any one of claims 1 to 6, and the four magnetic tunnel junctions are sequentially recorded as input MTJ1, input MTJ2, control MTJ and output MTJ; the free layer magnetization direction of the input MTJ1, the free layer magnetization direction of the input MTJ2 and the free magnetization direction of the control MTJ are determined by the direction and magnitude of the in-plane current applied by injecting the anomalous spin-orbit moment layer; the free layer magnetization direction of the output MTJ is jointly determined by the free layer magnetization direction of the input MTJ1, the free layer magnetization direction of the input MTJ2 and the free magnetization direction of the control MTJ; the resistance state of the output MTJ is determined according to the magnetization direction of the free layer and the magnetization direction of the insulating tunneling layer; after applying the in-plane current to the anomalous spin-orbit moment layer, the domain wall moves from the input MTJ1, the input MTJ2 and the control MTJ to the output MTJ4; the free layer magnetization direction is determined by the movement of the domain wall The dynamic situation determines that when the control MTJ is controlled to be in a high-resistance state, the output MTJ and the input MTJ1 and the input MTJ2 realize an "OR" logic, at this time, the first ferromagnetic layer and the second ferromagnetic layer of the output MTJ are flipped from the antiferromagnetic coupling state to the ferromagnetic coupling state, and the output MTJ and the input MTJ1 and the input MTJ2 realize an "OR" logic; when the control MTJ is controlled to be in a low-resistance state, the output MTJ and the output MTJ1 and the output MTJ2 realize an "AND" logic, at this time, the first ferromagnetic layer and the second ferromagnetic layer of the output MTJ are flipped from the antiferromagnetic coupling state to the ferromagnetic coupling state, and the output MTJ and the input MTJ1 and the input MTJ2 realize an "AND" logic.

8. The majority gate spin logic device according to claim 7, characterized in that: It is a cross-shaped structure with four branches, two of which are input branches, one is a control branch, and one is an output branch; The input MTJ1 and the input MTJ2 are respectively located at two input branch endpoints, the control MTJ is located at an endpoint of the control branch, and the output MTJ is located at an endpoint of the output branch.

9. A cascaded majority gate spin logic device, characterized in that: It comprises four majority gate spin logic devices as claimed in claim 7 or 8, which are respectively recorded as majority gate spin logic device 1, majority gate spin logic device 2, majority gate spin logic device 3, and majority gate spin logic device 4, the output MTJ free layer of majority gate spin logic device 1 and the input MTJ1 free layer of majority gate spin logic device 3 are cascaded through copper wires, the output MTJ free layer of majority gate spin logic device 2 and the input MTJ2 free layer of majority gate spin logic device 3 are cascaded through copper wires, majority gate spin logic device 1, majority gate spin logic device 2, and majority gate spin logic device 3 together constitute a "Diff" output group, and majority gate spin logic device 4 serves as a "Borrow" output group; An input current I1 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ1 of the majority gate spin logic device 1; an input current I2 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ2 of the majority gate spin logic device 1; a control current J1 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the control MTJ of the majority gate spin logic device 1 to put it in a low resistance state, and the majority gate spin logic device 1 realizes "AND" logic; An input current I3 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ1 of the majority gate spin logic device 2, and the input current I3 has the same magnitude as the input current I1 but the opposite direction; an input current I4 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ2 of the majority gate spin logic device 2, and the input current I4 has the same magnitude as the input current I2 but the opposite direction; a control current J2 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the control MTJ of the majority gate spin logic device 2 to put it in a low resistance state, and the control current J1 has the same magnitude and the same direction as the control current J2, so that the majority gate spin logic device 2 realizes "AND" logic; Injecting a control current J3 parallel to the membrane surface into the abnormal orbital moment layer of the control MTJ of the majority gate spin logic device 3 to put it in a high impedance state, wherein the control current J3 is equal to the control current J1 and the control current J2 in magnitude and opposite in direction, cascading the majority gate spin logic device "exclusive OR" logic; An input current I5 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ1 of the majority gate spin logic device 4, and the input current I5 has the same magnitude as the input current I1 but the opposite direction; an input current I6 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the input MTJ2 of the majority gate spin logic device 4, and the input current I6 has the same magnitude as the input current I2 but the opposite direction; a control current J4 parallel to the membrane surface is injected into the abnormal spin-orbit moment layer of the control MTJ of the majority gate spin logic device 1 to put it in a low resistance state, and the control current J4 has the same magnitude as the control current J1 and the control current J2, and the majority gate spin logic device 4 implements "AND" logic; The output MTJ of the majority gate spin logic device 3 is used as the "Diff" output terminal for realizing the half subtractor logic, the output MTJ of the majority gate spin logic device 4 is used as the "Borrow" output terminal for realizing the half subtractor logic, the input MTJ1 of the majority gate spin logic device 1, the input MTJ1 of the majority gate spin logic device 2 and the input MTJ1 of the majority gate spin device 4 are used together as the subtrahend input terminal for realizing the half subtractor logic, and the input MTJ2 of the majority gate spin logic device 1, the input MTJ2 of the majority gate spin logic device 2 and the input MTJ2 of the majority gate spin device 4 are used together as the minuend input terminal for realizing the half subtractor logic.

10. The cascaded majority gate spin logic device according to claim 9, characterized in that: It is a symmetrical structure that realizes the function of a one-bit half-subtractor.

Images