Molybdenum integration and void-free filling

By performing molybdenum halide treatment and selective deposition of molybdenum on the characteristic surface of semiconductor equipment, the difficulty of deposition of tungsten films in miniaturization equipment is solved, low resistivity and good TiN barrier performance are achieved, and suitable for complex logic and Memory application.

CN119404303APending Publication Date: 2025-02-07LAM RES CORP
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Patent Information

Application Number
CN202380048420.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-11-10
Filing Date
2023-04-18
Publication Date
2025-02-07

AI Technical Summary

Technical Problem

As the size of semiconductor devices decreases, deposition of tungsten films becomes difficult in complex patterning schemes, especially in high aspect ratio structures, where the decay of the high resistivity and TiN barrier properties of the film become challenges.

Method used

By performing molybdenum halide treatment on the feature surface, selectively depositing molybdenum ensures that molybdenum is selective to metal contacts on the dielectric side walls, avoiding the formation of pores and joints in the feature.

Benefits of technology

It realizes efficient and selective deposition of molybdenum in miniaturized semiconductor devices, reduces resistivity, and maintains TiN barrier performance, suitable for logic and memory applications.

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Abstract

Methods of filling features with molybdenum (Mo) are provided herein, which may be used for logic and memory applications. Methods involve processing a surface of a feature prior to feature filling. In some embodiments, methods involve treating a surface of a feature by exposure to a molybdenum halide. In some embodiments, the methods involve treating a surface of a feature by selective oxidation, nitridation, or halogenation. An apparatus for performing the method is provided.
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Description

Incorporated by Reference

[0001] The PCT application form is filed concurrently with this specification as a part of this application. Each application identified in the concurrently filed PCT application form to which this application claims the benefit or priority is incorporated herein by reference in its entirety and for all purposes. Background Art

[0002] The deposition of conductive materials is an integral part of many semiconductor manufacturing processes. These materials can be used for horizontal interconnects, vias between adjacent metal layers, contacts between metal layers and devices, and as wires in memory devices. In an example of deposition, a tungsten (W) layer can be deposited on a titanium nitride (TiN) barrier layer using a CVD process using tungsten hexafluoride (WF6) to form a TiN / W bilayer. However, as device sizes shrink and more complex patterning schemes are used in the industry, the deposition of tungsten thin films becomes a challenge. The continued reduction in feature size and film thickness has brought various challenges to TiN / W film stacks. These include high resistivity of thinner films and degradation of TiN barrier properties. Deposition in complex high aspect ratio structures (such as 3D NAND structures) is particularly challenging.

[0003] The background description provided here is for the purpose of generally presenting the context of the present disclosure. The work of the presently designated inventors is neither explicitly nor implicitly admitted to be prior art against the present disclosure to the extent that it is described in this background section and to aspects of the specification that could not be determined as prior art at the time of filing the application. Summary of the invention

[0004] Methods for filling features with molybdenum (Mo) are provided herein, which can be used in logic and memory applications.

[0005] In some embodiments, the method involves performing treatment of the surface of the feature by exposure to a molybdenum halide prior to feature filling.

[0006] One aspect of the present disclosure relates to a method comprising: providing a substrate comprising a feature, the feature comprising a metal-containing contact and a dielectric sidewall; treating the feature by exposure to a molybdenum halide; and depositing molybdenum in the feature, wherein the deposition is selective to the metal-containing contact relative to the dielectric sidewall.

[0007] In some embodiments, the method further comprises exposing the feature to a hydrogen-containing plasma prior to processing the feature. In some embodiments, selectively depositing platinum on the metal-containing bottom comprises exposing the feature to a molybdenum oxyhalide. In some embodiments, the treatment suppresses molybdenum growth on the oxide or nitride sidewalls. In some embodiments, the treatment is performed without depositing platinum in the feature. In some embodiments, the treatment further comprises exposing the feature to a co-reactant capable of reducing the molybdenum halide to form platinum.

[0008] In some embodiments, an amorphous molybdenum-containing layer is located on the metal-containing contact. In some embodiments, the treatment removes the amorphous molybdenum-containing layer. In some embodiments, the treatment inhibits molybdenum growth on the dielectric sidewalls. In some embodiments, the method further includes removing etch residues from the metal-containing contact before processing the feature.

[0009] In some embodiments, the molybdenum halide is molybdenum pentachloride (MoCl5). In some embodiments, the selective deposition is performed at a substrate temperature of 250°C to 550°C, such as 300°C to 500°C.

[0010] Another aspect of the present disclosure relates to molybdenum-on-molybdenum integration schemes. In some embodiments, a method includes providing a substrate including a feature having a dielectric sidewall and a molybdenum contact; including a molybdenum contact and a dielectric sidewall, wherein an amorphous molybdenum-containing layer is located at the surface of the molybdenum contact; exposing the feature to a molybdenum halide to remove the amorphous molybdenum-containing layer and inhibiting molybdenum deposition on the dielectric sidewall; and depositing molybdenum in the feature, wherein the deposition is selective to the molybdenum contact relative to the dielectric sidewall. In some embodiments, the molybdenum halide is molybdenum pentachloride (MoCl5). In some embodiments, depositing molybdenum in the feature includes exposing the feature to a molybdenum oxyhalide.

[0011] A method for filling features on a semiconductor substrate from bottom to top with molybdenum (Mo) includes selectively processing a conformal liner layer in the feature. Portions of the liner layer on the upper portion of the field region and / or feature sidewalls are preferentially processed relative to the liner layer on the lower portion of the sidewalls. Molybdenum is selectively deposited on unprocessed or less processed portions.

[0012] One aspect of the present disclosure relates to a method comprising: (a) providing a substrate including a field region and a feature, wherein the feature includes an opening, a sidewall, and a bottom, wherein the field region surrounds the opening, and wherein a liner layer lines the sidewall of the feature; (b) selectively processing the liner layer such that a portion of the liner layer on an upper portion of the field region and / or the sidewall is preferentially processed relative to the liner layer on a lower portion of the sidewall, wherein the selectively processing the liner layer forms a selectively processed portion of the liner layer; and (c) Molybdenum is selectively deposited at the bottom of the feature, where deposition on the selectively processed portion of the liner layer is suppressed.

[0013] In some embodiments, the liner layer is titanium nitride or tungsten nitride. In some embodiments, (a) includes depositing the liner layer in the feature. In some embodiments, the liner layer is a tungsten-containing layer or a molybdenum-containing layer. In some such embodiments, the liner layer is a tungsten layer or a molybdenum layer.

[0014] In some embodiments, (b) comprises oxidation of a liner layer on an upper portion of the field region and / or sidewalls. In some embodiments, (b) comprises nitridation of a liner layer on an upper portion of the field region and / or sidewalls. In some embodiments, (b) comprises exposing the substrate to an ion beam plasma. In some such embodiments, (b) further comprises rotating and tilting the substrate during exposure to the ion beam plasma.

[0015] Another aspect of the present disclosure relates to a method comprising: (a) providing a substrate including a field region and a feature, wherein the feature includes an opening, a sidewall, and a bottom, wherein the field region surrounds the opening, and wherein a liner lines the sidewall of the feature; (b) selectively processing the liner layer so that a portion of the liner layer on the field region and / or an upper portion of the sidewall is preferentially processed relative to the liner layer on a lower portion of the sidewall to form a processed region of the liner layer; and (c) selectively etching the treated area of ​​the liner layer, leaving a remaining portion of the liner layer on a lower portion of the sidewall; and (d) Molybdenum is selectively deposited at the bottom of the feature.

[0016] In some embodiments, the liner layer is titanium nitride or tungsten nitride.

[0017] In some embodiments, (a) includes depositing a liner layer in the feature. In some embodiments, the liner layer is a tungsten-containing layer or a molybdenum-containing layer. In some such embodiments, the liner layer is a tungsten layer or a molybdenum layer. In some embodiments, (b) includes oxidation of the liner layer on the upper portion of the field region and / or the sidewall. In some embodiments, (b) includes nitridation of the liner layer on the upper portion of the field region and / or the sidewall. In some embodiments, (b) includes exposing the substrate to an ion beam plasma. In some such embodiments, (b) also includes rotating and tilting the substrate during exposure to the ion beam plasma.

[0018] Another aspect of the present disclosure relates to an apparatus comprising: a vacuum transfer module; a deposition module connected to the vacuum transfer module; an ion beam etching module connected to the vacuum transfer module; and a controller comprising machine-readable instructions for: exposing a substrate to an ion beam plasma in the ion beam etching module to selectively process a backing layer of a feature on the substrate so that portions of the backing layer on an upper portion of a field region and / or a sidewall of the feature are preferentially processed relative to portions of the backing layer on a lower portion of the sidewall; transferring the substrate from the ion beam etching module to the deposition module via the vacuum transfer module; and depositing molybdenum in the feature in the deposition module.

[0019] These and other aspects of the disclosure are further described below with reference to the following figures. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1A and 1B is a schematic illustration of a material stack including a molybdenum layer according to various embodiments.

[0021] Figure 2A-2L and Figure 3 are illustrative examples of various structures into which molybdenum may be deposited according to the disclosed embodiments.

[0022] Figure 4 Schematic example showing a Mo-on-Mo integration scheme.

[0023] Figure 5 is a process flow diagram showing exemplary operations in a method of filling features with molybdenum.

[0024] Figures 6A-6C Display experience based on Figure 5 Schematic illustration of features of an example of a process.

[0025] Figure 7 Examples of surface treatment sequences are shown according to various embodiments.

[0026] Figure 8 Examples of sequences of surface treatment and selective deposition are shown according to various embodiments.

[0027] Fig. 9 is a process flow diagram showing a method of filling a feature with a molybdenum (Mo) film.

[0028] Figures 10A-10C Shows the features during various operations of filling the feature with Mo.

[0029] Fig.11 The graph shows the film thickness after increasing number of atomic layer deposition (ALD) cycles for Mo deposition on TiN and TiN oxide (TiON).

[0030] Fig.12 is a process flow diagram showing a method of filling a feature with a Mo film.

[0031] Figures 13A-13D Display according to Fig.12 Schematic example of the method.

[0032] Figures 14A-14D Display according to Fig. 9 Schematic example of the method.

[0033] Fig.15 Examples showing ion beam angles used to reach sidewall depth.

[0034] Figure 16-19 An example of a processing system that may be used to implement the methods described herein is shown. DETAILED DESCRIPTION

[0035] In the following description, many specific details are set forth to provide a full understanding of the embodiments presented. The disclosed embodiments can be implemented without some or all of these specific details. In other examples, well-known process operations are not described in detail to avoid unnecessarily obscuring the disclosed embodiments. Although the disclosed embodiments will be described in conjunction with specific embodiments, it should be understood that they are not intended to limit the disclosed embodiments.

[0036] Subscripts "x" and "y" are used throughout the disclosure to denote numbers greater than 0 that form stable compounds. However, it should be noted that the absence of "x" or other subscripts (e.g., in titanium nitride (TiN) or titanium oxynitride (TiON)) does not imply a specific atomic ratio.

[0037] Provided herein is a method for filling features with molybdenum (Mo), which can be used in logic and memory applications. Mo films can be deposited in semiconductor substrate features such as vias and grooves. Mo films can be deposited to line features, as a liner layer and / or fill features.

[0038] In some embodiments, the method involves depositing Mo in the feature from the bottom up. Bottom-up deposition refers to growth mostly or entirely from the bottom of the feature relative to the feature sidewalls. Filling features using conventional deposition methods may result in nucleation and growth on the entire feature surface. This results in conformal growth and may result in the formation of pores and / or seams in the feature. For example, pores may be formed when growth at the top of the feature may pinch off the feature. When the film grows inward from the sidewalls, a seam may be formed in the center of the feature. Bottom-up deposition can avoid the formation of pores and seams in the feature during the filling process.

[0039] Although primarily described in the context of Mo, the methods can be used to deposit other metals, including W, Co, and Ru. For some applications, Mo offers several advantages over other metals such as cobalt (Co), ruthenium (Ru), and tungsten (W): (i) barrier-free and liner-free Mo film deposition on oxides and nitrides is more feasible than deposition of Co, Ru, and W, (ii) resistivity scaling of Mo is superior to W, (iii) at temperatures below 450°C, Mo is not expected to mix with underlying Co, compared to mixing of Ru with Co, and (iv) Mo is relatively easy to integrate into current W schemes compared to Cu and Ru.

[0040] Figure 1A and 1B is a schematic illustration of a material stack including a Mo layer according to various embodiments. Figure 1A and 1B The material order in the example of a specific stack is depicted and can be used with any suitable architecture and application, as described below with respect to Figure 2A-2L , 3, 4, 6A-6C, 10A-10C, 13A-13D, and 14A-14D are further described. Figure 1A A first material stack 111 is shown, characterized by a substrate 102 and a molybdenum layer 108 deposited thereon. The substrate 102 can be a silicon or other semiconductor wafer, such as a 200-mm wafer, a 300-mm wafer, or a 450-mm wafer, including a wafer having one or more layers of material deposited thereon, such as a dielectric, conductive, or semiconductor material. In some embodiments, the substrate 102 can be or include silicon (Si) or silicon germanium (SiGe). The method can also be applied to form metallization stack structures on other substrates such as glass, plastic, etc.

[0041] The stack 111 has a dielectric layer 104 on a substrate 102. The dielectric layer 104 can be deposited directly on a semiconductor surface (e.g., a Si or SiGe surface) of the substrate 102, or there can be any number of intermediate layers. For example, the substrate 102 can include any number of layers deposited on a semiconductor surface in various arrangements.

[0042] Examples of dielectric layers include doped and undoped silicon oxide, silicon nitride, and aluminum oxide layers, with specific examples including doped or undoped silicon nitride (SiN), silicon dioxide (SiO2), and aluminum oxide (Al2O3) layers. The stack 111 has a layer 106 disposed between the molybdenum layer 108 and the dielectric layer 104. The layer 106 may be, for example, a diffusion barrier layer and / or an adhesion layer. A diffusion barrier layer is a layer that prevents substances from diffusing between layers. An adhesion layer is a layer that promotes adhesion of a layer to the underlying layer. Examples of diffusion barriers and adhesion layers include titanium nitride (TiN), titanium / titanium nitride (Ti / TiN), tungsten (W), tungsten nitride (WN), and tungsten carbonitride (WCN). The molybdenum layer 108 is the main conductor of the structure. In some embodiments, the molybdenum layer 108 may include multiple bulk layers deposited under different conditions. The molybdenum layer 108 may or may not include a molybdenum nucleation layer. In Figure 1A In the example shown, the molybdenum layer 108 is deposited directly on the layer 106. In other embodiments (not shown), the molybdenum layer 108 can be deposited on a separate layer, such as a growth initiation layer including another material, such as tungsten (W) or a growth initiation layer containing W. The growth initiation layer can be used to promote nucleation and growth of the molybdenum layer 108.

[0043] Figure 1B Another example of a stack 121 is shown. In this example, the stack 121 includes a substrate 102, a dielectric layer 104, wherein a molybdenum layer 108 is deposited directly on the dielectric layer 104 without an intervening diffusion barrier layer or adhesion layer. The molybdenum layer 108 is as shown in FIG. Figure 1A By using molybdenum as the primary conductor, a low resistivity film can be obtained. Examples of low resistivity films include films with a resistivity of less than 40 μOhm-cm at a thickness of 60 angstroms and a resistivity of less than 15 μOhm-cm at a thickness of 200 angstroms.

[0044] In some embodiments, the stack (not shown) may include a substrate, a conductive layer, and a molybdenum layer deposited onto the conductive layer. As used herein, the conductive layer is a layer having a relative humidity of at least 10 4 Ω -1 -cm -1 The stack may include a layer of molybdenum deposited directly on a metal compound layer. Examples include molybdenum on a metal layer (e.g., a W layer or another Mo layer). In these embodiments, there is no dielectric layer between the molybdenum layer and the conductive layer. Similarly, the stack may include molybdenum deposited directly on a metal compound layer. Examples include molybdenum on a metal nitride layer (e.g., TiN, WN, or MoN). In still other embodiments of the stack (not shown), the stack may include a substrate and a molybdenum layer deposited directly on the substrate, including directly deposited on a semiconductor surface, a dielectric surface, or a conductive surface. Figure 1A and 1BExamples of material order in a particular stack are shown and may be used with any suitable architecture and application, as referenced below. Figure 2A-2L , 3, 4, 6A-6C, 10A-10C, 13A-13D and 14A-14D further describe examples.

[0045] The methods described herein are performed on a substrate that can be contained in a chamber. The substrate can be a silicon or other semiconductor wafer, including a wafer having one or more layers of material (e.g., dielectric, conductive, or semiconductor material) deposited thereon. The method is not limited to semiconductor substrates and can be performed to fill any feature with molybdenum.

[0046] The substrate may have features such as vias or contact holes characterized by one or more narrow and / or recessed openings, constrictions within the features, and high aspect ratios. The features may be formed in one or more of the above stacks or layers within the stacks. For example, the features may be at least partially formed in a dielectric layer. In some embodiments, the features may have aspect ratios of at least about 2:1, at least about 4:1, at least about 6:1, at least about 10:1, at least about 25:1, or more. An example of a feature is a hole or via in a semiconductor substrate or a layer on a substrate.

[0047] Figure 2A A schematic example of a DRAM architecture including a Mo buried word line (bWL) 208 in a silicon substrate 202 is depicted. The Mo bWL is formed in a trench etched in the silicon substrate 202. The trench is lined with a conformal barrier 206 and an insulating layer 204. The conformal barrier 206 is disposed between the insulating layer 204 and the silicon substrate 202. In this example, the insulating layer 204 may be a gate oxide layer formed of a high-k dielectric material, such as a silicon oxide or silicon nitride material. In some embodiments disclosed herein, the conformal barrier 206 is a TiN or tungsten-containing layer, such as a WN or WCN layer. In some embodiments, a conformal tungsten-containing growth initiation layer (not shown) may be present between the conformal barrier 206 and the molybdenum bWL 208. Alternatively, the molybdenum bWL may be deposited directly on the TiN or other diffusion barrier layer. In some embodiments, one or both of the layers 204 and 206 are not present.

[0048] Figure 2A The bWL structure shown in is one example of an architecture that includes a molybdenum fill layer. During fabrication of the bWL, molybdenum is deposited into features that may be defined by etched recesses in silicon substrate 202, which is conformally lined with layers 206 and / or 204 (if present).

[0049] Figure 2B-2H are additional illustrative examples of various structures into which molybdenum may be deposited according to the disclosed embodiments. Figure 2BAn example of a cross-sectional drawing showing a vertical feature 201 to be filled with Mo. The feature may include a feature hole 205 in a silicon substrate 202. The feature hole 205 may have a lower layer 203 that lines the sidewalls or interior of the feature hole 205 and may form an interior surface. The feature hole 205 or other features may have a size close to the opening, such as an opening diameter or line width between about 10nm and 500nm (e.g., between about 25nm and about 300nm). The feature hole 205 may be referred to as an unfilled feature or simply a feature. The vertical feature 201 and any feature may be characterized in part by an axis 218 extending through the feature length, with vertically oriented features having a vertical axis and horizontally oriented features having a horizontal axis. The lower layer 213 may be, for example, a diffusion barrier layer, an adhesion layer, a nucleation layer, a combination thereof, or any other suitable material. Non-limiting examples of lower layers may include dielectric layers and conductive layers. Examples of dielectric materials include oxides such as SiO2 and Al2O3; nitrides such as SiN; carbides such as nitrogen-doped silicon carbide (NDC) and oxygen-doped silicon carbide (ODC); and low-k dielectrics such as carbon-doped SiO2. In specific implementations, the lower layer can be one or more of titanium, titanium nitride, tungsten nitride, titanium aluminide, tungsten, and molybdenum. In some embodiments, the lower layer does not contain tungsten. In some embodiments, the lower layer does not contain molybdenum.

[0050] In some embodiments, the feature is a wordline feature in a 3D NAND structure. For example, the substrate may include a wordline structure having any number of wordlines (e.g., 50 to 450) having at least A word line feature may be a vertical channel with a depth of 1000 m. An example of a word line feature is further described below. Another example of a feature is a trench in a substrate or layer. The feature may be of any depth. In various embodiments, the feature may have an underlying layer, such as a barrier layer or an adhesion layer. Non-limiting examples of underlying layers include dielectric layers and conductive layers, such as silicon oxide, silicon nitride, silicon carbide, metal oxides, metal nitrides, metal carbides, and metal layers.

[0051] Figure 2C An example of a vertical feature 201 having a concave profile is shown. A concave profile is a profile that narrows from the bottom, closed end, or interior of the feature to the feature opening. According to various embodiments, the profile may taper and / or include an overhang at the feature opening. Figure 2C An example of the latter is shown, where the lower layer 213 lines the sidewalls or interior surfaces of the feature hole 205. Figure 2B Similarly, lower layer 213 may be a diffusion barrier layer, an adhesion layer, a nucleation layer, a combination thereof, or any other suitable material. Non-limiting examples of lower layers may include dielectric layers and conductive layers. Lower layer 213 forms protrusion 215 so that lower layer 213 is thicker near the opening of vertical feature 201 than inside vertical feature 201.

[0052] In some embodiments, a feature may be filled with one or more constrictions within the feature. Figure 2D Examples of views of various filling features with constrictions are shown. Figure 2D Each of examples (a), (b), and (c) in includes a constriction 209 at a midpoint within the feature. The width of the constriction 209 may be, for example, between about 15 nm and 20 nm. During deposition of molybdenum in a feature using conventional techniques, the constriction may cause pinching because the deposited metal blocks further deposition through the constriction before that portion of the feature is filled, resulting in a void in the feature. Example (b) also includes a protrusion 215 (e.g., a pad / blocking protrusion) at the feature opening. Such a protrusion may also be a potential pinching point. Example (c) includes a constriction 212 that is further away from the field region than the protrusion 215 in example (b).

[0053] Horizontal features such as in 3D memory structures can also be filled. Figure 2E An example of a horizontal feature 250 is shown that includes a constriction 251. For example, the horizontal feature 250 may be a word line in a 3D NAND (also referred to as a vertical NAND or VNAND) structure. In some embodiments, the constriction may be due to the presence of a pillar or other structure in the 3D NAND. Figure 2F A cross-sectional side view of a 3D NAND structure 210 (formed on a silicon substrate 202) is presented, having a 3D NAND stack (left 225 and right 226), a central vertical structure 230, and a plurality of stacked horizontal wordline features 220 with openings 222 on reverse sidewalls 240 of the central vertical structure 230. Note that Figure 2F Two "stacks" of the illustrated 3D NAND structure 210 are shown, which together form a "groove-like" central vertical structure 230. However, in certain embodiments, there may be more than two such stacks arranged in sequence and extending parallel to each other in space, with the gap between each pair of adjacent stacks forming the central vertical structure 230, such as Figure 2F In this embodiment, the horizontal word line feature 220 is a 3D memory word line feature that can fluidly enter and exit from the central vertical structure 230 through the opening 222. Although not explicitly indicated in the figure, the presence of Figure 2FThe horizontal word line features 220 in both of the 3D NAND stacks 225 and 226 shown in the figure (i.e., the left 3D NAND stack 225 and the right 3D NAND stack 226) can also enter and exit the stacks from the other side of these stacks (the leftmost and rightmost sides, respectively) through similar vertical structures formed by additional 3D NAND stacks (to the leftmost and rightmost sides, but not shown). Each 3D NAND stack 225, 226 includes a stack of word line features that can fluidly enter and exit from both sides of the 3D NAND stack through a central vertical structure 230. Figure 2F In the specific example schematically shown in FIG, each 3D NAND stack includes 6 pairs of stacked word lines. However, a 3D NAND memory layout may include any number of vertically stacked word line pairs.

[0054] The wordline features in a 3D NAND stack may be formed by depositing alternating stacks of silicon oxide and silicon nitride layers, then selectively removing the nitride layers, leaving a stack of oxide layers with gaps between them. These gaps are wordline features. Any number of wordlines may be stacked vertically in such a 3D NAND structure, provided there are techniques available to form them, and techniques available to successfully achieve (substantially) gap-free fill of the vertical features. Thus, for example, a VNAND stack may include between 2 and 512 horizontal wordline features, between 8 and 128 horizontal wordline features, or between 16 and 64 horizontal wordline features, and so forth (the listed ranges being understood to include the listed endpoints).

[0055] Figure 2G Presented Figure 2F FIG. 2 is a cross-sectional top view of the same 3D NAND structure 210 shown in side view in FIG. 2 , wherein the cross section is taken through the horizontal portion 260 as shown by Figure 2F Indicated by the horizontal dashed line in . Figure 2G 1F shows several rows of pillars 255, which are shown in FIG1F as extending vertically from the bottom of substrate 202 to the top of 3D NAND structure 210. In some embodiments, pillars 255 are formed of polysilicon material and are structurally and functionally significant to 3D NAND structure 210. In some embodiments, such polysilicon pillars can be used as gate electrodes for stacked memory cells formed within the pillars. Figure 2G The top view of FIG. 2 shows that the pillar 255 forms a constriction in the opening 222 leading to the word line feature 220. The word line feature 220 extends from the central vertical structure 230 through the opening 222 (eg, Figure 2G2 (indicated by the arrows in FIG. 2 ) is inhibited by pillars 255. In some embodiments, the horizontal gap size between adjacent polysilicon pillars is between about 1 nm and 20 nm. This reduction in fluid accessibility increases the difficulty of uniformly filling word line features 120 with material. Figure 2H , 2I 2J further illustrate the structure of word line features 220 and the challenge of uniformly filling them with molybdenum material due to the presence of pillars 255.

[0056] Figure 2H Shows something like Figure 2F , but here focusing on a single pair of word line features 220 , and additionally schematically illustrating a filling process that results in the formation of voids 275 located within the filled word line features 220 . Fig.2I The void 275 is also shown schematically, but in this figure is shown by a horizontal cut through the column 255, similar to Figure 2G Horizontal section shown in . Figure 2J An accumulation of molybdenum material around the post 255 forming the constriction is shown, which results in pinching of the opening 222 so that no additional molybdenum material can be deposited in the area of ​​the void 275. Figure 2H and 2I As is apparent, void-free molybdenum filling relies on a sufficient amount of the deposited precursor migrating downward through the central vertical structure 230, through the opening 222, over the shrinking pillar 255, and into the furthest extent of the wordline feature 220, prior to cumulative deposition of molybdenum around the pillar 255, causing pinching of the opening 222 and preventing further migration of the precursor into the wordline feature 220. Similarly, Figure 2J A single word line feature 220 is shown viewed in cross-section from above, and illustrates how the substantially conformal deposition of the molybdenum material begins to pinch off the interior of the word line feature 220 due to the fact that the large width of the pillar 255 acts to partially block, and / or narrow, and / or compress what would otherwise be an open path through the word line feature 220. (Note that Figure 2J The example in can be understood as Fig.2I A 2D representation of the 3D features of the column constriction structure shown, showing the constriction as seen in plan view rather than in cross-section.

[0057] Three-dimensional structures may require longer and / or more focused exposure to the precursor to allow the innermost and bottommost regions to be filled in. Three-dimensional structures can be particularly challenging when using molybdenum halide and / or molybdenum oxyhalide precursors because they are easy to etch, and longer and more focused exposures allow for more etching as part of the structure.

[0058] Figure 2K and 2LAn example showing an asymmetric trench structure DRAM bWL. Some filling processes used for DRAM bWL trenches may deform the trench, resulting in significantly non-uniform final trench width and resistance Rs. Figure 2K An unfilled feature 261 and a filled feature 265 that exhibits line bending after filling are shown. In this example, the feature is a narrow asymmetric trench structure DRAMbWL. As shown, a plurality of features 283 are depicted on a substrate. These features 283 are spaced apart, and in some embodiments, adjacent features have a pitch between about 20 nm to about 60 nm or between about 20 nm to about 40 nm. The pitch is defined as the distance between the center axis of a feature and the center axis of an adjacent feature. The unfilled feature 261 may be generally V-shaped, as shown in feature 283, with sloping sidewalls, wherein the width of the feature narrows from the top of the feature to the bottom of the feature. These features widen from the feature bottom 273b to the feature top 273a. After some filling operations, line bending may be observed within the filled feature 265. In some embodiments, the cohesive forces between the opposing surfaces of the trench pull the sides of the trench together, as shown by arrows 267. This phenomenon is Figure 2L 283 is shown, and can be described as "zipping up" the feature. As feature 283 is filled, more force is applied from the central axis 299 of feature 283, causing the line to bend. For example, molybdenum can be deposited on the sidewalls of feature 283. The deposited molybdenum 284a and 284b on the sidewalls of feature 283 thus interact closely, with the molybdenum-molybdenum bond radius r being small, thereby generating cohesive interatomic forces between the smooth growth surfaces of the molybdenum and pulling the sidewalls together, causing the line to bend.

[0059] Provided below is a method for filling features with platinum. The method described herein includes surface treatment and deposition operations, which can be used to fill substrate features, such as those described above. As described above, platinum has multiple advantages over other metals. The following describes examples of feature filling of horizontally oriented and vertically oriented features. It should be noted that, at least in most cases, these examples are applicable to both horizontally oriented and vertically oriented features. Horizontally oriented features generally refer to features oriented so that the feature axis is parallel to the plane of the substrate surface. Vertically oriented features generally refer to features oriented so that the feature axis is orthogonal to the plane of the substrate surface.

[0060] refer to Figure 3-8 Methods for filling features are described, including exposing the features to a molybdenum halide prior to feature filling. As described, the molybdenum halide can etch, deposit, and / or otherwise process material on the bottom and / or sidewalls of the feature.

[0061] In some embodiments, methods are used to fill features to contact underlying metal. Figure 3An example of such a feature is shown in . At 301 , an unfilled feature 312 is shown. The unfilled feature 312 is formed in the oxide layer 305 and will be filled with Mo to make contact with the underlying metal 303. The unfilled feature 312 is defined by sidewall surfaces 315 and a bottom surface 317.

[0062] According to various embodiments, the sidewall surface 315 and the bottom surface 317 can be the same or different materials. In some embodiments, the oxide layer 305 can be exposed to form the sidewall surface 315. Similarly, the underlying metal 303 can be exposed to form the bottom surface 317. In some embodiments, surface oxidation causes the bottom surface 317 to become a metal oxide. In some embodiments, a liner layer (not shown) can be formed on the sidewall and / or bottom of the feature to form the sidewall surface 315 and / or the bottom surface 317. Examples of liner layers include TiN, WN, and WCN. In some embodiments, the liner layer can be a molybdenum-containing liner layer, such as a molybdenum nitride (MoN) layer.

[0063] In some embodiments, the sidewall surface 315 and the bottom surface 317 are different. In a subsequent deposition operation, Mo can be deposited under conditions where it preferentially nucleates on the bottom surface 317. This can promote bottom-up filling and prevent the formation of voids.

[0064] Examples of underlying metals and / or bottom surfaces include TiN, titanium aluminum carbide (TiAlC), W, Co, Mo, Ru, Cu, nickel (Ni), iridium (Ir), rhodium (Rh), tantalum (Ta), titanium (Ti), and tantalum nitride (TaN).

[0065] The methods described herein address multiple challenges that occur as feature sizes decrease. For example, void-free gap filling becomes more challenging in small features due to deeper features, concave profiles near feature openings, and / or insufficient growth selectivity between feature bottom metal surfaces and sidewall dielectric surfaces. Smaller features may result in more frequent pattern misalignment. An example of a misaligned feature is shown at 350, where unfilled feature 312 is not centered above underlying metal 303. Therefore, bottom surface 317 includes metal and dielectric material.

[0066] In some embodiments, the methods may be used in a molybdenum-on-molybdenum integration scheme. Figure 4An example of such an integration scheme is shown. Layer 401 includes dielectric 402 and Mo 403. An etch stop layer (ESL) 404 is disposed above layer 401. ESL 404 may be, for example, SiN. Dielectric layer 405 is deposited on ESL 404. Dielectric layer 405 is then patterned and etched, where the etching stops at ESL 404 (not shown). ESL 404 is then removed from feature 412, forming an unfilled feature 412.

[0067] The Mo-containing layer 410 may be formed at the surface of the Mo 403 during a previous processing operation. The Mo-containing layer 410 is typically an amorphous layer. It is relatively thin, for example, about 0.5 nm to 3 nm. It may contain various impurities, such as oxygen, nitrogen and / or other halogens. Although surface oxidation can be removed by hydrogen (H2) plasma, the Mo-containing layer 410 is typically resistant to H2 plasma. If left in the device, it may cause higher resistance at the interface between the Mo 403 and the subsequently deposited Mo film.

[0068] Aspects of the present disclosure relate to surface treatments performed before depositing Mo in a feature. According to various embodiments, the surface treatments relate to exposure to platinum halides. In some embodiments, platinum halides are provided in the absence of co-reactants, and deposition does not occur. In some embodiments, platinum halides are provided together with co-reactants. A thin layer of Mo can be deposited.

[0069] In some embodiments, the features include dielectric surfaces, such as dielectric sidewall surfaces. The surface treatment can inhibit growth on the dielectric surface, thereby enhancing selectivity during subsequent deposition on the conductive surface. In some embodiments, the provided features include a Mo-containing layer as described above. The surface treatment can remove the layer, resulting in a clean Mo surface for deposition and formation of Mo-Mo interconnects.

[0070] Figure 5 5 is a process flow diagram showing exemplary operations in a method for filling a feature with molybdenum. The process begins at operation 501, where a feature having a dielectric sidewall and a metal-containing contact is provided. The metal-containing contact can be located at the bottom of the feature, where the dielectric sidewall extends from the feature opening to the metal-containing contact. The feature can be provided to a processing chamber. In some embodiments, one or more processing operations can be performed in the processing chamber to form a feature having a dielectric sidewall and a metal-containing contact.

[0071] Examples of dielectric sidewalls include silicon-containing layers, such as oxides and nitrides. Examples of metal-containing contacts include metal and metal compound films. Metal-containing contacts are typically conductive, with a resistance of at least 104Ω at room temperature. -1 -cm -1Examples include TiN, TiAlC, W, Co, Mo, Ru, Cu, Ni, Rh, Ir, Ta, Ti, and TaN.

[0072] In some embodiments, a surface oxide is present on the metal-containing contact. Further, in some embodiments, a layer containing other impurities is present on the metal-containing contact. Examples are reference Figure 4 An amorphous Mo-containing layer is described.

[0073] In some embodiments, prior to operation 501, an etching operation is performed to remove a liner layer from at least the sidewalls of the feature. For example, the feature may include a TiN liner layer that conformally coats the bottom and sidewalls. Etching may be performed to remove the TiN layer from the sidewalls, exposing the dielectric material. The sidewall surface is then silicon oxide or other dielectric material.

[0074] In operation 503, an optional cleaning is performed. For example, operation 503 can remove surface oxides and / or etch residues. Examples of etch residues include fluorocarbons and hydrocarbon polymers). In some embodiments, operation 503 involves exposure to a reducing plasma, such as an H2 plasma. In some embodiments, operation 503 processes the dielectric sidewalls. For example, it can remove organic materials and / or reduce oxygen in the dielectric sidewalls. This can improve the selectivity of subsequent Mo growth on the metal-containing surface.

[0075] In operation 505, a surface treatment is performed. The surface treatment involves exposure to a molybdenum halide gas. This is typically a plasma-free operation. Plasma-free refers to an operation performed without activating a plasma. As discussed further below, operation 505 may or may not involve deposition of molybdenum.

[0076] In the presence of Figure 4 In the embodiment of the amorphous Mo-containing layer, operation 505 removes all or at least a portion of the layer. In the same or other embodiments, operation 505 inhibits nucleation on the dielectric sidewall surface. In some embodiments, operation 503 is performed after operation 505.

[0077] The process continues at operation 507 where Mo is selectively deposited on the metal-containing contacts. In some embodiments, this operation involves a reaction using a molybdenum halide or molybdenum oxyhalide precursor. The process can continue with filling the feature with Mo in operation 509. The same or different Mo precursors can be used for operations 507 and 509.

[0078] Figures 6A-6C An illustrative example of a display feature 612 is shown, which undergoes Figure 5 First, in Fig. 6A, at 650, feature 612 is shown, which includes a metal-containing contact 603 and a dielectric sidewall 615. In this example, the metal-containing contact 603 is a Mo contact. Molybdenum will be deposited in feature 612 to contact the Mo contact. An amorphous Mo-containing interface layer 610 and a surface oxide 611 are shown. In this example, the surface of the dielectric sidewall 615 is silicon oxide. An etch stop layer (ESL) 604 is also shown.

[0079] At 651, features are shown after performing operation 503. H2 plasma is used to remove the surface oxide 611. As described above, this operation also treats the dielectric sidewalls 615 in a manner that improves the selectivity of subsequent Mo growth on the metal-containing contact 603.

[0080] Back to Figure 6B At 652, feature 612 is displayed, which is undergoing the above description of Figure 5 The surface treatment described in operation 505 is performed. The amorphous Mo-containing interface layer is removed 610. As shown by the arrows, the treatment also affects the oxide surface, inhibiting subsequent Mo nucleation.

[0081] At 653, a feature is displayed, which is described above with respect to Figure 5 After the selective deposition described in operation 507, a bottom-up non-conformal filling is observed. Mo 605 grows from the underlying metal-containing contact 603, while there is no growth or significantly less growth from the sidewall surface. Therefore, Mo 605 has no seams or pores.

[0082] exist Figure 6C In, at 654, a feature is displayed, which is completed as described above with respect to Figure 5 After the fill of the feature described in operation 509. The remaining fill can be bottom-up or conformal. A blanket deposition of Mo 607 is shown at 655.

[0083] According to various embodiments, as described above with reference to Figure 5 The surface treatment described in operation 505 involves exposure to a molybdenum halide. In some embodiments, a molybdenum chloride compound is used. The molybdenum-containing compound is also referred to herein as a Mo-containing precursor or a Mo precursor. Molybdenum chloride is represented by the formula MoCl x Given, where x is 2, 3, 4, 5 or 6, and includes molybdenum dichloride (MoCl2), molybdenum trichloride (MoCl3), molybdenum tetrachloride (MoCl4), molybdenum pentachloride (MoCl5) and molybdenum hexachloride (MoCl6). In some embodiments, MoCl5 or MoCl6 is used. Although the description mainly focuses on MoCl x Compounds, but in other embodiments, other molybdenum halides may be used. The molybdenum halide precursor is of the formula MoX zWherein X is halogen (fluorine (F), chlorine (Cl), bromine (Br) or iodine (I)), and z is 2, 3, 4, 5 or 6. MoX z Examples of precursors include molybdenum fluoride (MoF6). In some embodiments, MoX6 without fluorine is used. z Precursors are used to prevent fluorine etching or incorporation. In some embodiments, bromine-free and / or iodine-free MoX z Precursors to prevent etching, or the incorporation of bromine or iodine.

[0084] In some embodiments, operation 505 involves exposure to a molybdenum halide compound in the absence of a co-reactant gas. In such embodiments, the precursor may be delivered in pulses or in a continuous dose. Figure 7 Two examples of surface treatment sequences are shown. First, MoCl5 is pulsed with argon (Ar) and other inert gases for N cycles. Second, a continuous dose of MoCl5 is delivered, followed by an Ar purge.

[0085] In some embodiments, operation 505 involves exposure to a molybdenum halide compound and a co-reactant gas to deposit Mo. The co-reactant is typically H2, but other reducing agents as described below may also be used. Figure 8 Examples of surface treatment sequences are shown. In exemplary sequence 801, MoCl5 pulses are alternated with H2 pulses with purge gas pulses in between. In exemplary sequence 802, MoCl5 pulses are alternated with H2 pulses without intervening purge gas pulses. In another exemplary sequence (not shown), MoCl5 pulses are alternated with H2 pulses, wherein in each cycle, only one reactant gas is followed by a purge gas pulse. In a third exemplary sequence 803, MoCl5 flows with H2. In a further exemplary sequence 804, the co-flow reactants are pulsed by alternating Ar pulses. In another exemplary sequence 805, H2 gas may flow into the chamber and flow into the chamber continuously while MoCl5 flows into the chamber intermittently.

[0086] exist Figure 7 and Figure 8 In the above, another molybdenum halide and / or another inert gas may be used instead of MoCl 5 and Ar, respectively.

[0087] In some embodiments, when a metal other than Mo is located at the bottom of the feature, a Figure 8 Surface treatment as shown (using a co-reactant to deposit Mo). In such an embodiment, a Mo surface layer can be formed to promote subsequent Mo growth. For example, if a W, Co, or Ru layer is located at the bottom of the feature, a surface treatment such as Figure 8 The surface treatment shown is used to form a thin Mo surface layer.

[0088] In an exemplary method, Mo is deposited on two surfaces using molybdenum oxychloride (MoO2Cl2) after treatment: a) silicon dioxide deposited from tetraethyl orthosilicate (TEOS oxide), and b) TiN. The deposition occurs after the treatments described in the table below. The first treatment involves only H2 plasma, the second treatment includes H2 plasma followed by a molybdenum chloride treatment, and the third treatment includes H2 plasma followed by a molybdenum chloride and hydrogen treatment. The table below shows the total thickness of the deposited molybdenum in angstroms.

[0089] Compared to TiN, both molybdenum halide surface treatments resulted in significant nucleation delay on silicon dioxide. Both surface treatments also increased deposition on molybdenum. Deposition was also performed to evaluate feature filling. In the case of no surface treatment (pre-clean only), pores may be observed due to lack of selectivity. Both surface treatments observed gap filling without pores.

[0090] Another aspect of the present disclosure relates to a method of filling a feature with metal that involves selectively treating the sidewalls of the feature prior to deposition. Figure 9-15 These methods are described as described above, with or without the addition of a molybdenum halide treatment.

[0091] Fig. 9 is a process flow diagram showing a method of filling features with a Mo film according to certain embodiments. Application examples include middle of line (MOL) interconnects and back end of line (BEOL) interconnects. In one example, the method can be used for source / drain contact filling. The method 900 begins by providing a substrate in operation 901, the substrate including features in which Mo is to be deposited. The substrate can be provided to a semiconductor processing tool.

[0092] The features can be grooves or through holes formed in the dielectric layer. Examples of dielectric materials include oxides, such as silicon oxide (SiO2) and aluminum oxide (Al2O3); nitrides, such as silicon nitride (SiN); carbides, such as nitrogen-doped silicon carbide (NDC) and oxygen-doped silicon carbide (ODC); and low-k dielectrics, such as carbon-doped SiO2. Mo can be deposited in the features to electrically contact the underlying layers. Examples of underlying layers include metals, metal silicides, and semiconductors. Examples of metals include Co, Ru, Cu, W, Mo, nickel (Ni), iridium (Ir), rhodium (Rh), tantalum (Ta), and titanium (Ti). Examples of metal silicides include titanium silicide (TiSi x ), nickel silicide (NiSi x ), Molybdenum silicide (MoSi x ), cobalt silicide (CoSi x ), platinum silicide (PtSi x ), Ruthenium silicide (RuSix ) and nickel platinum silicide (NiPt y Si x ). Examples of semiconductors include silicon (Si), silicon germanium (SiGe), and gallium arsenide (GaAs), with or without semiconductor dopants such as carbon (C), arsenic (As), boron (B), phosphorus (P), tin (Sn), and antimony (Sb).

[0093] Features typically have sidewalls with sidewall surfaces and bottoms with bottom surfaces. The sidewalls may be made of one or more layers. The sidewalls extend from the field region to the bottom. The feature bottom may extend from a first sidewall in the feature to a second sidewall in the feature, and may be made of one or more layers. The sidewall surface is an exposed area on the sidewall and may change during wafer processing. For example, after a second material is deposited on the sidewall, the sidewall surface may change from a first material to a second material. Similarly, the bottom surface is an exposed area of ​​the bottom and may change during wafer processing. In some embodiments, the sidewall surface may be the same material as the bottom surface. For example, in some embodiments, the sidewall surface and the bottom surface provided are TiN. In some embodiments, the material of the sidewall surface may be different from the material of the bottom surface. For example, the bottom surface may be a metal silicide and the sidewall surface may be a silicon oxide, such as SiO2.

[0094] Prior to any Mo deposition, a liner layer may be laid over the unfilled feature and form the sidewall surface and / or the bottom surface. In some embodiments, the liner layer is laid over the entire feature and forms the sidewall surface and the bottom surface. In some other embodiments, the liner layer is laid over only a portion of the feature. For example, a TiN layer may be laid over the sidewalls and not over the bottom surface. In some embodiments, the liner layer is a diffusion barrier layer and / or an adhesion layer. Examples of materials for the liner layer include metal nitrides (e.g., a TiN or tantalum nitride (TaN) barrier layer) and metals (e.g., a Ti adhesion layer).

[0095] In some embodiments, the bottom and sidewall surfaces are oxidized. Oxidation may be caused by exposing the surface of the feature to air or other oxidizing conditions. For example, metal silicide (MSi x , where M is a metal) surface may be oxidized to metal oxide silicide (MSi) when exposed to air. x O y Other examples of oxidized surfaces include oxidized metal nitrides (MN x O y ), silicon oxide (SiO x ) and silicon germanium oxide (SiGeO x ).

[0096] In some embodiments, the oxidizing conditions occur incidentally during substrate processing or transfer operations. In some embodiments, intentional oxidation is performed as further described below.

[0097] In some embodiments, the liner layer is a conformal metal layer, such as a conformal W or Mo layer. This is further described below.

[0098] In operation 902, the liner layer is selectively processed such that the field region and / or at least the upper portion of the sidewalls are processed without processing the bottom surface or only to a lesser extent.

[0099] According to various embodiments, operation 902 may involve selective oxidation or nitridation of upper sidewalls of the field regions and / or features. Additionally, in some embodiments, operation 902 involves selective halogenation of upper sidewalls of the field regions and / or features.

[0100] In some embodiments, operation 902 involves selective oxidation of the upper sidewalls of the field regions and / or features. For example, a TiN layer may be oxidized to form titanium oxynitride (TiON). In another example, a Mo or W liner layer may be oxidized to form MoO x or WO x layer.

[0101] In some embodiments, operation 902 involves selective nitridation of the upper sidewalls of the field region and / or feature. In an example, a Mo or W liner layer is processed to form a MoN or WN layer. Other examples of layers that may be formed include tungsten carbonitride (WCN) and molybdenum carbide (MoC).

[0102] In some embodiments, operation 902 involves selective halogenation of the upper sidewalls of the field regions and / or features. In one example, a Mo or W liner layer is processed to form a MoX y or WX y layer, wherein X is any halogen and y is a number between 0 and 3, inclusive. In another example, MoN is treated z or WN z To form MoN z X y or WN z X y A layer wherein X is any halogen and y is a number between 0 and 3 (inclusive), and z is a number between 0 and 2 (inclusive). In another example, treating MoC z or WC z To form MoC z X y or WC z X yIn another example, the MoO z or WO z To form MoO z X y or WO z X y , wherein X is any halogen, and y is a number between 0 and 3 (inclusive), and z is a number between 0 and 2 (inclusive).

[0103] In some embodiments, operation 902 selectively inhibits subsequent deposition on the treated surface. In some embodiments, operation 902 is followed by etching of the treated liner layer. These methods provide different deposition surfaces, facilitating selective deposition at the bottom of the feature and bottom-up filling.

[0104] The feature is then filled with Mo in operation 903. The deposition of Mo is further described below.

[0105] Fig. 10A An example of a feature to be filled with Mo in certain embodiments is shown. Feature 1001 is shown with a titanium nitride (TiN) liner layer 1015. Feature 1001 is formed in dielectric material 1013 to connect to the underlying metal silicide (MSi x )1007. MSi below x Connected to semiconductor layer 1006, such as silicon (Si) or silicon-germanium (SiGe). The stack can be used in a transistor junction structure. x An example of a layer is titanium silicide (TiSi x ).

[0106] A TiN liner layer 1015 lines the feature 1001. The TiN liner layer 1015 is used in recessed contacts for source / drain applications, such as TiSi x The purpose of the TiN layer 1015 is to prevent the MSi x Any potential reaction with the metal above. Another purpose is to protect the MSi x or other layers from fluorine attack. Another purpose is to prevent MSi x Oxidized in air or during subsequent processing. Fig. 10A In the example of FIG. 1 , TiN layer 1015 is located on feature sidewalls 1011 , feature bottom 1005 , and field region 1017 of feature 1001 .

[0107] Deposition of a metal such as molybdenum in feature 1001 can result in nucleation of Mo over the entire area. As the film grows, pinching off at the top of the feature can result, preventing further diffusion of reactants in the feature and leading to the formation of pores. This occurs in cases such as Fig. 10A The features shown, as well as other features having uniform sidewall and bottom surfaces.

[0108] Fig. 10B Feature 1001 is shown after selective oxidation to form a TiON layer 1015a on field region 1017 and upper sidewall portion 1011a. TiN liner layer 1015 remains on bottom surface 1005 and lower sidewall portion 1011b. The oxygen concentration in the TiON layer will have a decreasing gradient with feature depth.

[0109] Fig. 10C Feature 1001 is shown after Mo deposition. Nucleation of the Mo film is suppressed on the TiON layer 1015a. This allows Mo to grow from the feature bottom 1005, resulting in bottom-up deposition of bulk Mo 1023. Filling can continue to completely fill feature 1001.

[0110] Fig.11 is a graph showing film thickness after increasing number of ALD cycles for depositing Mo on TiN and TiN oxide (TiON). Fig.11 It can be seen that the growth of Mo on TiON is suppressed.TiN is deposited by physical vapor deposition (PVD).

[0111] In some embodiments, a liner layer of a metal or metal-containing film such as Mo, MoN, W, WCN, or WN is conformally deposited in the feature prior to selective oxidation. It can be deposited on the TiN layer or other liner layer (if present), or can be the first liner layer in the feature. It is selectively oxidized to form a metal oxide layer, similar to Figure 2B The TiON layer in the feature is then selectively deposited at the bottom of the feature. Figures 14A-14D The examples are further described.

[0112] Fig.12 1 is a process flow diagram showing a method 1200 for filling a feature with a Mo film. In operation 1211, a substrate including a feature is provided. The feature is to be filled with Mo. Operation 1211 may be as described above with respect to Fig. 9As described in operation 901 of . In operation 1212, a conformal metal-containing liner layer is deposited in the feature. In operation 1213, the field region and / or upper portion of the sidewalls are treated. According to various embodiments, this may involve oxidation and / or nitridation of the field region and / or upper region of the sidewalls. In operation 1214, the treated region is selectively etched. Operation 1214 may involve exposure to a molybdenum halide compound, as further described below. The result is removal of the conformal metal-containing layer from the treated region. This may expose the dielectric sidewalls. Then, as described above with respect to Fig. 9 As described in operation 903 of , molybdenum is deposited in the feature.

[0113] Figures 13A-13D Display according to Fig.12 A schematic illustration of the method of Fig.13A , feature 1301 is shown formed in dielectric layer 1313. It includes dielectric sidewalls 1305 and feature bottom 1304. Field region 1303 surrounds the feature opening. Conformal liner layer 1315 is laid over feature 1301, including lining dielectric sidewalls 1305 and feature bottom 1304. In some embodiments, conformal liner layer 1315 can be a diffusion barrier layer such as a TiN layer. Metal will be deposited in feature 1301 to contact metal silicide layer 1308 in layer 1306. The metal silicide layer can be, for example, titanium (TiSi x ) layer. Layer 1306 may be a semiconductor layer, such as a Si or SiGe layer.

[0114] Fig. 13B Feature 1301 is shown after a conformal metal-containing liner layer 1317 is deposited in the feature. Fig. 13B In the example of FIG. 1 , conformal metal-containing liner layer 1317 covers conformal liner layer 1315 .

[0115] Fig. 13C Feature 1301 is shown after selectively treating the field region and upper sidewalls of the metal-containing liner layer 1317 to form a treated conformal metal-containing liner layer 1317a on the field region and upper sidewalls and an untreated conformal metal-containing liner layer 1317 on the lower sidewalls and bottom of the feature.

[0116] Fig.13D The feature 1301 is shown after etching, which removes the conformal liner layer 1315 and the treated conformal metal-containing liner layer 1317a from the upper sidewalls and field regions. This operation exposes the dielectric sidewalls 1305 of the feature 1301, leaving the liner layer 1315 (e.g., a TiN layer) and the metal-containing liner layer 1317 (e.g., a Mo or W layer) on the feature bottom 1304 and lower sidewalls.

[0117] Figures 14A-14D Display according to Fig. 9illustrative example of another method. Figures 14A-14C Similar to Figures 13A-13C , wherein a conformal metal-containing liner layer 1417 is deposited on the conformal liner layer 1415. Fig. 14B In some embodiments, layer 1417 may be a conformal Mo or W layer, which may be deposited on a TiN layer or other diffusion barrier layer. Fig. 14C As shown above about Fig. 14C Feature 1401 after the described selective processing.

[0118] Fig.14D Feature 1401 is shown after metal deposition. Nucleation of metal film is suppressed on the treated metal-containing liner layer 1417a. This allows metal to grow from the feature bottom 1404, resulting in bottom-up deposition of bulk metal 1423. Filling can continue to completely fill the feature.

[0119] In some embodiments, the selective oxidation or nitridation of the field regions and upper portions of the features involves mild oxygen or nitrogen ion bombardment in an ion beam etching system. An example of an ion beam etching system is as follows Fig.19 In such a system, the substrate can be appropriately tilted and rotated to control the angle of incidence of the ions and, therefore, the selective oxidation. Fig.15 , which shows examples of ion beam angles reaching the sidewall depth. By appropriately tilting and rotating the substrate, the ion beam can be directed to selectively oxidize or nitride the sidewalls and / or field regions.

[0120] The field areas and upper sidewalls of the patterned wafer can be selectively oxidized without removing any material. In the case of a TiN film, TiON can be formed at the field and (if desired) upper sidewall areas, but the TiN will remain unoxidized at the bottom of the feature. In the case of a conformal Mo, W or other metal film previously deposited on top of the TiN film, MoO x , WO x Or other metal oxides may form at the field region and, if desired, at the upper sidewalls, but the Mo, W, or other metal will remain unoxidized at the bottom of the feature.

[0121] The field region and upper sidewall of the patterned wafer can be selectively halogenated using a halogen gas source as described above. Examples of gases include chlorine (Cl2), bromine (Br2), iodine (I2), hydrogen bromide (HBr), and hydrogen iodide (HI). Each of these can be provided in the form of a mixture with an inert gas (e.g., Ar) and / or H2, examples of mixtures include Ar / Cl2, Ar / Br2, Ar / I2, Ar / HBr, Ar / HI, H2 / Cl2, H2 / Br2, H2 / I2, H2 / HBr, and H2 / HI. When halogenated, the surface becomes passivated and deposition is inhibited.

[0122] In some embodiments, the growth surface can be restored after the etching or deposition operation. For example, in operation 902 or Fig.12 After operation 1214 in, the film can be dehalogenated, deoxidized, or denitrided. For example, to restore the original growth surface, the halogenated layer can be treated by exposure to H2 gas or plasma and / or etching. A variety of etching chemistries can be used, including thermal and plasma O2, N2, Cl2, and molybdenum halides, to restore the original growth surface. These techniques can also be used after selective oxidation or selective nitridation to restore the original growth surface.

[0123] In one example, the process can involve selective treatment of the film, followed by deposition or etching of Mo, followed by recovery (eg, dehalogenation), followed by deposition or etching of Mo.

[0124] In some embodiments, the selective treatment (e.g., oxidation, nitridation, or halogenation) does not include ion bombardment. For example, exposure to a plasma generated by an appropriate source gas can be used. According to various embodiments, the plasma can be capacitively coupled or inductively coupled. It can be remotely generated or generated in situ. Such exposure can be performed without tilting the substrate.

[0125] For example, low power, biased oxygen, nitrogen, or halogen plasmas can be used in high pressure systems without tilting the substrate. If the pressure is high enough (above 2 Torr), the bottom of the feature will remain untreated. In some embodiments, reference Fig.19 The ion beam etching system described provides greater control over the processing depth. Selective nitridation can be performed by any of the above methods, but using a mild nitrogen plasma. Selective halogenation can be performed by any of the above methods, but using a mild halogen plasma.

[0126] In some embodiments, the selective processing profile within the feature is adjusted by adjusting the ratio of H2 gas and process gas (oxidizing, nitriding, or halogenating gas) during the plasma exposure operation. Plasma ions are more dominant on the field / upper sidewalls, while H2 radicals are more dominant at the bottom, thereby achieving selective processing of the feature. Molybdenum deposition

[0127] In the methods described herein, reference may be made to Figure 4-15 The described treatment is followed by the deposition of molybdenum. The deposition of molybdenum described herein involves reacting a Mo-containing precursor (also referred to as a molybdenum precursor). In some embodiments, a molybdenum halide compound as described above is used. In methods including the use of a molybdenum halide compound for surface treatment, the same or different compounds may be used for deposition.

[0128] In some embodiments, the Mo precursor is molybdenum chloride (MoCl x ) compound, also known as molybdenum chloride precursor or MoCl x Precursors. For example, Figure 5 Operations 507 and / or 509 in Fig. 9 Operation 903 in, or Fig.12 Operation 1215 in the above method may use a molybdenum oxyhalide precursor. The molybdenum chloride precursor is represented by the formula MoCl x Given, where x is 2, 3, 4, 5 or 6, and includes molybdenum dichloride (MoCl2), molybdenum trichloride (MoCl3), molybdenum tetrachloride (MoCl4), molybdenum pentachloride (MoCl5), and molybdenum hexachloride (MoCl6). In some embodiments, MoCl5 or MoCl6 is used. Although the description mainly relates to MoCl x Precursors, but in other embodiments, other molybdenum halide precursors may be used. The molybdenum halide precursor is of the formula MoX z Wherein X is halogen (fluorine (F), chlorine (Cl), bromine (Br) or iodine (I)), and z is 2, 3, 4, 5 or 6. MoX z Examples of precursors include molybdenum fluoride (MoF6). In some embodiments, MoX6 without fluorine is used. z Precursors are used to prevent fluorine etching or incorporation. In some embodiments, bromine-free and / or iodine-free MoX z Precursors to prevent etching or incorporation of bromine or iodine.

[0129] In some embodiments, a molybdenum oxyhalide precursor may be used to fill the features. For example, Figure 5 Operations 507 and / or 509 in Fig. 9 Operation 903 in, or Fig.12 Operation 1215 in the above method may use a molybdenum oxyhalide precursor. The molybdenum oxyhalide precursor is of the formula MoO y X z Given, where X is a halogen (fluorine (F), chlorine (Cl), bromine (Br) or iodine (I)), and y and z are numbers greater than 0, such that MoO y X z Examples of molybdenum oxyhalides include molybdenum dioxide dichloride (MoO2Cl2), molybdenum oxytetrachloride (MoOCl4), molybdenum oxytetrafluoride (MoOF4), molybdenum dioxide dibromide (MoO2Br2), and molybdenum iodide MoO2I and Mo4O 11I. It should be understood that, as used herein, the term molybdenum oxyhalide precursor may refer to a molybdenum oxyhalide precursor as described above or a molybdenum-containing oxyhalide precursor comprising molybdenum, oxygen, a halide, and one or more other elements. In some embodiments, the molybdenum oxyhalide or molybdenum-containing oxyhalide may include a variety of different halogens (e.g., F and Cl and / or I and / or Br, etc.). MoCl may be used. x Precursor, MoO y X z precursors or a combination thereof to fill features with molybdenum.

[0130] To deposit molybdenum into a feature, the molybdenum precursor can be reacted with a co-reactant. Examples of co-reactants include hydrogen (H2), silane (SiH4), diborane (B2H6), germane (GeH4), ammonia (NH3), and hydrazine (N2H4).

[0131] In some embodiments, the deposition of molybdenum can use a plasma-based process. Gases can be fed into a remote or in-situ plasma generator to generate plasma species. Examples of gases that can be used to generate plasma can be hydrogen-containing gases, such as H2, nitrogen-containing gases, such as nitrogen (N2), and other gases, such as Ar and NH3. The plasma species can be inert or react with the molybdenum precursor to form a film.

[0132] Features may be filled with molybdenum by atomic layer deposition (ALD) or chemical vapor deposition (CVD). Thermal ALD or plasma enhanced ALD (PEALD) may be used. Similarly, thermal CVD or plasma enhanced CVD (PECVD) may be used.

[0133] ALD is a surface-mediated deposition technique in which doses of precursors and reactants are sequentially introduced into a deposition chamber. One or more cycles of sequential dosing of molybdenum precursors and reactants can be used to deposit Mo. For example, in the deposition of an initial molybdenum layer (e.g., Figure 5 As shown in operation 505 or 507 of ), MoCl5 can be used as a precursor and H2 can be used as a reducing agent. A certain dose of MoCl5 and H2 are introduced into the deposition chamber in sequence, and a purge gas (e.g., argon) flows between the deposition chambers. For ALD, the temperature of the substrate and the pressure of the chamber can be controlled. For example, the substrate can be heated to between 200°C and 800°C, such as between 250°C and 550°C, or between 300°C and 500°C, between 350°C and 450°C. In some embodiments, the chamber can be pressurized to between 10Torr and 200Torr, such as between 50Torr and 90Torr. In some embodiments, temperature and / or pressure can be used to control the reaction rate. In some embodiments, temperature and / or pressure can be used to control selectivity.

[0134] In some embodiments, the molybdenum filling may involve CVD. In a CVD process, a molybdenum precursor and a reactant are in a gas phase together in a deposition chamber. In general, a CVD process fills features faster than an ALD process. In one example, the precursor may be a molybdenum oxychloride, such as MoO2Cl2, and flows into the chamber along with a reactant, such as H2. In this example, the wafer is exposed to the precursor and the reactant simultaneously, which react and fill the feature with Mo.

[0135] In yet other embodiments, a pulsed CVD process may be used to fill the features. The pulsed CVD process allows reactants to flow continuously into the chamber while pulses of precursors flow into the chamber. For example, H2 gas may flow into the chamber and flow continuously into the chamber while a molybdenum-containing precursor flows into the chamber intermittently. The temperature of the substrate and the pressure in the chamber may be controlled during the CVD operation.

[0136] Platinum can be selectively deposited into features using the methods described herein. Selective deposition refers to preferential deposition on a first material relative to a second material. Platinum can be deposited and grown on a metallic material more easily than on a dielectric material. For example, a feature can have a sidewall surface of SiO2 and a TiN plug in the bottom of the feature. In selective deposition, platinum is deposited into the feature and can grow on the TiN plug, but not on the sidewall surface of SiO2 (or to a lesser extent).

[0137] Process conditions such as precursor gas, reducing agent, process temperature, process pressure, and exposure time may affect the selectivity of the deposited molybdenum film. Different precursor gases may have different process windows in which the molybdenum film may be selectively deposited. In general, MoCl5 has a large process window, i.e., a large temperature and pressure range in which the precursor gas maintains its selectivity. For example, MoCl5 may be selectively deposited on a metallic material relative to a dielectric material, wherein the process temperature is 200°C to 800°C, such as 250°C to 550°C, such as 300°C to 500°C. In general, higher process temperatures and higher process pressures reduce the selectivity of the deposited gas. For example, at higher temperatures, a precursor gas such as MoCl5 may lose its selectivity and deposit a molybdenum film on both the metallic surface and the dielectric surface within the feature.

[0138] MoCl5 can react with different reactants to deposit molybdenum film. Described below is an example of depositing molybdenum film in a feature using MoCl5 precursor and different process controls. In the first example, the MoCl5 precursor is reacted with H2 reactant using the above-mentioned deposition method. In the description herein, the metal precursor reacts with hydrogen (H2) (also referred to as hydrogen reactant or H2 reactant) as a co-reactant. However, instead of hydrogen, other reactants can be used, including other hydrogen-containing reactants, such as SiH4, B2H6, NH3, depending on the specific situation. Although reactants such as B2H6 and / or SiH4 are stronger reducing agents, they also result in higher resistivity. Therefore, in some embodiments, it is advantageous to use H2 described herein. The process temperature for selectively depositing molybdenum film can be between 200°C and 800°C, such as between 250°C and 550°C, such as between 300°C and 500°C. At these temperatures, the molybdenum film is selectively deposited on the conductive metal or metal compound surface in the feature, such as the TiN surface, relative to the dielectric surface. The molybdenum film is grown from where the conductive surface is located in the feature. If the conductive surface is a TiN plug located at the bottom of the feature, the molybdenum film can be deposited and grown from the bottom of the feature. In a second example, the molybdenum film can be deposited using a MoCl5 precursor and an H2 reactant, but at a higher temperature, i.e., above 800°C. This process window allows the deposition of the molybdenum film on both the dielectric surface and the conductive surface within the feature. The deposition of the molybdenum film on the dielectric surface can be used to create a barrier-free molybdenum layer in the feature.

[0139] In some embodiments, a molybdenum oxyhalide precursor is used for selective deposition. As described above, the above surface treatment significantly improves the selectivity of Mo deposition from MoO2Cl2. As described above, MoO y X z Examples of precursors include MoO2Cl2, MoOCl4, MoOF4, MoO2Br2, MoO2I, and Mo4O 11 I. ALD, plasma enhanced ALD, chemical vapor deposition (CVD), or plasma enhanced CVD can be used to fill the feature. For ALD or CVD, H2 can be used as a reducing agent. In surface treatment, compared to MoCl x Precursors, using molybdenum oxyhalide precursors, molybdenum deposition is faster. For example, for non-plasma processes, MoO y X z The precursor can be MoCl x The precursor is used to deposit Mo at least twice as fast as the deposition rate of the precursor. Plasma enhanced processes can be used to fill features at lower temperatures, and / or to increase the deposition rate.

[0140] In some embodiments, filling a feature may involve depositing a nucleation layer. A nucleation layer is a thin layer that supports the bulk deposition. It may be conformal to the feature. In many embodiments, the nucleation layer is deposited by an ALD process. In some embodiments, a Mo nucleation layer is deposited using one or more of a boron-containing reducing agent (e.g., B2H6) or a silicon-containing reducing agent (e.g., SiH4) as a co-reactant. For example, a Mo nucleation layer may be deposited using one or more S / Mo cycles or Mo / S cycles. In another example, a Mo nucleation layer may be deposited using one or more B / Mo cycles or Mo / B cycles, on which a bulk Mo layer is deposited. B refers to a pulse of diborane or other boron-containing reducing agent and S refers to a pulse of silane or other silicon-containing reducing agent, such that S / Mo refers to a pulse of silane followed by a pulse of a Mo-containing precursor. Both B / Mo and S / Mo cycles (or Mo / B and / or Mo / S) may be used to deposit a Mo nucleation layer, such as x(B / Mo)+y(S / Mo), where x and y are integers. Examples of boron-containing reactants include diborane (B2H6), alkylboranes, alkylboranes, aminoboranes (CH3)2NB(CH2)2, carboranes such as C2B n H n+2 and other boranes. Examples of boranes include B n H n+4 , B n H n+6 , B n H n+8 , B n H m , wherein n is an integer from 1 to 10, and m is an integer different from m. Examples of silicon-containing reducing agents include silane (SiH4) and other silanes, such as disilane (Si2H6).

[0141] In some embodiments, the deposition of the Mo nucleation layer may involve the use of an oxygen-free precursor, such as molybdenum hexafluoride (MoF6) or molybdenum pentachloride (MoCl5). The oxygen in the oxygen-containing precursor may react with a silicon-containing or boron-containing reducing agent to form MoSi x O y or MoB x O y , which are impure high resistivity films. In some embodiments, an oxygen-containing precursor can be used for nucleation layer deposition while minimizing oxygen incorporation. Oxygen incorporation can be minimized by a high reducing agent flow rate (e.g., a volume flow rate of reducing agent to oxygen-containing Mo precursor greater than 100:1).

[0142] In some embodiments, H2 can be used as a reducing gas for the deposition of the Mo nucleation layer instead of a boron-containing or silicon-containing reducing gas. An exemplary thickness for depositing the Mo nucleation layer is to Films at the lower end of this range may not be continuous; however, as long as they can help initiate continuous bulk Mo growth, the thickness is sufficient.

[0143] In some embodiments, the reducing agent pulse during deposition of the nucleation layer or bulk Mo layer can be performed at a lower substrate temperature than the Mo precursor pulse. For example, the B2H6 or SiH4 (or other boron-containing or silicon-containing reducing agent) pulse can be performed at a temperature below 300°C, where the Mo pulse is performed at a temperature above 300°C.

[0144] In some embodiments, the reducing agent is NH3 or other nitrogen-containing reducing agents, such as hydrazine (N2H4). The chemical adsorption of NH3 on the dielectric is more favorable than H2. In some embodiments, the reducing agent and precursor are selected so that they react without dissociation of the reducing agent. NH3 reacts with metal oxychlorides and metal chlorides without dissociation. This is in contrast to metal oxychloride ALD, for example, using H2 as a reducing agent, which dissociates on the surface to form adsorbed atomic hydrogen, which results in very low active species concentrations during the initial nucleation of the metal on the dielectric surface and low surface coverage. By using NH3 and metal oxychloride or metal chloride precursors, nucleation delays are reduced or eliminated at deposition temperatures that are up to hundreds of degrees lower than the deposition temperatures used for H2 reduction of the same metal precursors.

[0145] In some embodiments, the reducing agent may be a boron-containing or silicon-containing reducing agent, such as B2H6 or SiH4. These reducing agents can be used with metal chloride precursors, metal oxychlorides; however, B2H6 and SiH4 may react with water formed as a byproduct during the ALD process and form solid B2O3 and SiO2. They are insulating and can remain in the film, thereby increasing resistivity. The use of NH3 also improves adsorption on specific surfaces (including Al2O3) compared to the ALD process of B2H6 and SiH4. The resulting nucleation layer is typically not a pure elemental film but a metal nitride or metal oxynitride film. In some embodiments, there may be residual chlorine or fluorine from the deposition, especially if the deposition is performed at low temperatures. In some embodiments, there may be no more than trace amounts of residual chlorine or fluorine. In some embodiments, the nucleation layer is an amorphous layer. Impurities in the film (e.g., oxygen, NH3, chlorine, or other halogens) are conducive to the growth of amorphous microstructures. In some embodiments, the deposited nucleation layer is an amorphous molybdenum oxynitride layer or an amorphous molybdenum nitride layer. The amorphous nature provides a template for the growth of large grains in the subsequently deposited conductor. The surface energy of the nitride or oxynitride relative to the oxide surface is much more favorable than the surface energy of the metal on the oxide surface, thereby facilitating the formation of a continuous and smooth film on the dielectric. This allows the formation of a thin, continuous layer. When deposited, an exemplary thickness range for the nucleation layer is For example, this could be about 5-50 ALD cycles, depending on the temperature. Etching

[0146] The etching operation may be used in a method of filling a feature using a Mo film. The etching operation removes metal and nitride materials from the feature. For example, the etching process may partially or completely remove a liner layer from the feature. In another example, the etching process may be used to reduce the thickness of the liner layer. In some embodiments, the etching operation may involve soaking the feature in a molybdenum halide. In some embodiments, the etching operation involves soaking the feature in a MoCl 5 such as MoCl 5. x Soaking characteristics. In some embodiments, the soaking can be performed continuously with the molybdenum halide gas. In some embodiments, the soaking can be pulsed, with continuous cycling of the molybdenum halide and the sweep gas (e.g., argon (Ar)).

[0147] MoCl x Precursors are used in both deposition and etching operations. For example, in a specific process window, a MoCl5 precursor can simultaneously grow a Mo film and etch away a metal or metal compound film in a feature. If the rate of removing material is greater than the material deposited by the precursor, the process is considered a net etching operation. The speed of the precursor depositing material and etching material can be controlled by a variety of process conditions, including the type of reactants used and the process temperature. In general, the lower the temperature, the higher the ratio of the etched material relative to the deposited material. At higher temperatures, the same precursor and reactant can be used as a net deposition operation, that is, the amount of deposited material is greater than the amount of removed material. For example, when the process temperature is below 400°C, a MoCl5 precursor and H2 reactant can be used in an etching operation. When the process temperature is above 550°C, the same MoCl5 precursor and H2 reactant can be used in a deposition operation.

[0148] In some embodiments, MoCl x Precursors at high temperatures, such as above 550°C, can continue to etch material at a faster rate than the deposited material. For example, MoCl5 can be used to etch features by soaking without reactants. In this example, the temperature can be as high as 700°C and will continue to etch material away from the feature. In an operation where the feature is soaked in MoCl5 without reactants, the elevated temperature may increase the rate at which material is etched away from the feature.

[0149] The features may have surface oxides or contaminants thereon. For example, the surface of the underlying TiN, WN, or W layer may be oxidized. Oxidized surfaces, if left, can result in higher resistivity. Cleaning operations are used to remove such oxides and contaminants. In some embodiments, the cleaning operation may have features immersed in a Mo precursor gas (typically a molybdenum halide). Similar to the etching operation described above, the precursor gas may be MoClx Precursor. In some embodiments, the soaking can be continuous. In some embodiments, the soaking can be pulsed so that MoCl x The precursor can be an oxygen-free, Cl-containing molybdenum compound capable of removing oxidation from the surface of the feature. x Examples of compounds are provided above. Cl-containing precursors can be used in situations where conventional cleaning using thermal or plasma H2 does not work, such as where oxidative surface stability is present on the surface material. Cl-containing precursors are less likely to over-etch the liner layer of a feature or to erode the surface of a feature than F-containing compounds. Device

[0150] Fig.16 A schematic diagram of an embodiment of an ALD processing station 1600 having a processing chamber 1602 for maintaining a low pressure environment is depicted. In some embodiments, multiple ALD processing stations may be included in a common low pressure processing tool environment. For example, Fig.17A and 17B An embodiment of a multi-station processing tool 1700 is described. In some embodiments, one or more hardware parameters of the ALD processing station 1600, including those discussed in detail below, can be programmatically adjusted by one or more computer controllers 1750. In other embodiments, the processing chamber can be a single-station chamber.

[0151] The ALD processing station 1600 is in fluid communication with a reactant delivery system 1601a for delivering process gases to a distribution showerhead 1606. The reactant delivery system 1601a includes a mixing vessel 1604 for mixing and / or conditioning process gases, such as a Mo-containing precursor gas, a hydrogen-containing gas, an argon gas or other carrier gas, or other reactant-containing gas, for delivery to the showerhead 1606. One or more mixing vessel inlet valves 1620 can control the introduction of process gases into the mixing vessel 1604. In various embodiments, deposition of an initial Mo layer is performed in the processing station 1600, and in some embodiments, other operations such as in-situ cleaning or Mo gap filling can be performed in the same or another station of the multi-station processing tool 1700, as described below with respect to Fig.17A Further description of.

[0152] As an example, Fig.16Embodiments include vaporization point 1603, which is used to vaporize liquid reactants to be supplied to mixing container 1604. In some embodiments, vaporization point 1603 can be a heated vaporizer. In some embodiments, liquid precursors or liquid reactants can be vaporized at a liquid injector (not shown). For example, a liquid injector can inject a pulse of liquid reactants into a carrier gas flow upstream of mixing container 1604. In one embodiment, a liquid injector can vaporize reactants by flashing liquid from a higher pressure to a lower pressure. In another example, a liquid injector can atomize liquid into dispersed droplets that are then vaporized in a heated delivery pipe. Smaller droplets can vaporize faster than larger droplets, thereby reducing the delay between liquid injection and completion of vaporization. Faster vaporization can reduce the length of the pipeline downstream of vaporization point 1603. In one embodiment, a liquid injector can be directly mounted to mixing container 1604. In another embodiment, a liquid injector can be directly mounted to a spray head 1606.

[0153] In some embodiments, a liquid flow controller (LFC) can be set upstream of the vaporization point 1603 to control the mass flow rate of the liquid used for vaporization and delivered to the processing chamber 1602. For example, the LFC can include a thermal mass flow meter (MFM) located downstream of the LFC. Then the plunger valve of the LFC can be adjusted in response to a feedback control signal provided by a proportional integral differential (PID) controller that communicates electrically with the MFM. However, it can take one second or more to use feedback control to stabilize the liquid flow. This can extend the time of dosing liquid reactants. Therefore, in some embodiments, the LFC can be dynamically switched between a feedback control mode and a direct control mode. In some embodiments, this can be performed by disabling the sensing pipeline and PID controller of the LFC.

[0154] The showerhead 1606 distributes process gases toward the substrate 1612. Fig.16 In the illustrated embodiment, substrate 1612 is positioned below showerhead 1606 and is shown resting on pedestal 1608. Showerhead 1606 may have any suitable shape and may have any suitable number and arrangement of ports to distribute process gases to substrate 812.

[0155] In some embodiments, the pedestal 1608 can be raised or lowered to expose the substrate 1612 to the volume between the substrate 1612 and the showerhead 1606. In some embodiments, the pedestal 1608 can be temperature controlled by a heater 1610. The pedestal 1608 can be set to any suitable temperature during operation for performing the various disclosed embodiments, such as a temperature between about 250° C. and about 800° C. It should be understood that in some embodiments, the pedestal height can be adjusted programmatically via a suitable computer controller 850. At the end of a processing phase, the pedestal 1608 can be lowered during another substrate transfer phase to allow the substrate 1612 to be removed from the pedestal 1608.

[0156] In some embodiments, the position of the showerhead 1606 can be adjusted relative to the base 1608 to change the volume between the substrate 1612 and the showerhead 1606. In addition, it should be understood that the vertical position of the base 1608 and / or the showerhead 1606 can be changed by any suitable mechanism within the scope of the present disclosure. In some embodiments, the base 1608 may include a rotation axis for rotating the orientation of the substrate 1612. It should be understood that in some embodiments, one or more of these exemplary adjustments can be performed programmatically by one or more appropriate computer controllers 1650. The computer controller 1650 may include the following regarding Fig.16 Any features described for controller 1650.

[0157] In some embodiments where the plasma can be used as described above, the showerhead 1606 and the base 1608 are electrically connected to a radio frequency (RF) power source 1614 and a matching network 1616 to power the plasma. In some embodiments, the energy of the plasma can be controlled by controlling one or more of the processing station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. For example, the RF power source 1614 and the matching network 1616 can be operated at any suitable power to form a plasma having a component of a desired free radical species. Similarly, the RF power source 1614 can provide RF power of any appropriate frequency. In some embodiments, the RF power source 1614 can be configured to control a high-frequency RF power source and a low-frequency RF power source that are independent of each other. Exemplary low-frequency RF frequencies can include, but are not limited to, frequencies between 0kHz and 900kHz. Exemplary high-frequency RF frequencies can include, but are not limited to, frequencies between 1.8MHz and 2.45GHz, or frequencies greater than about 13.56MHz, or greater than 27MHz, or greater than 80MHz, or greater than 60MHz. It will be appreciated that any suitable parameters may be adjusted discretely or continuously to provide plasma energy for surface reactions.

[0158] In some embodiments, the plasma can be monitored in situ by one or more plasma monitors. In one case, the plasma power can be monitored by one or more voltage and current sensors (e.g., VI probes). In another case, the plasma density and / or process gas concentration can be measured by one or more optical emission spectroscopy sensors (OES). In some embodiments, one or more plasma parameters can be adjusted programmatically based on the measurement results from such in-situ plasma monitors. For example, an OES sensor can be used in a feedback loop to provide programmatic control of the plasma power. It should be understood that in some embodiments, other monitors can be used to monitor plasma and other processing characteristics. Such monitors may include, but are not limited to, infrared (IR) monitors, acoustic monitors, and pressure sensors.

[0159] In some embodiments, instructions for controller 1650 may be provided via input / output control (IOC) sequencing instructions. In one example, instructions for setting conditions for a process stage may be included in a corresponding recipe stage of a process recipe. In some cases, the process recipe stages may be arranged in sequence so that all instructions for a process stage are executed simultaneously with the process stage. In some embodiments, instructions for setting one or more reactor parameters may be included in a recipe stage. For example, a first recipe stage may include instructions for setting the flow rate of an inert gas and / or a reactive gas (e.g., a Mo precursor), instructions for setting the flow rate of a carrier gas (e.g., argon), and time delay instructions for the first recipe stage. A subsequent second recipe stage may include instructions for adjusting or stopping the flow rate of an inert gas and / or a reactive gas, instructions for adjusting the flow rate of a carrier gas or a purge gas, and time delay instructions for the second recipe stage. A third recipe stage may include instructions for adjusting the flow rate of a second reactive gas such as H2, instructions for adjusting the flow rate of a carrier gas or a purge gas, instructions for igniting a plasma, and time delay instructions for the third recipe stage. A subsequent fourth recipe stage may include instructions for adjusting or stopping the flow rates of the inert gas and / or the reactant gas, and instructions for adjusting the flow rates of the carrier gas or the purge gas, and time delay instructions for the fourth recipe stage. It should be understood that within the scope of the present disclosure, these recipe stages may be further subdivided and / or repeated in any suitable manner.

[0160] Additionally, in some embodiments, pressure control for processing station 1600 may be provided by butterfly valve 1618. Fig.16In the embodiment shown, butterfly valve 1618 throttles the vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, pressure control of process station 1600 can also be adjusted by changing the flow rate of one or more gases introduced into process station 1600.

[0161] Fig.17A and 17B An example of a processing system is shown. Fig.17A An example of a processing system comprising multiple chambers is shown. System 1700 includes a transport module 1703. The transport module 1703 provides a clean, vacuum environment to minimize the risk of contamination when the substrate is moved between various modules as it is processed. Mounted on the transport module 1703 is a multi-station chamber 1709 capable of performing the above-mentioned in-situ cleaning and / or ALD processes. Surface treatment and / or initial Mo layer deposition can be performed in the same or different stations or chambers as the subsequent Mo gap fill.

[0162] Chamber 1709 may include a plurality of stations 1711, 1713, 1715, and 1717, which may sequentially perform operations according to the disclosed embodiments. For example, chamber 1709 may be configured such that station 1711 uses MoCl x Precursors are used to perform in-situ processing. Station 1713 can be configured to selectively process the field region and upper sidewalls, and stations 1715 and 1717 can be configured to perform ALD of bulk Mo using a molybdenum oxyhalide precursor and H2. In another example, chamber 1709 can be configured such that station 1711 performs in-situ cleaning, station 1713 performs ALD of an initial Mo layer, station 1713 selectively processes a layer, and 1714 deposits bulk Mo. In another example, chamber 1709 can be configured to perform parallel processing of substrates, with each station performing multiple processes sequentially.

[0163] Two or more stations may be included in a multi-station chamber, e.g., 2-6, with operations appropriately distributed. For example, a two-station chamber may be configured to perform ALD of an initial Mo layer in a first station, followed by ALD of bulk Mo in a second station. A station may include a heated pedestal or substrate support, one or more gas inlets, or showerheads, or a dispersion plate.

[0164] One or more single-station or multi-station modules 1707 may also be mounted on the transfer module 1703. In some embodiments, a pre-cleaning as described above may be performed in the module 1707 before the substrate is transferred under vacuum to another module for ALD (e.g., another module 1707 or chamber 1709). In another example, a module for selectively treating a film may be mounted on the transfer module. FIG. 10 shows an example.

[0165] The system 1700 also includes one or more wafer source modules 1701 that store wafers before and after processing. An atmospheric robot (not shown) in an atmospheric transfer chamber 1719 can first move the wafers from the source module 1701 to a load lock 1721. The wafer transfer equipment (usually a robot unit) in the transfer module 1703 moves the wafers from the load lock 1721 to a module mounted on the transfer module 1703 and moves the wafers between them.

[0166] In some embodiments, ALD of Mo is performed in a first chamber, which may be part of a system similar to system 1700, and CVD or PVD deposition of W or Mo or other conductive material as a capping layer is performed in another chamber, which may not be coupled to a common transfer module but is part of another system.

[0167] Fig. 17B is an implementation scheme of system 1700. Fig. 17B The system 1700 in FIG. 1 has a wafer source module 1701, a transfer module 1703, an atmospheric transfer chamber 1719, and a load lock 1721, as described above with reference to FIG. Fig.17A described. Fig. 17B The system in has three single-station modules 1757a-1757c. The system 1700 can be configured to perform operations according to the disclosed embodiments sequentially. For example, the single-station modules 1757a-1757c can be configured so that the first module 1757a performs surface treatment, the second module 957b performs ALD of the initial Mo layer using a molybdenum halide precursor, and the third module 957c performs ALD of the bulk Mo using a molybdenum oxyhalide precursor. In this example, instead of the pre-cleaning in the first module 1757a or in addition to the pre-cleaning in the first module 1757a, in-situ cleaning is optionally performed in the second module 1757b. In another example, the single-station modules 1757a-1757c can be configured so that the first module 1757a performs deposition of the initial metal layer, the second module 1757b performs selective processing, and the third module 1757c performs ALD of the bulk Mo using a molybdenum oxyhalide precursor. In yet another example, one module can be configured for deposition, another module for selective processing, and another module for etching.

[0168] The station may include a heated pedestal or substrate support, one or more gas inlets or showerheads or diffuser plates, as described above with reference to Fig.16 described.

[0169] Fig.18An example of a system is shown, which includes an ion plasma module 1811, a vapor deposition module 1812, and transfer modules 1814, 1816, and 1818. In some embodiments, the device can have two or more transfer modules, wherein the ion plasma module is attached to the first transfer module and the vapor deposition module is attached to the second transfer module. An intermediate transfer module (e.g., transfer module 1816) can be used to transfer substrates between the ion plasma module and the deposition module. The system can be configured to selectively process the substrate in the ion plasma module 1811 as described above, and then perform Mo deposition in the vapor deposition module 1812. The deposition of Mo pads, W pads, or other pads in the deposition module 1812 can precede the selective processing. In some embodiments, the above-described steps can be performed in the ion plasma module 1811. Fig.12 and Fig.13D The etching operation.

[0170] Fig.19 An example of an ion plasma module is shown, which presents a simplified cross-sectional view of an ion beam etching system 1900 for performing ion beam etching and / or ion beam processing, such as oxidation or nitridation, according to certain methods. In this example, a wafer 1901 is placed on a substrate support 1903. The substrate support can provide a clamp such as a mechanical clamp or an electrostatic clamp to keep the wafer 1101 on the substrate support 1903. The ion beam etching system 1900 can be equipped with hardware (not shown) to provide electrical and fluid connections. In some cases, the electrical connection can be used to power the substrate support 1903 or to an electrostatic chuck located on or inside the substrate support 1903, and the fluid connection can be used to provide a fluid for controlling the temperature of the wafer 1901 and the substrate support 1903. The substrate support 1903 can be heated by a heater (not shown) and / or cooled by a cooling mechanism (not shown). Any suitable cooling mechanism can be used. In one example, the cooling mechanism may involve flowing a cooling fluid through lines in or adjacent to the substrate support 1903. The substrate support 1903 may be capable of rotating and tilting at variable speeds and angles, as described above with respect to Fig.15 The position controller 1932 can be used to control the tilt and rotation of the substrate support 1903. The substrate support 1903 and the wafer 1901 are located in the processing chamber 1915.

[0171] The processing chamber 1915 is separated from the plasma source chamber 1905 by an ion extractor 1912. In this embodiment, the ion extractor 1912 includes a first electrode 1909, a second electrode 1911, and a third electrode 1913. In this embodiment, the third electrode 1913 is grounded. In other embodiments, the ion extractor 1912 can be other combinations of electrodes for extracting ions from the plasma source chamber 1905. In some embodiments, the ion extractor 1912 can provide an ion beam from the plasma source chamber 1905. The plasma source chamber 1905 is surrounded by a coil 1907. The coil 1907 is electrically connected to a matching network 1924 and a radio frequency (RF) source 1920. The coil 1907, the matching network 1924, and the RF source 1920 provide an RF power system for providing RF power to the plasma source chamber 1905. A gas inlet 1908 is at one end of the plasma source chamber 1905. The gas inlet 1908 is fluidly connected to the process gas source 1902 and the cleaning gas source 1904 through at least one manifold 1906. The gas inlet 1908 can be one of many different forms. For example, the gas inlet can be a gas distribution plate, a gas diffusion plate, a showerhead, or a gas injector. The turbo pump 1928 can be fluidly connected to the processing chamber 1915 to remove gas from the processing chamber 1915 and control the pressure in the processing chamber 1915.

[0172] In some embodiments, a switch 1916 can be fluidly connected between the process gas source 1902, the cleaning gas source 1904, and the gas inlet 1908. The switch 1916 can be any device or group of devices suitable for switching to provide process gas from the process gas source 1902 during wafer processing and to provide cleaning gas from the cleaning gas source 1904 during chamber cleaning.

[0173] As described above, the ion beam etching system 1900 can be used to perform selective oxidation or selective nitridation using mild plasma and appropriate rotation and tilting of the substrate. Examples of process gases for oxidation include mixtures of oxygen (O2), ozone (O3), nitrogen oxide (N2O), H2 and O2, N2 and O2, and NH3 and O2. Examples of process gases for nitridation include nitrogen (N2) and ammonia (NH3), as well as mixtures of H2 and N2, N2 and O2, and NH3 and O2. In some embodiments, the plasma conditions are mild and no etching surface is required for treatment. Examples of mild plasma conditions include less than 100V bias, less than 200mA source current, less than 500W source power, and an O2 flow rate of 0-20sccm per station. The ion beam etching system 1900 can be controlled using a controller 1914, which can have a Fig.17A and Fig. 17B The system controller 1729 has similar characteristics and features.

[0174] return Fig.17A and 17B In various embodiments, a system controller 1729 is used to control process conditions during deposition. The controller 1729 will typically include one or more memory devices and one or more processors. The processor may include a CPU or computer, analog and / or digital input / output connections, a stepper motor controller board, etc. Such a system controller can be used to control any of the processes and apparatus described herein.

[0175] The controller 1729 can control all device activities. The system controller 1729 runs system control software, which includes instruction sets for controlling timing, gas mixture, chamber pressure, chamber temperature, wafer temperature, radio frequency (RF) power level, wafer chuck or pedestal position, and other parameters of a particular process. In some embodiments, other computer programs stored on a memory device associated with the controller 1729 may be used.

[0176] Typically, there will be a user interface associated with the controller 1729. The user interface may include a display screen, a graphical software display of the device and / or process conditions, and a user input device such as a pointing device, keyboard, touch screen, microphone, or the like.

[0177] The system control logic may be configured in any suitable manner. In general, the logic may be designed or configured in hardware and / or software. The instructions for controlling the drive circuit may be hard-coded or provided as software. The instructions may be provided by "programming". Such programming is understood to include any form of logic including hard-coded logic in digital signal processors, application specific integrated circuits, and other devices having specific algorithms implemented as hardware. Programming is also understood to include software or firmware instructions that can be executed on a general purpose processor. The system control software may be encoded in any suitable computer readable programming language.

[0178] The computer program code for controlling the Mo precursor pulses, hydrogen pulses and argon gas flow and other processes in the process sequence can be written in any conventional computer readable programming language: for example, assembly language, C, C++, Pascal, Fortran or others. The compiled object code or script is executed by the processor to perform the tasks identified in the program. As also indicated, the program code can be hard-coded.

[0179] Controller parameters relate to process conditions such as, for example, process gas composition and flow rate, temperature, pressure, cooling gas pressure, substrate temperature and chamber wall temperature. These parameters are provided to the user in the form of a recipe and can be input using a user interface.

[0180] Signals for monitoring the process may be provided through analog and / or digital input connections of the system controller 1729. Signals for controlling the process may be output through analog and digital output connections of the deposition apparatus.

[0181] The system software can be designed or configured in many different ways. For example, multiple chamber component subroutines or control objects can be written to control the operation of chamber components required to perform deposition processes according to the disclosed embodiments. Examples of programs or program segments for this purpose include substrate positioning code, process gas control code, pressure control code, and heater control code.

[0182] In some embodiments, the controller 1729 is part of a system, which can be part of the above-described embodiments. Such a system includes a semiconductor processing device, which includes one or more processing tools, one or more chambers, one or more platforms for processing, and / or specific processing components (wafer pedestals, gas flow systems, etc.). These systems can be integrated with electronic devices to control the operation of these systems before, during, or after the processing of semiconductor wafers or substrates. The electronic device can be referred to as a "controller", which can control various components or sub-parts of one or more systems. Depending on the processing requirements and / or the type of system, the controller 1729 can be programmed to control any of the processes disclosed in the present invention, including controlling the delivery of process gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings in some systems, RF matching circuit settings, frequency settings, flow rate settings, plasma pulse frequency settings, fluid delivery settings, position and operation settings, wafer entry and exit tools and other transfer tools and / or the delivery of load locks connected to a specific system or interfaced with the system.

[0183] Broadly speaking, a controller can be defined as an electronic device with various integrated circuits, logic, memory, and / or software that receives instructions, issues instructions, controls operations, enables cleaning operations, enables endpoint measurements, etc. The integrated circuit may include a chip storing program instructions in the form of firmware, a digital signal processor (DSP), a chip defined as an application specific integrated circuit (ASIC), and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions delivered to a controller or system in the form of various different settings (or program files), and different settings (or program files) define operating parameters for performing specific processes on or for semiconductor wafers. In some embodiments, the operating parameters may be a part of a recipe defined by a process engineer to complete one or more processing steps in the manufacturing process of one or more (kinds) layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or bare chips of a wafer.

[0184] In some embodiments, the controller 1729 can be a part of or coupled to a computer that is integrated with the system, coupled, or connected to the system or a combination thereof through a network. For example, the controller 1729 can be in the "cloud" or all or part of a main computer system of a wafer factory (fab), which can allow remote access to wafer processing. The computer can enable remote access to the system to monitor the current progress of the manufacturing operation, check the history of past manufacturing operations, check the trends or performance standards of multiple manufacturing operations, change the parameters of the current processing, set the processing steps to follow the current processing or start a new process. In some embodiments, a remote computer (e.g., a server) can provide a process recipe to the system through a network, which can include a local network or the Internet. The remote computer can include a user interface that allows input or programming of parameters and / or settings, which are then transmitted from the remote computer to the system. In some examples, the controller receives instructions in the form of data that specify the parameters of each processing step to be performed during one or more operations. These parameters can be for the type of process to be performed and the type of tool, and the controller is configured to connect or control the tool type. Thus, as described above, the controller may be distributed, for example, by including one or more discrete controllers that are networked together and work toward a common goal (e.g., processing and control as described herein). An example of a distributed controller for these purposes would be one or more integrated circuits within the room that communicate with one or more remote integrated circuits (e.g., at the platform level or as part of a remote computer), which combine to control the process within the room.

[0185] Exemplary systems may include, but are not limited to, plasma etch chambers or modules, deposition chambers or modules, spin rinse chambers or modules, metal plating chambers or modules, cleaning chambers or modules, chamfer edge etch chambers or modules, PVD chambers or modules, CVD chambers or modules, ALD chambers or modules, atomic layer etch (ALE) chambers or modules, ion implantation chambers or modules, track chambers or modules, and any other semiconductor processing system that may be associated with or used in the preparation and / or manufacture of semiconductor wafers.

[0186] As described above, depending on one or more processing steps to be performed by the tool, the controller can communicate with one or more other tool circuits or modules, other tool components, combination tools, other tool interfaces, adjacent tools, adjacent tools, tools located throughout the factory, a host computer, another controller, or tools used in material handling to move containers of wafers to and from tool locations and / or load ports in a semiconductor manufacturing facility.

[0187] Controller 1729 may include different programs. A substrate positioning program may include program code for controlling chamber components for loading a substrate onto a pedestal or chuck and controlling the spacing between the substrate and other components of the chamber, such as a gas inlet. A substrate tilt and rotation program may include code for tilting and rotating. A process gas control program may include code for controlling gas composition, flow rate, pulse time, and optionally for flowing gas into the chamber to stabilize the pressure in the chamber prior to deposition. A pressure control program may include code for controlling the pressure in the chamber by adjusting, for example, a throttle valve in an exhaust system in the chamber. A heater control program may include code for controlling the current of a heating unit for heating a substrate. Alternatively, the heater control program may control the delivery of a heat transfer gas, such as helium, to a wafer chuck.

[0188] Examples of chamber sensors that can be monitored during deposition include mass flow controllers, pressure sensors such as manometers, and thermocouples located in the pedestal or chuck. Appropriately programmed feedback and control algorithms can be used with data from these sensors to maintain desired process conditions.

[0189] The foregoing describes embodiments of the present invention implemented in a single-chamber or multi-chamber semiconductor processing tool. The apparatus and processes described herein can be used in conjunction with a lithographic patterning tool or process, for example, for preparing or manufacturing semiconductor devices, displays, LEDs, photovoltaic panels, etc. Typically, although not necessarily, these tools / processes will be used or operated together in a common manufacturing facility. The lithographic patterning of a film typically includes some or all of the following steps, each of which enables multiple feasible tools: (1) applying a photoresist to a workpiece, i.e., a substrate, using a spin coating or spray coating tool; (2) curing the photoresist using a hot plate or heating furnace or a UV curing tool; (3) exposing the photoresist to visible light or UV light or X-rays using a tool such as a wafer stepper; (4) developing the resist so as to selectively remove the resist and thereby patterning it using a tool such as a wet cleaning station; (5) transferring the resist pattern to an underlying film or workpiece by using a dry or plasma assisted etching tool; and (6) removing the resist using a tool such as a radio frequency or microwave plasma resist stripper.

Claims

1. A method comprising: providing a substrate including features including metal-containing contacts and dielectric sidewalls; treating the feature by exposing the feature to a molybdenum halide; as well as Molybdenum is deposited in the feature, wherein the deposition is selective to the metal-containing contact relative to the dielectric sidewall.

2. The method of claim 1 further comprising exposing the feature to a hydrogen-containing plasma prior to processing the feature.

3. The method of claim 1, wherein the step of depositing molybdenum in the feature exposes the feature to a molybdenum oxyhalide.

4. The method of claim 1 wherein the treating inhibits molybdenum growth on the dielectric sidewalls.

5. The method of claim 1 wherein said processing is performed without depositing molybdenum in said features.

6. The method of claim 1, wherein the treating further comprises exposing the feature to a co-reactant capable of reducing the molybdenum halide to form molybdenum. The method of claim 1 , wherein an amorphous molybdenum-containing layer is located on the metal-containing contact. The method of claim 7 , wherein the treating removes the amorphous molybdenum-containing layer.

9. A method comprising: providing a substrate including a feature having a dielectric sidewall and a molybdenum contact; comprising a molybdenum contact and a dielectric sidewall, wherein an amorphous molybdenum-containing layer is located at a surface of the molybdenum contact; exposing the feature to a molybdenum halide to remove the amorphous molybdenum-containing layer and inhibit molybdenum deposition on the dielectric sidewalls; as well as Molybdenum is deposited in the feature, wherein the deposition is selective to the molybdenum contact relative to the dielectric sidewall.

10. A method comprising: (a) providing a substrate including a field region and a feature, wherein the feature includes an opening, a sidewall, and a bottom, wherein the field region surrounds the opening, and wherein a liner layer is laid on the sidewall of the feature; (b) selectively treating the liner layer such that a portion of the liner layer on the field region and / or an upper portion of the sidewall is preferentially treated relative to the liner layer on a lower portion of the sidewall, wherein the selectively treating the liner layer forms a selectively treated portion of the liner layer; as well as (c) selectively depositing molybdenum at the bottom of the feature, wherein deposition on the selectively processed portion of the liner layer is suppressed.