Time-of-flight mass spectrometer control circuit

Abstract

The invention discloses a time-of-flight mass spectrometer control circuit, which relates to the technical field of mass spectrometer instruments and comprises an FPGA main control circuit arranged on an FPGA system control board, a DAC control circuit arranged on a DAC control board and an ADC control circuit arranged on an ADC control board. The power supply system supplies power to the DAC control circuit, the ADC control circuit, the I / O output control circuit and the FPGA main control circuit; the DAC control circuit, the ADC control circuit and the I / O output control circuit respectively exchange data with the FPGA main control circuit; the FPGA main control circuit is connected with the PC mass spectrometer; the I / O output control circuit is connected with a power amplifier tube, and the power amplifier tube is connected with voltage output circuits with different voltage values. According to the invention, each discrete module circuit board is redesigned to optimize a circuit, and discrete modules are fused into a control circuit board with a high integration level, so that the real-time performance and reliability of data acquisition are further improved.

Description

Technical Field

[0001] The invention relates to the technical field of mass spectrometer instruments, and in particular to a time-of-flight mass spectrometer control circuit. Background Art

[0002] There are many analog voltages that need to be monitored in real time in the control process of the time-of-flight mass spectrometer. If several ADC chips are used to directly collect signals, the entire circuit system will be very large and complex. In addition, the mass spectrometer is a high-precision instrument. During normal operation, the instrument needs to precisely control the output voltages of multiple high-voltage power supplies, which requires the front-end control circuit to have low noise.

[0003] The analyzer of the mass spectrometer needs to work properly in a high vacuum environment, and it also needs a high voltage of 20KV as the acceleration voltage of the ions. The high vacuum environment ensures that the analyzer can work normally on the one hand, and on the other hand, the high vacuum also ensures the discharge distance of the accelerating electrode, ensuring that the instrument will not have high-voltage discharge. However, it may still occur during the use of the instrument, such as damage to the fore-stage oil pump or the vacuum molecular pump, causing insufficient vacuum in the instrument; finally, the instrument discharges, and other conditions may occur such as the circuit board or power supply being broken down by high voltage.

[0004] The circuit architecture currently used in the industry all uses discrete circuit modules to control their respective functional modules, which will lead to the following problems: First: complex power supply system, different main control chips require different power supply voltages; second: each module requires more communication interfaces, which increases communication time and reduces the real-time nature of collected data; third: each discrete module is assembled in different places, which adds more wiring and reduces the reliability of the instrument. Summary of the invention

[0005] The present invention aims at solving the problems in the prior art and provides a time-of-flight mass spectrometer control circuit.

[0006] To achieve the above purpose, the technical solution adopted by the present invention is as follows:

[0007] A time-of-flight mass spectrometer control circuit comprises a power supply system, an FPGA system control board, a DAC control board, an ADC control board and an I / O output control circuit, wherein the FPGA system control board is provided with an FPGA main control circuit, the DAC control board is provided with a DAC control circuit, and the ADC control board is provided with an ADC control circuit; the power supply system supplies power to the DAC control circuit, the ADC control circuit, the I / O output control circuit and the FPGA main control circuit; the DAC control circuit, the ADC control circuit and the I / O output control circuit are independently arranged in pairs, and the DAC control circuit, the ADC control circuit and the I / O output control circuit respectively exchange data with the FPGA main control circuit; the FPGA main control circuit is also connected to a PC mass spectrometer; the I / O output control circuit is connected to a power amplifier tube through an optical coupler, and the power amplifier tube is connected to voltage output circuits with different voltage values.

[0008] Based on the above technical solution, further, the ADC control circuit includes an analog switch, an impedance matching module, an analog-to-digital conversion chip, an isolation transmission chip module, a filter capacitor module and a power supply working circuit. After the signal is processed by the analog switch, the signal is output to the impedance matching module, and then the signal is output to the analog-to-digital conversion chip. The converted digital signal communicates with the microcontroller through the isolation transmission chip module.

[0009] Based on the above technical solution, further, the output circuit of the ADC control board is respectively connected to the high vacuum gauge vacuum acquisition circuit, the low vacuum gauge vacuum acquisition circuit, the acquisition card power supply monitoring circuit and the preamplifier power supply monitoring circuit.

[0010] Based on the above technical solution, further, the preamplifier power supply monitoring circuit includes a first resistor, a second resistor, a first capacitor, a second capacitor, a power chip, a first isolation amplifier, a third capacitor and a fourth capacitor, one end of the first resistor is connected to the power output end, the second capacitor and the power chip, and the other end of the first resistor is connected to the second resistor, the first capacitor, and the first isolation amplifier; one end of the second resistor and the first capacitor are grounded together, and the first capacitor is also connected to the first isolation amplifier, the third capacitor and the second capacitor, and the power chip are grounded together, the power chip is also connected to the third capacitor and the first isolation amplifier, and the first isolation amplifier is connected to the fourth capacitor.

[0011] Based on the above technical solution, further, the preamplifier power supply monitoring module monitors the preamplifier power supply circuit, the preamplifier power supply circuit includes a power supply unit, a first filter capacitor unit and a first power supply output interface, the power supply unit is connected to the first power supply output interface, the power supply unit is connected to the first filter capacitor unit, and the first filter capacitor unit is connected to the first power supply output interface.

[0012] Based on the above technical solution, further, the acquisition card power supply monitoring circuit includes a third resistor, a fourth resistor, a fifth capacitor, a sixth capacitor, a second isolation amplifier, and a seventh capacitor, wherein one end of the third resistor is connected to the power supply, the fifth capacitor and the second isolation amplifier, the other end of the third resistor is connected to the fourth resistor, the sixth capacitor, and the second isolation amplifier, one end of the fifth capacitor is grounded, one end of the sixth capacitor is connected to the fourth resistor, the ground and the second isolation amplifier, and the second isolation amplifier is connected to the seventh capacitor.

[0013] Based on the above technical solution, further, the acquisition card power supply monitoring circuit monitors the acquisition card power supply control output circuit, the acquisition card power supply control output circuit includes a power supply output unit, a second filter capacitor unit and a second power supply output interface, the power supply output unit is connected to the second power supply output interface, the second power supply output interface is connected to the second filter capacitor unit, and the second filter capacitor unit is connected to the power supply output unit.

[0014] Based on the above technical solution, further, the I / O output control circuit is composed of a first I / O output circuit, a second I / O output circuit, a third I / O output circuit and a fourth I / O output circuit.

[0015] Based on the above technical solution, further, the high vacuum gauge vacuum acquisition circuit includes a high vacuum gauge power supply switch control circuit, a high vacuum gauge comparison circuit, an eighth capacitor and a high vacuum gauge output interface. The high vacuum gauge power supply switch control circuit outputs the real-time vacuum analog signal to the high vacuum gauge comparison circuit through the high vacuum gauge output interface.

[0016] Based on the above technical solution, further, the high vacuum gauge power supply switch control circuit includes a first photocoupler and a first switch, one end of the first photocoupler is connected to a fifth resistor, the fifth resistor is connected to an output pin of the single-chip computer to output the signal, and the first photocoupler is also connected to the first switch, wherein a pin of the first switch is also connected to a sixth resistor, the sixth resistor is connected to the seventh resistor and the gate of the first MOS tube, the source of the first MOS tube is connected to the seventh resistor, the ninth capacitor, and the tenth capacitor, the drain of the first MOS tube is connected to the first inductor and the eleventh capacitor, the eleventh capacitor is connected to the twelfth capacitor, the thirteenth capacitor, another pin of the first switch, the cathode of the first photosensitive diode, the first diode, the first diode is connected to the eighth resistor, the thirteenth capacitor, the twelfth capacitor and the first inductor, wherein the eighth resistor is connected to the anode of the first photosensitive diode.

[0017] Based on the above technical solution, further, the high vacuum gauge comparison circuit includes a first operational amplifier, wherein the first operational amplifier is connected to one end of the ninth resistor, the other end of the ninth resistor is connected to the base of the first triode, the emitter of the first triode is grounded, the collector of the first triode is connected to the tenth resistor, the tenth resistor is connected to the second photocoupler, the second photocoupler is connected to the emitter of the second triode, the collector of the second triode is connected to the power supply, the base of the second triode is connected to the eleventh resistor, the eleventh resistor is connected to the twelfth resistor and the output pin of the first operational amplifier, the twelfth resistor is connected to the thirteenth resistor, the first operational amplifier, the fourteenth resistor and the fourteenth capacitor, wherein the fourteenth resistor and the fourteenth capacitor are both grounded, and the thirteenth resistor is connected to the reference voltage.

[0018] Based on the above technical solution, further, the low vacuum gauge vacuum acquisition circuit includes a low vacuum gauge power supply switch control circuit, a low vacuum gauge output interface, a short resistor, a quasi-generation circuit and a low vacuum gauge comparison circuit. The low vacuum gauge power supply switch control circuit is started to power the low vacuum gauge vacuum acquisition circuit, and the signal is output from the low vacuum gauge output interface to the interface of the FPGA system control board, and then the vacuum value is fed back to the reference generation circuit and the low vacuum gauge comparison circuit in sequence through the low vacuum gauge output interface.

[0019] Based on the above technical solution, further, the low vacuum gauge power supply switch control circuit includes a third photoelectric coupler, wherein one end of the third photoelectric coupler is connected to the fifteenth resistor, the fifteenth resistor is connected to an output pin of the single-chip computer to output the signal, the third photoelectric coupler is also connected to the second switch, a pin of the second switch is also connected to the sixteenth resistor, the sixteenth resistor is connected to the seventeenth resistor and the gate of the second MOS tube, the source of the second MOS tube is connected to the seventeenth resistor, the seventeenth resistor is connected to the cathode of the second diode, the fifteenth capacitor, and the sixteenth capacitor, the other ends of the fifteenth capacitor and the sixteenth capacitor in parallel are grounded together, and the anode of the second diode is grounded; the drain of the second MOS tube is connected to the second inductor and the seventeenth capacitor, the seventeenth capacitor is connected to the eighteenth capacitor, the nineteenth capacitor, the second switch, the cathode of the second photosensitive diode, and the third diode, the third diode is connected to the eighteenth resistor, the nineteenth capacitor, the eighteenth capacitor and the second inductor, and the eighteenth resistor is connected to the anode of the second photosensitive diode.

[0020] Based on the above technical solution, further, the low vacuum gauge comparison circuit includes a second operational amplifier, wherein the inverting input terminal of the second operational amplifier is connected to the nineteenth resistor, the nineteenth resistor is connected to the twentieth resistor, the same-direction input terminal of the second operational amplifier is connected to the twenty-first resistor, the twenty-second resistor and the second operational amplifier, the twenty-first resistor is connected to the reference voltage and the twenty-third resistor, the twenty-third resistor is connected to the twenty-fourth resistor, and the twenty-fourth resistor is grounded; the second operational amplifier is connected to the twenty-fifth resistor, the twenty-fifth resistor is connected to the base of the transistor Q13, the collector of the transistor Q13 is connected to the power supply, and the The emitter is connected to the fourth photocoupler, the fourth photocoupler is also connected to the twenty-eighth resistor, the twenty-eighth resistor is connected to the collector of the third triode, the emitter of the third triode is grounded, and the base of the third triode is connected to the twentieth resistor; the fourth photocoupler is also connected to the twenty-sixth resistor, the collector of the fourth triode, and the collector of the fifth triode, wherein the emitter of the fifth triode is grounded, the base of the fifth triode is connected to the twenty-seventh resistor, and the twenty-seventh resistor is connected to an output pin of the single-chip computer to output the signal; the base of the fourth triode is connected to the twenty-nineth resistor, and the twenty-ninth resistor is connected to an output pin of the single-chip computer to output the signal.

[0021] Based on the above technical solution, further, the FPGA main control circuit includes a power supply generation circuit and a power supply input port, the power supply input port supplies power to the power supply generation circuit, wherein the power supply generation circuit includes a switching power supply, the switching power supply is connected to the capacitor component, the cathode of the fourth diode and the third inductor, the anode of the fourth diode is grounded, the third inductor is connected to the switching power supply, the twentieth capacitor, the twenty-first capacitor, the twenty-second capacitor and the power supply VCC, and the twenty-second capacitor is connected to the twenty-first capacitor, the twentieth capacitor, ground and the switching power supply.

[0022] Based on the above technical solution, further, the DAC control circuit is composed of a plurality of digital-to-analog converters arranged in parallel, and the digital-to-analog converters arranged in parallel operate independently.

[0023] Compared with the prior art, the present invention has the following beneficial effects:

[0024] (1) The present invention redesigns and optimizes the circuits of each discrete module circuit board, integrates the discrete modules into a control circuit board with a higher degree of integration, and replaces the main control chip with a faster FPGA chip, further improving the real-time performance and reliability of the collected data.

[0025] (2) The present invention combines a multiplexer with an ADC chip and adopts the idea of ​​time-sharing acquisition. The multiplexer uses a 16:1 model chip, so that 16 analog signals can be monitored. Signal acquisition uses a high-precision ADC chip with a sampling rate greater than 40Kps. Although the time-sharing method is used for acquisition, since the acquisition time of a single channel is extremely short, it is also possible to monitor the feedback signal of the mass spectrometer in real time.

[0026] (3) The present invention uses a separate digital-to-analog conversion chip for each high-voltage power supply, and the main advantages are: 1 / the DAC chips operate independently without crosstalk between the chips; 2 / better output voltage noise; 3 / each DAC chip can be independently controlled.

[0027] (4) In order to ensure that the high-voltage power supply is turned off, the present invention also sets up a vacuum protection circuit in the circuit. The basic idea is to compare the vacuum signal with the preset reference voltage through the operational amplifier. When the vacuum degree is insufficient, the power supply of the high-voltage power supply is immediately turned off, thereby turning off the high voltage quickly and protecting the instrument.

[0028] (5) The present invention has a higher degree of integration, reduces the use of wires, improves the aesthetics of the instrument, and improves the reliability of the instrument; the lower computer has a faster operating speed and more reliable performance; the utilization rate of existing materials is improved, and the requirements for material procurement are reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a flowchart of the overall process of the present invention;

[0030] Figure 2 ADC control circuit diagram of the present invention;

[0031] Figure 3 This is a circuit diagram of the analog-to-digital conversion chip of the present invention;

[0032] Figure 4 This is a circuit diagram of the first isolation transmission chip of the present invention;

[0033] Figure 5 This is a circuit diagram of a second isolation transmission chip of the present invention;

[0034] Figure 6 This is a circuit diagram of the first filter capacitor of the present invention;

[0035] Figure 7 is a circuit diagram of a second filter capacitor of the present invention;

[0036] Figure 8 This is a working circuit diagram of the first power supply of the present invention;

[0037] Fig. 9 is a working circuit diagram of the second power supply of the present invention;

[0038] Fig.10 is a working circuit diagram of the third power supply of the present invention;

[0039] Fig.11 A circuit diagram for monitoring power supply of a preamplifier of the present invention;

[0040] Fig.12 This is a power supply circuit diagram of the preamplifier of the present invention;

[0041] Fig.13 This is a circuit diagram of the first filter capacitor unit of the present invention;

[0042] Fig.14 This is a power supply monitoring circuit diagram for the acquisition card of the present invention;

[0043] Fig.15 This is a power supply control output circuit diagram of the acquisition card of the present invention;

[0044] Fig.16 is a circuit diagram of a second filter capacitor unit of the present invention;

[0045] Fig.17 is a first I / O output circuit diagram of the present invention;

[0046] Fig.18 is a second I / O output circuit diagram of the present invention;

[0047] Fig.19 The pulse and power supply interface output circuit diagram of the present invention;

[0048] Fig. 20 is a third I / O output circuit diagram of the present invention;

[0049] Fig.21 is a fourth I / O output circuit diagram of the present invention;

[0050] Fig. 22 A +24V power supply control circuit for the high voltage power supply of the present invention;

[0051] Fig.23 is an eighth capacitor circuit diagram of the present invention;

[0052] Fig.24 This is a comparison circuit diagram of a high vacuum gauge of the present invention;

[0053] Fig.25 This is a power switch control circuit diagram of the high vacuum gauge of the present invention;

[0054] Fig.26 This is the output interface circuit diagram of the high vacuum gauge of the present invention;

[0055] Fig. 27 A comparison threshold reference circuit diagram of a high vacuum gauge of the present invention;

[0056] Fig.28 This is a circuit diagram of the power switch control circuit of the low vacuum gauge of the present invention;

[0057] Fig.29 This is the output interface circuit diagram of the low vacuum gauge of the present invention;

[0058] Fig.30 The circuit diagram of capacitor C68 of the present invention;

[0059] Fig.31 The short-circuit resistor circuit diagram of the present invention;

[0060] Fig.32 generating a circuit diagram for the present invention benchmark;

[0061] Fig.33 The low vacuum gauge comparison circuit diagram of the present invention;

[0062] Fig.34 The RS232 serial port module of the FPGA master control of the present invention communicates with the PC circuit diagram;

[0063] Fig.35 This is a circuit diagram of a temperature acquisition module of the present invention;

[0064] Fig.36 This is another circuit diagram of a temperature acquisition module of the present invention;

[0065] Fig.37 This is the circuit diagram of the power supply input port of the present invention;

[0066] Fig.38 A circuit diagram is generated for powering the present invention. DETAILED DESCRIPTION

[0067] The present invention is further described and illustrated below in conjunction with the accompanying drawings and specific embodiments. The technical features of each embodiment of the present invention can be combined accordingly without conflicting with each other.

[0068] In order to make the above-mentioned purpose, features and advantages of the present invention more obvious and easy to understand, the specific implementation mode of the present invention is described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below. The technical features in each embodiment of the present invention can be combined accordingly without conflicting with each other.

[0069] In the description of the present invention, it is to be understood that when an element is considered to be "connected" to another element, it may be directly connected to the other element or indirectly connected, i.e., there is an intermediate element. On the contrary, when an element is said to be "directly" connected to another element, there is no intermediate element. In the description of the present invention, it is to be understood that the terms "first" and "second" are only used to distinguish the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features.

[0070] Example

[0071] Combination Figure 1 As shown, a time-of-flight mass spectrometer control circuit is provided, which includes a power supply system, an FPGA system control board, a DAC control board, an ADC control board and an I / O output control circuit, wherein the FPGA system control board is provided with an FPGA main control circuit, the DAC control board is provided with a DAC control circuit, and the ADC control board is provided with an ADC control circuit; the power supply system supplies power to the DAC control circuit, the ADC control circuit, the I / O output control circuit and the FPGA main control circuit respectively; the DAC control circuit, the ADC control circuit and the I / O output control circuit are independently arranged in pairs, and the DAC control circuit, the ADC control circuit and the I / O output control circuit respectively exchange data with the FPGA main control circuit; the FPGA main control circuit is also connected to a PC mass spectrometer; the I / O output control circuit is connected to a power amplifier tube through an optical coupler, the power amplifier tube is connected to voltage output circuits with different voltage values, and the output circuit of the ADC control board is connected to at least one voltage output circuit, and the voltage output circuit at least includes a +5V voltage output circuit, a +12V voltage output circuit and a +24V voltage output circuit. The output circuit of the ADC control board is respectively connected to control the vacuum acquisition circuit of the high vacuum gauge, the vacuum acquisition circuit of the low vacuum gauge, the power supply monitoring circuit of the acquisition card, the power supply voltage monitoring circuit, the power supply current monitoring circuit and the preamplifier power supply monitoring circuit. It should be noted in this embodiment that the letters, symbols or names connected to the connection ends of the circuit elements are the same, that is, different circuit elements are connected to the same end. For example, some different circuit elements are connected to +24VIN3, then these circuit elements can be connected to the same end.

[0072] Specifically, the ADC control circuit includes an analog switch, an impedance matching module, an analog-to-digital conversion chip, an isolation transmission chip module, a filter capacitor module, and a power supply working circuit module. After the signal is processed by the analog switch, the signal is output to the impedance matching module, and then the signal is output to the analog-to-digital conversion chip. The converted digital signal communicates with the single-chip microcomputer through the isolation transmission chip module. Specifically, combined with Figure 2As shown, the ADC control circuit includes an analog switch U5, which is a 1:16 analog switch, which can monitor the input interface of 16 signals and output the signals to the impedance matching module for caching and impedance matching. That is, the ADC control circuit can realize the effect of controlling the high vacuum gauge vacuum acquisition circuit, the low vacuum gauge vacuum acquisition circuit, the acquisition card power supply monitoring circuit, the power supply voltage monitoring circuit, the power supply current monitoring circuit and the preamplifier power supply monitoring circuit respectively through the multi-channel function of the analog switch, wherein, Figure 2 and Figure 3 The combination circuit can realize the monitoring function of power supply voltage and power supply current. The output signal of the analog switch U5 is connected to the input pin IN+ of the operational amplifier U27 through the output pin 28, and the resistor R16 and the resistor R58 are connected in series between the two. The 1 pin of the analog switch U5 is connected to Vcc, and the 27 pin is connected to Vee, wherein one end of the resistor R16 is grounded, and the operational amplifier U27 can select the chip OP07; the input pin IN- of the operational amplifier U27 is connected to one end of the resistor R55, and the other end of the resistor R55 is connected to the output pin 6 of the operational amplifier U27; the pin 4 of the operational amplifier U27 is connected to Vee and the capacitor C77, and one end of the capacitor C77 is grounded. The signal that completes the cache and impedance matching is output to the analog-to-digital conversion chip U10, and the converted digital signal communicates with the single-chip microcomputer through the isolation transmission chip module. Specifically, combined with Figure 3-Figure 5 As shown, pin 6 of the analog-to-digital conversion chip U10 is connected to one end of capacitor C10 and capacitor C20, the other ends of capacitor C10 and capacitor C20 are commonly connected to AGND and one end of capacitor C22, the other end of capacitor C22 is connected to pin 7 of the analog-to-digital conversion chip U10, pins 2, 5, 8, 13, and 15 of the analog-to-digital conversion chip U10 are all connected to AGND, and pins 16 and 11 of the analog-to-digital conversion chip U10 are connected to a positive 5V power supply; the isolation transmission chip module includes a first isolation transmission chip U7 and a second isolation transmission chip U8, wherein pin 1 and pin 7 of the first isolation transmission chip U7 are connected to a negative 3.3V power supply VCC, and pin 16 and pin 10 thereof are connected to a positive 5V power supply. Further, the filter capacitor module includes a first filter capacitor and a second filter capacitor, combined with Figure 6 and Figure 7As shown, the first filter capacitor includes capacitor C119, capacitor C120, capacitor C121 and capacitor C122, and capacitors C119, capacitor C120, capacitor C121 and capacitor C122 are arranged in parallel, one end of the parallel connection is commonly connected to the +5V power supply, and the other end of the parallel connection is grounded DGND. The second filter capacitor includes capacitor C81, capacitor C82, capacitor C99 and capacitor C98. Specifically, one end of capacitor C81, capacitor C82 and capacitor C99 is commonly connected to Vcc, the other ends of capacitor C81, capacitor C82 and capacitor C99 are commonly connected to one end of capacitor C98, and the other end of capacitor C98 is connected to Vee. The power supply working circuit module includes a first power supply working circuit, a second power supply working circuit and a third power supply working circuit, combined with Figure 8-Figure 10As shown, the first power supply working circuit includes a fixed voltage three-terminal integrated voltage regulator U11, the IN pin of the fixed voltage three-terminal integrated voltage regulator U11 is connected to Vcc, the OUT pin of the fixed voltage three-terminal integrated voltage regulator U11 is connected to the positive 5V power supply, and the 2 pin of the fixed voltage three-terminal integrated voltage regulator U11 is grounded DGND; the second power supply working circuit includes a fixed voltage three-terminal integrated voltage regulator U19, the 3 pin of the fixed voltage three-terminal integrated voltage regulator U19 is connected to Vcc and one end of the capacitor C31, Vcc is connected to one end of the capacitor C32, the other end of the capacitor C32 and the other end of the capacitor C31 are connected to the 2 pin of the fixed voltage three-terminal integrated voltage regulator U19 together with one end of the capacitor C30 and one end of the capacitor C29, wherein the 2 pin is grounded; the other end of the capacitor C30 and the other end of the capacitor C29 are connected to the 1 pin of the fixed voltage three-terminal integrated voltage regulator U19 and Ctr1_LDO+5V;The third power supply working circuit includes a chip U26, and pin 1 of the chip U26 is connected to capacitor C34, capacitor C53 and a positive 24V power supply VCC, wherein the chip U26 is an isolated DC-DC converter, the positive 24V power supply VCC is also connected to an inductor L7 and a capacitor C47, one end of the inductor L7 is connected to a positive 24V power supply IN3 and a capacitor C50, the positive 24V power supply IN3 is connected to a capacitor C49, the other ends of the capacitors C49 and C50 are connected to a common ground GND3 and an inductor L11, and the other end of the inductor L11 is connected to the inductor L47. The other end of capacitor C47 is connected to PGND. The other end of capacitor C47 is also connected to capacitor C53, pin 2 of chip U26, capacitor C67, and one end of capacitor C75. The other end of capacitor C67 is connected to pin 3 of chip U26, inductor L13 and capacitor C61. The other end of capacitor C75 is connected to pin 4 of chip U26, capacitor C61, capacitor C39 and inductor L9. The other end of capacitor C39 is connected to inductor L5, pin 5 of chip U26, capacitor C34. The other end of inductor L5 is connected to one end of capacitor C40. Capacitor C43 is connected to pin 1 of the voltage regulator chip U21. The other end of capacitor C40 is connected to the other end of inductor L9, one end of capacitor C57, one end of capacitor C43, one end of capacitor C58 and pin 2 of the voltage regulator chip U21. The other end of inductor L13 is connected to capacitor C57, capacitor C58 and pin 2 of chip U29. Pin 1 of chip U29 is connected to pin 2 of the voltage regulator chip U21. Pin 3 of the voltage regulator chip U21 is connected to one end of the sixteenth capacitor C35, the power supply Vcc and pin 3 of chip U23. Pin 2 of chip U21 is also connected to the other end of the sixteenth capacitor C35, the other end of capacitor C36, one end of capacitor C62, one end of capacitor C64 and pin 2 of chip U23. The other end of capacitor C62 and the other end of capacitor C64 are connected to chip U29 and power supply Vee. Pin 2 of chip U23 is also connected to one end of capacitor C45, one end of capacitor C55, one end of capacitor C70 and ground. The other end of capacitor C45, the other end of capacitor C55 and the other end of capacitor C70 are connected to pin 1 of chip U23 and positive 5V power supply.

[0073] Combination Fig.11As shown, the preamplifier power supply monitoring circuit includes a first resistor R49, a second resistor R54, a first capacitor C108, a second capacitor C73, a 12V to 5V power chip U28, a first isolation amplifier U31, a third capacitor C74, and a fourth capacitor C109. One end of the first resistor R49 is connected to the 12V power output terminal OUT, the second capacitor C73 and the power chip U28, and the other end of the first resistor R49 is connected to the second resistor R54, the first capacitor C108, and the first isolation amplifier U31; one end of the second resistor R54 and the first capacitor C108 are grounded together, and the first capacitor C108 is also connected to the first isolation amplifier U31, the third capacitor C74 and the second capacitor C73, and the power chip U28 are grounded together, the power chip U28 is also connected to the third capacitor C74 and the first isolation amplifier U31, and the first isolation amplifier U31 is connected to the fourth capacitor C109.

[0074] Wherein, the preamplifier power supply monitoring circuit monitors the preamplifier power supply circuit, combined with Fig.12 The preamplifier power supply circuit shown includes a power supply unit, a first filter capacitor unit and a first power supply output interface, the power supply unit is connected to the first power supply output interface, the power supply unit is connected to the first filter capacitor unit, and the first filter capacitor unit is connected to the first power supply output interface. Specifically, the power supply unit includes a positive electrode of a diode D1 connected to a ground GND2, a negative electrode of the diode D1 connected to a positive 12V input voltage IN2, a resistor R1, and a source of a PMOS tube Q1, a gate of the PMOS tube Q1 connected to resistors R1 and R3, a drain of the PMOS tube Q1 connected to an inductor L1 and a capacitor C1, an inductor L1 connected to capacitor C2, a capacitor C3, a resistor R2 and an output voltage +12VOUT, a capacitor C1 connected to an optocoupler HPCL817, a capacitor C2, a capacitor C3, a photosensitive diode D3 and a diode D2, wherein the photosensitive diode D3 is connected to resistor R2, ground GND2 and a positive electrode of a diode D2, and a negative electrode of the diode D2 is connected to an output voltage +12VOUT and a first power supply output interface J5. The photocoupler HPCL817 is also connected to the switch SW1 and the resistor R3. The resistor R3 is connected to the resistor R1 and the gate of the PMOS tube Q1. The photocoupler HPCL817 is also connected to the resistor R12 and the power supply voltage VCC. Fig.13 The first filter capacitor unit shown includes a filter capacitor C14 and a filter capacitor C13, the two filter capacitors are connected in parallel, one end of the parallel connection is grounded, and the other end is connected to the input power supply +12VIN2. It also includes a first power supply output interface J5, one end of which is connected to the output voltage +12VOUT, and the other end is grounded GND2; its function is to serve as the output port of the preamplifier power supply circuit.

[0075] Combination Fig.14As shown, the acquisition card power supply monitoring circuit includes a third resistor R68, a fourth resistor R72, a fifth capacitor C127, a sixth capacitor C130, a second isolation amplifier U37, and a seventh capacitor C131, wherein one end of the third resistor R68 is connected to the positive 5V power supply output terminal OUT, the fifth capacitor C127 and the second isolation amplifier U37, the other end of the third resistor R68 is connected to the fourth resistor R72, the sixth capacitor C130, and the second isolation amplifier U37, one end of the fifth capacitor C127 is grounded, one end of the sixth capacitor C130 is the fourth resistor R72, the ground and the second isolation amplifier U37, and the second isolation amplifier U37 is connected to the seventh capacitor C131.

[0076] Combination Fig.15 As shown, the acquisition card power supply monitoring circuit is used to monitor the acquisition card power supply control output circuit, wherein the acquisition card power supply control output circuit includes a power supply output unit, a second filter capacitor unit and a second power supply output interface, the power supply output unit is connected to the second power supply output interface, the second power supply output interface is connected to the second filter capacitor unit, and the second filter capacitor unit is connected to the power supply output unit. Specifically, the power supply output unit circuit is: the source, drain, and gate corresponding to S\D\G in the field effect transistor U9 and the field effect transistor U15, wherein both can select the field effect transistor IRF9310, the S pins in the field effect transistor U9 and the field effect transistor U15 are connected to one end of the resistor R41, the cathode of the diode D8 and the +5V voltage input terminal VIN1, and the anode of the diode D8 is grounded to GND1. The G pins of field effect transistors U9 and U15 are connected to the other end of resistor R41, optocoupler HCPL817 and pin 1 of switch SW5. Pin 2 of switch SW5 is connected to optocoupler HCPL817, capacitor C25, capacitor C26, cathode of photosensitive diode D10, anode of diode D11 and ground GND1. Optocoupler HCPL817 is also connected to -3.3V VCC and resistor R43. One end of resistor R43 is connected to microcontroller output pin U2_L35P_P, which is used to control the output and shutdown of the power supply. Among them, switch SW5 is used to force the power supply output to open. Pins 1 and 2 can be forced to open by short circuit. If both pins are disconnected, it is controlled by the optocoupler U25 signal. The D pins of the field effect transistor U9 and the field effect transistor U15 are connected to the capacitor C25, the capacitor C26, the resistor R35, the cathode of the diode D11, and the +5V output voltage OUT, wherein the resistor R35 is connected to the anode of the photosensitive diode D10. Fig.16The second filter capacitor unit shown: The second filter capacitor unit includes filter capacitor C42 and filter capacitor C41, both of which are filter capacitors for the +5V power supply input of the acquisition card, and the filter capacitor C42 and the filter capacitor C41 are connected in parallel, wherein one end of the parallel connection is grounded, and the other end of the parallel connection is connected to the input power supply +5VIN1. It also includes a second power supply output interface J8, wherein pin 2 of the second power supply output interface J8 is connected to the output voltage of +5V, and its pin 1 and pin 3 are grounded, and its function is to provide a power supply output interface for the acquisition card.

[0077] Combination Figure 17-Figure 22 The circuit functions of the circuit diagram shown are mainly used to control the high-voltage power supply switch circuit of the mass spectrometer, the power output enable, and the polarity switching function of the power output. The four modules have the same output control function. Specifically, Fig. 22 It is a +24V power supply control circuit of a high voltage power supply: it includes a first control circuit unit, a second control circuit unit and a third control circuit unit connected in parallel, wherein the first control circuit unit includes a capacitor C16 and a capacitor C15 connected in parallel, one end of the parallel connection is grounded, and the other end of the parallel connection is connected to +24VIN3, a resistor R6, and a source of a MOS tube Q2, and the drain of the MOS tube Q2 is connected to a capacitor C5, an inductor L2, a capacitor C4, a capacitor C6, a resistor R7, and a cathode of a diode D4, and the cathode of the diode D4 is connected to a DC power supply, and the anode of the diode D4 is grounded, and at the same time, The anode of the diode D4 is also connected to the cathode of the photosensitive diode D5, the capacitor C4, the capacitor C6, the capacitor C5 and the photoelectric coupler U4, wherein the anode of the photosensitive diode D5 is connected to the resistor R7; the photoelectric coupler U4 is also connected to the resistor R10 and the pins 1 and 2 of the switch SW2, the resistor R10 is connected to the pin 1 of the switch SW2, the gate of the MOS tube Q2 and the resistor R6; the photoelectric coupler U4 is also connected to the resistor R15 and the collector of the transistor Q3, the emitter of the transistor Q3 is connected to VCC and the resistor R4, R4 is connected to the resistor R8, and the resistor R8 is connected to the base of the transistor Q3. The second control circuit unit and the third control circuit unit have the same structure. Among them, the second control circuit unit is composed of capacitor C17, capacitor C18, resistor R19, MOS tube Q4, resistor R21, capacitor C8, inductor L3, capacitor C7, capacitor C9, resistor R20, diode D7, diode D6, switch SW3, resistor R15, photoelectric coupler U12, etc., and the third control circuit unit is composed of capacitor C21, capacitor C19, resistor R36, MOS tube Q5, resistor R39, capacitor C27, inductor L4, capacitor C24, capacitor C28, resistor R37, diode D12, diode D9, switch SW4, resistor R42, photoelectric coupler U20, etc. The connection method of these components is the same as that of the first control circuit unit, and can be specifically combined with Fig. 22As shown, no further details will be given here; the output ends of the resistors R15, R25, and R42 in the circuit are all connected to the microcontroller control pin outputs, which are used to control the optocoupler to turn on and off. Fig.17 The first I / O output circuit shown is a high voltage power supply 1 working control output circuit; it includes a pin connector P1, wherein pin 1 of the pin connector P1 is grounded, pin 2 is connected to a DC power supply DC, pin 6 is connected to a resistor R5 and an optocoupler U2, resistor R5 is connected to a DC power supply DC, optocoupler U2 is grounded, connected to a power supply VCC and resistor R11, resistor R11 is connected to a single chip microcomputer output pin W2_L44P_P, and the single chip microcomputer output pin W2_L44P_P is used to control the externally connected power module switch. Fig.18 The second I / O output circuit shown is a high voltage power supply 2 working control output circuit; it includes a pin connector P3, wherein pin 1 of the pin connector P3 is grounded, pin 2 is connected to a DC power supply DC, pin 6 is connected to a resistor R23 and an optocoupler U14, resistor R23 is connected to a DC power supply DC, optocoupler U2 is grounded, connected to a power supply VCC and resistor R26, and resistor R11 is connected to a microcontroller output pin V3_IO_B2, which is used to control the externally connected power module switch. Fig.19 The pulse and +24V power supply interface output is shown, including the pulse and power supply output interface J9, the pin 1 of the pulse and power supply output interface J9 is grounded, and the pin 2 is connected to the DC power supply. Fig. 20 The third I / O output circuit shown is a high voltage power supply 3 working control output circuit; it includes a pin connector P2, wherein pin 1 of the pin connector P2 is grounded, pin 2 is connected to a DC power supply DC, pin 6 is connected to a resistor R9 and an optocoupler U3, resistor R5 is connected to a DC power supply DC, optocoupler U2 is grounded, connected to a power supply VCC and resistor R13, resistor R13 is connected to a microcontroller output pin V2_L38P_P, and controls the externally connected power module switch. Fig.21 The fourth I / O output circuit shown is a high-voltage power supply 4 working control output circuit; it includes a pin connector P4, wherein pin 1 of the pin connector P4 is grounded, pin 2 is connected to a DC power supply DC, pin 7 is connected to a resistor R29 and a photocoupler U18, resistor R29 is connected to a DC power supply DC, photocoupler U18 is grounded, connected to a power supply VCC and a resistor R34, resistor R34 is connected to a single-chip microcomputer output pin T4_IO_B2, and controls the module switch. Pin 6 of the pin connector P4 is connected to a resistor R22 and a photocoupler U13, photocoupler U13 is grounded, connected to a power supply VCC and a resistor R24, resistor R24 ​​is connected to a single-chip microcomputer output pin P6_IO_B2, and controls the module switch; resistor R22 is connected to a DC power supply DC. The corresponding working principle of the entire circuit is: when the vacuum degree meets the opening conditions, Fig. 22 The circuit module shown starts to work. Figure 17-Figure 21The circuit module shown outputs +24V power supply. Figure 17-Figure 21 The circuit module shown is the pulse box and the high voltage power supply control output interface, in which the vacuum degree opening condition is set to be lower than 3×10 -4 Pa.

[0078] Combination Figure 23-Figure 24 The high vacuum gauge vacuum acquisition circuit shown in the figure mainly includes a high vacuum gauge power supply switch control circuit and a high vacuum gauge comparison circuit, an eighth capacitor C72 and a high vacuum gauge output interface. The comparison result signal is ultimately used to enable the high voltage power supply of the high vacuum gauge comparison circuit. Fig.23 The eighth capacitor C72 is a +24V power supply. The eighth capacitor C72 is a filter capacitor, one end of which is grounded and the other end is connected to the power supply voltage +24VIN3; Fig.24 It is a high vacuum gauge comparison circuit, which is a vacuum analog signal of the high vacuum gauge and the set threshold comparison circuit. The control signal is finally output to the above Fig. 22 The +24V power supply control circuit of the high voltage power supply represented by the invention; specifically, Fig.24 The high vacuum gauge comparison circuit includes a first operational amplifier U6, a pin 2 of the first operational amplifier U6 is connected to the tenth acquisition channel AD10 of the 1:16 analog switch and one end of a ninth resistor R71, the other end of the ninth resistor R71 is connected to the base of the first transistor Q9, the emitter of the first transistor Q9 is grounded, the collector of the first transistor Q9 is connected to the tenth resistor R69, the tenth resistor R69 is connected to the second photocoupler U36, the second photocoupler U36 is connected to the emitter of the second transistor Q8, and the second transistor The collector of the tube Q8 is connected to the power supply voltage +24VIN3, the base of the second transistor Q8 is connected to the eleventh resistor R64, the eleventh resistor R64 is connected to the twelfth resistor R61 and the output pin 6 of the first operational amplifier U6, the twelfth resistor R61 is connected to the thirteenth resistor R60, the pin 3 of the first operational amplifier U6, the fourteenth resistor R53 and the fourteenth capacitor C110, wherein the fourteenth resistor R53 and the fourteenth capacitor C110 are both grounded, and the thirteenth resistor R60 is connected to the reference voltage +10Verf. The working principle of the high vacuum gauge comparison circuit is: according to the vacuum gauge output voltage and vacuum correspondence table provided by the high vacuum gauge manufacturer, the corresponding voltage value is calculated according to the designed vacuum requirement, such as according to the provided reference manual, etc., this value is used as a reference point to compare with the actual vacuum value of the instrument, when the actual vacuum value is lower than the comparison threshold value, the instrument can be started and operated normally, otherwise the high vacuum gauge comparison circuit is forced to close.

[0079] Fig.25 and Fig.26 They represent the high vacuum gauge power switch control circuit and the high vacuum gauge output interface, from which the real-time vacuum simulation signal is output to Fig.24Specifically, the high vacuum gauge power supply switch control circuit includes a first photocoupler U35 and a first switch SW6, one end of the first photocoupler U35 is connected to a fifth resistor R62, the fifth resistor R62 is connected to an output pin Aal_IO_B2 of the single-chip computer to output the signal, the first photocoupler U35 is also connected to pins 1 and 2 of the first switch SW6, wherein a pin 2 of the first switch SW6 is also connected to a sixth resistor R50, the sixth resistor R50 is connected to the seventh resistor R47 and the gate of the first MOS tube, and the source of the first MOS tube The seventh resistor R47, the ninth capacitor C23, and the tenth capacitor C33 are connected, the drain of the first MOS tube is connected to the first inductor L15 and the eleventh capacitor C79, the eleventh capacitor C79 is connected to the twelfth capacitor C91, the thirteenth capacitor C80, the other pin 1 of the first switch SW6, the cathode of the first photosensitive diode D16, and the first diode D15, the first diode D15 is connected to the eighth resistor R48, the thirteenth capacitor C80, the twelfth capacitor C91 and the first inductor L15, wherein the eighth resistor R48 is connected to the anode of the first photosensitive diode D16.

[0080] Combination Fig. 27 This is the high vacuum gauge comparison threshold reference circuit diagram, which is Fig.24 Part of the circuit includes a diode D17, whose pin 1 is connected to one end of a resistor R57 and one end of a resistor R65, the other end of the resistor R65 is connected to pin 2 of the diode D17 and capacitor C118, capacitor C118 is connected to capacitor C128 and Ctrl_+10Vref, one end of capacitor C118 and capacitor C128 are connected to AGND together, pin 3 of the diode D17 is connected to resistor R56 and resistor R57, and one end of the resistor R56 is connected to positive 24VIN3.

[0081] Combination Figure 28-Figure 33 The entire circuit shown is a low vacuum gauge vacuum acquisition circuit, which includes a low vacuum gauge power supply switch control circuit, a low vacuum gauge output interface, a short resistor, a quasi-generation circuit, and a low vacuum gauge comparison circuit. The low vacuum gauge power supply switch control circuit is started to power the low vacuum gauge vacuum acquisition circuit, and the signal is output from the low vacuum gauge output interface to the interface of the FPGA system control board, and then the vacuum value is fed back to the reference generation circuit and the low vacuum gauge comparison circuit in sequence through the low vacuum gauge output interface. The comparison result signal is finally used to enable the power supply switch output of the front-stage baffle valve. The details are as follows:

[0082] Fig.28What is shown is a low vacuum gauge power supply switch control circuit; specifically, it includes a third photocoupler U44, one end of the third photocoupler U44 is connected to a fifteenth resistor R82, the fifteenth resistor R82 is connected to the microcontroller pin output signal V4_IO_B2, one end is connected to the power supply VCC, the third photocoupler U44 is also connected to pins 1 and 2 of the second switch SW7, wherein pin 2 of the second switch SW7 is also connected to a sixteenth resistor R79, the sixteenth resistor R79 is connected to a seventeenth resistor R76 and the gate of the second MOS tube, the source of the second MOS tube is connected to the seventeenth resistor R76 and +24VIN3, the seventeenth resistor R76 is connected to the cathode of the second diode D20 and the fifteenth capacitor C37 and the sixteenth capacitor C35 in parallel, the other ends of the fifteenth capacitor C37 and the sixteenth capacitor C35 in parallel are grounded together, and the anode of the second diode D20 is grounded. The drain of the second MOS tube is connected to the second inductor L20 and the seventeenth capacitor C143, the seventeenth capacitor C143 is connected to the eighteenth capacitor C144, the nineteenth capacitor C139, the pin 1 of the second switch SW7, the cathode of the second photosensitive diode D23, and the third diode D22, the third diode D22 is connected to the eighteenth resistor R77, the nineteenth capacitor C139, the eighteenth capacitor C144 and the second inductor L20, wherein the eighteenth resistor R77 is connected to the anode of the second photosensitive diode D23. Fig.29 Shown is the low vacuum gauge output interface; Fig.30 Shown is capacitor C68, which is a filter capacitor for the +24V input; Fig.31 Shown is the shorting resistor R52 between the analog ground and the power ground; Fig.32 It represents the +10V reference generation circuit. The +10V reference voltage is output to Fig.33 In the circuit shown, specifically, pin 1 of the reference voltage chip D14 is connected to resistors R45 and R46, resistor R45 is connected to resistor R44 and pin 3 of the reference voltage chip D14, resistor R44 is connected to +24VIN3, pin 3 of the reference voltage chip D14 is also connected to the reference voltage, capacitor C71, and capacitor C69, one end of the capacitor C71 and capacitor C69 are grounded together, and capacitor C69 is connected to pin 2 of the reference voltage chip D14.

[0083] Combination Fig.33 The low vacuum gauge comparison circuit shown is a circuit comparing the vacuum analog signal of the low vacuum gauge with the set threshold value, which provides a comparison reference for the circuit. The real-time vacuum signal of the low vacuum gauge is Fig.29The interface input of the circuit shown. Specifically, it includes a second operational amplifier U24, wherein the reverse input terminal of the second operational amplifier U24 is connected to the 19th resistor R33, the 19th resistor R33 is connected to the 9th acquisition channel AD9 of the 1:16 analog switch and the 20th resistor R51, the same-direction input terminal of the second operational amplifier U24 is connected to the 21st resistor R28, the 22nd resistor R38 and the output pin 6 of the second operational amplifier U24, the 21st resistor R28 is connected to the reference voltage and the 23rd resistor R31, the 23rd resistor R31 is connected to the 24th resistor R30, and the 24th resistor R30 is grounded. The output pin 6 of the second operational amplifier U24 is connected to the 25th resistor R32, the 25th resistor R32 is connected to the base of the transistor Q13, and the collector of the transistor Q13 is connected to

[0084] +24VIN3, the emitter of the transistor Q13 is connected to the fourth photocoupler U22, and the fourth photocoupler U22 is also connected to the twenty-eighth resistor R17, and the twenty-eighth resistor R17 is connected to the collector of the third transistor Q7, the emitter of the third transistor Q7 is grounded, and the base of the third transistor Q7 is connected to the twentieth resistor R51; the fourth photocoupler U22 is also connected to the twenty-sixth resistor R14, the collector of the fourth transistor Q11, and the collector of the fifth transistor Q12, wherein the emitter of the fifth transistor Q12 is grounded, and the base of the fifth transistor Q12 is connected to the twenty-seventh resistor R40, and the twenty-seventh resistor R40 is connected to the single-chip microcomputer pin output signal N5_IO_B2; the base of the fourth transistor Q11 is connected to the twenty-ninth resistor R18, and the twenty-ninth resistor R18 is connected to the single-chip microcomputer pin output signal T5_IO_B2. The working principle of the low vacuum gauge comparison circuit is: according to the vacuum gauge output voltage and vacuum correspondence table provided by the low vacuum gauge manufacturer, the corresponding voltage value is calculated according to the designed vacuum requirement, and this value is used as a reference point for comparison with the actual vacuum value of the instrument. When the actual vacuum value is lower than the comparison threshold, the instrument can be started and operated normally, and the vacuum baffle valve is opened to start the molecular pump. Otherwise, the molecular pump is closed to protect the molecular pump.

[0085] Combination Figure 28-Figure 33 ,Will Fig.29 The interface shown is output to the low vacuum gauge comparison circuit, and the low vacuum gauge comparison circuit then passes Fig.29 The interface shown feeds the vacuum value to Fig.33 The circuit shown is Fig.32 The reference shown is compared to generate a control signal to the next module, and the remaining modules are filter capacitors.

[0086] In the present embodiment, the PC mass spectrometer needs to work in a high vacuum environment. In order to maintain a high vacuum environment, the instrument adopts a working combination of a fore-stage pump and a molecular pump; the fore-stage pump provides a suitable working air pressure for the molecular pump, and the molecular pump is used to maintain a high vacuum environment. The working condition of the molecular pump is that the outlet vacuum degree needs to be lower than 100Pa, and the low vacuum gauge vacuum acquisition circuit is used to monitor whether the working conditions of the molecular pump are met. If not, the molecular pump needs to be turned off to avoid damage to the molecular pump. The PC mass spectrometer has a high voltage of 20KV when normally collecting spectra, and a high vacuum gauge vacuum acquisition circuit is needed to keep the power supply from discharging. The high vacuum gauge vacuum acquisition circuit is used to monitor the vacuum environment of the current instrument in real time. Once the vacuum environment is damaged due to other reasons, the module immediately turns off the high-voltage power supply to protect the power supply, the instrument and the safety of personnel.

[0087] Combination Figure 34-Figure 36 As shown in the figure, the RS232 serial port module of the FPGA master controls the communication with the PC and the temperature reading circuit of the two temperature sensors of the instrument system. Specifically, Fig.34 It is the communication circuit between the RS232 serial port module of the FPGA master and the PC. Fig.35 and Fig.36 The circuit shown is the temperature reading circuit of two temperature sensors in the instrument system. The internal circuits of the two are the same, and the signals of the two finally communicate with the main control chip FPGA. Fig.35 The circuit in the embodiment includes a temperature sensor interface T1, wherein the 3rd pin of the temperature sensor interface T1 is connected to a resistor R66 and a resistor R74, and the resistor R66 is connected to the pin 1 of the thermocouple analog-to-digital converter U30, and the two are grounded together. The resistor R74 is connected to the capacitor C85, the capacitor C89 and the pin 2 of the thermocouple analog-to-digital converter U30, the capacitor C89 is connected to the resistor R81, the capacitor C92 and the pin 3 of the thermocouple analog-to-digital converter U30, the capacitor C92 is grounded, the resistor R81 is connected to the resistor R86 and the 1st pin of the temperature sensor interface T1, the resistor R86 is connected to the pin 4 of the thermocouple analog-to-digital converter U30, and the two are connected to the power supply VCC together, the power supply VCC is connected to the capacitor C88, and the capacitor C88 is grounded. The 5th, 6th and 7th pins of the thermocouple analog-to-digital converter U30 are connected to the SPI transmission bus of the temperature chip.

[0088] Combination Figure 34-Figure 36 The transmission principle between the signals of the entire circuit shown is: Fig.34 The serial communication shown is the communication between the microcontroller and the PC. Fig.35 and Fig.36 The circuit shown is a temperature acquisition module, which transmits the temperature digitally to the microcontroller. Fig.34 The circuit shown is passed to the computer software.

[0089] Combination Fig.37 and Fig.38The 3.3V power supply generation circuit that constitutes the main control FPGA is specifically: Fig.37 It is the power supply input port of the FPGA system control board; Fig.38 It is a 3.3V power supply generation circuit for the main control FPGA; pins 3 and 6 of the switching power supply U16 are grounded, and pin 1 is connected to a capacitor component, which includes capacitor C56, capacitor C54, capacitor C52, capacitor C51 and capacitor C59. One end of the capacitor component is grounded, and the other end is connected to a 5V input network name, that is, +5VIN, wherein capacitor C56, capacitor C54, capacitor C52, capacitor C51 and capacitor C59 are arranged in parallel, and pin 2 of the switching power supply U16 is connected to the cathode of the fourth diode D13 and the third inductor L6, the anode of the fourth diode D13 is grounded, the third inductor L6 is connected to pin 4 of the switching power supply U16, the twentieth capacitor C44, the twenty-first capacitor C46, ​​the twenty-second capacitor C48 and the power supply VCC, and the twenty-second capacitor C48 is connected to the twenty-first capacitor C46, ​​the twentieth capacitor C44, ground and pin 5 of the switching power supply U16.

[0090] In this embodiment, the signal is transmitted to the single chip microcomputer and then distributed to each module, and each module is relatively independent.

[0091] Finally, it should be noted that the above content is only used to illustrate the technical solution of the present invention, rather than to limit the scope of protection of the present invention. Simple modifications or equivalent substitutions of the technical solution of the present invention by ordinary technicians in this field do not deviate from the essence and scope of the technical solution of the present invention.

Claims

1. A time-of-flight mass spectrometer control circuit, characterized in that: It includes a power supply system, an FPGA system control board, a DAC control board, an ADC control board and an I / O output control circuit. The FPGA system control board is provided with an FPGA main control circuit, the DAC control board is provided with a DAC control circuit, and the ADC control board is provided with an ADC control circuit; The power supply system provides power for the DAC control circuit, ADC control circuit, I / O output control circuit and FPGA main control circuit; The DAC control circuit, the ADC control circuit, and the I / O output control circuit are independently arranged in pairs, and the DAC control circuit, the ADC control circuit, and the I / O output control circuit respectively exchange data with the FPGA main control circuit; The FPGA main control circuit is also connected to the PC mass spectrometer; the I / O output control circuit is connected to the power amplifier tube through an optical coupler, and the power amplifier tube is connected to voltage output circuits with different voltage values.

2. A time-of-flight mass spectrometer control circuit according to claim 1, characterized in that: The ADC control circuit includes an analog switch, an impedance matching module, an analog-to-digital conversion chip, an isolation transmission chip module, a filter capacitor module and a power supply working circuit. After the signal is processed by the analog switch, the signal is output to the impedance matching module, and then the signal is output to the analog-to-digital conversion chip. The converted digital signal communicates with the single-chip microcomputer through the isolation transmission chip module.

3. A time-of-flight mass spectrometer control circuit according to claim 2, characterized in that: The output circuit of the ADC control board is respectively connected to the high vacuum gauge vacuum acquisition circuit, the low vacuum gauge vacuum acquisition circuit, the acquisition card power supply monitoring circuit and the preamplifier power supply monitoring circuit.

4. A time-of-flight mass spectrometer control circuit according to claim 3, characterized in that: The preamplifier power supply monitoring circuit includes a first resistor, a second resistor, a first capacitor, a second capacitor, a power chip, a first isolation amplifier, a third capacitor and a fourth capacitor, one end of the first resistor is connected to the power output end, the second capacitor and the power chip, and the other end of the first resistor is connected to the second resistor, the first capacitor and the first isolation amplifier; One end of the second resistor and the first capacitor are grounded together, and the first capacitor is also connected to the first isolation amplifier. The third capacitor, the second capacitor and the power chip are grounded together, and the power chip is also connected to the third capacitor and the first isolation amplifier. The first isolation amplifier is connected to the fourth capacitor.

5. A time-of-flight mass spectrometer control circuit according to claim 4, characterized in that: The preamplifier power supply monitoring module monitors the preamplifier power supply circuit, which includes a power supply unit, a first filter capacitor unit and a first power supply output interface. The power supply unit is connected to the first power supply output interface, the power supply unit is connected to the first filter capacitor unit, and the first filter capacitor unit is connected to the first power supply output interface.

6. A time-of-flight mass spectrometer control circuit according to claim 3, characterized in that: The acquisition card power supply monitoring circuit includes a third resistor, a fourth resistor, a fifth capacitor, a sixth capacitor, a second isolation amplifier, and a seventh capacitor, wherein one end of the third resistor is connected to the power supply, the fifth capacitor, and the second isolation amplifier, the other end of the third resistor is connected to the fourth resistor, the sixth capacitor, and the second isolation amplifier, one end of the fifth capacitor is grounded, one end of the sixth capacitor is connected to the fourth resistor, the ground, and the second isolation amplifier, and the second isolation amplifier is connected to the seventh capacitor.

7. A time-of-flight mass spectrometer control circuit according to claim 6, characterized in that: The acquisition card power supply monitoring circuit monitors the acquisition card power supply control output circuit, which includes a power supply output unit, a second filter capacitor unit and a second power supply output interface, the power supply output unit is connected to the second power supply output interface, the second power supply output interface is connected to the second filter capacitor unit, and the second filter capacitor unit is connected to the power supply output unit.

8. A time-of-flight mass spectrometer control circuit according to claim 1, characterized in that: The I / O output control circuit is composed of a first I / O output circuit, a second I / O output circuit, a third I / O output circuit and a fourth I / O output circuit.

9. A time-of-flight mass spectrometer control circuit according to claim 3, characterized in that: The high vacuum gauge vacuum acquisition circuit includes a high vacuum gauge power supply switch control circuit, a high vacuum gauge comparison circuit, an eighth capacitor and a high vacuum gauge output interface. The high vacuum gauge power supply switch control circuit outputs a real-time vacuum analog signal to the high vacuum gauge comparison circuit through the high vacuum gauge output interface.

10. A time-of-flight mass spectrometer control circuit according to claim 9, characterized in that: The high vacuum gauge power supply switch control circuit includes a first photocoupler and a first switch, one end of the first photocoupler is connected to a fifth resistor, the fifth resistor is connected to an output pin of the single chip computer to output a signal, the first photocoupler is also connected to the first switch, wherein a pin of the first switch is also connected to a sixth resistor, the sixth resistor is connected to the seventh resistor and the gate of the first MOS tube, the source of the first MOS tube is connected to the seventh resistor, the ninth capacitor, and the tenth capacitor, the drain of the first MOS tube is connected to the first inductor and the eleventh capacitor, the eleventh capacitor is connected to the twelfth capacitor, the thirteenth capacitor, another pin of the first switch, the cathode of the first photosensitive diode, the first diode, the first diode is connected to the eighth resistor, the thirteenth capacitor, the twelfth capacitor and the first inductor, wherein the eighth resistor is connected to the anode of the first photosensitive diode.

11. A time-of-flight mass spectrometer control circuit according to claim 9, characterized in that: The high vacuum gauge comparison circuit includes a first operational amplifier, wherein the first operational amplifier is connected to one end of a ninth resistor, the other end of the ninth resistor is connected to the base of a first triode, the emitter of the first triode is grounded, the collector of the first triode is connected to a tenth resistor, the tenth resistor is connected to a second photocoupler, the second photocoupler is connected to the emitter of a second triode, the collector of the second triode is connected to a power supply, the base of the second triode is connected to an eleventh resistor, the eleventh resistor is connected to a twelfth resistor and an output pin of the first operational amplifier, the twelfth resistor is connected to a thirteenth resistor, the first operational amplifier, a fourteenth resistor and a fourteenth capacitor, wherein the fourteenth resistor and the fourteenth capacitor are both grounded, and the thirteenth resistor is connected to a reference voltage.

12. A time-of-flight mass spectrometer control circuit according to claim 10, characterized in that: The low vacuum gauge vacuum acquisition circuit comprises a low vacuum gauge power supply switch control circuit, a low vacuum gauge output interface, a short resistor, a quasi-generation circuit and a low vacuum gauge comparison circuit. The low vacuum gauge power supply switch control circuit is started to supply power to the low vacuum gauge vacuum acquisition circuit, and a signal is output from the low vacuum gauge output interface to the interface of the FPGA system control board, and then the vacuum value is fed back to the reference generation circuit and the low vacuum gauge comparison circuit in sequence through the low vacuum gauge output interface.

13. A time-of-flight mass spectrometer control circuit according to claim 12, characterized in that: The low vacuum gauge power supply switch control circuit includes a third photoelectric coupler, wherein one end of the third photoelectric coupler is connected to a fifteenth resistor, the fifteenth resistor is connected to an output pin of the single-chip computer to output a signal, the third photoelectric coupler is also connected to a second switch, a pin of the second switch is also connected to a sixteenth resistor, the sixteenth resistor is connected to the seventeenth resistor and the gate of the second MOS tube, the source of the second MOS tube is connected to the seventeenth resistor, the seventeenth resistor is connected to the cathode of the second diode, the fifteenth capacitor, and the sixteenth capacitor, the other ends of the fifteenth capacitor and the sixteenth capacitor connected in parallel are commonly grounded, and the anode of the second diode is grounded; the drain of the second MOS tube is connected to the second inductor and the seventeenth capacitor, the seventeenth capacitor is connected to the eighteenth capacitor, the nineteenth capacitor, the second switch, the cathode of the second photosensitive diode, and the third diode, the third diode is connected to the eighteenth resistor, the nineteenth capacitor, the eighteenth capacitor and the second inductor, and the eighteenth resistor is connected to the anode of the second photosensitive diode.

14. A time-of-flight mass spectrometer control circuit according to claim 12, characterized in that: The low vacuum gauge comparison circuit includes a second operational amplifier, wherein the reverse input end of the second operational amplifier is connected to a nineteenth resistor, the nineteenth resistor is connected to a twentieth resistor, the same-direction input end of the second operational amplifier is connected to a twenty-first resistor, a twenty-second resistor and the second operational amplifier, the twenty-first resistor is connected to a reference voltage and a twenty-third resistor, the twenty-third resistor is connected to a twenty-fourth resistor, and the twenty-fourth resistor is grounded; the second operational amplifier is connected to a twenty-fifth resistor, the twenty-fifth resistor is connected to a base of a transistor Q13, the collector of the transistor Q13 is connected to a power supply, and the emitter of the transistor Q13 is connected to a fourth optical The fourth photocoupler is also connected to the twenty-eighth resistor, the twenty-eighth resistor is connected to the collector of the third triode, the emitter of the third triode is grounded, and the base of the third triode is connected to the twentieth resistor; the fourth photocoupler is also connected to the twenty-sixth resistor, the collector of the fourth triode, and the collector of the fifth triode, wherein the emitter of the fifth triode is grounded, the base of the fifth triode is connected to the twenty-seventh resistor, and the twenty-seventh resistor is connected to an output pin of the single-chip computer to output the signal; the base of the fourth triode is connected to the twenty-nine resistor, and the twenty-ninth resistor is connected to an output pin of the single-chip computer to output the signal.

15. A time-of-flight mass spectrometer control circuit according to claim 1, characterized in that: The FPGA main control circuit includes a power supply generation circuit and a power supply input port, the power supply input port supplies power to the power supply generation circuit, wherein the power supply generation circuit includes a switching power supply, the switching power supply is connected to the capacitor component, the cathode of the fourth diode and the third inductor, the anode of the fourth diode is grounded, the third inductor is connected to the switching power supply, the twentieth capacitor, the twenty-first capacitor, the twenty-second capacitor and the power supply VCC, and the twenty-second capacitor is connected to the twenty-first capacitor, the twentieth capacitor, ground and the switching power supply.

16. A time-of-flight mass spectrometer control circuit according to claim 1, characterized in that: The DAC control circuit is composed of a plurality of digital-to-analog converters arranged in parallel, and the digital-to-analog converters arranged in parallel operate independently.

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