SRB communication verification system and method, electronic equipment and storage medium

Abstract

The invention provides an SRB communication verification system and method, electronic equipment and a storage medium, and the system comprises a driving module assembly which is used for transmitting test data to a test model in the verification simulation process of the test model, and the test model is an SRB function module; the reference model component is used for storing test data; the monitoring assembly is used for acquiring return data corresponding to the test data and returned by the test model, and if the data formats of the return data and the test data are the same, the return data are sent to the scoreboard assembly; and the scoreboard assembly is used for comparing the test data in the reference model assembly with the return data sent by the monitoring assembly to obtain a result of the verification simulation process of the test model. And long-time observation is carried out without depending on an oscilloscope or a logic analyzer, so that the verification efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to an SRB communication verification system, method, electronic device and storage medium. Background Art

[0002] The Security Real-time Bus (SRB) has been gradually widely used in various fields due to its good security and real-time performance. When developing SRB, there are many problems in the time synchronization and data synchronization transmission process of SRB. Currently, problems can only be discovered through long-term observation with an oscilloscope or logic analyzer, and the verification efficiency is poor. Summary of the invention

[0003] In view of this, the embodiments of the present invention provide an SRB communication verification system, method, electronic device and storage medium to solve the problem of poor verification efficiency in which problems can only be discovered through long-term observation with an oscilloscope or logic analyzer.

[0004] To achieve the above objectives, the embodiments of the present invention provide the following technical solutions:

[0005] The first aspect of the embodiment of the present invention discloses an SRB communication verification system, the system at least comprising: a driver module component, a scoreboard component, a monitoring component and a reference model component developed based on method verification UVM;

[0006] The driver module component is used to send test data to the test model during the verification simulation process of the test model, the test model is a safe real-time bus SRB function module, and the test data includes a time data packet and a service data packet;

[0007] The reference model component is used to store the test data;

[0008] The monitoring component is used to obtain the return data returned by the test model and corresponding to the test data, and if the data format of the return data is the same as that of the test data, send the return data to the scoreboard component;

[0009] The scoreboard component is used to compare the test data in the reference model component with the return data sent by the monitoring component to obtain the result of the verification simulation process of the test model.

[0010] Preferably, the monitoring component is further used to: discard the returned data if the data formats of the returned data and the test data are different.

[0011] Preferably, the reference model component is also used to: monitor the working state of the test model; if the working state is an abnormal state, send a stop message to the driving module component so that the driving module component stops sending the test data to the test model.

[0012] Preferably, the scoreboard assembly is specifically used for:

[0013] Comparing whether the test data in the reference model component and the return data sent by the monitoring component are equal;

[0014] If the test data in the reference model component and the return data sent by the monitoring component are not equal, the unequal test data and the return data are recorded, and the verification simulation process of the test model is suspended or the verification simulation process of the test model is continued;

[0015] If the test data in the reference model component and the return data sent by the monitoring component are equal, the test data is stored.

[0016] Preferably, the driving module assembly at least includes a data communication interface and an operation status detection interface.

[0017] A second aspect of an embodiment of the present invention discloses an SRB communication verification method, which is applied to the SRB communication verification system disclosed in the first aspect of an embodiment of the present invention. The method includes:

[0018] Sending test data to the test model during the verification simulation process of the test model, the test model being a secure real-time bus SRB functional module, the test data including a time data packet and a service data packet;

[0019] storing the test data;

[0020] Acquire return data corresponding to the test data returned by the test model;

[0021] If the data formats of the return data and the test data are the same, the test data and the return data are compared to obtain the result of the verification simulation process of the test model.

[0022] Preferably, it also includes:

[0023] If the data formats of the return data and the test data are different, the return data is discarded.

[0024] Preferably, it also includes:

[0025] Monitoring the working status of the test model;

[0026] If the working state is an abnormal state, stop sending the test data to the test model.

[0027] A third aspect of an embodiment of the present invention discloses an electronic device, comprising: a processor and a memory, wherein the processor and the memory are connected via a communication bus; wherein the processor is used to call and execute a program stored in the memory; and the memory is used to store a program, wherein the program is used to implement the SRB communication verification method disclosed in the second aspect of the embodiment of the present invention.

[0028] A fourth aspect of an embodiment of the present invention discloses a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to execute the SRB communication verification method disclosed in the second aspect of the embodiment of the present invention.

[0029] Based on the above-mentioned embodiment of the present invention, an SRB communication verification system, method, electronic device and storage medium are provided, the system includes: a driver module component, which is used to send test data to the test model during the verification simulation process of the test model, and the test model is an SRB functional module; a reference model component, which is used to store test data; a monitoring component, which is used to obtain return data corresponding to the test data returned by the test model, and if the data format of the return data and the test data is the same, the return data is sent to the scoreboard component; the scoreboard component is used to compare the test data in the reference model component with the return data sent by the monitoring component to obtain the result of the verification simulation process of the test model. This scheme simulates and verifies SRB through the driver module component, scoreboard component, monitoring component and reference model component developed based on method verification to discover problems in the SRB development process, does not rely on an oscilloscope or logic analyzer for long-term observation, and improves verification efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0031] Figure 1 A structural block diagram of an SRB communication verification system provided by an embodiment of the present invention;

[0032] Figure 2 Another structural block diagram of an SRB communication verification system provided by an embodiment of the present invention;

[0033] Figure 3 A functional block diagram of a test model provided by an embodiment of the present invention;

[0034] Figure 4 A verification flow chart provided for an embodiment of the present invention;

[0035] Figure 5 A flow chart of an SRB communication verification method provided by an embodiment of the present invention;

[0036] Figure 6 A schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0037] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0038] In this application, the terms "comprises", "comprising" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element.

[0039] The Security Real-time Bus (SRB) has been gradually widely used in the fields of industrial control and motion control due to its good security and real-time performance. Many companies have also invested in R&D and increased their R&D efforts to launch more new products.

[0040] During the development of SRB, we found that there were many problems in the time synchronization and data synchronization transmission of SRB. These problems could not be discovered using the original verification methods. Currently, the problems can only be discovered through long-term observation with an oscilloscope or logic analyzer, but the cause of the problem cannot be traced.

[0041] Most of the existing verification technologies are verified through verification software or modelsim software included in the development platform provided by the field programmable gate array (FPGA) manufacturer. However, the existing verification technology cannot effectively discover problems during the SRB development process. The reason is that SRB requires a time synchronization function, which takes about one second to send time data. However, in the aforementioned existing verification technology, one second has to run for a day to reach the corresponding time point, so a lot of time will be wasted in project development.

[0042] In addition, there will be various data packets in the working process of SRB network, and these data packets have the problem of random sending. The existing verification technology cannot achieve random sending of data packets; however, this scheme can use the multi-threading method of method verification (UVM) to realize the random sending of data packets.

[0043] To solve the above problems, this solution proposes an SRB communication verification system, method, electronic device and storage medium. The SRB is simulated and verified through a driver module component, a scoreboard component, a monitoring component and a reference model component developed based on UVM to discover problems in the SRB development process. It does not rely on an oscilloscope or logic analyzer for long-term observation, thereby improving verification efficiency.

[0044] It should be noted that UVM is a verification methodology based on SystemVerilog. UVM can speed up the development and verification process, and can also develop corresponding verification components according to the verification function, so as to better save time for the development of SRB. The following is a detailed description of this solution through various embodiments.

[0045] See also Figure 1 , shows a structural block diagram of an SRB communication verification system provided by an embodiment of the present invention, the SRB communication verification system comprising: a driver module component 101 developed based on UVM, a scoreboard component 102, a monitoring component 103 and a reference model component 104;

[0046] Specifically, the driver module component 101 is used to send test data to the test model during the verification simulation process of the test model, the test model is an SRB functional module (which can be referred to as DUT), and the test data includes a time data packet and a service data packet;

[0047] Among them, the time data packet is used to complete the time synchronization of the test model, and the business data packet is used to enable the test model to complete business transmission.

[0048] In some embodiments, the driver module component 101 is a transmission component for providing data sending and receiving for the verification simulation process of the test model. According to the SRB function development requirements, the driver module component 101 includes configuration interfaces such as data communication interface and operation status detection interface.

[0049] The reference model component 104 is used to store test data; specifically, the reference model component 104 includes the data format and data content that need to be verified, and the reference model component 104 stores the test data sent to the test model.

[0050] In some embodiments, the reference model component 104 is further used to: monitor the working state of the test model; if the working state is abnormal, send a stop message to the driving module component 101 to make the driving module component 101 stop sending test data to the test model.

[0051] The monitoring component 103 is used to obtain the return data corresponding to the test data returned by the test model, and if the data format of the return data is the same as that of the test data, the return data is sent to the scoreboard component 102 .

[0052] Specifically, when the driver module component 101 sends test data to the test model, the monitoring component 103 monitors the return data returned by the test model and determines whether the data format of the test data and the return data is the same;

[0053] If the data formats of the test data and the return data (test model return) are the same, the monitoring component 103 sends the return data to the scoreboard component 102;

[0054] If the data formats of the test data and the return data (test model return) are different, the monitoring component 103 discards the return data, and the discarded return data does not participate in subsequent comparisons.

[0055] It should be noted that, in view of the SRB development functional requirements and the time performance of the monitoring component 103, multiple monitoring components 103 are assembled in the verification simulation project of the test model.

[0056] The scoreboard component 102 is used to compare the test data in the reference model component 104 with the return data sent by the monitoring component 103 to obtain the result of the verification simulation process of the test model.

[0057] Specifically, the scoreboard component 102 compares the test data in the reference model component 104 and the return data sent by the monitoring component 103 to see if they are equal;

[0058] If the test data in the reference model component 104 and the return data sent by the monitoring component 103 are not equal, the unequal test data and return data are recorded, and the verification simulation process of the test model is suspended or the verification simulation process of the test model is continued;

[0059] Among them, the content in which the test data and the returned data are equal is called correct data, and the content in which the test data and the returned data are not equal is called error data; if the test data and the returned data are not equal, it indicates that an error has occurred in the simulation verification process. At this time, the correct data and the error data are recorded, and the verification simulation process of the test model is paused or continued. The result of the verification simulation process of the test model at least includes the recorded correct data and error data.

[0060] If the test data in the reference model component 104 and the return data sent by the monitoring component 103 are equal, the test data is stored. That is to say, if the test data and the return data are equal, the representation data are all correct, and the results of this simulation verification process are stored. The results of this simulation verification process at least include the test data (time data packet and business data packet).

[0061] In an embodiment of the present invention, the SRB is simulated and verified by a driver module component, a scoreboard component, a monitoring component, and a reference model component developed based on UVM to discover problems in the SRB development process without relying on an oscilloscope or a logic analyzer for long-term observation, thereby improving verification efficiency.

[0062] To better understand the above content about SRB communication verification system, the following is from the perspective of practical application. Figure 2 Another structural block diagram of an SRB communication verification system is shown for illustration;

[0063] like Figure 2 As shown, the SRB communication verification system includes env (verification container class), env includes configuration, scorboard, monitor, reference model, dirver and other components, env can call the aforementioned components; among them, scorboard is the scoreboard component 102 mentioned above, monitor is the monitoring component 103 mentioned above, reference model is the reference model component 104 mentioned above, dirver is the driver module component 101 mentioned above, and DUT is the test model (SRB functional module).

[0064] Dirver is a transmission component that provides data sending and receiving for the verification simulation process of the test model. According to the SRB function development requirements, Dirver contains a large number of configuration interfaces (data communication interfaces and operation status detection interfaces). Dirver sends test data to the test model.

[0065] The reference model contains the data format and data content that need to be verified. The reference model will store the test data sent to the test model. At the same time, the reference model will monitor the working status of the test model. When the test model is in an abnormal state, the reference model will notify the dirver to stop sending test data.

[0066] Monitor monitors whether the data format of the return data returned by the test model is the same as the data format of the test data sent to the test model. If the data format of the return data is the same as the data format of the test data, monitor sends the return data to scorboard for comparison; if the data format of the return data is different from the data format of the test data, monitor discards the return data.

[0067] Specifically, in view of the SRB development functional requirements and monitor time performance, multiple monitors are assembled in the verification simulation project of the test model.

[0068] The scoreboard will compare the test data and the returned data. If the test data and the returned data are not equal, the scoreboard will record the correct data and the wrong data, and choose to suspend the verification simulation process of the test model or continue the verification simulation process of the test model according to the pre-set requirements;

[0069] If the test data and the returned data are equal, scorboard stores the result of this simulation verification process, which at least includes the test data (time data packet and business data packet).

[0070] For the test model mentioned above, SRB (Secure Real-time Bus) is the test model (DUT) of the SRB communication verification system. Some circuits of this test model realize the high real-time performance and high security of SRB. The functional block diagram of the test model is as follows: Figure 3 As shown; Figure 3 The functional block diagram shown includes the data application host, SRB data processing module, SRB synchronization module, data distribution and convergence, MAC (media access control address) and other parts;

[0071] Data application host: sends data to the PCIE interface of the FPGA through the PCIE (high-speed serial computer expansion bus) interface, and transmits data through the PCIE interface.

[0072] SRB data processing module: It is the core of the whole system. The SRB data processing module improves the functions of data scheduling, sending, receiving, synchronization control, data reorganization and data splitting.

[0073] SRB synchronization module: completes the processing of synchronization packet data, completes the sending and receiving of synchronization packets, checks the clock quality level, calculates the line delay, etc.

[0074] Data distribution and aggregation: distribute and aggregate data flows from different business directions.

[0075] MAC: A module used to determine the location of network devices, completing network address resolution and cyclic redundancy check (CRC) verification functions.

[0076] in, Figure 3 The PHY in it is the physical layer.

[0077] In the above Figure 2 and Figure 3 Based on this, the verification process of the verification simulation process of the test model is as follows Figure 4 As shown, Figure 4 The steps include:

[0078] Step S401: Verification starts.

[0079] Step S402: Input verification instructions.

[0080] Step S403: the dirver sends a data packet corresponding to the test data to the DUT.

[0081] In the specific implementation of step S403, the dirver sends a data packet to the DUT through the MAC_dirver interface, and sends a data packet to the DUT through the Pcie_dirver interface.

[0082] Step S404: the reference model stores the test data sent to the test model.

[0083] Step S405: the monitor monitors whether the data format of the return data returned by the test model is the same as the data format of the test data sent to the test model. If they are the same, the monitor sends the return data to the scorboard for comparison; if they are different, the monitor discards the return data.

[0084] Step S406: scoreboard will compare the test data and the returned data. If the test data and the returned data are not equal, scoreboard will record the correct data and the incorrect data, and choose to pause the verification simulation process of the test model or continue the verification simulation process of the test model; if the test data and the returned data are equal, scoreboard will store the results of this simulation verification process; the verification is completed.

[0085] It should be noted that Figure 4 The execution principle of each step has been described in detail in the above description of the SRB communication verification system and will not be repeated here.

[0086] This solution uses UVM to develop components such as driver module component 101, scoreboard component 102, monitoring component 103 and reference model component 104. The components have high consistency and collaboration, which can reduce the verification development process and speed up the research and development progress.

[0087] Corresponding to the SRB communication verification system provided by the above embodiment of the present invention, see Figure 5 The embodiment of the present invention further provides a flow chart of an SRB communication verification method, which is applied to the SRB communication verification system provided in the above embodiment, and the SRB communication verification method includes:

[0088] Step S501: sending test data to the test model during the verification simulation process of the test model.

[0089] It should be noted that the test model is an SRB functional module, and the test data includes a time data packet and a service data packet.

[0090] Step S502: store test data.

[0091] In some embodiments, the working status of the test model is monitored; if the working status is abnormal, sending test data to the test model is stopped.

[0092] Step S503: Acquire the return data corresponding to the test data returned by the test model.

[0093] In some embodiments, the data formats of the returned data and the test data are compared; if the data formats of the returned data and the test data are the same, step S504 is executed; if the data formats of the returned data and the test data are different, the returned data is discarded.

[0094] Step S504: If the data formats of the returned data and the test data are the same, the test data and the returned data are compared to obtain the result of the verification simulation process of the test model.

[0095] In the specific implementation of step S504, the test data in the reference model component and the return data sent by the monitoring component are compared to see whether they are equal;

[0096] If the test data in the reference model component and the return data sent by the monitoring component are not equal, the unequal test data and the return data are recorded, and the verification simulation process of the test model is suspended or the verification simulation process of the test model is continued;

[0097] If the test data in the reference model component and the return data sent by the monitoring component are equal, the test data is stored.

[0098] In an embodiment of the present invention, SRB is simulated and verified through a UVM-based driver module component, a scoreboard component, a monitoring component, and a reference model component in an SRB communication verification system to discover problems in the SRB development process without relying on an oscilloscope or a logic analyzer for long-term observation, thereby improving verification efficiency.

[0099] Preferably, an embodiment of the present invention further provides an electronic device, the structural block diagram of the electronic device is as follows Figure 6 As shown, the electronic device includes: a processor 601 and a memory 602, and the processor 601 and the memory 602 are connected via a communication bus; wherein the processor 601 is used to call and execute the program stored in the memory 602; the memory 602 is used to store the program, and the program is used to implement the SRB communication verification method provided in the above method embodiment.

[0100] Preferably, an embodiment of the present invention further provides a computer-readable storage medium, in which computer-executable instructions are stored, and the computer-executable instructions are used to execute the SRB communication verification method provided by the above method embodiment.

[0101] In summary, the embodiments of the present invention provide an SRB communication verification system, method, electronic device and storage medium, which simulate and verify the SRB through a driver module component, a scoreboard component, a monitoring component and a reference model component developed based on method verification, so as to discover problems in the SRB development process, without relying on an oscilloscope or logic analyzer for long-term observation, thereby improving verification efficiency.

[0102] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can refer to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system or system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can refer to the partial description of the method embodiment. The system and system embodiments described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without creative work.

[0103] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0104] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An SRB communication verification system, characterized in that: The system at least includes: a driver module component, a scoreboard component, a monitoring component and a reference model component developed based on method verification UVM; The driver module component is used to send test data to the test model during the verification simulation process of the test model, the test model is a safe real-time bus SRB function module, and the test data includes a time data packet and a service data packet; The reference model component is used to store the test data; The monitoring component is used to obtain the return data returned by the test model and corresponding to the test data, and if the data format of the return data is the same as that of the test data, send the return data to the scoreboard component; The scoreboard component is used to compare the test data in the reference model component with the return data sent by the monitoring component to obtain the result of the verification simulation process of the test model.

2. The system according to claim 1, characterized in that The monitoring component is also used to discard the returned data if the data formats of the returned data and the test data are different.

3. The system according to claim 1, characterized in that The reference model component is also used to: monitor the working state of the test model; if the working state is an abnormal state, send a stop message to the driving module component so that the driving module component stops sending the test data to the test model.

4. The system according to claim 1, characterized in that The scoreboard component is specifically used for: Comparing whether the test data in the reference model component and the return data sent by the monitoring component are equal; If the test data in the reference model component and the return data sent by the monitoring component are not equal, record the unequal test data and the return data, and suspend the verification simulation process of the test model or continue the verification simulation process of the test model; If the test data in the reference model component and the return data sent by the monitoring component are equal, the test data is stored.

5. The system according to any one of claims 1 to 4, characterized in that: The driving module assembly at least includes a data communication interface and a running status detection interface.

6. A SRB communication verification method, characterized in that: The method is applied to the SRB communication verification system described in any one of claims 1 to 5 above, and the method comprises: Sending test data to the test model during the verification simulation process of the test model, the test model being a secure real-time bus SRB functional module, the test data including a time data packet and a service data packet; storing the test data; Acquire return data corresponding to the test data returned by the test model; If the data formats of the return data and the test data are the same, the test data and the return data are compared to obtain the result of the verification simulation process of the test model.

7. The method according to claim 6, characterized in that Also includes: If the data formats of the return data and the test data are different, the return data is discarded.

8. The method according to claim 6, characterized in that Also includes: Monitoring the working status of the test model; If the working state is an abnormal state, stop sending the test data to the test model.

9. An electronic device, characterized in that: include: A processor and a memory, wherein the processor and the memory are connected via a communication bus; wherein the processor is used to call and execute a program stored in the memory; The memory is used to store a program, and the program is used to implement the SRB communication verification method as described in any one of claims 6-8.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to execute the SRB communication verification method described in any one of claims 6-8.

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