Chip detection method and system and computer equipment
By screening and comprehensively evaluating the chip's target data processing tasks and evaluation index information, combining data types and processing log information, the problem of inaccurate chip detection in the existing technology is solved, and a more comprehensive and accurate evaluation of chip data processing capabilities is achieved.
Patent Information
- Application Number
- CN202411466028.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-21
- Publication Date
- 2025-02-11
AI Technical Summary
The existing chip data processing capability detection methods cannot comprehensively and accurately evaluate all data scenarios encountered by the chip in actual applications and all operations, resulting in inaccurate detection results.
By obtaining information on multiple data types and processing functions, filtering out target data processing tasks and evaluation indicator information, combining data types, evaluation indicators and processing log information, comprehensive evaluation of the chips is carried out to generate a comprehensive and accurate inspection report.
It improves the accuracy and comprehensiveness of chip inspection reports, ensures that all data scenarios and operations in actual applications are fully taken into account when evaluating chip data processing capabilities, and provides more accurate detection results.
Smart Images
Figure CN119415752A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of integrated circuit technology, and in particular to a chip detection method, system and computer equipment. Background Art
[0002] A chip refers to a silicon wafer containing an integrated circuit, also known as a microcircuit, microchip or integrated circuit (IC). Its essence is an integrated circuit containing semiconductors and has certain special functions.
[0003] In the existing chip production and processing technology, the chips produced may not be able to reach the data processing capabilities (computing power) set by their specifications due to defects in the manufacturing process, quality problems of chip materials, chip design defects and production environment influences. In order to eliminate abnormal chips that do not meet the standards, it is necessary to test the data processing capabilities of the chips before they leave the factory to ensure that all chips leaving the factory can reach the computing power set by their specifications.
[0004] The current method for testing chip data processing capabilities is to select representative fixed sample data and a series of chip-related data processing tasks, and test the ability of these data processing tasks to perform operations on the sample data, thereby evaluating the chip's data processing capabilities. However, since fixed sample data cannot fully represent all data scenarios encountered by the chip in actual applications, and the selected data processing tasks cannot cover all operations performed by the chip in actual applications, the current chip testing methods have obvious limitations in evaluating chip data processing capabilities, and their test evaluation results are usually inaccurate. Summary of the invention
[0005] The purpose of this application is to improve the existing chip data processing capability detection method so that it can detect all data scenarios and all operations encountered by the chip in actual application, and obtain a comprehensive and accurate chip data processing capability evaluation report.
[0006] In order to achieve the above object, the present application provides a chip detection method, comprising the following steps:
[0007] Acquire several data types, and then acquire several data information corresponding to the several data types, to obtain several data processing tasks;
[0008] Get some processing function information;
[0009] Based on the plurality of processing function information, screening out a plurality of target data processing tasks from the plurality of data processing tasks;
[0010] Based on the processing function information corresponding to the target data processing tasks, select corresponding evaluation index information from the database;
[0011] Based on the plurality of target data processing tasks, a plurality of target data information is screened out from the plurality of data information and organized into a plurality of target data groups;
[0012] Acquire a plurality of processing log information corresponding to the target data information in the target data groups;
[0013] Based on the data type, evaluation index information and processing log information corresponding to any target data processing task, the chip is evaluated and processed to obtain evaluation information;
[0014] A chip detection report is generated based on the plurality of evaluation information.
[0015] The above-mentioned chip detection method, for each processing function information related to the chip, screens out the evaluation index information corresponding to the target data processing task in the database through a series of steps, ensuring that each evaluation index is highly relevant to the target data processing task and the processing function information, thereby improving the accuracy of the generated chip detection report. At the same time, the above-mentioned chip detection method is based on a number of processing function information and its corresponding target data processing tasks, and comprehensively evaluates the chip through multiple dimensions such as data type, evaluation index information, and processing log information, ensuring that when evaluating the chip data processing capability, all data scenarios and all operations encountered by the chip in actual application are fully considered, thereby improving the comprehensiveness of the generated chip detection report.
[0016] In a possible implementation, the selecting a plurality of target data processing tasks from the plurality of data processing tasks based on the plurality of processing function information includes:
[0017] Acquire a plurality of processing target information corresponding to a plurality of the data processing tasks, and then obtain a plurality of target feature vectors corresponding to the processing target information;
[0018] Acquire a plurality of processing result information corresponding to the plurality of processing function information, and then obtain a plurality of result feature vectors corresponding to the plurality of processing result information;
[0019] Calculating the similarity between each of the target feature vectors and each of the result feature vectors;
[0020] Based on any processing function information, a target data processing task having the highest similarity between the target feature vector and the result feature vector is selected from the plurality of data processing tasks.
[0021] It should be noted that the processing function information is the functional information of the chip, which includes the information of the various software and hardware functional characteristics of the chip. Each data information corresponds to a data processing task, and the data processing task can be understood as the process of the chip performing processing operations on specific data; each data processing task contains only one processing target, and each data processing task can be fully executed by a single chip.
[0022] Specifically, the processing target information can be understood as the execution object information corresponding to the chip executing the corresponding data processing task; the processing result information can be understood as the specific result or output information generated after the chip executes the corresponding processing function. Through the preset text feature recognition network, the text information of the processing target information and the processing result information can be identified, and extracted as the corresponding feature information, and then converted into the corresponding target feature vector and result feature vector. For each target feature vector and result feature vector, the similarity between them can be calculated by the cosine similarity algorithm, and then the corresponding target data processing task and processing function information can be screened out according to the target feature vector and result feature vector with the highest similarity.
[0023] The above implementation method can select the data processing task that best reflects the functional characteristics of the chip by screening the target data processing task corresponding to the processing function information through the similarity between the target feature vector and each of the result feature vectors, thereby improving the accuracy and comprehensiveness of the subsequent detection and evaluation of the chip data processing capabilities.
[0024] In a possible implementation, based on the plurality of target data processing tasks, a plurality of target data information is screened out from the plurality of data information and organized into a plurality of target data groups, including:
[0025] Based on any target data processing task, a plurality of target data information are selected from the plurality of data information and integrated into an initial data group;
[0026] Classifying the target data information in the initial data group into a plurality of sub-data groups according to corresponding data types;
[0027] Based on a preset data volume interval range, screening a number of the target data information in a number of the sub-data groups to obtain a number of final data information;
[0028] Based on the data amount of each of the final data information, rearrange the plurality of the final data information in the plurality of the sub-data groups to obtain a corresponding data sequence;
[0029] A plurality of the sub-data sets are integrated into a target data set.
[0030] It should be noted that the target data information can be understood as the data content corresponding to the chip processing function information and the target data processing task. The preset data volume interval range can be an interval range summarized based on experiments of staff in this field or analysis of researchers. By presetting multiple data volume interval ranges or intervals, target data information with different data volume ranges can be classified, so that the data processing capabilities of the chip under different data volume conditions can be analyzed and compared.
[0031] Specifically, the final data information in the plurality of sub-data groups are rearranged based on the data volume of each of the final data information, and can be arranged from small to large according to the data volume. The integration of the plurality of sub-data groups into the target data group should be understood as the final data information and data sequence in the sub-data groups are actually integrated into the target data group.
[0032] The above implementation method classifies the target data information based on data type and data volume, which facilitates comprehensive and effective analysis and evaluation of the impact of changes in data type and data volume on the chip data processing capability when detecting the chip data processing capability, thereby improving the comprehensiveness of the chip data processing capability evaluation.
[0033] In a possible implementation, based on the plurality of processing function information corresponding to the plurality of target data processing tasks, selecting corresponding plurality of evaluation index information in a database includes:
[0034] Based on the processing function information corresponding to any target data processing task, obtain corresponding function identification information;
[0035] Based on the function identification information, a plurality of evaluation index strategies are selected in a preset database as a plurality of sub-evaluation index information;
[0036] The plurality of sub-evaluation index information are integrated into evaluation index information.
[0037] It should be noted that the function identification information is a symbol, code, parameter, picture, letter and text used to identify and distinguish different chip processing functions. The evaluation index strategy can be understood as the specific standard and strategy for evaluating each chip processing function, including the quantitative range set for each evaluation index information when evaluating the chip processing capability. Among them, each evaluation index strategy is applicable to multiple chip processing functions, that is, each evaluation index strategy corresponds to a function identification information range.
[0038] Specifically, according to the function identification information range corresponding to each evaluation index strategy in the database, multiple evaluation index strategies containing corresponding function identification information are screened out as sub-evaluation index information corresponding to the processing function information and the target data processing task.
[0039] The above implementation method obtains the evaluation index information of the target data processing task by filtering the sub-evaluation index information through the function identification information, thereby improving the pertinence and accuracy of the selected evaluation index information, thereby improving the accuracy of the data processing capability of the detection chip.
[0040] In a possible implementation, the obtaining of a plurality of processing log information corresponding to the target data information in the plurality of target data groups includes:
[0041] Based on the data type corresponding to each of the sub-data groups, obtaining a corresponding processing sequence;
[0042] Based on the processing sequence corresponding to each of the sub-data groups, a plurality of the sub-data groups in any target data group are sorted to obtain a target processing sequence;
[0043] Based on the plurality of processing function information corresponding to the plurality of target data processing tasks, obtaining a plurality of corresponding processing difficulty values;
[0044] Arranging a plurality of the target data processing tasks based on the processing difficulty value corresponding to each of the target data processing tasks to obtain a test processing sequence;
[0045] generating a target test sequence based on the target processing sequence and the test processing sequence;
[0046] A chip test is performed based on the target test sequence to obtain processing log information corresponding to the target data information in the target data group.
[0047] It should be noted that the processing sequence can be understood as the order in which data information of different data types are processed according to a preset priority, wherein the processing sequence of different data types is preset by the technician in the terminal, and is used to characterize the technician's attention to data information of different data types. The processing difficulty value can be understood as an indicator that quantitatively describes the processing complexity of the corresponding processing function information, and the processing difficulty value can be obtained by technicians in this field or researchers based on work experience, experimental analysis and data aggregation, and can be adjusted according to actual conditions.
[0048] Specifically, based on the target test sequence, the chip data processing function is tested on the target data group in the test client to obtain the processing log information of each target data information in the corresponding target data group processed by the chip. The processing log information can be understood as the step information of each target data information in the corresponding target data group processed by the chip and the status information of the processing process.
[0049] The above implementation method sorts the sub-data groups and target data processing tasks by processing sequence and processing difficulty value, so that the chip data processing capability categories that are highly concerned in actual situations can quickly and accurately obtain detection and evaluation results, thereby improving the efficiency of detecting chip data processing capabilities. At the same time, processing log information is obtained through chip testing, which improves the accuracy of obtaining processing log information, thereby improving the accuracy of detecting chip data processing capabilities.
[0050] In a possible implementation, the chip is evaluated based on the data type, evaluation index information, and processing log information corresponding to any target data processing task to obtain evaluation information, including:
[0051] Based on the processing log information of the target data information in the target data group corresponding to any target data processing task, obtain a plurality of data processing distribution information of a plurality of corresponding data types;
[0052] Based on the evaluation index information corresponding to the target data processing task, data evaluation processing is performed on a plurality of the data processing distribution information to obtain a plurality of sub-evaluation values;
[0053] Based on the processing sequences corresponding to the data types, obtaining corresponding weight values;
[0054] Performing weighted sum processing on the plurality of sub-evaluation values based on the plurality of weight values to obtain a target evaluation value;
[0055] The target evaluation value is used as evaluation information of the target data processing task.
[0056] It should be noted that the data processing distribution information can be understood as statistical distribution information of processing log information corresponding to the data type, which can reflect the usage and status information of the data type in the chip data processing flow.
[0057] Specifically, the process of performing data evaluation processing on the data processing distribution information through the evaluation index information is as follows: based on the evaluation index, the data processing distribution information is quantitatively analyzed, so as to calculate the sub-evaluation value for the chip data processing process of the corresponding data type. The sub-evaluation value reflects the ability of the chip to process the corresponding data type through the target data processing task. Further, the sub-evaluation values are weighted and summed according to the weight value to obtain the target evaluation value. Among them, the weight value reflects the attention paid by the technician to the data information of different data types.
[0058] The above implementation method calculates sub-evaluation values through data evaluation processing, and performs weighted summation processing on each sub-evaluation value according to the weight value to obtain the target evaluation value, thereby improving the accuracy of the data processing capability of the evaluation chip to process different data types.
[0059] In a possible implementation, the acquiring corresponding weight values based on the processing sequences corresponding to the data types includes:
[0060] Get the weight value partitioning strategy corresponding to any data type;
[0061] Obtaining the sequence position of the data type in the processing sequence;
[0062] Based on the weight value division strategy, the original weight value of the sequence position is processed as the weight value corresponding to the data type.
[0063] It should be noted that the processing sequence can be understood as the order in which data information of different data types are processed according to a preset priority, wherein the processing sequence of different data types is preset by the technician in the terminal, and is used to characterize the technician's attention to data information of different data types. The weight value division strategy can be understood as a rule or method preset for different data types for calculating the weight value of their sequence position. A plurality of weight value division strategies corresponding to a plurality of data types are preset in the preset database, wherein the same data type corresponds to a plurality of weight value division strategies according to the change in its number.
[0064] The above implementation method determines the weight values of different data types through weight value division strategy and processing sequence, and further presets multiple weight value division strategies considering the changes in the number of the same data type, thereby improving the accuracy of determining the weight values of data types, thereby improving the accuracy of the data processing capability of the detection chip.
[0065] In a possible implementation, the generating a chip detection report based on the plurality of evaluation information includes:
[0066] Get the sample test report template;
[0067] Based on the information of the plurality of sub-evaluation indicators, the sample detection report template is adjusted to obtain a target detection report template;
[0068] Based on the processing function information corresponding to the target data processing tasks and the sub-evaluation index information, the corresponding sub-evaluation values are filled into the target detection report template to generate a chip detection report.
[0069] It should be noted that the test report template can be understood as a preset format or framework for standardizing and systematically recording and displaying the rating index information and evaluation values obtained after testing the chip data processing capabilities.
[0070] The above implementation method records and displays the chip detection results in a standardized and systematic manner by generating a chip detection report, so that technical personnel in this field can more intuitively judge and evaluate the data processing capabilities of the chip, thereby improving the readability of the chip detection results.
[0071] Furthermore, the present application also provides a chip detection system, which includes:
[0072] A first acquisition module is used to acquire a number of data types, and then acquire a number of data information corresponding to the data types, to obtain a number of data processing tasks;
[0073] A second acquisition module is used to acquire a number of processing function information;
[0074] A first screening module, configured to screen out a plurality of target data processing tasks from a plurality of data processing tasks based on a plurality of the processing function information;
[0075] A second screening module is used to screen out corresponding evaluation index information in the database based on the processing function information corresponding to the target data processing tasks;
[0076] A data sorting module, used for screening out a plurality of target data information from a plurality of data information and sorting them into a plurality of target data groups based on a plurality of target data processing tasks;
[0077] A third acquisition module is used to acquire a plurality of processing log information corresponding to the target data information in the target data groups;
[0078] An evaluation processing module, used to evaluate the chip based on the data type, evaluation index information and processing log information corresponding to any target data processing task to obtain evaluation information;
[0079] A report generation module is used to generate a chip detection report based on a plurality of the evaluation information.
[0080] Furthermore, the present application also provides a computer device, including a processor and a memory, wherein the memory is used to store a computer program, and when the processor calls the computer program, the method described in any of the above implementation modes is implemented.
[0081] A chip detection method, system and computer device provided by the present application have at least the following advantages compared with the prior art:
[0082] First, through a series of steps, the evaluation index information corresponding to the target data processing task is screened out from the database to ensure that each evaluation index is highly relevant to the target data processing task and processing function information, thereby improving the accuracy of generating chip detection reports.
[0083] Second, based on a number of processing function information and its corresponding target data processing tasks, the chip is comprehensively evaluated through multiple dimensions such as data type, evaluation index information and processing log information, ensuring that all data scenarios and all operations encountered by the chip in actual application are fully considered when evaluating the chip data processing capability, thereby improving the comprehensiveness of the generated chip detection report.
[0084] Third, by generating a chip test report to record and display the chip test results in a standardized and systematic manner, technical personnel in the field can more intuitively judge and evaluate the data processing capabilities of the chip, thereby improving the readability of the chip test results. BRIEF DESCRIPTION OF THE DRAWINGS
[0085] Figure 1 It is a schematic diagram of a chip detection method provided in an embodiment of the present application;
[0086] Figure 2 is a schematic diagram of the structure of a chip detection system provided in an embodiment of the present application;
[0087] Figure 3 It is a structural schematic diagram of a computer device for implementing a chip detection method provided in an embodiment of the present application;
[0088] Among them: 210, first acquisition module; 220, second acquisition module; 230, first screening module; 240, second screening module; 250, data sorting module; 260, third acquisition module; 270, evaluation processing module; 280, report generation module. DETAILED DESCRIPTION
[0089] The present invention will be described in detail below with reference to the accompanying drawings and in combination with embodiments. It should be noted that the embodiments and features in the embodiments of the present invention can be combined with each other without conflict.
[0090] The following detailed descriptions are all exemplary descriptions, and are intended to provide further detailed descriptions of the present invention. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by technicians in the technical field of the present application; the terms used in the specification of the application herein are only for the purpose of describing specific embodiments, and are not intended to limit the present application; the terms "including" and "having" in the specification and claims of the present application and the above-mentioned drawings and any variations thereof are intended to cover non-exclusive inclusions. The terms "first", "second", etc. in the specification and claims of the present application or the above-mentioned drawings are used to distinguish different objects, not to describe a specific order.
[0091] It should be understood that, although the steps in the flowchart of the accompanying drawings are displayed in sequence as indicated by the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least a part of the steps in the flowchart of the accompanying drawings may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and their execution order is not necessarily sequential, but can be executed in turn or alternately with other steps or at least a part of the sub-steps or stages of other steps.
[0092] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.
[0093] Before describing the present application in detail with reference to the accompanying drawings and in combination with the embodiments, the terms and application scenarios involved in the present application are first described.
[0094] The chip detection method provided in the embodiment of the present application can be applied to the application environment of integrated circuit chip detection such as the Internet of Things chip. The method can be applied to terminals and servers, and can also be applied to systems including terminals and servers, and the method and system are implemented through data interaction between terminals and servers. Among them, the terminal can be a hardware device or software interface that allows users to interact with computer systems, embedded systems or chip systems, such as: a computer device including a processor, memory and storage device; a portable computing device with touch screen operation; a computer software for simulating the functions of a hardware terminal.
[0095] The chip described in the present application can be any semiconductor package structure with an integrated circuit, for example: a microprocessor, a memory chip, a graphics processing unit (GPU), a digital signal processor (DSP), a field programmable gate array (FPGA), an analog chip, a power management chip (PMIC), and a system-on-chip (SoC).
[0096] Figure 1 is a flow chart of a chip detection method provided in an embodiment of the present application. Figure 1 The present invention provides a chip detection method, comprising the following steps:
[0097] S101. Acquire several data types, and then acquire several data information corresponding to the data types to obtain several data processing tasks.
[0098] In some possible embodiments, the data volume of each data type is different. The data processing task can be a data aggregation task, a data classification task, a data calculation task, a data arrangement task, and a data identification task. The data types include text data types, picture data types, video data types, and audio data types.
[0099] S102: Obtain some processing function information.
[0100] S103: Based on the plurality of processing function information, select a plurality of target data processing tasks from the plurality of data processing tasks.
[0101] S104: Based on the processing function information corresponding to the target data processing tasks, select corresponding evaluation index information from the database.
[0102] S105. Based on the plurality of target data processing tasks, select a plurality of target data information from the plurality of data information and organize them into a plurality of target data groups.
[0103] S106: Obtain a plurality of processing log information corresponding to the target data information in the target data groups.
[0104] S107 . Based on the data type, evaluation index information and processing log information corresponding to any target data processing task, the chip is evaluated and processed to obtain evaluation information.
[0105] S108: Generate a chip detection report based on the plurality of evaluation information.
[0106] In some possible embodiments, the selecting a plurality of target data processing tasks from the plurality of data processing tasks based on the plurality of processing function information includes:
[0107] Acquire a plurality of processing target information corresponding to a plurality of the data processing tasks, and then obtain a plurality of target feature vectors corresponding to the processing target information;
[0108] Acquire a plurality of processing result information corresponding to the plurality of processing function information, and then obtain a plurality of result feature vectors corresponding to the plurality of processing result information;
[0109] Calculating the similarity between each of the target feature vectors and each of the result feature vectors;
[0110] Based on any processing function information, a target data processing task having the highest similarity between the target feature vector and the result feature vector is selected from the plurality of data processing tasks.
[0111] In some possible embodiments, based on the plurality of target data processing tasks, a plurality of target data information is screened out from the plurality of data information and organized into a plurality of target data groups, including:
[0112] Based on any target data processing task, a plurality of target data information are selected from the plurality of data information and integrated into an initial data group;
[0113] Classifying the target data information in the initial data group into a plurality of sub-data groups according to corresponding data types;
[0114] Based on a preset data volume interval range, screening a number of the target data information in a number of the sub-data groups to obtain a number of final data information;
[0115] Based on the data amount of each of the final data information, rearrange the plurality of the final data information in the plurality of the sub-data groups to obtain a corresponding data sequence;
[0116] A plurality of the sub-data sets are integrated into a target data set.
[0117] In some possible embodiments, the plurality of processing function information corresponding to the plurality of target data processing tasks is screened out in a database corresponding to the plurality of evaluation index information, including:
[0118] Based on the processing function information corresponding to any target data processing task, obtain corresponding function identification information;
[0119] Based on the function identification information, a plurality of evaluation index strategies are selected in a preset database as a plurality of sub-evaluation index information;
[0120] The plurality of sub-evaluation index information are integrated into evaluation index information.
[0121] It should be noted that the function identification information may be text identification information, picture identification information, symbol identification information and letter identification information. The evaluation index strategy may be understood as a specific standard and strategy for evaluating each processing function of the chip, including a quantitative range set for each evaluation index information when evaluating the chip processing capability, such as a data processing rate variation range, a processing volume per unit time variation range and a data processing time variation range for each data processing volume.
[0122] In some possible embodiments, the obtaining of a plurality of processing log information corresponding to the target data information in the plurality of target data groups includes:
[0123] Based on the data type corresponding to each of the sub-data groups, obtaining a corresponding processing sequence;
[0124] Based on the processing sequence corresponding to each of the sub-data groups, a plurality of the sub-data groups in any target data group are sorted to obtain a target processing sequence;
[0125] Based on the plurality of processing function information corresponding to the plurality of target data processing tasks, obtaining a plurality of corresponding processing difficulty values;
[0126] Arranging a plurality of the target data processing tasks based on a processing difficulty value corresponding to each of the target data processing tasks to obtain a test processing sequence;
[0127] generating a target test sequence based on the target processing sequence and the test processing sequence;
[0128] A chip test is performed based on the target test sequence to obtain processing log information corresponding to the target data information in the target data group.
[0129] In some possible embodiments, the chip is evaluated based on the data type, evaluation index information and processing log information corresponding to any target data processing task to obtain evaluation information, including:
[0130] Based on the processing log information of the target data information in the target data group corresponding to any target data processing task, obtain a plurality of data processing distribution information of a plurality of corresponding data types;
[0131] Based on the evaluation index information corresponding to the target data processing task, data evaluation processing is performed on a plurality of the data processing distribution information to obtain a plurality of sub-evaluation values;
[0132] Based on the processing sequences corresponding to the data types, obtaining corresponding weight values;
[0133] Performing weighted sum processing on the plurality of sub-evaluation values based on the plurality of weight values to obtain a target evaluation value;
[0134] The target evaluation value is used as evaluation information of the target data processing task.
[0135] In some possible embodiments, the obtaining corresponding weight values based on the processing sequences corresponding to the data types includes:
[0136] Get the weight value partitioning strategy corresponding to any data type;
[0137] Obtaining the sequence position of the data type in the processing sequence;
[0138] Based on the weight value division strategy, the original weight value of the sequence position is processed as the weight value corresponding to the data type.
[0139] It should be noted that a plurality of weight value division strategies corresponding to a plurality of data types are preset in the preset database, wherein the same data type corresponds to a plurality of weight value division strategies according to its number change. Specifically, a plurality of data types of the same type may be obtained during the chip detection process, and different weight value division strategies are respectively corresponding according to the number of the obtained data types.
[0140] In some possible embodiments, the generating a chip detection report based on the plurality of evaluation information includes:
[0141] Get the sample test report template;
[0142] Based on the information of the plurality of sub-evaluation indicators, the sample detection report template is adjusted to obtain a target detection report template;
[0143] Based on the processing function information corresponding to the target data processing tasks and the sub-evaluation index information, the corresponding sub-evaluation values are filled into the target detection report template to generate a chip detection report.
[0144] Figure 2 Schematic diagram of a chip detection system provided in an embodiment of the present application. Figure 2 The present embodiment provides a chip detection system, including a first acquisition module 210, a second acquisition module 220, a first screening module 230, a second screening module 240, a data sorting module 250, a third acquisition module 260, an evaluation processing module 270, and a report generation module 280, wherein:
[0145] The first acquisition module 210 is used to acquire a number of data types, and then acquire a number of data information corresponding to the data types, and obtain a number of data processing tasks;
[0146] The second acquisition module 220 is used to acquire a number of processing function information;
[0147] The first screening module 230 is used to screen out a plurality of target data processing tasks from a plurality of data processing tasks based on a plurality of the processing function information;
[0148] The second screening module 240 is used to screen out corresponding evaluation index information in the database based on the processing function information corresponding to the target data processing tasks;
[0149] The data sorting module 250 is used to screen out a plurality of target data information from a plurality of data information based on a plurality of target data processing tasks and sort them into a plurality of target data groups;
[0150] The third acquisition module 260 is used to acquire a plurality of processing log information corresponding to the target data information in the target data groups;
[0151] The evaluation processing module 270 is used to evaluate the chip based on the data type, evaluation index information and processing log information corresponding to any target data processing task to obtain evaluation information;
[0152] The report generation module 280 is used to generate a chip detection report based on a number of the evaluation information.
[0153] Figure 3 It is a structural schematic diagram of a computer device for implementing a chip detection method provided by an embodiment of the present application. The computer device includes a processor, a memory, a communication interface, a display unit and an input device connected by a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be implemented through WIFI, a mobile cellular network, NFC (near field communication) or other technologies. The computer program is executed by the processor to implement a chip detection method. The display screen of the computer device can be a liquid crystal display screen or an electronic ink display screen, and the input system of the computer device can be a touch layer covered on the display screen, or a button, a trackball or a touchpad provided on the housing of the computer device, or an external keyboard, touchpad or mouse, etc.
[0154] Those skilled in the art will understand that Figure 3 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.
[0155] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., but are not limited to this.
[0156] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope recorded in this specification.
[0157] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the present application. It should be noted that, for a person of ordinary skill in the art, several improvements and substitutions may be made without departing from the concept of the present application, and these improvements and substitutions shall also be regarded as the protection scope of the present invention. Therefore, the protection scope of the present application shall be subject to the attached claims.
Claims
1. A chip detection method, characterized in that: include: Acquire several data types, and then acquire several data information corresponding to the several data types, to obtain several data processing tasks; Get some processing function information; Based on the plurality of processing function information, screening out a plurality of target data processing tasks from the plurality of data processing tasks; Based on the processing function information corresponding to the target data processing tasks, select corresponding evaluation index information from the database; Based on the plurality of target data processing tasks, a plurality of target data information is screened out from the plurality of data information and organized into a plurality of target data groups; Acquire a plurality of processing log information corresponding to the target data information in the target data groups; Based on the data type, evaluation index information and processing log information corresponding to any target data processing task, the chip is evaluated and processed to obtain evaluation information; A chip detection report is generated based on the plurality of evaluation information.
2. A chip detection method according to claim 1, characterized in that: The selecting a plurality of target data processing tasks from the plurality of data processing tasks based on the plurality of processing function information includes: Acquire a plurality of processing target information corresponding to a plurality of the data processing tasks, and then obtain a plurality of target feature vectors corresponding to the processing target information; Acquire a plurality of processing result information corresponding to the plurality of processing function information, and then obtain a plurality of result feature vectors corresponding to the plurality of processing result information; Calculating the similarity between each of the target feature vectors and each of the result feature vectors; Based on any processing function information, a target data processing task having the highest similarity between the target feature vector and the result feature vector is selected from the plurality of data processing tasks.
3. A chip detection method according to claim 2, characterized in that: Based on the plurality of target data processing tasks, a plurality of target data information is screened out from the plurality of data information and organized into a plurality of target data groups, including: Based on any target data processing task, a plurality of target data information are selected from the plurality of data information and integrated into an initial data group; Classifying the target data information in the initial data group into a plurality of sub-data groups according to corresponding data types; Based on a preset data volume interval range, screening a number of the target data information in a number of the sub-data groups to obtain a number of final data information; Based on the data amount of each of the final data information, rearrange the plurality of the final data information in the plurality of the sub-data groups to obtain a corresponding data sequence; A plurality of the sub-data sets are integrated into a target data set.
4. A chip detection method according to claim 3, characterized in that: The processing function information corresponding to the target data processing tasks is screened out from the database corresponding to the evaluation index information, including: Based on the processing function information corresponding to any target data processing task, obtain corresponding function identification information; Based on the function identification information, a plurality of evaluation index strategies are selected in a preset database as a plurality of sub-evaluation index information; The plurality of sub-evaluation index information are integrated into evaluation index information.
5. A chip detection method according to claim 4, characterized in that: The obtaining of a plurality of processing log information corresponding to the target data information in the plurality of target data groups includes: Based on the data type corresponding to each of the sub-data groups, obtaining a corresponding processing sequence; Based on the processing sequence corresponding to each of the sub-data groups, a plurality of the sub-data groups in any target data group are sorted to obtain a target processing sequence; Based on the plurality of processing function information corresponding to the plurality of target data processing tasks, obtaining a plurality of corresponding processing difficulty values; Arranging a plurality of the target data processing tasks based on a processing difficulty value corresponding to each of the target data processing tasks to obtain a test processing sequence; generating a target test sequence based on the target processing sequence and the test processing sequence; A chip test is performed based on the target test sequence to obtain processing log information corresponding to the target data information in the target data group.
6. A chip detection method according to claim 5, characterized in that: The chip is evaluated based on the data type, evaluation index information and processing log information corresponding to any target data processing task to obtain evaluation information, including: Based on the processing log information of the target data information in the target data group corresponding to any target data processing task, obtain a plurality of data processing distribution information of a plurality of corresponding data types; Based on the evaluation index information corresponding to the target data processing task, data evaluation processing is performed on a plurality of the data processing distribution information to obtain a plurality of sub-evaluation values; Based on the processing sequences corresponding to the data types, obtaining corresponding weight values; Performing weighted sum processing on the plurality of sub-evaluation values based on the plurality of weight values to obtain a target evaluation value; The target evaluation value is used as evaluation information of the target data processing task.
7. A chip detection method according to claim 6, characterized in that: The obtaining corresponding weight values based on the processing sequences corresponding to the data types includes: Get the weight value partitioning strategy corresponding to any data type; Obtaining the sequence position of the data type in the processing sequence; Based on the weight value division strategy, the original weight value of the sequence position is processed as the weight value corresponding to the data type.
8. A chip detection method according to claim 7, characterized in that: The generating of the chip detection report based on the plurality of evaluation information comprises: Get the sample test report template; Based on the information of the plurality of sub-evaluation indicators, the sample detection report template is adjusted to obtain a target detection report template; Based on the processing function information corresponding to the target data processing tasks and the sub-evaluation index information, the corresponding sub-evaluation values are filled into the target detection report template to generate a chip detection report.
9. A chip detection system, characterized in that: The system comprises: A first acquisition module is used to acquire a number of data types, and then acquire a number of data information corresponding to the data types, to obtain a number of data processing tasks; A second acquisition module is used to acquire a number of processing function information; A first screening module, configured to screen out a plurality of target data processing tasks from a plurality of data processing tasks based on a plurality of the processing function information; A second screening module is used to screen out corresponding evaluation index information in the database based on the processing function information corresponding to the target data processing tasks; A data sorting module, used for screening out a plurality of target data information from a plurality of data information and sorting them into a plurality of target data groups based on a plurality of target data processing tasks; A third acquisition module is used to acquire a plurality of processing log information corresponding to the target data information in the target data groups; An evaluation processing module, used to evaluate the chip based on the data type, evaluation index information and processing log information corresponding to any target data processing task to obtain evaluation information; A report generation module is used to generate a chip detection report based on a plurality of the evaluation information.
10. A computer device, characterized in that: The method comprises a processor and a memory, wherein the memory is used to store a computer program, and when the processor calls the computer program, the method according to any one of claims 1 to 8 is implemented.