Gold-silver alloy bump structure, preparation method and semiconductor device

Abstract

The embodiment of the invention provides a gold-silver alloy bump structure, a preparation method and a semiconductor device, and the preparation method comprises the steps: providing a semiconductor device, and forming a seed layer on the surface of the semiconductor device; a first gold-silver alloy bump is formed on the seed layer through an electroplating technology, the gold content in the formed first gold-silver alloy bump is larger than 45%, and the thickness of the first gold-silver alloy bump ranges from 0.2 micrometer to 5 micrometers; and electroplating the first gold-silver alloy bump by using the same electroplating liquid to form a second gold-silver alloy bump, wherein the gold content in the formed second gold-silver alloy bump is less than 30%, and the thickness range of the second gold-silver alloy bump is 3-20 [mu] m. The first gold-silver alloy bump with high gold content improves the binding force between the bottom of the gold-silver alloy bump structure and the seed layer of the semiconductor device, and improves the reliability of the semiconductor device. The second gold-silver alloy bump with low gold content can avoid pure gold bumps on the surface of the gold-silver alloy bump structure, the hardness and morphology of the gold-silver alloy bump structure are controlled, and subsequent packaging is ensured.

Description

Technical Field

[0001] The disclosed embodiments belong to the field of semiconductor packaging technology, and specifically relate to a gold-silver alloy bump structure and a preparation method, and a semiconductor device. Background Art

[0002] Traditional chip packaging uses leads to achieve electrical connections between the chip PAD and the frame, while advanced packaging uses bumps / bumps instead of leads for connection, thereby shortening the current path and physical size, achieving advantages such as reduced size, high I / O density, high-frequency operation, and low parasitic inductance.

[0003] Currently common bump metals include gold, copper, and copper-nickel-gold. Among them, gold bumps are widely used in the display driver packaging field due to their excellent stability, electrical conductivity, and thermal conductivity. However, gold bumps have the problem of high cost.

[0004] Gold-silver alloy bumps are being developed as an alternative material to gold bumps due to their excellent electrical conductivity, thermal conductivity and low cost. However, the problem of silver being easily sulfided in the air needs to be solved during use.

[0005] In summary, the existing bumps have the following problems: 1) There is a conflict between performance and cost in the existing mass-produced metal bump technologies such as gold, copper, and copper-nickel-gold in the industry; 2) The newly developed gold-silver alloy technology has low cost and excellent electrical and thermal conductivity, but it has problems such as poor anti-sulfurization ability, poor bottom bonding and poor reliability. Among them, the existing gold-silver bump structure mainly includes pure gold-silver alloy bumps and double-layer bump structure designs of different materials. By electroplating different metal layers on the surface or using special packaging structures, the problem of large surface contact impedance after Ag oxidation can be solved, but there is a problem of poor bonding between the bottom of the gold-silver alloy and the UBM gold.

[0006] In view of the above problems, it is necessary to propose a gold-silver alloy bump structure and a preparation method, and a semiconductor device that are reasonably designed and effectively solve the above problems. Summary of the invention

[0007] The embodiments of the present disclosure aim to solve at least one of the technical problems existing in the prior art, and provide a gold-silver alloy bump structure and a preparation method, and a semiconductor device.

[0008] An aspect of an embodiment of the present disclosure provides a method for preparing a gold-silver alloy bump structure, the method comprising: Providing a semiconductor device, wherein a seed layer is formed on a surface of the semiconductor device; Forming a first gold-silver alloy bump on the seed layer by an electroplating process, wherein the gold content of the formed first gold-silver alloy bump is greater than 45%, and the thickness of the first gold-silver alloy bump is in a range of 0.2 μm to 5 μm; The same electroplating solution is used to electroplate the first gold-silver alloy bump to form a second gold-silver alloy bump, wherein the gold content of the formed second gold-silver alloy bump is less than 30%, and the thickness of the second gold-silver alloy bump ranges from 3μm to 20μm.

[0009] Optionally, forming a first gold-silver alloy bump on the seed layer by an electroplating process includes: forming a photoresist layer on the seed layer; exposing and developing the photoresist layer to form an opening on the photoresist layer; A cyanide plating solution system is used, the first current density is adjusted to be greater than 1.5 ASD and the first electroplating time range is adjusted to be 10s to 300s, so as to electroplate the first gold-silver alloy bump at the opening.

[0010] Optionally, the first current density is adjusted to 1.5ASD-3.5ASD, so that the gold content in the formed first gold-silver alloy bump is in the range of 45%-65%.

[0011] Optionally, the step of electroplating the first gold-silver alloy bump by the same electroplating solution to form the second gold-silver alloy bump includes: The same cyanide plating solution system is used, the second current density is adjusted to less than 0.7 ASD and the second electroplating time range is adjusted to 720s-4800s, so as to electroplate the second gold-silver alloy bump on the first gold-silver alloy bump.

[0012] Optionally, the second current density is adjusted to 0.3ASD-0.7ASD, so that the gold content in the formed second gold-silver alloy bump is in the range of 10%-30%.

[0013] Optionally, after forming the second gold-silver alloy bump, the method further includes: removing the remaining photoresist layer; A portion of the seed layer is removed so that the remaining seed layer is only connected to the first gold-silver alloy bump.

[0014] Another aspect of the present disclosure provides a gold-silver alloy bump structure, including: A first gold-silver alloy bump, wherein the first gold-silver alloy bump is used to be disposed in a seed layer of a semiconductor device, wherein the gold content of the first gold-silver alloy bump is greater than 45%, and the thickness of the first gold-silver alloy bump is in a range of 0.2 μm to 5 μm; A second gold-silver alloy bump, wherein the second gold-silver alloy bump is arranged on the first gold-silver alloy bump, wherein the gold content of the second gold-silver alloy bump is less than 30%, and the thickness of the second gold-silver alloy bump ranges from 3μm to 20μm.

[0015] Optionally, the gold content in the first gold-silver alloy bump is in the range of 45% to 65%.

[0016] Optionally, the gold content in the second gold-silver alloy bump is in the range of 10% to 30%.

[0017] Another aspect of the embodiments of the present disclosure provides a semiconductor device, including the gold-silver alloy bump structure described above.

[0018] The gold-silver alloy bump structure and preparation method, and semiconductor device of the disclosed embodiment, the gold-silver alloy bump structure preparation method, the first gold-silver alloy bump with high gold content and low thickness is formed on the seed layer of the semiconductor device by electroplating process using the same electroplating solution, and the second gold-silver alloy bump with low gold content and high thickness is formed by electroplating on the first gold-silver alloy bump. Among them, the first gold-silver alloy bump with high gold content improves the bonding force between the bottom of the gold-silver alloy bump structure and the seed layer of the semiconductor device, and improves the reliability of the semiconductor device, while retaining the advantages of low cost, high conductivity, and high thermal conductivity of the gold-silver alloy bump structure, and ensuring the morphology and hardness of the bump; the second gold-silver alloy bump with low gold content can avoid pure gold nodules on the surface of the gold-silver alloy bump structure, control the hardness and morphology of the gold-silver alloy bump structure, and ensure subsequent packaging. The first gold-silver alloy bump and the second gold-silver alloy bump are formed by electroplating in sequence using the same electroplating solution, and the production process is simple and cost-saving. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A schematic diagram of the results of testing the shear force of gold-silver alloy bumps with different gold contents; Figure 2 A schematic diagram of the results of testing the hardness of gold-silver alloy bumps with different gold contents; Figure 3 Schematic diagram of the morphology of gold-silver alloy bumps with different gold contents; Figure 4 It is a schematic diagram of a process of preparing a gold-silver alloy bump structure in an embodiment of the present disclosure; Figures 5 to 10 It is a process schematic diagram of a method for preparing a gold-silver alloy bump structure in an embodiment of the present disclosure; Fig.11 Schematic diagram of the structure of a gold-silver alloy bump structure in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0020] In order to enable those skilled in the art to better understand the technical solutions of the embodiments of the present disclosure, the embodiments of the present disclosure are further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0021] like Figure 1 As shown in FIG. 1 , the shear force and hardness of gold-silver alloy bumps with different gold contents were tested. Figure 1 From the test results in Table 1, it can be seen that the higher the gold content, the stronger the bonding between the bump and the bottom UBM layer, the higher the anti-oxidation / sulfurization ability, and the higher the reliability. Figure 2 As shown in the figure, the hardness of the gold-silver alloy bumps with different gold contents was tested. Figure 1 and Figure 3 It can be seen that gold nodules exist on the surface of gold-silver alloy bumps with high gold content, and the cost and hardness are both relatively high, which cannot meet product requirements.

[0022] Table 1 Anti-oxidation / anti-sulfurization test results of gold-silver alloy bumps with different contents

[0023] According to the above test results and the existing problems of gold-silver alloy bumps, such as Figure 4 The embodiment of the present disclosure provides a method S100 for preparing a gold-silver alloy bump structure, and the method S100 includes: S110 , providing a semiconductor device, wherein a seed layer is formed on a surface of the semiconductor device.

[0024] like Figure 5 As shown, a semiconductor device 110 is provided, and a seed layer 120 is formed on the surface of the semiconductor device 110 .

[0025] Specifically, in this embodiment, the semiconductor device 110 is described by taking a chip as an example. Figure 5 As shown, a pad 111 and a passivation layer 112 are provided on the functional surface of the chip, wherein the passivation layer 112 has a window corresponding to the pad 111. Figure 6 As shown, a TiW seed layer 121 with a thickness of about 1000Å to 4000Å is sputtered on the pad 111 and the passivation layer 112 by a sputtering process, and then an Au seed layer 122 with a thickness of about 500Å to 1500Å is sputtered on the TiW seed layer 121. The seed layer 120 is electrically connected to the pad 111 of the chip.

[0026] S120. Forming a first gold-silver alloy bump on the seed layer by an electroplating process, wherein the gold content of the formed first gold-silver alloy bump is greater than 45%, and the thickness of the first gold-silver alloy bump is in a range of 0.2 μm to 5 μm.

[0027] The step of forming the first gold-silver alloy bump on the seed layer by an electroplating process specifically includes: First, a photoresist layer 130 is formed on the seed layer 120 .

[0028] Specifically, Figure 7 As shown, a photoresist layer 130 is coated on the seed layer 120 , wherein the photoresist layer 130 may be a positive photoresist or a negative photoresist, which may be selected according to actual needs and is not specifically limited in this embodiment.

[0029] Next, the photoresist layer 130 is exposed and developed to form an opening 131 on the photoresist layer 130 .

[0030] Specifically, Figure 8 As shown, a mask is provided and placed above the photoresist layer 130 . The photoresist layer 130 is exposed and developed using the mask as a mask to form an opening 131 at the photoresist layer 130 corresponding to the pad 111 .

[0031] Again, a cyanide plating solution system is used, the first current density is adjusted to be greater than 1.5 ASD and the first electroplating time is adjusted to a range of 10 s to 300 s, so as to form the first gold-silver alloy bump 140 at the opening 131 by electroplating.

[0032] Specifically, in this embodiment, the gold-silver alloy bump is electroplated using a cyanide plating solution system, and the gold content of the gold-silver alloy is adjusted during the electroplating process by adjusting the electroplating current density. Specifically, the first current density is adjusted to be greater than 1.5 ASD and the first electroplating time range is adjusted to be 10s to 300s, so as to electroplate on the Au seed layer 122 at the opening 131 to form the following Fig. 9 The first gold-silver alloy bump 140 shown has a gold content greater than 45% and a thickness ranging from 0.2 μm to 5 μm.

[0033] It should be noted that the gold content of the first gold-silver alloy bump 140 needs to be higher than 45%. When the gold content is lower than 45%, the gold-silver alloy has poor anti-sulfurization ability, low shear force, and poor bonding between Ag and W. When the Au content is lower than 45%, some Ag atoms will migrate to the Au seed layer 122 under harsh conditions, resulting in abnormal bonding at the interface between the first gold-silver alloy bump 140 and the TiW seed layer 121, and low reliability.

[0034] It should be further explained that the specific thickness of the first gold-silver alloy bump 140 can be selected according to actual needs and is not specifically limited in this embodiment.

[0035] Preferably, in this embodiment, when forming the first gold-silver alloy bump 140 , the first current density is adjusted to 1.5ASD-3.5ASD, so that the gold content in the formed first gold-silver alloy bump 140 is in the range of 45%-65%.

[0036] In this embodiment, the first gold-silver alloy bump with high gold content and low thickness formed by electroplating retains the advantages of low cost, high conductivity and high thermal conductivity of the gold-silver alloy bump structure and ensures the morphology and hardness of the bump, while improving the bonding strength between the bottom of the gold-silver alloy bump structure and the seed layer of the semiconductor device, thereby improving the reliability of the semiconductor device.

[0037] S130, using the same electroplating solution to electroplate the first gold-silver alloy bump to form a second gold-silver alloy bump, wherein the gold content of the formed second gold-silver alloy bump is less than 30%, and the thickness of the second gold-silver alloy bump is in the range of 3 μm to 20 μm.

[0038] The method of using the same electroplating solution to electroplate the first gold-silver alloy bump to form the second gold-silver alloy bump comprises: The same cyanide plating solution system is used, the second current density is adjusted to less than 0.7 ASD and the second electroplating time range is adjusted to 720s-4800s, so as to electroplate the second gold-silver alloy bump 150 on the first gold-silver alloy bump 140 .

[0039] Specifically, the same cyanide plating solution system is used to adjust the gold content of the gold-silver alloy during the electroplating process by adjusting the electroplating current density. Specifically, the second current density is adjusted to less than 0.7 ASD and the second electroplating time range is adjusted to 720s to 4800s, so as to electroplate on the first gold-silver alloy bump 140 to form the following Fig. 9 The second gold-silver alloy bump 150 is shown.

[0040] It should be noted that the gold content in the second gold-silver alloy bump 150 needs to be lower than 30% to avoid the problem of gold nodules and high hardness on the surface of the second gold-silver alloy bump 150 with a high gold content, which may affect subsequent packaging, while reducing the alloy cost.

[0041] It should be further explained that the thickness of the second gold-silver alloy bump 150 can be selected according to actual needs and is not specifically limited in this embodiment.

[0042] Preferably, in this embodiment, when the second gold-silver alloy bump 150 is formed by electroplating, the second current density is adjusted to 0.3ASD-0.7ASD, so that the gold content in the formed second gold-silver alloy bump 150 is in the range of 10%-30%.

[0043] In this embodiment, the second gold-silver alloy bump with low gold content and high thickness formed by electroplating can avoid pure gold nodules on the surface of the gold-silver alloy bump structure, control the hardness and morphology of the gold-silver alloy bump structure, and ensure subsequent packaging.

[0044] Exemplarily, after forming the second gold-silver alloy bump, the method S100 further includes: First, the remaining photoresist layer 130 is removed.

[0045] Specifically, the residual photoresist layer 130 may be removed by etching or other processes.

[0046] Secondly, a portion of the seed layer is removed so that the remaining seed layer is only connected to the first gold-silver alloy bump.

[0047] Specifically, etching or other processes may be used to remove part of the seed layer 120 so that the remaining seed layer 120 is only connected to the first gold-silver alloy bump 140 , thereby preventing the existence of the seed layer 120 at other locations of the semiconductor device 110 and causing a short circuit, thereby affecting the reliability of the semiconductor device 110 .

[0048] Next, the first gold-silver alloy bump 140 and the second gold-silver alloy bump 150 are annealed to make the hardness of the gold-silver alloy bump structure reach the preset hardness, forming a Fig.10 The gold-silver alloy bump structure shown.

[0049] The method for preparing the gold-silver alloy bump structure of the disclosed embodiment uses the same electroplating solution to form a first gold-silver alloy bump with high gold content and low thickness on the seed layer of the semiconductor device through an electroplating process, and electroplating the first gold-silver alloy bump to form a second gold-silver alloy bump with low gold content and high thickness. Among them, the first gold-silver alloy bump with high gold content improves the bonding force between the bottom of the gold-silver alloy bump structure and the seed layer of the semiconductor device, thereby improving the reliability of the semiconductor device, while retaining the advantages of low cost, high conductivity, and high thermal conductivity of the gold-silver alloy bump structure and ensuring the morphology and hardness of the bump; the second gold-silver alloy bump with low gold content can avoid pure gold nodules on the surface of the gold-silver alloy bump structure, control the hardness and morphology of the gold-silver alloy bump structure, and ensure subsequent packaging. The first gold-silver alloy bump and the second gold-silver alloy bump are formed by electroplating in sequence using the same electroplating solution, which simplifies the production process and saves costs.

[0050] like Fig.11 As shown, another aspect of the embodiment of the present disclosure provides a gold-silver alloy bump structure 100 , including a first gold-silver alloy bump 140 and a second gold-silver alloy bump 150 .

[0051] The first gold-silver alloy bump 140 is used to be disposed on the seed layer 120 of the semiconductor device 110 , wherein the gold content of the first gold-silver alloy bump 140 is greater than 45%, and the thickness of the first gold-silver alloy bump 140 ranges from 0.2 μm to 5 μm.

[0052] The second gold-silver alloy bump 150 is disposed on the first gold-silver alloy bump 140 , wherein the gold content of the second gold-silver alloy bump 150 is less than 30%, and the thickness of the second gold-silver alloy bump 150 ranges from 3 μm to 20 μm.

[0053] The gold-silver alloy bump structure of the disclosed embodiment has a gold content of greater than 45% in the first gold-silver alloy bump and a thickness range of 0.2μm to 5μm. While retaining the advantages of low cost, high electrical conductivity, and high thermal conductivity of the gold-silver alloy bump structure and ensuring the bump morphology and hardness, the bonding force between the bottom of the gold-silver alloy bump structure and the seed layer of the semiconductor device is improved, thereby improving the reliability of the semiconductor device. The gold content of the second gold-silver alloy bump is less than 30% and the thickness range is 3μm to 20μm, thereby avoiding pure gold nodules on the surface of the gold-silver alloy bump structure, controlling the hardness and morphology of the gold-silver alloy bump structure, and ensuring subsequent packaging. The gold-silver alloy bump structure improves the bonding force with the semiconductor device and improves the reliability of the semiconductor device.

[0054] It should be noted that if Fig.11 As shown, the seed layer 120 includes a TiW seed layer 121 and an Au seed layer 122 , wherein the TiW seed layer 121 is disposed on the pad 111 and the passivation layer 112 , the Au seed layer 122 is disposed on the TiW seed layer 121 , and the first gold-silver alloy bump 140 is disposed on the Au seed layer 122 .

[0055] Exemplarily, in this embodiment, preferably, the gold content in the first gold-silver alloy bump 140 is in the range of 45% to 65%. The gold content in this range can better increase the bonding force between the first gold-silver alloy bump 140 and the seed layer of the semiconductor device, thereby improving the reliability of the semiconductor device.

[0056] Exemplarily, in this embodiment, preferably, the gold content in the second gold-silver alloy bump 150 is in the range of 10% to 30%. The gold content within this range can better avoid pure gold nodules on the surface of the gold-silver alloy bump structure, control the hardness and morphology of the gold-silver alloy bump structure, and ensure subsequent packaging.

[0057] Another aspect of the present disclosure provides a semiconductor device, including the aforementioned gold-silver alloy bump structure 100. The specific structure of the gold-silver alloy bump structure 100 has been described in detail above, and will not be repeated here.

[0058] The semiconductor device of the disclosed embodiment adopts the gold-silver alloy bump structure described above, thereby improving the reliability of the semiconductor device.

[0059] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the embodiments of the present disclosure, but the embodiments of the present disclosure are not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and essence of the embodiments of the present disclosure, and these modifications and improvements are also considered to be within the protection scope of the embodiments of the present disclosure.

Claims

1. A method for preparing a gold-silver alloy bump structure, characterized in that: The method comprises: Providing a semiconductor device, wherein a seed layer is formed on a surface of the semiconductor device; Forming a first gold-silver alloy bump on the seed layer by an electroplating process, wherein the gold content of the formed first gold-silver alloy bump is greater than 45%, and the thickness of the first gold-silver alloy bump is in a range of 0.2 μm to 5 μm; The same electroplating solution is used to electroplate the first gold-silver alloy bump to form a second gold-silver alloy bump, wherein the gold content of the formed second gold-silver alloy bump is less than 30%, and the thickness of the second gold-silver alloy bump ranges from 3μm to 20μm.

2. The method according to claim 1, characterized in that The step of forming a first gold-silver alloy bump on the seed layer by an electroplating process comprises: forming a photoresist layer on the seed layer; exposing and developing the photoresist layer to form an opening on the photoresist layer; A cyanide plating solution system is used, the first current density is adjusted to be greater than 1.5 ASD and the first electroplating time range is adjusted to be 10s to 300s, so as to form the first gold-silver alloy bump at the opening by electroplating.

3. The method according to claim 2, characterized in that The first current density is adjusted to 1.5ASD-3.5ASD, so that the gold content in the formed first gold-silver alloy bump is in the range of 45%-65%.

4. The method according to claim 2, characterized in that: The method of using the same electroplating solution to electroplate the first gold-silver alloy bump to form the second gold-silver alloy bump comprises: The same cyanide plating solution system is used, the second current density is adjusted to less than 0.7 ASD and the second electroplating time range is adjusted to 720s-4800s, so as to electroplate the second gold-silver alloy bump on the first gold-silver alloy bump.

5. The method according to claim 4, characterized in that The second current density is adjusted to 0.3ASD-0.7ASD, so that the gold content in the formed second gold-silver alloy bump is in the range of 10%-30%.

6. The method according to claim 5, characterized in that After forming the second gold-silver alloy bump, the method further includes: removing the remaining photoresist layer; A portion of the seed layer is removed so that the remaining seed layer is only connected to the first gold-silver alloy bump.

7. A gold-silver alloy bump structure, characterized in that: include: A first gold-silver alloy bump, wherein the first gold-silver alloy bump is used to be disposed in a seed layer of a semiconductor device, wherein the gold content of the first gold-silver alloy bump is greater than 45%, and the thickness of the first gold-silver alloy bump is in a range of 0.2 μm to 5 μm; A second gold-silver alloy bump, wherein the second gold-silver alloy bump is arranged on the first gold-silver alloy bump, wherein the gold content of the second gold-silver alloy bump is less than 30%, and the thickness of the second gold-silver alloy bump ranges from 3μm to 20μm.

8. The gold-silver alloy bump structure according to claim 7, characterized in that: The gold content of the first gold-silver alloy bump is in the range of 45% to 65%.

9. The gold-silver alloy bump structure according to claim 7, characterized in that: The gold content of the second gold-silver alloy bump is in the range of 10% to 30%.

10. A semiconductor device, characterized in that: Comprising the gold-silver alloy bump structure as described in any one of claims 7 to 9.

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