Automatic wafer packaging detection and sorting system
By designing an automated wafer packaging detection and sorting system, using multi-spectral detection, terahertz imaging, flexible probe electrical detection and AI technology, the problems of traditional manual detection are solved, and efficient and accurate crystals are achieved Circular packaging inspection and intelligent sorting improve the production efficiency and product quality of semiconductor manufacturing.
Patent Information
- Application Number
- CN202411597402.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-11
- Publication Date
- 2025-02-11
- Estimated Expiration
- 2044-11-11
AI Technical Summary
Traditional manual inspection and sorting are inefficient and insufficiently accurate, which cannot meet the requirements of modern semiconductor industry for high yield, high precision and high automation levels, especially in quality inspection and sorting after wafer packaging.
An automated wafer packaging inspection and sorting system was designed, integrating surface inspection module, solder joint inspection module, electrical inspection module, thermal cycle inspection module, reflow soldering test module, sorting strategy acquisition module and wafer sorting module. Intelligent detection and sorting are performed using high-precision camera multi-spectral detection, terahertz imaging and X-ray, flexible probe electrical detection, AI technology and flexible robots.
Achieve all-round, high-precision, and high-speed quality detection and intelligent sorting of the packaged wafers, significantly improving the accuracy and efficiency of detection, reducing the errors caused by manual operations, optimizing the production process, and improving the The yield rate reduces waste production.
Smart Images

Figure CN119419131A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor manufacturing and detection, and in particular to an automatic wafer packaging detection and sorting system. Background Art
[0002] In the semiconductor manufacturing process, wafer packaging is an extremely critical step that directly affects the performance and reliability of the chip. As the complexity of integrated circuits increases, problems such as solder joint quality, surface defects, and internal structural integrity in wafer packaging become more prominent. Traditional manual inspection and sorting are inefficient and inaccurate, and cannot meet the modern semiconductor industry's requirements for high yield, high precision, and high automation levels.
[0003] Therefore, there is an urgent need for an efficient automated system that can quickly and accurately perform quality inspection and intelligent sorting after the wafer packaging is completed, especially in terms of solder joint inspection, electrical performance inspection, surface defect inspection, etc. At the same time, AI technology can be used to further optimize the inspection and sorting strategies to ensure the improvement of product quality and production efficiency, and meet the semiconductor industry's demand for efficient and high-reliability packaging. Summary of the invention
[0004] In view of the above existing problems, the present invention is proposed.
[0005] Therefore, the present invention provides an automated wafer packaging detection and sorting system to solve the problem of automated detection and intelligent sorting after wafer packaging.
[0006] In order to solve the above technical problems, the present invention provides the following technical solutions: In a first aspect, the present invention provides an automated wafer packaging detection and sorting system, which comprises: Surface inspection module, which detects surface defects of packaged wafers through high-precision camera multispectral detection combined with AI analysis; Wafer package solder joint inspection module, which uses terahertz imaging and X-ray combined with AI technology to detect the internal structure of packaged wafer solder joints and identify voids, cracks and welding quality defects; The electrical inspection module is used to perform electrical inspection on packaged wafers using flexible probes and intelligently locate faults using AI. Thermal cycle detection module, used to simulate extreme temperature changes for thermal cycle testing and monitor thermal stress in real time; Reflow soldering test module, which uses AI to optimize temperature curve and atmosphere control to simulate multiple reflow soldering processes; The sorting strategy acquisition module is used to obtain AI-driven sorting strategies by collecting detection data, extracting key sorting features, and training classification models; Wafer sorting module, which is used to automatically sort wafers with high precision through a flexible manipulator based on wafer packaging inspection results and AI-driven sorting strategies; The data analysis storage module is used to store wafer packaging inspection results and perform historical data analysis.
[0007] As a preferred solution of the automated wafer packaging inspection and sorting system of the present invention, the surface defects of the packaged wafers are detected by high-precision camera multi-spectral detection combined with AI analysis. The specific steps are as follows: After the packaged wafer is placed on the inspection platform, a high-precision camera performs multispectral scanning on the surface of the packaged wafer to obtain multispectral image data; Multispectral image data were denoised and enhanced by Gaussian filtering and histogram equalization; The feature information of the packaged wafer surface is extracted from the denoised and enhanced multispectral image data through edge detection, threshold segmentation and feature point positioning methods; The convolutional neural network is trained by multispectral image data of a large number of known well-packaged wafers and badly-packaged wafers to obtain a wafer multispectral recognition convolutional neural network. The wafer multi-spectral recognition convolutional neural network combines the characteristic information of the packaged wafer surface to obtain the detection results of the packaged wafer surface.
[0008] As a preferred solution of the automated wafer packaging detection and sorting system of the present invention, wherein: terahertz imaging and X-ray detection are performed, the specific steps are as follows: The terahertz imaging device detects the surface structure of the packaged wafer solder joints and extracts the morphological information of the solder joints; X-ray inspection equipment analyzes the inside of the solder joint to identify voids, cracks and welding quality defects; The packaged wafer is placed in a terahertz imaging device and an X-ray detection device for scanning to obtain terahertz imaging and X-ray data.
[0009] As a preferred solution of the automated wafer packaging detection and sorting system of the present invention, the internal structure of the packaged wafer solder joints is detected based on terahertz imaging and X-ray data combined with AI technology. The specific steps are as follows: Annotate terahertz imaging and X-ray data to obtain labeled training data sets; Through supervised learning, a convolutional neural network is used to perform deep learning training on a labeled training data set to obtain AI technology for solder joint detection. The terahertz imaging and X-ray data are fused and combined with solder joint detection AI technology to obtain the solder joint detection results of the packaged wafers.
[0010] As a preferred solution of the automated wafer packaging detection and sorting system of the present invention, the packaged wafers are electrically tested by a flexible probe and intelligent fault location is performed in combination with AI. The specific steps are as follows: A programmable flexible probe array is composed of multiple flexible probes that automatically adjust positions and pressures through electronic control; The programmable flexible probe array contacts each electrical contact of the packaged wafer to detect the resistance, voltage, current, impedance, conductivity, leakage current, capacitance, frequency response and noise of each electrical contact of the packaged wafer; Resistance, voltage, current, impedance, continuity, leakage current, capacitance, frequency response and noise of each electrical contact as electrical parameters; Feature dimension reduction is performed through principal component analysis, and support vector machines with radial basis function kernels are used for training to obtain fault location AI. Fault location AI analyzes electrical parameters, performs intelligent fault location, determines the specific area where the problem occurs, and obtains electrical test results for packaged wafers.
[0011] As a preferred solution of the automated wafer packaging detection and sorting system of the present invention, wherein: extreme temperature changes are simulated to perform thermal cycle testing and thermal stress is monitored in real time. The specific steps are as follows: Place the packaged wafer in a thermal cycle test device and set the temperature change range and cycle number; Simulate extreme temperature changes, alternately heat up and cool down, monitor the stress changes of the wafer in real time during the temperature change process through strain gauges, and record the stress change data in each cycle; After the thermal cycle test, the packaged wafers are subjected to surface inspection, solder joint inspection and electrical inspection again to obtain the thermal cycle test results of the packaged wafers.
[0012] As a preferred solution of the automated wafer packaging detection and sorting system of the present invention, AI is used to optimize the temperature curve and atmosphere control to simulate multiple reflow soldering processes. The specific steps are as follows: Collect a large amount of historical data covering different types of wafers and their optimal welding parameters, use the historical data of optimal welding parameters to train the neural network and obtain the temperature curve AI algorithm; Based on the type and size of the wafer package, the temperature curve AI algorithm analyzes historical welding data to generate the optimal temperature curve; Using the generated optimal temperature curve, simulate the reflow process in a simulation environment; During the reflow soldering process, the soldering temperature is monitored in real time through the temperature sensor, and the atmosphere control is dynamically adjusted according to the real-time monitored soldering temperature; The real-time welding temperature curve and welding results of each welding are recorded, and the packaged wafers after the reflow soldering simulation are subjected to surface inspection, solder joint inspection and electrical inspection again to obtain the reflow soldering simulation results of the packaged wafers.
[0013] As a preferred solution of the automated wafer packaging inspection and sorting system of the present invention, wherein: by collecting inspection data, extracting key sorting features and training classification models, an AI-driven sorting strategy is obtained. The specific steps are as follows: Collecting inspection results of the surface of the packaged wafer, inspection results of the solder joints of the packaged wafer, electrical inspection results of the packaged wafer, thermal cycle test results of the packaged wafer, and reflow soldering simulation results of the packaged wafer as inspection data; Extracting defect type features, defect location features, defect size features, and defect severity level features from the inspection results of the packaged wafer surface; Extract void size features, crack depth features, solder distribution features and solder defect severity level features from the solder joint inspection results of packaged wafers; Extracting short circuit locations, open circuit locations and high resistance area locations from the electrical inspection results of packaged wafers as key features for sorting electrical inspection results; Extract stress variation curve characteristics, stress distribution characteristics and stress extreme value characteristics from the thermal cycle test results of packaged wafers; Extracting soldering defect features from reflow soldering simulation results of packaged wafers; Based on the collected detection data and extracted features, information gain is used as the feature selection criterion, and cost-complexity pruning is adopted to train the decision tree to obtain the AI-driven sorting strategy.
[0014] As a preferred solution of the automated wafer packaging inspection and sorting system of the present invention, the wafer sorting module is used to automatically sort wafers with high precision through a flexible manipulator according to the wafer packaging inspection results and the AI-driven sorting strategy. The specific steps are as follows: The flexible manipulator combines with high-precision cameras, torque sensors, distance sensors, tactile sensors and suction cups to determine the specific position and arrangement of the packaged wafers after inspection, and automatically adjusts the gripping force and angle through the flexible manipulator control unit; Classify and sort packaged wafers based on AI-driven sorting strategies and flexible manipulators; Adjust sorting strategies in real time to accommodate different defect types and packaged wafer characteristics.
[0015] As a preferred solution of the automated wafer packaging detection and sorting system of the present invention, the specific steps of storing detection data and performing historical data analysis are as follows: Format the test data and upload it to the cloud platform through data transmission protocol and API interface; Integrate big data analysis and storage functions on the cloud platform; Use big data analysis to perform trend analysis on the test data and obtain trend analysis results; The trend analysis results are combined with existing visualization tools for visual display.
[0016] The beneficial effects of the present invention are as follows: by integrating advanced optical detection, electrical testing and artificial intelligence technology, all-round, high-precision and high-speed quality inspection and intelligent sorting of packaged wafers are achieved. The system can effectively identify quality problems such as poor solder joints, surface defects, and internal structural abnormalities, significantly improving the accuracy and efficiency of detection and reducing errors caused by manual operations. At the same time, with the help of AI algorithms to conduct in-depth analysis of detection data, the detection parameters and sorting strategies can be automatically adjusted to optimize the production process, improve the yield rate, and reduce waste generation. In addition, the system is highly flexible and scalable, can adapt to the packaging needs of wafers of different specifications and types, supports a multi-variety small-batch production model, and provides strong technical support for semiconductor manufacturers, which will help promote technological progress and industrial upgrading in the entire industry. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.
[0018] Figure 1 This is a system diagram of the automated wafer packaging inspection and sorting system in Example 1.
[0019] Figure 2 This is a diagram showing the structure of the wafer packaging solder joint detection module in Example 1. DETAILED DESCRIPTION
[0020] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are described in detail below in conjunction with the accompanying drawings.
[0021] In the following description, many specific details are set forth to facilitate a full understanding of the present invention, but the present invention may also be implemented in other ways different from those described herein, and those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.
[0022] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The term "in one embodiment" that appears in different places in this specification does not necessarily refer to the same embodiment, nor does it refer to a separate or selective embodiment that is mutually exclusive with other embodiments.
[0023] Example 1, reference Figure 1 and Figure 2 , which is the first embodiment of the present invention, provides an automated wafer packaging inspection and sorting system, including a surface inspection module, a surface inspection module, an electrical inspection module, a thermal cycle inspection module, a reflow soldering test module, a sorting strategy acquisition module, a wafer sorting module and a data analysis and storage module.
[0024] The surface inspection module is used to detect surface defects of packaged wafers through high-precision camera multi-spectral detection combined with AI analysis; the solder joint inspection module is used to use terahertz imaging and X-ray combined with AI technology to detect the internal structure of packaged wafer solder joints; the electrical inspection module is used to perform electrical inspection on packaged wafers through flexible probes, and intelligent fault location combined with AI; the thermal cycle inspection module is used to simulate extreme temperature changes for thermal cycle testing and monitor thermal stress in real time; the reflow soldering test module is used to use AI to optimize temperature curves and atmosphere control to simulate multiple reflow soldering processes; the sorting strategy acquisition module is used to obtain AI-driven sorting strategies by collecting inspection data, extracting key sorting features, and training classification models; the wafer sorting module is used to automatically sort wafers with high precision through a flexible robot according to the wafer packaging inspection results and AI-driven sorting strategies; the data analysis storage module is used to store wafer packaging inspection results and perform historical data analysis.
[0025] Specifically, by integrating automated logistics and intelligent scheduling, packaged wafers are automatically obtained from packaging equipment and warehouses, including the following steps: Monitor the output of packaged wafers of wafer packaging equipment and the inventory of packaged wafers in the warehouse in real time, and use a scheduling algorithm based on priority scheduling rules for intelligent scheduling. Furthermore, continuously and in real time monitor the output data of packaging equipment to determine the time and quantity of each batch of wafer packaging. At the same time, monitor the inventory status of packaged wafers stored in the warehouse to ensure that information such as the number, type and location of wafers in the warehouse is accurate. According to the priority of different batches of wafers (such as wafers that need to be tested urgently, wafers with large output, etc.), the scheduling algorithm determines which wafers should be transferred to the inspection area first. The scheduling algorithm determines the order and path of logistics based on the production plan, detection capabilities, and the importance or urgency of the wafers.
[0026] It should be noted that packaging equipment is equipment used to package manufactured semiconductor wafers. Packaging refers to the physical packaging of wafers and external connection structures to ensure their mechanical and electrical performance. Priority scheduling rules refer to the rules that determine the order of task execution based on the urgency, importance, inventory status, etc. of different tasks. For example, wafers with urgent orders have higher priority.
[0027] After the wafer packaging equipment completes the packaging of the wafer, the packaged wafer is transferred to the warehouse through automated logistics. Furthermore, after the packaging equipment completes the packaging of the wafer, the automated logistics transfers the packaged wafer from the production line to the warehouse for temporary storage without human intervention through tools such as conveyor belts, automatic guided vehicles (AGVs), and robotic arms.
[0028] It should be noted that automated logistics refers to the use of automated equipment (such as automated transportation systems, handling robots, etc.) to carry and deliver materials or products, reduce manual intervention, and improve efficiency. The warehouse is an area for storing packaged wafers, with environmental control and automated management functions to ensure safe storage and rapid retrieval of wafers.
[0029] Based on the intelligent scheduling results, automated logistics picks up packaged wafers from the warehouse and sends them to the inspection area.
[0030] It should be noted that when the wafer is transported to the inspection area, the automated logistics will accurately place the wafer on the inspection platform, ready for subsequent inspection operations. The inspection platform refers to a workbench used to place wafers and perform various inspection operations. The inspection platform is usually equipped with an automatic alignment device to ensure that the wafer remains stable during the inspection process.
[0031] Specifically, high-precision camera multispectral detection combined with AI analysis is used to detect surface defects of packaged wafers, including the following steps: After the packaged wafer is placed on the inspection platform, the high-precision camera performs a multi-spectral scan on the packaged wafer surface to obtain multi-spectral image data. Furthermore, after the packaged wafer is placed on the inspection platform, the high-precision camera is automatically calibrated to ensure that the focal length, angle and exposure time are suitable for the specific type and size of the wafer to avoid image blur and overexposure. Then the packaged wafer surface is multi-spectrally scanned to obtain multi-spectral image data.
[0032] It should be noted that multispectral scanning refers to the technology of imaging the surface of an object using multiple wavelengths of light, usually including visible light, infrared light, ultraviolet light, etc., to obtain detailed features under different spectra. High-precision cameras refer to cameras with high resolution that can accurately capture tiny surface details and are suitable for high-demand scenarios such as industrial inspection.
[0033] The multispectral image data is denoised and enhanced by Gaussian filtering and histogram equalization. Furthermore, after receiving the multispectral image data, the image preprocessing process is automatically started and each image is processed separately. The Gaussian filter algorithm is applied to the image of each band in turn. The standard deviation and window size of the filter are dynamically adjusted according to the complexity of the wafer surface texture and the image noise level to ensure that important details are retained while removing noise. The system applies the histogram equalization algorithm to the denoised images one by one to enhance the image contrast. The equalization operation is automatically adjusted according to the grayscale distribution of the image to ensure that image details (such as surface defects) are more clearly visible.
[0034] It should be noted that Gaussian filtering is a commonly used image processing technology. By using Gaussian functions to smooth images, it can effectively remove noise while retaining the edge information of the image. Histogram equalization is an image enhancement technology that adjusts the grayscale distribution of the image and increases the contrast of the image to make the details more prominent. Denoising refers to reducing the noise in the image through image processing technology to improve the quality and clarity of the image. Enhancement refers to making the key features of the image more obvious by adjusting the contrast, brightness, etc. of the image.
[0035] The feature information of the packaged wafer surface is extracted from the denoised and enhanced multispectral image data by edge detection, threshold segmentation and feature point positioning methods. Furthermore, it is ensured that the image currently used is a multispectral image processed by Gaussian filtering and histogram equalization. Canny edge detection is used to perform edge detection on each channel (such as visible light, infrared, ultraviolet, etc.) in the multispectral image to extract the edge contour of the wafer surface. After the edge extraction of all channels is completed, the system merges the edge information under different spectra. This process ensures that the edge information under all bands is fully utilized by weighted averaging to form a comprehensive edge map. The threshold segmentation operation first adopts the adaptive threshold segmentation method to dynamically adjust the threshold according to the local area characteristics of the image. The pixels in the image are divided into foreground and background according to the adaptive threshold, and the foreground area and background area after binarization are obtained. The connected domain analysis is performed on the binarized foreground area to mark the interconnected areas. The feature point detection of the binarized foreground area is performed by SIFT (Scale Invariant Feature Transform). After the feature points are initially detected, they are filtered according to their intensity and the contrast of the local area, retaining the most significant feature points that are most likely to represent defects. At the same time, the visibility of the feature points is enhanced through interpolation and morphological operations. The coordinates, size, direction and other information of each feature point are recorded to form a set of feature points. Each feature point is associated with its corresponding edge information and connected area information.
[0036] It should be noted that SIFT (Scale Invariant Feature Transform) is suitable for complex surface feature extraction and can find key points at different scales. It is especially suitable for detecting defects of different sizes in the surface.
[0037] The convolutional neural network is trained with a large number of multispectral image data of known good packaged wafers and bad packaged wafers to obtain the wafer multispectral recognition convolutional neural network. Furthermore, a large number of packaged wafer samples are obtained from the production line, including good packaged and bad packaged wafers. Each sample obtains multispectral image data through multispectral scanning. The multispectral images of bad packaged wafers are annotated using annotation tools to mark the location, category and severity of defects. These annotated data will be used as labels for the neural network to guide the model to learn how to distinguish good wafers from bad wafers. The data set is divided into training set, validation set and test set. The training set is used for model training, the validation set is used for parameter adjustment and to prevent overfitting, and the test set is used for the performance of the convolutional neural network model on unseen data. The cross entropy loss function is used as the objective function of the convolutional neural network model. The Adam optimizer (adaptive momentum optimizer) is used to update the parameters of the convolutional neural network model. After training, the wafer multispectral recognition convolutional neural network is finally obtained.
[0038] The wafer multi-spectral recognition convolutional neural network combines the characteristic information of the packaged wafer surface to obtain the detection results of the packaged wafer surface. Furthermore, the characteristic information of the packaged wafer surface is input into the wafer multi-spectral recognition convolutional neural network, and then the wafer multi-spectral recognition convolutional neural network locates the defect area according to the activation map for the wafer with poor packaging, marks the defect location with a bounding box or contour line, and attaches the defect category (such as cracks, scratches, etc.). Generate an inspection report, which includes the wafer status (good packaging or bad packaging), defect type (if there is a defect, list the defect type), and defect location (the specific coordinates or area of the defect on the wafer).
[0039] Using terahertz imaging and X-ray combined with AI technology, the internal structure of the packaged wafer solder joints is detected to identify voids, cracks and welding quality defects, including the following steps: The terahertz imaging device detects the surface structure of the packaged wafer solder joints and extracts the morphological information of the solder joints. Furthermore, the packaged wafer is placed in the terahertz imaging device, which emits terahertz waves and receives reflected waves to scan the surface structure of the wafer solder joints. By analyzing the reflected signals, the morphological information of the solder joints, such as the solder joint contour, surface defects (such as protrusions and depressions), and other data, is extracted.
[0040] X-ray inspection equipment analyzes the inside of the solder joint to identify voids, cracks and welding quality defects. The packaged wafer is placed in a terahertz imaging device and an X-ray detection device for scanning to obtain terahertz imaging and X-ray data. Furthermore, the packaged wafer is placed in an X-ray detection device, and X-rays are used to penetrate the solder joints to obtain structural information inside the solder joints. The equipment detects the attenuation of X-rays and identifies defects such as cavities and cracks inside the solder joints. Through 3D imaging technology, a detailed structural diagram of the solder joint is generated to analyze the welding quality and identify potential structural problems.
[0041] Terahertz imaging and X-ray data are annotated to obtain labeled training data sets. Furthermore, by annotating terahertz and X-ray data, key features in solder joints, such as surface defects, internal voids, cracks, etc., are annotated. Each data sample will be labeled to indicate the defect type or welding quality of the solder joint, generating a labeled training data set for training AI models.
[0042] Through supervised learning, deep learning training is performed on the labeled training data set using convolutional neural networks to obtain AI technology for solder joint detection. Furthermore, the labeled terahertz and X-ray data sets are input into the convolutional neural network, and the model is trained using supervised learning. The convolutional neural network will automatically learn the characteristics of the surface morphology and internal defects of the solder joints, and associate the characteristics with the labels. Through multiple rounds of iterations and adjustment of network parameters, an AI model capable of detecting solder joint defects is finally obtained, which has high detection accuracy and reliability.
[0043] The terahertz imaging and X-ray data are fused and combined with solder joint detection AI technology to obtain the solder joint detection results of the packaged wafer. Furthermore, the terahertz imaging data and X-ray data are integrated through multimodal fusion technology, combined with the previously trained solder joint detection AI model, to perform reasoning analysis on the new data. The AI model will automatically identify the surface and internal defects of the solder joint based on the input multimodal data, and output the solder joint detection results, including the defect type, location and welding quality evaluation report.
[0044] It should be noted that terahertz imaging is a non-contact, non-destructive imaging technology that uses the terahertz band (frequency range is about 0.1 to 10 THz, between microwaves and infrared light) to detect the internal or surface structure of an object. Because terahertz waves have strong penetrability (can penetrate certain non-metallic materials such as plastics, ceramics and semiconductor materials), they are widely used in the fields of detecting electronic devices and packaging wafers. In wafer solder joint inspection, terahertz imaging can effectively obtain surface morphological information of solder joints, such as surface cracks, uneven defects, and thus provide detailed data of the surface structure for solder joint inspection.
[0045] Specifically, the packaged wafer is electrically inspected using a flexible probe and intelligently located using AI, including the following steps: A programmable flexible probe array is composed of multiple flexible probes that automatically adjust the position and pressure through electronic control. Furthermore, the flexible probe array is composed of multiple probes that can be controlled electronically, and the position and contact pressure of the probes can be automatically adjusted as needed. The probes are made of flexible materials to ensure that they can adapt to package wafers of different shapes. Through a programmable controller, the probes can be accurately aligned with the electrical contacts of the wafer to ensure stable contact, which is suitable for various package sizes and forms.
[0046] The programmable flexible probe array contacts each electrical contact of the packaged wafer to detect the resistance, voltage, current, impedance, conductivity, leakage current, capacitance, frequency response and noise of each electrical contact of the packaged wafer. Furthermore, the packaged wafer is placed in the detection position of the flexible probe array, and the probes are automatically aligned with the electrical contacts of the wafer. The probe array makes each probe contact with the corresponding electrical contact through precise control, detects and measures multiple key electrical parameters of the electrical contacts, including resistance, voltage, current, impedance, conductivity, leakage current, capacitance, frequency response and noise. The detection process collects data in real time and transmits it to the processing unit.
[0047] The electrical parameters are resistance, voltage, current, impedance, continuity, leakage current, capacitance, frequency response and noise of each electrical junction.
[0048] The feature dimension reduction is performed through principal component analysis, and the support vector machine with radial basis function kernel is used for training to obtain the fault location AI. Furthermore, in order to simplify the complex electrical parameter data set, the data is firstly reduced in dimension using principal component analysis to retain the most representative features in the data and remove redundant information. Next, the reduced-dimensional features are input into the support vector machine with radial basis function kernel for training. Through supervised learning, the support vector machine with radial basis function kernel learns how to identify fault modes and finally generates an AI model that can detect and locate faults.
[0049] Fault location AI analyzes electrical parameters, performs intelligent fault location, determines the specific area where the problem occurs, and obtains the electrical test results of the packaged wafer. Furthermore, in the inference stage, the fault location AI analyzes the newly measured electrical parameters. The AI model identifies potential faults and locates the specific fault area based on the characteristic patterns of the electrical parameters. These analysis results include the fault type and location, and ultimately output the electrical test results of the wafer to help further decision-making, such as whether it needs to be reworked or repackaged.
[0050] It should be noted that the support vector machine with radial basis function kernel is a powerful machine learning algorithm, which is particularly good at handling nonlinear classification problems. The support vector machine separates different categories of data by finding the best decision boundary (hyperplane). The radial basis function kernel is a commonly used kernel function that maps the input data from the original space to the high-dimensional feature space, so that the originally linearly inseparable data becomes separable in the high-dimensional space. The advantage of the radial basis function kernel is that it can handle complex patterns and boundaries, is suitable for high-dimensional data, and performs well in the classification and fault detection of nonlinear features such as electrical parameters.
[0051] Specifically, the thermal cycle test is performed to simulate extreme temperature changes and monitor thermal stress in real time, including the following steps: Place the packaged wafer in a thermal cycle tester and set the temperature range and number of cycles. Going a step further, place the packaged wafer in a thermal cycle tester and set the upper and lower temperature limits and number of cycles. The temperature range usually simulates the extreme temperature changes in the actual use environment, such as from very low temperature (-40°C) to very high temperature (+125°C). The number of cycles determines how many times the wafer goes through the heating and cooling process. After the settings are completed, the equipment starts to automatically perform the thermal cycle test.
[0052] To simulate extreme temperature changes, the temperature is raised and lowered alternately. The stress changes of the wafer during the temperature change process are monitored in real time through strain gauges, and the stress change data in each cycle are recorded. Furthermore, during the thermal cycle test, the equipment will alternately heat up and cool down to simulate temperature changes in extreme environments. By connecting the strain gauge, the stress changes of the wafer during temperature changes are monitored in real time. During each temperature cycle, the strain gauge will record the stress distribution and stress change data inside the wafer, especially the stress changes of the solder joints and packaging structures. These data are used to evaluate the impact of thermal cycles on the structural integrity of the wafer.
[0053] After the thermal cycle test, the packaged wafers are subjected to surface inspection, solder joint inspection and electrical inspection again to obtain the thermal cycle test results of the packaged wafers. Furthermore, after the thermal cycle test is completed, the wafers are taken out of the equipment and subjected to multiple inspections. First, a surface inspection is performed to check whether there is any appearance damage or package cracks. Subsequently, a solder joint inspection is performed to check whether the morphology and internal structure of the solder joints are damaged by thermal stress. Finally, an electrical inspection is performed to measure the resistance, voltage, leakage current and other parameters of the electrical contacts to ensure that their electrical performance has not been degraded due to thermal cycles. Finally, a thermal cycle test result report is output.
[0054] It should be noted that thermal cycle testing is designed to evaluate the reliability and structural integrity of packaged wafers under extreme temperature changes. By simulating extreme temperature environments in the real world (such as repeated cycles from low to high temperatures), the aging process of wafer packaging materials and solder joints can be accelerated in a short period of time, revealing potential structural problems and defects. By using strain gauges to monitor the stress changes of wafers during temperature changes in real time, we can fully understand the response of the package and solder joints under thermal stress, especially to detect problems such as solder joint cracking and package damage. Subsequent surface inspection, solder joint inspection, and electrical inspection help confirm whether the wafer still maintains functional integrity after thermal cycling. The importance of this test lies in the ability to detect possible failure modes in advance, ensure the reliability and life of the wafer in the actual use environment, and help improve product quality and reduce the risk of failure.
[0055] Specifically, AI is used to optimize the temperature curve and atmosphere control to simulate multiple reflow soldering processes, including the following steps: Collect a large amount of historical data covering different types of wafers and their optimal welding parameters, use the historical data of the optimal welding parameters to train the neural network, and obtain the temperature curve AI algorithm. Furthermore, collect the optimal welding parameters of different types of wafers, including historical data such as heating time, temperature, and atmosphere. Input this data into the neural network for training, so that it can learn the best matching relationship between wafer type and welding parameters, and generate an AI algorithm model that can predict the optimal temperature curve to ensure the accuracy and reliability of the welding process.
[0056] Based on the type and size of the wafer package, the temperature curve AI algorithm analyzes historical welding data to generate the optimal temperature curve. Furthermore, after inputting the type and size information of the packaged wafer, the temperature curve AI algorithm generates the optimal temperature curve by analyzing historical welding data. The curve contains specific temperature control parameters for each stage of heating, constant temperature, and cooling, ensuring that the temperature distribution and time control during the welding process achieve the optimal effect and achieve high-quality welding.
[0057] The generated optimal temperature curve is used to simulate the reflow soldering process in the simulation environment. Furthermore, the generated optimal temperature curve is imported into the simulation environment to simulate the temperature changes during the soldering process. The heating and cooling processes are precisely controlled according to the temperature curve, the environment and behavior during actual reflow soldering are simulated, and the temperature management during the soldering process is evaluated to determine whether it is appropriate, and possible soldering defects can be predicted in advance.
[0058] During the reflow soldering process, the temperature sensor monitors the soldering temperature in real time, and dynamically adjusts the atmosphere control according to the real-time monitoring of the soldering temperature. Furthermore, during the actual reflow soldering process, the temperature sensor monitors the change of the soldering temperature in real time. If the temperature deviates from the set range, the system automatically adjusts the atmosphere control according to the sensor data, such as adjusting the gas flow or gas composition, to ensure that the soldering temperature always meets the optimal temperature curve and avoid poor soldering or defects.
[0059] The real-time welding temperature curve and welding results of each welding are recorded, and the surface inspection, solder joint inspection and electrical inspection are performed again on the packaged wafer after the reflow soldering simulation to obtain the reflow soldering simulation results of the packaged wafer. Through surface inspection, solder joint inspection and electrical inspection, the welding effect in the reflow soldering simulation is confirmed, and the reflow soldering result report of the wafer is output.
[0060] It should be noted that the wafer welding process is optimized through AI algorithms, aiming to improve welding quality and efficiency. By collecting a large amount of historical data, the neural network can learn the optimal welding parameters for different types of wafers and generate personalized optimal temperature curves. This ensures that during the reflow soldering process, the temperature distribution and control time achieve the best results and avoid the occurrence of welding defects. In addition, the simulation and real-time temperature monitoring of the simulation environment can identify potential problems in advance, and further optimize the welding conditions by dynamically adjusting the atmosphere control. Finally, the surface, solder joint and electrical inspections are combined to ensure that the quality of the wafer after welding meets the standards. The overall process improves welding accuracy, reduces defect rates and optimizes production processes through the application of AI and data-driven feedback iteration.
[0061] Specifically, the AI-driven sorting strategy is obtained by collecting detection data, extracting key sorting features, and training classification models, including the following steps: The inspection results of the packaged wafer surface, the packaged wafer solder joint inspection results, the packaged wafer electrical inspection results, the packaged wafer thermal cycle test results and the packaged wafer reflow soldering simulation results are collected as inspection data.
[0062] Extract defect type features, defect location features, defect size features and defect severity level features from the inspection results of the packaged wafer surface. Furthermore, analyze the wafer surface inspection results to extract relevant feature information of surface defects. Including: defect type (such as cracks, scratches, etc.), precise coordinates of defect location, defect size (such as length, width, etc.) and defect severity (mild, medium or severe), providing key data for surface quality assessment.
[0063] Extract void size features, crack depth features, solder distribution features, and solder defect severity features from the solder joint inspection results of packaged wafers. Furthermore, process the solder joint inspection data to extract solder defect-related features. These include: void size (such as diameter or volume), crack depth and length, solder distribution uniformity, and solder defect severity (such as minor, severe). These features are used to evaluate solder joint quality and its impact on wafer function.
[0064] The short circuit position, open circuit position and high resistance area position are extracted from the electrical inspection results of the packaged wafer as the key features for sorting the electrical inspection results. Furthermore, the electrical inspection results are analyzed to extract key feature information. This includes the specific location of the short circuit, the precise location of the open circuit, and the location of the high resistance area. Through these features, the failed electrical contacts can be effectively sorted out, and the impact of these defects on the overall electrical performance of the wafer can be evaluated to help determine whether the wafer is qualified.
[0065] Extract stress change curve features, stress distribution features, and stress extreme value features from the thermal cycle test results of packaged wafers. Furthermore, extract stress-related features from the thermal cycle test data. These include the curve shape of stress change, which reveals the stress response of the wafer in temperature fluctuations; the stress distribution features, which show the stress concentration area; and the stress extreme value features, which reflect the maximum stress value. Through these features, evaluate the impact of thermal cycling on the wafer structure.
[0066] Extract soldering defect features from the reflow soldering simulation results of packaged wafers. Furthermore, analyze the results of reflow soldering simulation to extract defect features generated during the soldering process. These include the type, size, and distribution of defects such as incomplete solder melting, solder joint offset, and solder cracks. These features help evaluate the stability of the soldering process and the reliability of solder joints, ensuring that the soldering quality meets the requirements.
[0067] Based on the collected inspection data and extracted features, information gain is used as the feature selection criterion, and cost complexity pruning is used to train the decision tree to obtain an AI-driven sorting strategy. Furthermore, the extracted features are screened using information gain to select the most valuable features for wafer sorting. Subsequently, based on the screened features, a decision tree model is used for training, and cost complexity pruning is used to optimize the model to avoid overfitting. Finally, an AI-driven sorting strategy is generated to automatically determine whether the wafer is qualified or not.
[0068] It should be noted that by collecting multiple inspection results of packaged wafers, key features related to defects, such as surface defects, solder joint quality, electrical performance, etc., are extracted, the most valuable features are screened using information gain, and AI-driven sorting strategies are generated through decision tree models. Its significance lies in improving sorting efficiency and accuracy through data-driven automated analysis, ensuring that wafer quality control can be more accurate and reliable, reducing human intervention and errors in the production process, and improving the automation level of the overall production line.
[0069] Specifically, according to the wafer packaging inspection results and AI-driven sorting strategy, high-precision automatic wafer sorting is performed by a flexible manipulator, including the following steps: The flexible robot combines with high-precision cameras, torque sensors, distance sensors, tactile sensors and suction cups to determine the specific position and arrangement of the packaged wafers after inspection, and automatically adjusts the gripping force and angle through the flexible robot control unit.
[0070] According to the AI-driven sorting strategy and flexible manipulator, the packaged wafers are classified and sorted. Furthermore, according to the AI-driven sorting strategy, the flexible manipulator automatically performs the sorting task. The manipulator classifies the wafers into different sorting areas, such as qualified products, unqualified products, or products for further inspection, based on the defect type identified by AI and the inspection results of the wafers. The flexible design of the manipulator ensures that it can adapt to wafers of different sizes and shapes, ensuring efficient and accurate sorting operations.
[0071] Adjust the sorting strategy in real time to adapt to different defect types and characteristics of packaged wafers. Furthermore, during the sorting process, the sorting strategy is dynamically adjusted according to the defect types detected in real time and the characteristics of the wafers (such as size, material, packaging method, etc.). The flexible manipulator adjusts its movements and paths according to the updated sorting strategy to ensure adaptive sorting of wafers with different types of defects to improve sorting accuracy and efficiency.
[0072] It should be noted that through the combination of AI and sensor technology, an efficient and automated sorting process has been achieved, which can adapt to the characteristics of different wafers, reduce human operation errors, improve sorting accuracy and production efficiency, and ensure product quality consistency.
[0073] Specifically, storing the detection data and performing historical data analysis includes the following steps: The test data is formatted and uploaded to the cloud platform through data transmission protocols and API interfaces. Furthermore, the raw data obtained from various tests is formatted and unified into a compatible standard format. The formatted test data is uploaded to the cloud platform through preset data transmission protocols (such as HTTP, MQTT, etc.) and API interfaces to ensure the security and integrity of data transmission and prepare for subsequent analysis and storage.
[0074] Integrate big data analysis and storage functions on the cloud platform. Furthermore, integrate big data analysis modules and storage modules on the cloud platform. The storage module is responsible for long-term storage of uploaded test data and provides an efficient query access interface; the big data analysis module processes massive data and supports complex data mining, statistical analysis, and machine learning model training, providing technical support for trend analysis.
[0075] Use big data analysis to perform trend analysis on the test data and obtain trend analysis results. Furthermore, perform big data analysis on the test data uploaded to the cloud platform to identify patterns and change trends in the data. By analyzing the test results in different time periods, evaluate the change trends of wafer packaging, welding and electrical performance, predict potential quality problems or room for improvement, and generate trend analysis results for user reference.
[0076] The trend analysis results are combined with existing visualization tools for visualization. Furthermore, the trend results of big data analysis are combined with visualization tools (such as charts, dashboards, etc.) to generate intuitive visualization. The graphical interface displays the change trend, anomalies and prediction results of the detection data, helping users to quickly understand the problems and trends behind the data, and supporting decision-making and process optimization.
[0077] In summary, the present invention realizes all-round, high-precision, high-speed quality inspection and intelligent sorting of packaged wafers by integrating advanced optical inspection, electrical testing and artificial intelligence technology. The system can effectively identify quality problems such as poor solder joints, surface defects, and internal structural abnormalities, significantly improving the accuracy and efficiency of inspection and reducing errors caused by manual operations. At the same time, with the help of AI algorithms to conduct in-depth analysis of inspection data, the inspection parameters and sorting strategies can be automatically adjusted to optimize the production process, improve the yield rate, and reduce waste generation. In addition, the system is highly flexible and scalable, can adapt to the packaging needs of wafers of different specifications and types, supports multi-variety small-batch production modes, and provides strong technical support for semiconductor manufacturers, which will help promote technological progress and industrial upgrading in the entire industry.
[0078] Example 2, referring to Table 1, is the second example of the present invention. To further verify the technical solution of the present invention, experimental simulation data of an automated wafer packaging inspection and sorting system are provided.
[0079] The system automatically retrieves packaged wafers from the warehouse and transfers them to the inspection area through integrated automated logistics and intelligent scheduling modules. High-precision cameras perform multi-spectral scanning on the wafer surface and use AI technology to identify surface defects (such as cracks, scratches, etc.). Then, terahertz imaging and X-ray detection equipment combined with AI technology are used to detect defects such as voids and cracks in the internal structure of the solder joint. Subsequently, the flexible probe array performs electrical inspection on the wafer, measures key electrical parameters such as resistance and voltage, and identifies short and open circuit locations through AI intelligent fault location tools. In addition, the wafer is placed in a thermal cycle test device, and the temperature range (-40°C to +125°C) and the number of cycles (500 times) are set. The stress distribution of the wafer during temperature changes is monitored in real time through strain gauges. Finally, the wafer is simulated for multiple reflow soldering cycles through AI-optimized temperature curves and atmosphere control, the soldering temperature is monitored in real time, and the atmosphere control is dynamically adjusted based on sensor data to ensure that there are no quality defects during the soldering process.
[0080] During the entire experiment, the system automatically performs sorting tasks. The AI-driven sorting strategy combines various test data to automatically determine whether the wafer is qualified or not, and classifies the wafers into different sorting areas, such as qualified products, unqualified products, or products to be further tested, through flexible manipulators. All test data and sorting results are stored and uploaded to the cloud platform for historical data analysis.
[0081] The details are shown in Table 1 below: Table 1 Wafer packaging inspection and sorting system experimental data table Parameter name Wafer A Wafer B Wafer C Wafer D Wafer E Wafer F Surface defect type Scratches none crack Scratches none crack Solder joint void size (µm) 10 5 25 12 7 30 Solder crack depth (µm) 2 0 8 3 0 10 Resistance (Ω) 0.13 0.21 0.15 0.18 0.25 0.32 Voltage (V) 3.3 3.3 3.2 3.3 3.3 3.1 Maximum stress value (MPa) 122 113 151 137 108 162 Thermal cycle times 500 500 500 500 500 500 in conclusion qualified qualified Failure qualified qualified Failure Through the above experimental data, it can be clearly seen that the automated wafer packaging inspection and sorting system of the present invention has innovations and advantages in the inspection and sorting process.
[0082] In surface defect detection, the system effectively identified surface defects such as scratches and cracks on wafers A, C, D, and F, with significantly better accuracy than traditional manual detection methods. Secondly, in terms of solder joint detection, the depth of solder joint voids and cracks on wafers C and F far exceeded that of other samples, indicating that this system can effectively identify internal welding defects through terahertz imaging and X-ray detection, and combined with the deep learning capabilities of AI technology, it greatly improves the accuracy of detection and the efficiency of defect identification. In addition, the electrical detection results of the flexible probe showed that the resistance and voltage data of wafers A, C, and F deviated from the normal range, especially the resistance of wafer F reached 0.3Ω, indicating that there may be an electrical fault. The system quickly located the problem area through the AI intelligent fault location tool.
[0083] In the thermal cycle test, the stress data monitored by the system showed that the maximum stress values of wafers C and F were high (150MPa and 160MPa, respectively), significantly higher than other samples, and after 500 thermal cycles, the defects on the surface and solder joints of wafers C and F were further aggravated, and they were ultimately judged to be unqualified. Compared with traditional manual inspection and sorting methods, this system can comprehensively and automatically inspect the surface, solder joints, electrical performance and other aspects of the wafer, and achieve high-precision sorting through AI-driven strategies, which greatly improves production efficiency and reduces human errors. At the same time, the quality control of wafers is more accurate, reflecting the creativity and novelty of the invention.
[0084] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.
Claims
1. An automated wafer packaging inspection and sorting system, characterized in that: include, Surface inspection module, which detects surface defects of packaged wafers through high-precision camera multispectral detection combined with AI analysis; Solder joint inspection module, which uses terahertz imaging and X-ray combined with AI technology to inspect the internal structure of packaged wafer solder joints; The electrical inspection module is used to perform electrical inspection on packaged wafers using flexible probes and intelligently locate faults using AI. Thermal cycle detection module, used to simulate extreme temperature changes for thermal cycle testing and monitor thermal stress in real time; Reflow soldering test module, which uses AI to optimize temperature curve and atmosphere control to simulate multiple reflow soldering processes; The sorting strategy acquisition module is used to obtain AI-driven sorting strategies by collecting detection data, extracting key sorting features, and training classification models; Wafer sorting module, which is used to automatically sort wafers with high precision through a flexible manipulator based on wafer packaging inspection results and AI-driven sorting strategies; The data analysis storage module is used to store wafer packaging inspection results and perform historical data analysis.
2. The automated wafer packaging inspection and sorting system according to claim 1, characterized in that: High-precision camera multi-spectral detection combined with AI analysis can be used to detect surface defects of packaged wafers. The specific steps are as follows: After the packaged wafer is placed on the inspection platform, a high-precision camera performs multispectral scanning on the surface of the packaged wafer to obtain multispectral image data; Multispectral image data were denoised and enhanced by Gaussian filtering and histogram equalization; The feature information of the packaged wafer surface is extracted from the denoised and enhanced multispectral image data through edge detection, threshold segmentation and feature point positioning methods; The convolutional neural network is trained by multispectral image data of a large number of known well-packaged wafers and badly-packaged wafers to obtain a wafer multispectral recognition convolutional neural network. The wafer multi-spectral recognition convolutional neural network combines the characteristic information of the packaged wafer surface to obtain the detection results of the packaged wafer surface.
3. The automated wafer packaging inspection and sorting system as claimed in claim 2, characterized in that: To perform terahertz imaging and X-ray detection, the specific steps are as follows: The terahertz imaging device detects the surface structure of the packaged wafer solder joints and extracts the morphological information of the solder joints; X-ray inspection equipment analyzes the inside of the solder joint to identify voids, cracks and welding quality defects; The packaged wafer is placed in a terahertz imaging device and an X-ray detection device for scanning to obtain terahertz imaging and X-ray data.
4. The automated wafer packaging inspection and sorting system as claimed in claim 3, characterized in that: Based on terahertz imaging and X-ray data combined with AI technology, the internal structure of the packaged wafer solder joints is detected. The specific steps are as follows: Annotate terahertz imaging and X-ray data to obtain labeled training data sets; Through supervised learning, a convolutional neural network is used to perform deep learning training on a labeled training data set to obtain AI technology for solder joint detection. The terahertz imaging and X-ray data are fused and combined with solder joint detection AI technology to obtain the solder joint detection results of the packaged wafers.
5. The automated wafer packaging inspection and sorting system as claimed in claim 4, characterized in that: The packaged wafers are electrically inspected using flexible probes and intelligently located using AI. The specific steps are as follows: A programmable flexible probe array is composed of multiple flexible probes that automatically adjust positions and pressures through electronic control; The programmable flexible probe array contacts each electrical contact of the packaged wafer to detect the resistance, voltage, current, impedance, conductivity, leakage current, capacitance, frequency response and noise of each electrical contact of the packaged wafer; Resistance, voltage, current, impedance, continuity, leakage current, capacitance, frequency response and noise of each electrical contact as electrical parameters; Feature dimension reduction is performed through principal component analysis, and support vector machines with radial basis function kernels are trained to obtain fault location AI; Fault location AI analyzes electrical parameters, performs intelligent fault location, determines the specific area where the problem occurs, and obtains electrical test results for packaged wafers.
6. The automated wafer packaging inspection and sorting system as claimed in claim 5, characterized in that: Simulate extreme temperature changes to conduct thermal cycle tests and monitor thermal stress in real time. The specific steps are as follows: Place the packaged wafer in a thermal cycle test device and set the temperature change range and cycle number; Simulate extreme temperature changes, alternately heat up and cool down, monitor the stress changes of the wafer in real time during the temperature change process through strain gauges, and record the stress change data in each cycle; After the thermal cycle test, the packaged wafers are subjected to surface inspection, solder joint inspection and electrical inspection again to obtain the thermal cycle test results of the packaged wafers.
7. The automated wafer packaging inspection and sorting system as claimed in claim 6, characterized in that: AI is used to optimize the temperature curve and atmosphere control to simulate multiple reflow soldering processes. The specific steps are as follows: Collect a large amount of historical data covering different types of wafers and their optimal welding parameters, use the historical data of optimal welding parameters to train the neural network and obtain the temperature curve AI algorithm; Based on the type and size of the wafer package, the temperature curve AI algorithm analyzes historical welding data to generate the optimal temperature curve; Using the generated optimal temperature curve, simulate the reflow process in a simulation environment; During the reflow soldering process, the soldering temperature is monitored in real time through the temperature sensor, and the atmosphere control is dynamically adjusted according to the real-time monitored soldering temperature; The real-time welding temperature curve and welding results of each welding are recorded, and the packaged wafers after the reflow soldering simulation are subjected to surface inspection, solder joint inspection and electrical inspection again to obtain the reflow soldering simulation results of the packaged wafers.
8. The automated wafer packaging inspection and sorting system as claimed in claim 7, characterized in that: By collecting inspection data, extracting key sorting features, and training classification models, AI-driven sorting strategies are obtained. The specific steps are as follows: Collecting inspection results of the surface of the packaged wafer, inspection results of the solder joints of the packaged wafer, electrical inspection results of the packaged wafer, thermal cycle test results of the packaged wafer, and reflow soldering simulation results of the packaged wafer as inspection data; Extracting defect type features, defect location features, defect size features, and defect severity level features from the inspection results of the packaged wafer surface; Extract void size features, crack depth features, solder distribution features and solder defect severity level features from the solder joint inspection results of packaged wafers; Extracting short circuit locations, open circuit locations and high resistance area locations from the electrical inspection results of packaged wafers as key features for sorting electrical inspection results; Extract stress variation curve characteristics, stress distribution characteristics and stress extreme value characteristics from the thermal cycle test results of packaged wafers; Extracting soldering defect features from reflow soldering simulation results of packaged wafers; Based on the collected detection data and extracted features, information gain is used as the feature selection criterion, and cost-complexity pruning is adopted to train the decision tree to obtain the AI-driven sorting strategy.
9. The automated wafer packaging inspection and sorting system as claimed in claim 8, characterized in that: According to the wafer packaging inspection results and AI-driven sorting strategy, the flexible robot is used to automatically sort the wafers with high precision. The specific steps are as follows: The flexible manipulator combines with high-precision cameras, torque sensors, distance sensors, tactile sensors and suction cups to determine the specific position and arrangement of the packaged wafers after inspection, and automatically adjusts the gripping force and angle through the flexible manipulator control unit; Classify and sort packaged wafers based on AI-driven sorting strategies and flexible manipulators; Adjust sorting strategies in real time to accommodate different defect types and packaged wafer characteristics.
10. The automated wafer packaging inspection and sorting system according to claim 9, wherein: Store test data and perform historical data analysis. The specific steps are as follows: Format the test data and upload it to the cloud platform through data transmission protocol and API interface; Integrate big data analysis and storage functions on the cloud platform; Use big data analysis to perform trend analysis on the test data and obtain trend analysis results; The trend analysis results are combined with existing visualization tools for visual display.
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