Hybrid bonding structure, manufacturing method thereof and semiconductor device

Abstract

The invention discloses a hybrid bonding structure, a manufacturing method thereof and a semiconductor device. The hybrid bonding structure comprises a dielectric layer, wherein the dielectric layer comprises a first dielectric layer and a second dielectric layer which are arranged in a bonding manner; the bonding interface layer is located between the first dielectric layer and the second dielectric layer; the metal structure is located in the dielectric layer; and the diffusion barrier layer is located in the dielectric layer, and the bonding interface layer is separated by the diffusion barrier layer. The hybrid bonding structure can improve the performance of the device.

Description

Technical Field

[0001] The embodiments of the present disclosure relate to the field of semiconductor technology, and in particular to a hybrid bonding structure and a manufacturing method thereof, and a semiconductor device. Background Art

[0002] Wafer bonding technology is one of the key technologies for realizing three-dimensional integrated circuits. Among them, hybrid bonding technology can realize the internal connection of thousands of chips, greatly improving chip performance, saving area and reducing costs.

[0003] However, hybrid bonding methods present the risk of metal diffusion. Summary of the invention

[0004] According to a first aspect of an embodiment of the present disclosure, a hybrid bonding structure is provided, including:

[0005] The dielectric layer comprises a first dielectric layer and a second dielectric layer which are bonded together;

[0006] A bonding interface layer, located between the first dielectric layer and the second dielectric layer;

[0007] A metal structure located in the dielectric layer;

[0008] A diffusion barrier layer is located in the dielectric layer, and the diffusion barrier layer separates the bonding interface layer.

[0009] In some embodiments, the diffusion barrier layer surrounds the metal structure.

[0010] In some embodiments, the thickness of the bonding interface layer is less than the thickness of the diffusion barrier layer.

[0011] In some embodiments, the metal structure includes a first metal structure and a second metal structure, the diffusion barrier layer is located between the first metal structure and the second metal structure, and the distance from the diffusion barrier layer to the first metal structure is different from the distance from the diffusion barrier layer to the second metal structure.

[0012] In some embodiments, the diffusion barrier layer includes a first diffusion barrier layer and a second diffusion barrier layer, the first diffusion barrier layer surrounds the first metal structure, and the second diffusion barrier layer surrounds the second metal structure;

[0013] Wherein, a distance between the first diffusion barrier layer and the second diffusion barrier layer is greater than a distance between the first diffusion barrier layer and the first metal structure.

[0014] In some embodiments, the first diffusion barrier layer comprises:

[0015] Lower barrier layer;

[0016] an upper barrier layer, located on the lower barrier layer;

[0017] Wherein, no bonding reaction occurs between the upper barrier layer and the lower barrier layer.

[0018] In some embodiments, the orthographic projection area of ​​the lower barrier layer is located within the orthographic projection area of ​​the upper barrier layer.

[0019] In some embodiments, the lower barrier layer of the first diffusion barrier layer is located in the first dielectric layer, and the upper barrier layer of the first diffusion barrier layer is located in the second dielectric layer; the lower barrier layer of the second diffusion barrier layer is located in the second dielectric layer, and the upper barrier layer of the second diffusion barrier layer is located in the first dielectric layer.

[0020] In some embodiments, the lower barrier layer includes one of a metal barrier layer and an insulating barrier layer, and the upper barrier layer is the other of the metal barrier layer and the insulating barrier layer.

[0021] In some embodiments, the thickness of the upper barrier layer is greater than the thickness of the lower barrier layer.

[0022] In some embodiments, a top surface of the upper barrier layer contacts the lower barrier layer, and a nitrogen concentration at a bottom of the upper barrier layer is less than a nitrogen concentration at a top of the upper barrier layer.

[0023] According to a second aspect of an embodiment of the present disclosure, a method for manufacturing a hybrid bonding structure is provided, comprising:

[0024] Providing a first dielectric layer, wherein the first dielectric layer has a lower metal structure and a lower barrier layer;

[0025] Providing a second dielectric layer, wherein the second dielectric layer has an upper metal structure and an upper barrier layer;

[0026] Bonding the first dielectric layer and the second dielectric layer, and bonding the upper metal structure and the lower metal structure to form a dielectric layer and a metal structure respectively;

[0027] In the bonding process, a bonding interface layer is formed in the first dielectric layer and the second dielectric layer; the upper barrier layer and the lower barrier layer are in contact to form a diffusion barrier layer, and the diffusion barrier layer separates the bonding interface layer.

[0028] In some embodiments, during the bonding process, no bonding reaction occurs between the upper barrier layer and the lower barrier layer.

[0029] In some embodiments, the step of forming the lower barrier layer includes:

[0030] forming a trench in the first dielectric layer surrounding the lower metal structure;

[0031] A diffusion barrier material is filled in the trench to form the lower barrier layer.

[0032] In some embodiments, the step of forming the upper barrier layer includes:

[0033] forming a trench surrounding the upper metal structure in the second dielectric layer;

[0034] Filling a diffusion barrier material in the trench to form the upper barrier layer;

[0035] The nitrogen concentration at the top of the upper barrier layer is greater than the nitrogen concentration at the bottom of the upper barrier layer.

[0036] According to a third aspect of an embodiment of the present disclosure, a semiconductor device is provided, which includes the above-mentioned hybrid bonding structure.

[0037] In summary, the embodiments of the present disclosure provide a hybrid bonding structure and a manufacturing method thereof, and a semiconductor device. The dielectric layer of the hybrid bonding structure has a diffusion barrier layer, which separates the bonding interface layer. When metal atoms diffuse in the bonding interface layer, the diffusion barrier layer can prevent the metal atoms from further diffusing along the bonding interface layer, thereby reducing the risk caused by the diffusion of metal atoms. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 is a schematic diagram of a hybrid bonding structure according to an exemplary embodiment;

[0039] Figure 2 According to an exemplary embodiment, Figure 1 An enlarged schematic diagram of the dashed box in the middle;

[0040] Figure 3 According to an exemplary embodiment, Figure 1 A simplified top view of the hybrid bonding structure.

[0041] Figure 4 is a schematic diagram of multiple metal structures according to an exemplary embodiment;

[0042] Figure 5 According to an exemplary embodiment, Figure 4 A simplified top view of the hybrid bonding structure.

[0043] Figure 6 is another schematic diagram showing a plurality of metal structures according to an exemplary embodiment;

[0044] Figure 7 According to an exemplary embodiment, Figure 6 A simplified top view of the hybrid bonding structure.

[0045] Figure 8 According to an exemplary embodiment, Figure 4 Schematic diagram of the diffusion barrier layer;

[0046] Fig. 9 According to an exemplary embodiment, Figure 6 Schematic diagram of the diffusion barrier layer;

[0047] Fig.10 is another schematic diagram of a diffusion barrier layer according to an exemplary embodiment;

[0048] Fig.11 is another schematic diagram of a diffusion barrier layer according to an exemplary embodiment;

[0049] Fig.12 is a schematic diagram of a method for manufacturing a hybrid bonding structure according to an exemplary embodiment;

[0050] Fig.13 is a schematic diagram of a first dielectric layer according to an exemplary embodiment;

[0051] Fig.14 According to an exemplary embodiment, Fig.13 A brief top view of

[0052] Fig.15 is a schematic diagram showing a lower barrier layer and a lower metal structure according to an exemplary embodiment;

[0053] Fig.16 is a schematic diagram showing a bonding process of a first dielectric layer and a second dielectric layer according to an exemplary embodiment;

[0054] Fig.17 is an initial schematic diagram of a hybrid bonding structure according to an exemplary embodiment;

[0055] Fig.18 is a schematic diagram of a blocking groove according to an exemplary embodiment;

[0056] Fig.19 According to an exemplary embodiment, Fig.18 A brief top view of

[0057] Fig. 20 is a schematic diagram showing a diffusion barrier layer according to an exemplary embodiment;

[0058] Fig.21 is a schematic diagram showing a semiconductor device according to an exemplary embodiment; DETAILED DESCRIPTION

[0059] The technical solution of the present disclosure will be further described in detail below in conjunction with the accompanying drawings and embodiments. Although the exemplary implementation methods of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the implementation methods described here. On the contrary, these implementation methods are provided in order to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0060] The present disclosure is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. The advantages and features of the present disclosure will become more apparent from the following description and claims. It should be noted that the drawings are in very simplified form and in non-precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present disclosure.

[0061] It will be understood that the meaning of “on,” “over,” and “over” of the present disclosure should be interpreted in the broadest manner, so that “on” not only means that it is “on” something with no intervening features or layers (i.e., directly on something), but also includes the meaning that it is “on” something with intervening features or layers.

[0062] In the embodiments of the present disclosure, the terms "first", "second", "third", etc. are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0063] In the disclosed embodiments, the term "layer" refers to a material portion including an area having a thickness. A layer may extend over the entirety of a lower or upper structure, or may have an extent less than the extent of a lower or upper structure. In addition, a layer may be an area of ​​a homogeneous or inhomogeneous continuous structure having a thickness less than the thickness of a continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure, or a layer may be between any horizontal faces at the top and bottom surfaces of a continuous structure. A layer may extend horizontally, vertically, and / or along an inclined surface. A layer may include multiple sublayers.

[0064] It should be noted that the technical solutions described in the embodiments of the present disclosure can be arbitrarily combined without conflict.

[0065] Wafer bonding is a technology that uses van der Waals force, molecular force, and even atomic force to bond the wafers together under the action of external energy through atoms at the wafer interface. Hybrid bonding (for example, including insulator-insulator bonding, semiconductor-semiconductor bonding, and metal-metal bonding) is a commonly used wafer bonding method, which is widely used in the field of 3D chips, such as CMOS image sensors, DRAM, 3D-NAND flash memory, and logic devices.

[0066] However, the applicant found that during the wafer bonding process, a very thin layer of silicon oxide is formed at the interface of the two wafers, and silicon oxide cannot block the diffusion of metal atoms (copper atoms), further affecting the reliability of electron migration in the bonding structure. At the same time, if high voltage is applied to the bonding structure, the presence of diffused metal atoms may also cause the bonding structure to short-circuit, bringing greater risks to the hybrid bonding structure.

[0067] In order to solve the above technical problems, the embodiment of the present disclosure proposes a hybrid bonding structure 100. The hybrid bonding structure 100 includes a first substrate 101 and a second substrate 102, and the second substrate 102 is located on the first substrate 101. There is a dielectric layer 103 between the first substrate 101 and the second substrate 102. The dielectric layer 103 may include a first dielectric layer 104 and a second dielectric layer 105. The first dielectric layer 104 is located on the first substrate 101, and the second dielectric layer 105 is located on the second substrate 102. In the embodiment of the present disclosure, the first substrate 101 and the second dielectric layer 104 may belong to the first wafer, and the second substrate 102 and the second dielectric layer 105 may belong to the second wafer. The second wafer is bonded to the first wafer, that is, bonded to the first dielectric layer 104 through the second dielectric layer 105. In this embodiment, the materials of the first dielectric layer 104 and the second dielectric layer 105 can be silicon oxide, silicon nitride or silicon oxynitride dielectric layer, etc. The first dielectric layer 104 and the second dielectric layer 105 may be formed by thermal oxidation or deposition. For example, the oxidizing atmosphere of the thermal oxidation may be dry oxygen oxidation, water vapor oxidation or wet oxygen oxidation. The deposition method may be physical vapor deposition, chemical vapor deposition or sputtering.

[0068] like Figure 1-Figure 2 As shown, Figure 2 Display as Figure 1 The enlarged view in the dashed box. When the first dielectric layer 104 is bonded to the second dielectric layer 105, the dielectric layer 103 is formed. At the same time, during the bonding process, a bonding interface layer 106 is formed between the first dielectric layer 104 and the second dielectric layer 105. The bonding interface layer 106 can also be a bonding bonding layer. The principle of forming the bonding interface layer is as follows:

[0069] First, under the action of plasma, Si-OH bonds are formed on the surfaces of the first dielectric layer 104 and the second dielectric layer 105, respectively, and the reaction mode may be Si-O-Si+H2O=Si-OH+OH-Si;

[0070] Then, the Si—OH bonds on the first dielectric layer 104 and the second dielectric layer 105 are bonded, so that the first wafer is bonded to the second wafer, and the reaction mode may be Si—OH+OH—Si=Si—O—Si+H 2 O.

[0071] Therefore, the first dielectric layer 104 and the second dielectric layer 105 are bonded together through the Si—OH generated by each, and a very thin bonding interface layer 106 is also formed between the first dielectric layer 104 and the second dielectric layer 105 .

[0072] like Figure 1-Figure 2 As shown, in the process of bonding the first dielectric layer 104 to the second dielectric layer 105, the metal in the first dielectric layer 104 is bonded to the metal in the second dielectric layer 105 at the same time, thereby forming a metal structure 107, that is, the metal structure 107 is located in the dielectric layer 103. In this embodiment, the material of the metal structure 107 can be copper. It should be noted that before forming the metal in the first dielectric layer 104, it is necessary to first form a metal groove in the first dielectric layer 104, form a barrier layer in the metal groove, and then form a metal material on the barrier layer. The metal material fills the metal groove, thereby forming the metal. In other words, due to the effect of the barrier layer, the metal atoms in the first dielectric layer 104 will not diffuse. Similarly, the metal atoms in the second dielectric layer 105 will not diffuse. During the bonding process, due to the existence of the bonding interface layer 106, the metal structure 107 directly contacts the bonding interface layer 106. Since there is no barrier layer between the metal structure 107 and the bonding interface layer 106, copper atoms diffuse in the bonding interface layer 106 (silicon oxide), thereby reducing the electron migration reliability of the metal structure 107.

[0073] like Figure 1-Figure 3 As shown, Figure 3 A simplified top view of the diffusion barrier layer 108 and the metal structure 107 is shown. The hybrid bonding structure 100 also includes a diffusion barrier layer 108. The diffusion barrier layer 108 is located in the dielectric layer 103 and also isolates the bonding interface layer 106. It should be noted that the diffusion barrier layer 108 isolates the bonding interface layer 106, which means that the entire bonding interface layer 106 is separated into several independent regions, thereby preventing copper atoms from further diffusing in the bonding interface layer 106. The bonding interface layer 106 is formed on all sides of the metal structure 107. At the same time, the diffusion barrier layer 108 also surrounds the metal structure 107, so when the copper atoms in the metal structure 107 diffuse into the surrounding bonding interface layers 106, the diffusion barrier layer 108 can achieve a blocking effect to prevent the copper atoms from diffusing in a farther direction, thereby improving the reliability of electron migration. At the same time, copper contamination can also be improved. In this embodiment, the thickness of the diffusion barrier layer 108 may be greater than the thickness of the bonding interface layer 106 , so as to improve the barrier capability of the diffusion barrier layer 108 and further reduce the diffusion of copper atoms in a deeper direction.

[0074] like Figure 4-Figure 5 As shown, Figure 4There are two metal structures 107, namely a first metal structure 1071 and a second metal structure 1072. The first metal structure 1071 and the second metal structure 1072 have the same structure. Figure 5 Display as Figure 4 The diffusion barrier layer 108 surrounds the first metal structure 1071 and the second metal structure 1072 at the same time, that is, the first metal structure 1071 and the second metal structure 1072 share part of the diffusion barrier layer 108. Figure 5 It can be seen that there is the same diffusion barrier layer 108 between the first metal structure 1071 and the second metal 1072, and the distance from the diffusion barrier layer 108 to the first metal structure 1071 is different from the distance from the diffusion barrier layer 108 to the second metal structure 1072. Since the diffusion barrier layer 108 can use a metal barrier material or an insulating barrier material. If a metal barrier material is used, since the distances from the diffusion barrier layer 108 to the two metal structures 107 are different, the diffusion distances of copper atoms in the bonding interface layer 106 are different, which can prevent the copper atoms of the two metal structures from combining in the diffusion barrier layer 106, thereby preventing the two metal structures from shorting under high pressure. Of course, if the diffusion barrier layer 108 uses an insulating barrier material, the distances from the diffusion barrier layer 108 to the two metal structures 107 can be the same. Of course, the hybrid structure 100 can also include more metal structures 107, and at this time, the diffusion barrier layer 108 is shared between two adjacent metal structures 107, which can also be understood as all metal structures 107 sharing the same diffusion barrier layer 108.

[0075] like Figure 6-Figure 7 As shown, Figure 6 Another structure shown as a hybrid structure, Figure 7 Display as Figure 6 A simplified top view of the hybrid bonding structure 100. The hybrid bonding structure 100 includes a plurality of diffusion barrier layers 108, namely, a first diffusion barrier layer 1081 and a second diffusion barrier layer 1082. The first diffusion barrier layer 1081 surrounds the first metal structure 1071, and the second diffusion barrier layer 1082 surrounds the second metal structure 1072. The first diffusion barrier layer 1081 and the second diffusion barrier layer 1082 are independent of each other, that is, there is no common part between the first diffusion barrier layer 1081 and the second diffusion barrier layer 1082. There is a portion of the bonding interface layer 106 between the first diffusion barrier layer 1081 and the second diffusion barrier layer 1082. Figure 6It can be seen that the distance between the first diffusion barrier layer 1081 and the second diffusion barrier layer 1082 is greater than the distance between the first diffusion barrier layer 1081 and the first metal structure 1071, and the distance between the second diffusion barrier layer 1082 and the second metal structure 1072 is also greater. In this embodiment, the distance between the first diffusion barrier layer 1081 and the first metal structure 1071 is closer, and the distance between the second diffusion barrier layer 1082 and the second metal structure 1072 is closer, that is, the first diffusion barrier layer 1081 tightly surrounds the first metal structure 1071, and the second diffusion barrier layer 1082 only surrounds the second metal structure 1082, so that the diffusion distance of copper atoms is very short, and the copper atoms will not be combined, thereby preventing the two metal structures 107 from being short-circuited under high pressure. In this embodiment, when the hybrid structure 100 includes more metal structures 107, the hybrid structure 100 also includes more diffusion barrier layers 108. The number of diffusion barrier layers 108 can be equal to the number of metal structures 107. Each diffusion barrier layer 108 surrounds each metal structure 107, and these diffusion barrier layers 108 are independent of each other. In some embodiments, the structure of the first diffusion barrier layer 1081 and the structure of the second diffusion barrier layer 1082 can be the same. For example, both are metal barrier layers, insulating barrier layers, or a combination of metal barrier layers and insulating barrier layers.

[0076] like Figure 8 As shown, Figure 8 Display as Figure 41. The structural diagram of the diffusion barrier layer 108 in the middle. The diffusion barrier layer 108 includes an upper barrier layer 109 and a lower barrier layer 110. The upper barrier layer 109 is located in the second dielectric layer 105, and the lower barrier layer 110 is located in the first dielectric layer 104. When the second dielectric layer 105 is bonded to the first dielectric layer 104, the upper barrier layer 109 is located on the lower barrier layer 110. The upper barrier layer 109 and the lower barrier layer 110 are in close contact, but no bonding reaction occurs between the upper barrier layer 109 and the lower barrier layer 110. In the embodiment of the present disclosure, the upper barrier layer 109 can be an insulating barrier material, such as silicon nitride and silicon carbide nitride, and the upper barrier layer 109 can also be a metal barrier material, such as tantalum, tantalum nitride, etc. The lower barrier layer 110 can be an insulating material, such as silicon nitride, silicon carbide nitride, etc., and the lower barrier layer 110 can also be a metal barrier material, such as tantalum, tantalum nitride, etc. However, when the upper barrier layer 109 is made of an insulating barrier material, the lower barrier layer 110 can be made of a metal barrier material, and the lower barrier layer 110 cannot be made of an insulating barrier material. The reason is that if the upper barrier layer 109 and the lower barrier layer 110 use insulating barrier materials at the same time, a bonding interface layer 106 will be formed between the upper barrier layer 109 and the lower barrier layer 110, that is, the formed diffusion barrier layer 108 will not cut off the bonding interface layer 106, that is, the diffusion barrier layer cannot play a role in blocking the diffusion of copper atoms. Of course, when the upper barrier layer 109 is made of a metal barrier material, the lower barrier layer 110 can be made of an insulating barrier material. That is, the upper barrier layer 109 can be made of one of the insulating barrier material and the metal barrier material, and the lower barrier layer 110 can be made of the other of the insulating barrier material and the metal barrier material.

[0077] like Figure 8 As shown, in this embodiment, the upper barrier layer 109 is located directly above the lower barrier layer 110. In the horizontal direction, the width of the upper barrier layer 109 is equal to the width of the lower barrier layer 110. The projection area of ​​the upper barrier layer 109 in the first dielectric layer 104 can cover the projection area of ​​the lower barrier layer 110 in the first dielectric layer 104, that is, the projection area of ​​the upper barrier layer 109 in the first dielectric layer 104 can be larger than the projection area of ​​the lower barrier layer 110 in the first dielectric layer 104. In this embodiment, Figure 8 In the embodiment, the projection area of ​​the upper barrier layer 109 in the first dielectric layer 104 can completely overlap with the projection area of ​​the lower barrier layer 110 in the first dielectric layer 104, thereby ensuring that the upper barrier layer 109 and the lower barrier layer 110 are in full contact with each other, thereby improving the ability to block the diffusion of copper atoms. In this embodiment, the thickness of the upper barrier layer 109 and the lower barrier layer 110 are consistent. The upper barrier layer 109 is, for example, an insulating barrier material such as silicon nitride, and the lower barrier layer 110 is, for example, a metal barrier material such as tantalum.

[0078] like Fig. 9 As shown, Fig. 9 Display as Figure 6A simplified schematic diagram of the diffusion barrier. Fig. 9 The first diffusion barrier layer 1081 and Figure 8 The structure of the diffusion barrier layer 108 in FIG. 1 is the same as that of the diffusion barrier layer 108 in FIG. 1. The first diffusion barrier layer 1081 also includes an upper barrier layer 109 and a lower barrier layer 110. The upper barrier layer 109 is located on the lower barrier layer 110. Fig. 9 The second diffusion barrier layer 110 also includes an upper barrier layer 109 and a lower barrier layer 110, and the lower barrier layer 110 is located on the upper barrier layer 109. The structure of the second diffusion barrier layer 110 is opposite to that of the first diffusion barrier layer 109, that is, the upper barrier layer 109 in the first diffusion barrier layer 109 is located in the second dielectric layer 105, and the lower barrier layer 110 is located in the first dielectric layer 104; the upper barrier layer 109 in the second diffusion barrier layer 110 is located in the first dielectric layer 104, and the lower barrier layer 110 is located in the second dielectric layer 105. In this embodiment, since the upper barrier layer 109 is an insulating barrier material and the lower barrier layer 110 is a metal barrier material, the lower barrier layers 110 are respectively located in different dielectric layers, thereby avoiding short circuits between the lower barrier layers 110. Fig. 9 As can be seen from the figure, the thickness of the upper barrier layer 110 and the thickness of the lower barrier layer 109 can be substantially the same.

[0079] like Fig.10 As shown, in some embodiments, in the horizontal direction, the width of the upper barrier layer 109 is different from the width of the lower barrier layer 110, for example, the width of the upper barrier layer 109 is greater than the width of the lower barrier layer 110, that is, the projection area of ​​the upper barrier layer 109 on the dielectric layer is greater than the projection area of ​​the lower barrier layer 110 on the dielectric layer, that is, the upper barrier layer 109 can completely cover the lower barrier layer 110. In this embodiment, since the upper barrier layer 109 is an insulating barrier material and the lower barrier layer 110 is a metal barrier material, the width of the upper barrier layer 109 becomes larger, and the problem of short circuit will not be caused. Of course, if the upper barrier layer 109 is a metal barrier material and the lower barrier layer 110 is an insulating barrier material, the width of the lower barrier layer 110 can also be greater than the width of the upper barrier layer 109.

[0080] like Figure 10-11As shown, in some embodiments, the thickness of the upper barrier layer 109 may also be greater than the thickness of the lower barrier layer 110. Since the upper barrier layer 109 is an insulating barrier material and the lower barrier layer 110 is a metal barrier material, when the thickness of the upper barrier layer 109 is large, more nitrogen elements may be doped on the top of the upper barrier layer 109, so that the top of the upper barrier layer 109 has a larger nitrogen concentration and the bottom of the upper barrier layer 109 has a smaller nitrogen concentration. The greater the nitrogen concentration, the higher the density of the insulating barrier material, thereby further increasing the barrier capability of the top of the upper barrier layer 109. It should be noted that the surface of the upper barrier layer 109 in contact with the lower barrier layer 110 is the top surface of the upper barrier layer 109, and the portion of the upper barrier layer 109 close to the lower barrier layer 110 is the top of the upper barrier layer 109. The upper barrier layer 109 may include a barrier top 1091, a barrier middle 1092, and a barrier bottom 1093. Since the present application adopts a face-to-face hybrid bonding method, the barrier top 1091 is closer to the lower barrier layer 110. By increasing the thickness of the upper barrier layer 109, the barrier top 1091 is better nitrogen-doped, and the nitrogen concentration is increased, so that the contact surface between the upper barrier layer 109 and the lower barrier layer 110 is more accessible to the diffusion of copper atoms. Of course, in some embodiments, a back-to-back hybrid bonding method or a face-to-back hybrid bonding method can also be adopted.

[0081] like Fig.12 As shown, the embodiment of the present disclosure also provides a method for manufacturing a hybrid bonding structure, including:

[0082] S1: providing a first dielectric layer, wherein the first dielectric layer has a lower metal structure and a lower barrier layer; and providing a second dielectric layer, wherein the second dielectric layer has an upper metal structure and an upper barrier layer;

[0083] S2: Bonding the first dielectric layer and the second dielectric layer, and bonding the lower metal structure and the upper metal structure to form a dielectric layer and a metal structure, respectively; wherein, during the bonding process, a bonding interface layer is formed between the first dielectric layer and the second dielectric layer; the upper barrier layer contacts the lower barrier layer to form a diffusion barrier layer, and the diffusion barrier layer isolates the bonding interface layer.

[0084] like Figure 12-Figure 15As shown, in step S1, this embodiment is described by taking the formation of a lower barrier layer as an example. First, a first wafer is provided, the first wafer includes a first substrate 101, and a first dielectric layer 104 is disposed on the first substrate 101. Then, the first dielectric layer 104 is etched to form a lower metal groove 111 and a lower barrier groove 112. The lower barrier groove 112 surrounds the lower metal groove 111, and then a metal material is filled in the lower metal groove 111, thereby forming a lower metal structure 113; and a barrier material is filled in the lower barrier groove 112, thereby forming a lower barrier layer 110, so that the lower barrier layer 110 can surround the lower metal structure 113. Of course, in some embodiments, after the lower metal structure 113 is formed first, the first dielectric layer 104 can be etched to form a lower barrier groove 112, and then the lower barrier groove 112 is filled to form a lower barrier layer 110. That is, the lower barrier layer 110 and the lower metal structure 113 can be formed at the same time, and the lower barrier layer 110 can also be formed after the lower metal structure 113. Of course, in some embodiments, the lower barrier layer 110 may also be formed before the lower metal structure. For example, the lower barrier layer 110 is formed first, and then the lower metal groove 111 is formed, and then the metal material is filled to form the lower metal structure 113 .

[0085] like Figure 14-15 As shown, the material of the lower barrier layer 110 may be a metal barrier material, such as tantalum, tantalum nitride, titanium, titanium nitride, etc. The material of the lower metal structure 113 may be copper. It should be noted that before forming the lower metal structure 113, a metal barrier material needs to be formed on the inner wall of the lower metal groove 111 to prevent copper atoms from diffusing into the first dielectric layer 104. Therefore, in this embodiment, while forming the metal barrier material in the lower metal groove 111, the metal barrier material can also be formed in the lower barrier groove 112, so that the lower barrier layer 110 can be formed at the same time.

[0086] The process of forming the upper barrier layer 109 can refer to the process of forming the lower barrier layer 110. At the same time, since the upper barrier layer 109 adopts an insulating barrier material, the thickness of the upper barrier layer 109 can be appropriately increased, and the nitrogen concentration at the top of the upper barrier layer 109 can be increased. For example, when the upper barrier layer 109 is formed to the top, the concentration of nitrogen plasma is increased, thereby increasing the nitrogen concentration at the top of the upper barrier layer 109, increasing the density of the top of the upper barrier layer 109, and improving the barrier capability.

[0087] like Fig.16As shown, in step S2, the second wafer is bonded to the first wafer, that is, the front side of the second wafer is bonded to the front side of the first wafer, and the first wafer includes a first substrate 101, and a first dielectric layer 104 is provided on the first substrate 101. The first dielectric layer 104 includes a lower metal structure 113 and a lower barrier layer 110, and the lower barrier layer 110 surrounds the lower metal structure 113. The second wafer includes a second substrate 102, and a second dielectric layer 105 is provided on the second substrate 102. The second dielectric layer 105 includes an upper metal structure 114 and an upper barrier layer 109, and the upper barrier layer 109 surrounds the upper metal structure 114. In this embodiment, the surface of the second dielectric layer 105 facing the first dielectric layer 104 can be the front side of the second wafer, and thus the surface of the upper barrier layer 109 facing the lower barrier layer 110 can be the top surface of the upper barrier layer 109. During the bonding process, a bonding reaction will occur between the first dielectric layer 104 and the second dielectric layer 105, and a bonding reaction will occur between the lower metal structure 113 and the upper metal structure 114, thereby forming the dielectric layer 103 and the metal structure 107. At the same time, during the bonding of the first dielectric layer 104 to the second dielectric layer 105, a bonding interface layer 106 will be formed between the first dielectric layer 104 and the second dielectric layer 105, that is, the bonding interface layer 106 is located in the dielectric layer 103. The bonding interface layer 106 will surround the metal structure 107, but since the upper barrier layer 109 will not undergo a bonding reaction with the lower barrier layer 110, the upper barrier layer 109 and the lower barrier layer 110 are tightly released to form a diffusion barrier layer 108. Since the bonding interface layer 106 will not be formed between the upper barrier layer 109 and the lower barrier layer 110, the diffusion barrier layer 108 plays the role of isolating the bonding interface layer 106. Since the diffusion barrier layer 108 isolates the bonding interface layer 106 , even if the copper atoms in the metal structure 107 can diffuse in the bonding interface layer 106 , they will not diffuse deeper into the bonding interface layer 106 , thereby improving the electron migration reliability of the metal structure 107 and reducing the risk of copper atom diffusion.

[0088] like Fig.17 As shown, the embodiment of the present disclosure also proposes a method for manufacturing a hybrid bonding structure, firstly, a second wafer is bonded to a first wafer. The first wafer includes a first substrate 101 and a first dielectric layer 104, and the first dielectric layer 104 includes a lower metal structure. The second wafer includes a second substrate 101 and a second dielectric layer 105, and the second dielectric layer 105 includes an upper metal structure. During the bonding process, the first dielectric layer 104 and the second dielectric layer 105 are bonded to form a dielectric layer 103. The upper metal structure and the lower metal structure are bonded to form a metal structure 107. At the same time, a bonding interface layer 106 is also formed between the first dielectric layer 104 and the second dielectric layer 105. The bonding interface layer 106 can be in contact with the metal structure 107. After the bonding process is completed, the back side of the second substrate 102 is thinned so that the thickness of the second substrate 102 is less than the thickness of the first substrate 101.

[0089] like Figure 18-19 As shown, since the second substrate 102 has been thinned, the thickness of the second substrate 102 is reduced, which is conducive to forming the blocking groove 115. In this embodiment, the second substrate 102, the second dielectric layer 105, the bonding interface layer 106 and the first dielectric layer 104 can be etched by an etching process, so as to form the blocking groove 115, that is, the blocking groove 115 extends from the second substrate 102 to the first dielectric layer 104, so that the blocking groove 115 destroys the integrity of the bonding interface layer 106, that is, the blocking groove 115 isolates the bonding interface layer 106. Fig.19 As can be seen in FIG. 1 , the blocking trench 115 surrounds the metal structure 107 .

[0090] like Fig. 20 As shown, after forming the blocking trench 115, an insulating barrier material is filled into the blocking trench 115, thereby forming a diffusion barrier layer 108. The surface of the diffusion barrier layer 108 is flush with the surface of the second substrate 102, and the diffusion barrier layer 108 extends from the second substrate 102 to the first substrate 101, so that the diffusion barrier layer 108 can block the bonding interface layer 106. Since the diffusion barrier layer 108 surrounds the metal structure 107 and the diffusion barrier layer 108 blocks the bonding interface layer 106, the diffusion barrier layer 108 can block the metal atoms from extending in a deeper direction in the bonding interface layer 106, thereby improving the reliability of the electron migration of the metal structure 107.

[0091] like Fig.21As shown, the embodiment of the present disclosure also proposes a semiconductor device 10, which may include a first semiconductor structure 11 and a second semiconductor structure 12. The first semiconductor structure 11 may be bonded to the second semiconductor structure 12. The first semiconductor structure 11 and the second semiconductor structure 12 may be fixed together by hybrid bonding, and the above-mentioned hybrid bonding structure may be formed between the first semiconductor structure 11 and the second semiconductor structure 12, thereby improving the performance of the semiconductor device. The semiconductor device 10 may be a multi-layer stacked structure, such as an HBM structure. The semiconductor device 10 may also be applied to electronic devices. The electronic device may include one or more of the following: for example, a smart phone, a tablet personal computer (PC), a mobile phone, a video phone, an e-book reader, a desktop PC, a laptop PC, a netbook computer, a workstation, a server, a personal digital assistant (PDA), a portable multimedia player (PMP), an MPEG-1 audio layer 3 (MP3) player, a mobile medical device, a camera, a home appliance, a medical device, an Internet of Things (IoT) device, and a wearable device. The wearable device may be an accessory type, a fabric or clothing type, a body attachment type, or an implantable circuit type. An accessory-type wearable device may be, for example, a watch, a ring, a bracelet, an anklet, a necklace, glasses, contact lenses, or a head-mounted device (HMD).

[0092] In summary, the embodiments of the present disclosure propose a hybrid bonding structure, a manufacturing method thereof, and a semiconductor device, which forms a diffusion barrier layer in the dielectric layer to block copper atoms from diffusing farther in the bonding interface layer, thereby improving the electron migration reliability of the metal structure and reducing the pollution caused by the diffusion of copper atoms.

[0093] The above is only a specific implementation of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A hybrid bonding structure, characterized in that: include: The dielectric layer comprises a first dielectric layer and a second dielectric layer which are bonded together; A bonding interface layer, located between the first dielectric layer and the second dielectric layer; A metal structure, located in the dielectric layer; A diffusion barrier layer is located in the dielectric layer, and the diffusion barrier layer separates the bonding interface layer.

2. The hybrid bonding structure according to claim 1, characterized in that: The diffusion barrier layer surrounds the metal structure.

3. The hybrid bonding structure according to claim 1, characterized in that: The thickness of the bonding interface layer is smaller than the thickness of the diffusion barrier layer.

4. The hybrid bonding structure according to any one of claims 1 to 3, characterized in that: The metal structure includes a first metal structure and a second metal structure. The diffusion barrier layer is located between the first metal structure and the second metal structure. The distance between the diffusion barrier layer and the first metal structure is different from the distance between the diffusion barrier layer and the second metal structure.

5. The hybrid bonding structure according to claim 4, characterized in that: The diffusion barrier layer includes a first diffusion barrier layer and a second diffusion barrier layer, the first diffusion barrier layer surrounds the first metal structure, and the second diffusion barrier layer surrounds the second metal structure; Wherein, a distance between the first diffusion barrier layer and the second diffusion barrier layer is greater than a distance between the first diffusion barrier layer and the first metal structure.

6. The hybrid bonding structure according to claim 4, characterized in that: The first diffusion barrier layer comprises: Lower barrier layer; an upper barrier layer, located on the lower barrier layer; Wherein, no bonding reaction occurs between the upper barrier layer and the lower barrier layer.

7. The hybrid bonding structure according to claim 6, characterized in that: The orthographic projection area of ​​the lower barrier layer is located within the orthographic projection area of ​​the upper barrier layer.

8. The hybrid bonding structure according to claim 6, characterized in that: The lower barrier layer of the first diffusion barrier layer is located in the first dielectric layer, and the upper barrier layer of the first diffusion barrier layer is located in the second dielectric layer; The lower barrier layer of the second diffusion barrier layer is located in the second dielectric layer, and the upper barrier layer of the second diffusion barrier layer is located in the first dielectric layer.

9. The hybrid bonding structure according to claim 6, characterized in that: The lower barrier layer includes one of a metal barrier layer and an insulating barrier layer, and the upper barrier layer includes the other of the metal barrier layer and the insulating barrier layer.

10. The hybrid bonding structure according to claim 6, characterized in that: The thickness of the upper barrier layer is greater than that of the lower barrier layer.

11. The hybrid bonding structure according to claim 6, characterized in that: A top surface of the upper barrier layer contacts the lower barrier layer, and a nitrogen concentration at a bottom portion of the upper barrier layer is lower than a nitrogen concentration at a top portion of the upper barrier layer.

12. A method for manufacturing a hybrid bonding structure, characterized in that: include: Providing a first dielectric layer, wherein the first dielectric layer has a lower metal structure and a lower barrier layer; Providing a second dielectric layer, wherein the second dielectric layer has an upper metal structure and an upper barrier layer; Bonding the first dielectric layer and the second dielectric layer, and bonding the upper metal structure and the lower metal structure to form a dielectric layer and a metal structure respectively; In the bonding process, a bonding interface layer is formed in the first dielectric layer and the second dielectric layer; the upper barrier layer and the lower barrier layer are in contact to form a diffusion barrier layer, and the diffusion barrier layer separates the bonding interface layer.

13. The manufacturing method according to claim 12, characterized in that: During the bonding process, no bonding reaction occurs between the upper barrier layer and the lower barrier layer.

14. The manufacturing method according to claim 12, characterized in that: The step of forming the lower barrier layer comprises: forming a trench in the first dielectric layer surrounding the lower metal structure; A diffusion barrier material is filled in the trench to form the lower barrier layer.

15. The manufacturing method according to any one of claims 12 to 14, characterized in that: The step of forming the upper barrier layer comprises: forming a trench surrounding the upper metal structure in the second dielectric layer; Filling a diffusion barrier material in the trench to form the upper barrier layer; The nitrogen concentration at the top of the upper barrier layer is greater than the nitrogen concentration at the bottom of the upper barrier layer.

16. A semiconductor device, characterized in that: The hybrid bonding structure comprises the hybrid bonding structure according to any one of claims 1 to 11.

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