Device and method for improving duty ratio

Abstract

The invention provides a device and method for improving the duty ratio, in the device, a first capacitor CT and a first resistor RT are connected in parallel and then are connected with GND, the other end of the first capacitor CT is connected to a pin 5 of an SG1525A pulse width modulator and one end of a third resistor R02, and the other end of the third resistor R02 is connected to a pin 7 of the SG1525A pulse width modulator; the other end of the first resistor RT is connected to a pin 6 of the SG1525A pulse width modulator; one end of the second resistor R01 is connected to a pin 1 of the SG1525A pulse width modulator, the other end of the second resistor R01 is connected with one end of the second capacitor C01, and the other end of the second capacitor C01 is connected to a pin 9 of the SG1525A pulse width modulator and one end of the fourth capacitor C03; the other end of the fourth capacitor C03 is connected with GND; one end of the resistor-capacitor R03 is connected with a pin 13 of the SG1525A pulse width modulator, and the other end of the resistor-capacitor R03 outputs a square wave signal Vo modulated by the SG1525A pulse width modulator; the pin 11, the pin 14 and the pin 10 are connected in parallel and then are connected with the negative GND of the power supply; on the basis of the SG1525A pulse width modulator, the duty ratio of two paths of output is improved from 50% to 98% or above, and the problem that the duty ratio of the SG1525A pulse width modulator is low is solved.

Description

Technical Field

[0001] The invention belongs to the field of electronic technology, and in particular relates to a device and method for improving a duty cycle. Background Art

[0002] With the rapid development of technologies in aerospace, aviation, automobile, shipbuilding and other fields, duty cycle control technology is increasingly widely used in the control of engines, transmissions, motors, etc. It controls the voltage average value of the voltage signal to achieve precise and continuous control of the working conditions of the components.

[0003] The SG1525A pulse width modulator is used in various types of switching power supplies such as push-pull and bridge types. It is an integrated circuit manufactured using silicon bipolar power IC technology. Its maximum duty cycle is 50%, which cannot meet the duty cycle requirements of the switching power supply in many situations. Summary of the invention

[0004] In order to solve the technical problem that the duty cycle of the SG1525A pulse width modulator in the related art is low and cannot meet the duty cycle requirements of the switching power supply, the present invention provides a device and method for improving the duty cycle, by improving the peripheral circuit of the SG1525A pulse width modulator to improve the output duty cycle. The present invention has simple process, convenient operation, easy adjustment, and high practical value in the switching power supply. The technical solution is as follows:

[0005] In a first aspect, a device for improving a duty cycle is provided, comprising: an SG1525A pulse width modulator, a first capacitor CT, a first resistor RT, a second resistor R01, a third resistor R02, a resistor and a capacitor R03, a second capacitor C01, a third capacitor C02 and a fourth capacitor C03,

[0006] Among them, the first capacitor CT and the first resistor RT are connected in parallel and then connected to GND, the other end of the first capacitor CT is connected to pin 5 of the SG1525A pulse width modulator and one end of the third resistor R02, and the other end of the third resistor R02 is connected to pin 7 of the SG1525A pulse width modulator; the other end of the first resistor RT is connected to pin 6 of the SG1525A pulse width modulator; one end of the second resistor R01 is connected to pin 1 of the SG1525A pulse width modulator, the other end of the second resistor R01 is connected to one end of the second capacitor C01, and the other end of the second capacitor C01 is connected to the pin 1 of the SG1525A pulse width modulator. It is terminated to pin 9 of the SG1525A pulse width modulator and one end of the fourth capacitor C03; the other end of the fourth capacitor C03 is connected to GND; pin 8 of the SG1525A pulse width modulator is connected to one end of the third capacitor C02, and the other end of the third capacitor C02 is connected to GND; one end of the resistor and capacitor R03 is connected to pin 13 of the SG1525A pulse width modulator, and the other end of the resistor and capacitor R03 outputs the square wave signal Vo modulated by the SG1525A pulse width modulator; pin 11, pin 14 and pin 10 are connected in parallel to the negative power supply GND.

[0007] Among them, the SG1525A pulse width modulator includes an error amplifier, an oscillator, an RS trigger, a T trigger, a NOR logic gate, and a dual-channel driving transistor;

[0008] Pin 1 of the SG1525A pulse width modulator is the error amplifier IN-, pin 2 is the error amplifier IN+; pin 5 is the oscillator frequency setting capacitor terminal CT; pin 6 is the oscillator frequency setting resistor terminal RT; pin 7 is the CT discharge terminal; pin 8 is the soft start SS terminal; pin 9 is the error amplifier compensation terminal;

[0009] The PWM triangle wave is formed by using the first capacitor CT of the pin 5 peripheral and the first resistor RT of the pin 6 peripheral; the input voltage of pins 1 and 2 is compared with the triangle wave of pin 5, and the signal is sent to the base of the dual-way drive transistor after being judged by the RS trigger, T trigger and NOR logic gate. Pins 11 and 14 are led out from the collector of the lower tube of the dual-way drive transistor, and the collector of the upper tube of the dual-way drive transistor is connected in parallel and led out from pin 13 as the power supply VC terminal.

[0010] Furthermore, the SG1525A pulse width modulator also includes an undervoltage lockout circuit, a latch, and a reference voltage source.

[0011] The capacitance value of the first capacitor CT is not greater than 0.1 μF.

[0012] The resistance value of the first resistor RT is 10-90KΩ.

[0013] The resistance value of the third resistor R02 is not greater than 100Ω.

[0014] In a second aspect, a method for improving a duty cycle is provided, which is used for any device described in the first aspect, wherein the method changes the output terminals of the SG1525A pulse width modulator pins 11 and 14 to the output terminal of the SG1525A pulse width modulator pin 13.

[0015] Specifically, the method uses the upper tube pin 13 of the dual power transistor at the internal output end of the SG1525A pulse width modulator as the output end, controls the pin 2 of the SG1525A pulse width modulator to input a fixed voltage, and the pin 1 to input a preset adjustable analog voltage; changes the input voltage of pin 1, and when the input voltage of pin 1 changes, the upper tube pin 13 of the dual power transistor is turned on with a high level superposition, thereby improving the output duty cycle.

[0016] The present invention improves the peripheral circuit of the SG1525A pulse width modulator, and uses the internal composition characteristics of the SG1525A pulse width modulator to change the output terminal lead mode, that is, the conventional pin 11 (OUTA) and pin 14 (OUTB) are changed to pin 13 (VC) as the output terminal, pin 2 is the set voltage, and pin 1 is the preset adjustable voltage. When the voltage of pin 1 changes, the high-level state of the upper tube of the dual power transistor will be superimposed and turned on, thereby increasing the output duty cycle and meeting the duty cycle requirements. The SG1525A pulse width modulator output duty cycle can be maximized; it has good practicality and is easy to promote and apply. It has been applied to the field of switch control and has great practical value. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a schematic diagram of a device for increasing the duty cycle based on the SG1525A pulse width modulator of the present invention.

[0018] Figure 2 This is the internal circuit diagram of the SG1525A pulse width modulator.

[0019] Figure 3 This is the peripheral circuit diagram of the commonly used SG1525A pulse width modulator.

[0020] Figure 4 This is a schematic diagram of the measured waveform of the output duty cycle before improvement.

[0021] Figure 5 This is a schematic diagram of the measured waveform of the improved output duty cycle. DETAILED DESCRIPTION

[0022] The following will be combined with the flow chart of the method of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0023] The external structure of SG1525A pulse width modulator is as follows: Figure 2 As shown, a dual-channel drive tube is used to switch on and off, and the maximum duty cycle of each is 50%. Pin 13 of the SG1525A pulse width modulator is the power supply terminal Vc after the upper tubes of the two drive tubes are connected in parallel, and pins 11 and 14 are output terminals OUT, respectively, which can realize a dual-channel 50% duty cycle voltage signal, that is, the analog voltage signal is 1 / 2Vc. In an electronic switch, when the control effect is to meet the output analog voltage signal greater than 1 / 2Vc to enhance the output signal, the interface needs to be adjusted. How to improve the output duty cycle of the SG1525A pulse width modulator is the content to be studied in this invention.

[0024] The present invention improves the duty cycle of two outputs from 50% to more than 98% based on the SG1525A pulse width modulator, thereby solving the problem of low duty cycle based on the SG1525A pulse width modulator. The present invention uses the upper tube of the dual power transistor at the internal output end of the SG1525A pulse width modulator, i.e., pin 13 (VC end) as the output end. Pin 2 of the SG1525A is a fixed voltage, and pin 1 is a preset adjustable analog voltage. When the voltage of pin 1 changes, the high level state of the upper tube of the dual power transistor will be superimposed and turned on, thereby improving the output duty cycle and meeting the duty cycle requirements.

[0025] The present invention improves the duty cycle based on the SG1525A pulse width modulator. The SG1525A pulse width modulator is a monolithic integrated circuit manufactured by using a silicon bipolar power IC process, and a 5.1V±1% precision reference source is set inside. The output stage of the SG1525A is a "NOR" logic, and outputs a positive pulse. The internal component characteristics of the SG1525A pulse width modulator are used to change the output terminal lead mode, that is, the conventional pin 11 (OUTA) and pin 14 (OUTB) as the output terminal are changed to pin 13 (VC) as the output terminal.

[0026] like Figure 1 As shown, a device for improving duty cycle provided by the present invention includes: an SG1525A pulse width modulator, a first capacitor CT, a first resistor RT, a second resistor R01, a third resistor R02, a resistor and capacitor R03, a second capacitor C01, a third capacitor C02 and a fourth capacitor C03.

[0027] Among them, pin 1 of the SG1525A pulse width modulator is the error amplifier IN-; pin 2 is the error amplifier IN+; pin 5 is the oscillator frequency setting capacitor terminal CT; pin 6 is the oscillator frequency setting resistor terminal RT; pin 7 is the CT discharge terminal; pin 8 is the soft start SS terminal; pin 9 is the error amplification compensation terminal (COMP); pins 11 and 14 are both output terminals OUT; pin 15 is the power supply VCC terminal; pin 16 is the reference voltage terminal. Pins 1 and 9 of the SG1525A pulse width modulator are connected in series with capacitors and resistors to form a PI regulator to improve the regulation characteristics. According to fs=1 / CT(0.7RT+3R02), the operating frequency is set to obtain the values ​​of CT, RT and R02. The first capacitor CT is generally not greater than 0.1 microfarads, and the first resistor RT is generally tens of KΩ. The function of the third resistor R02 is to provide a discharge circuit for the internal oscillator, which is generally not greater than 100Ω.

[0028] Specifically, the first capacitor CT and the first resistor RT are connected in parallel and then connected to GND, the other end of the first capacitor CT is connected to pin 5 of the SG1525A pulse width modulator and one end of the third resistor R02, and the other end of the third resistor R02 is connected to pin 7 of the SG1525A pulse width modulator; the other end of the first resistor RT is connected to pin 6 of the SG1525A pulse width modulator; one end of the second resistor R01 is connected to pin 1 of the SG1525A pulse width modulator, the other end of the second resistor R01 is connected to one end of the second capacitor C01, and the other end of the second capacitor C01 is connected to the pin 1 of the SG1525A pulse width modulator. One end is connected to pin 9 of the SG1525A pulse width modulator and one end of the fourth capacitor C03; the other end of the fourth capacitor C03 is connected to GND; pin 8 of the SG1525A pulse width modulator is connected to one end of the third capacitor C02, and the other end of the third capacitor C02 is connected to GND; one end of the resistor and capacitor R03 is connected to pin 13 of the SG1525A pulse width modulator, and the other end of the resistor and capacitor R03 outputs the square wave signal Vo modulated by the SG1525A pulse width modulator; pin 11, pin 14 and pin 10 are connected in parallel to the negative power supply GND.

[0029] VCC, IN+, IN+ and Vo are externally provided voltages.

[0030] The SG1525A pulse width modulator inputs an adjustable analog voltage at pin 1 (IN-) and a fixed voltage at pin 2 (IN+). By adjusting the voltage at pin 1, the duty cycle of the output at pin 13 (VC) will change accordingly.

[0031] See also Figure 2 , which is the schematic diagram of the internal local output terminals of the SG1525A pulse width modulator.

[0032] The SG1525A pulse width modulator consists of an error amplifier, an oscillator, an RS trigger, a T trigger, a NOR logic gate, and a dual-channel drive transistor.

[0033] Pin 1 of the SG1525A pulse width modulator is the error amplifier IN-; Pin 2 is the error amplifier IN+; Pin 5 is the oscillator frequency setting capacitor terminal CT; Pin 6 is the oscillator frequency setting resistor terminal RT; Pin 7 is the CT discharge terminal; Pin 8 is the soft start SS terminal; Pin 9 is the error amplifier compensation terminal (COMP); Pin 11 and Pin 14 are both output terminals OUT; Pin 15 is the power supply VCC terminal.

[0034] The PWM triangle wave is formed by the first capacitor CT of the pin 5 peripheral and the first resistor RT of the pin 6 peripheral. The input voltage of pins 1 and 2 is compared with the triangle wave of pin 5, and the RS trigger, T trigger and NOR logic gate are used for judgment, and then the signal is sent to the base of the dual-way drive transistor. Pins 11 and 14 are led out from the collector of the lower tube of the dual-way drive transistor, and the collector of the upper tube of the dual-way drive transistor is connected in parallel and led out from pin 13 as the power supply VC terminal. The specific process of signal comparison and judgment can be referred to the relevant technology.

[0035] For descriptions of other structures of the SG1525A pulse width modulator, such as undervoltage lockout circuit, latch, reference voltage source, etc., please refer to the relevant technology and will not be repeated here.

[0036] See also Figure 3 , which is the commonly used peripheral circuit schematic diagram of the SG1525A pulse width modulator, mainly composed of the SG1525A pulse width modulator, capacitor CT, resistor RT, resistor R01, resistor R02, resistor and capacitor R03, capacitor C01, capacitor C02, capacitor C03 and capacitor C04.

[0037] Pin 11 and pin 14 are connected in parallel to one end of resistor R03, and the other end of resistor R03 outputs a square wave signal Vo modulated by the SG1525A pulse width modulator. One end of capacitor C04 is connected to pin 13 of the SG1525A pulse width modulator, and the other end of capacitor C04 is connected to the negative power supply GND and pin 10.

[0038] Figure 3 The circuit shown uses the lower tube of the dual-channel driving transistor inside SG1525A to turn on and off the output signal to complete the output function.

[0039] See also Figure 4 , which is the measured output waveform before the peripheral circuit of SG1525A pulse width modulator is improved. Figure 3 The circuit principle shown is verified, and pins 11 and 14 output signals with a duty cycle not greater than 50%.

[0040] See also Figure 5, which is the measured output waveform after the peripheral circuit of SG1525A pulse width modulator is improved. Figure 1 In the circuit shown, pin 13 is used as an output pin, and the duty cycle can reach 99.7%.

[0041] The present invention has been subjected to functional performance tests and reliability tests, has stable performance, can improve the duty cycle, and can meet the duty cycle requirements.

[0042] The above is only a specific embodiment of the present invention, and the present invention is described in detail. The unexplained part is a conventional technology. However, the protection scope of the present invention is not limited thereto, and any changes or substitutions that can be easily thought of by any technician familiar with the technical field within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention.

Claims

1. A device for increasing a duty cycle, characterized in that: include: SG1525A pulse width modulator, a first capacitor CT, a first resistor RT, a second resistor R01, a third resistor R02, a resistor and a capacitor R03, a second capacitor C01, a third capacitor C02 and a fourth capacitor C03, Among them, the first capacitor CT and the first resistor RT are connected in parallel and then connected to GND, the other end of the first capacitor CT is connected to pin 5 of the SG1525A pulse width modulator and one end of the third resistor R02, and the other end of the third resistor R02 is connected to pin 7 of the SG1525A pulse width modulator; the other end of the first resistor RT is connected to pin 6 of the SG1525A pulse width modulator; one end of the second resistor R01 is connected to pin 1 of the SG1525A pulse width modulator, the other end of the second resistor R01 is connected to one end of the second capacitor C01, and the other end of the second capacitor C01 is connected to the pin 1 of the SG1525A pulse width modulator. It is terminated to pin 9 of the SG1525A pulse width modulator and one end of the fourth capacitor C03; the other end of the fourth capacitor C03 is connected to GND; pin 8 of the SG1525A pulse width modulator is connected to one end of the third capacitor C02, and the other end of the third capacitor C02 is connected to GND; one end of the resistor and capacitor R03 is connected to pin 13 of the SG1525A pulse width modulator, and the other end of the resistor and capacitor R03 outputs the square wave signal Vo modulated by the SG1525A pulse width modulator; pin 11, pin 14 and pin 10 are connected in parallel to the negative power supply GND.

2. The device according to claim 1, characterized in that The SG1525A pulse width modulator includes an error amplifier, an oscillator, an RS trigger, a T trigger, a NOR logic gate, and a dual-channel drive transistor; Pin 1 of the SG1525A pulse width modulator is the error amplifier IN-, pin 2 is the error amplifier IN+; pin 5 is the oscillator frequency setting capacitor terminal CT; pin 6 is the oscillator frequency setting resistor terminal RT; pin 7 is the CT discharge terminal; pin 8 is the soft start SS terminal; pin 9 is the error amplifier compensation terminal; The PWM triangle wave is formed by using the first capacitor CT of the pin 5 peripheral and the first resistor RT of the pin 6 peripheral; the input voltage of pins 1 and 2 is compared with the triangle wave of pin 5, and the signal is sent to the base of the dual-way drive transistor after being judged by the RS trigger, T trigger and NOR logic gate. Pins 11 and 14 are led out from the collector of the lower tube of the dual-way drive transistor, and the collector of the upper tube of the dual-way drive transistor is connected in parallel and led out from pin 13 as the power supply VC terminal.

3. The device according to claim 1, characterized in that The capacitance value of the first capacitor CT is not greater than 0.1 μF.

4. The device according to claim 1, characterized in that The resistance value of the first resistor RT is 10 to 90 KΩ.

5. The device according to claim 1, characterized in that The resistance value of the third resistor R02 is not greater than 100Ω.

6. The device according to claim 2, characterized in that The SG1525A pulse width modulator also includes an undervoltage lockout circuit, a latch, and a reference voltage source.

7. A method for increasing a duty cycle, characterized in that: Used in the device of any one of claims 1 to 6, the method changes the SG1525A pulse width modulator pins 11 and 14 as output terminals to pin 13 as the output terminal.

8. The method according to claim 7, characterized in that The method uses the upper tube pin 13 of the dual power transistor at the internal output end of the SG1525A pulse width modulator as the output end, controls the pin 2 of the SG1525A pulse width modulator to input a fixed voltage, and the pin 1 to input a preset adjustable analog voltage; changes the input voltage of the pin 1, and when the input voltage of the pin 1 changes, the upper tube pin 13 of the dual power transistor is turned on with a high level superposition, thereby improving the output duty cycle.

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