Method for evaluating semiconductor device, method for manufacturing semiconductor device, and semiconductor device

Abstract

The present invention relates to a method for evaluating a semiconductor device in which a transfer line (2) is provided on the surface of a substrate (1), a semiconductor chip (5) and surface mounting members (7a-7d) are mounted on the surface of the substrate (1), and the semiconductor chip (5) and the surface mounting members (7a-7d) are connected to each other via the transfer line (2), the method comprising the steps of: preparing a resin cover (9); the resin cover (9) has a first recess (10) provided in a portion corresponding to the semiconductor chip (5), and a second recess (11) provided in a portion corresponding to the surface mount components (7a-7d). Next, the semiconductor device is evaluated in a state in which the semiconductor chip (5) is housed in the first recess (10) and the surface-mounted components (7a-7d) are housed in the second recess (11) with the resin cover (9) aligned, and the resin cover (9) is pressed against the transfer line (2) by a pressing jig (12). The relative dielectric constant of the resin cover (9) is 3-4.

Description

Technical Field

[0001] The present disclosure relates to a method for evaluating a semiconductor device, a method for manufacturing a semiconductor device, and a semiconductor device. Background Art

[0002] In microwave integrated circuit modules, especially power amplifier modules, for mobile phone terminals or mobile base stations, compound semiconductor chips represented by GaAs or GaN and multiple surface mount components (Surface Mount Device: SMD) are installed on a multilayer substrate, and the upper surface is sealed with a molding resin (for example, refer to non-patent document 1). In particular, in microwave integrated modules with an operating frequency of several GHz or less, instead of integrating all inductance or capacitance elements on a semiconductor chip, surface mount components are actively used. Surface mount components are more effective in reducing circuit losses and can reduce costs by suppressing the increase in chip area. By using surface mount components in part of the circuit constants, RF characteristics can be fine-tuned.

[0003] In a power amplifier module that mounts semiconductor chips and surface mount components on a multilayer substrate in the L / S / C band (approximately 1 to 6 GHz), there are deviations between design and actual measurement due to various factors such as variations in the thickness of each dielectric layer on the substrate or line width, differences in lead shape and length, and differences in the design model of the semiconductor chip. Therefore, fine-tuning of RF characteristics is required.

[0004] Therefore, usually, in order to improve the initial RF characteristics, the constants of the surface mount components used in the design are changed, and the circuit constants are adjusted to make the measured values ​​roughly close to the designed values. Although this adjustment is performed before molding and sealing, there is a problem that the RF characteristics change before and after molding and sealing. This change is caused by the transmission lines and surface mount components on the surface of the substrate being covered by the molding material, and the effective dielectric constant and equivalent dielectric loss tangent around them change.

[0005] In RF circuits operating in GHz bands such as power amplifier modules for base stations headed by the fifth generation mobile communication system (5G), RF characteristics are prone to differences before and after mold sealing. The relative dielectric constant of molding resin is higher than that of air, and molding resin has a dielectric loss tangent. This leads to RF losses. In the Doherty amplifier, a delay line is required to form a phase difference between a carrier amplifier and a peak amplifier. In the case where the delay line is composed of a distributed constant circuit such as a transmission line on the surface of the substrate, due to the influence of the resin molding material, the effective dielectric constant observed from the delay line changes. This change affects the phase difference between the carrier amplifier and the peak amplifier of the Doherty amplifier, thereby greatly affecting the characteristic variation. Therefore, it is difficult to predict the RF characteristics of the Doherty amplifier after mold sealing compared with previous amplifiers.

[0006] Non-patent document 1: IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL.64, NO.10, OCTOBER 2016, pp.3244-3254

[0007] After mold sealing, it becomes difficult to replace surface mounted components. Therefore, in the past, the RF characteristics of the module in the non-molded state were adjusted based on the change of RF characteristics before and after mold sealing. That is, the operation process of replacing surface mounted components, performing mold resin sealing, confirming the amount of change, and adjusting the surface mounted components again using other samples if there is a problem is repeated. This repetition hinders the reduction of operation time. Summary of the invention

[0008] The present disclosure has been made to solve the above-mentioned problems, and an object of the present disclosure is to obtain a semiconductor device evaluation method, a semiconductor device manufacturing method, and a semiconductor device that can significantly shorten the operation time.

[0009] The semiconductor device evaluation method involved in the present disclosure evaluates a semiconductor device in which a transmission line is provided on the surface of a substrate, and a semiconductor chip and a surface-mounted component are mounted on the surface of the substrate and connected to each other through the above-mentioned transmission line. It is characterized in that the above-mentioned semiconductor device evaluation method comprises the following steps: a step of preparing a resin cover, the resin cover having a first recess provided in a portion corresponding to the above-mentioned semiconductor chip, and a second recess provided in a portion corresponding to the above-mentioned surface-mounted component; and a step of aligning the above-mentioned resin cover in a manner such that the above-mentioned semiconductor chip is accommodated in the above-mentioned first recess and the above-mentioned surface-mounted component is accommodated in the above-mentioned second recess, and evaluating the above-mentioned semiconductor device while the above-mentioned resin cover is pressed against the above-mentioned transmission line by a pressing fixture, and the relative dielectric constant of the above-mentioned resin cover is 3 to 4.

[0010] The manufacturing method of the semiconductor device involved in the present disclosure is characterized in that it comprises the following steps: a step of forming a transmission line on the surface of a substrate; a step of mounting a semiconductor chip and a surface mounting component on the surface of the above-mentioned substrate and connecting them to each other through the above-mentioned transmission line; a step of preparing a resin cover, the resin cover having a first recess provided in a portion corresponding to the above-mentioned semiconductor chip, and a second recess provided in a portion corresponding to the above-mentioned surface mounting component; and a step of aligning the above-mentioned resin cover in a manner such that the above-mentioned semiconductor chip is accommodated in the above-mentioned first recess and the above-mentioned surface mounting component is accommodated in the above-mentioned second recess, and evaluating the semiconductor device in a state in which the above-mentioned resin cover is pressed against the above-mentioned transmission line by a pressing fixture, wherein the relative dielectric constant of the above-mentioned resin cover is 3 to 4.

[0011] The semiconductor device involved in the present disclosure is characterized in that it comprises: a substrate; a transmission line arranged on the surface of the above-mentioned substrate; a semiconductor chip and a surface-mounted component mounted on the surface of the above-mentioned substrate and connected to each other through the above-mentioned transmission line; a solder resist covering the above-mentioned transmission line; and a molding resin covering the above-mentioned transmission line, the above-mentioned semiconductor chip, the above-mentioned surface-mounted component and the above-mentioned solder resist, wherein the above-mentioned solder resist has an anti-etching agent with a relative dielectric constant of 4.5 or more.

[0012] In the evaluation method and manufacturing method of the semiconductor device involved in the present disclosure, a resin cover is used to cover the upper part of the transmission line whose characteristics vary greatly depending on the presence or absence of molding resin, so that the equivalent dielectric constant of the transmission line becomes equal to the characteristics after complete molding. Therefore, the RF characteristics after molding resin sealing can be obtained in the measurement before molding sealing. Since it is before molding sealing, the surface mounting components can be replaced to adjust the characteristics. As a result, the operation time for adjusting the RF characteristics can be greatly shortened.

[0013] In the semiconductor device disclosed herein, a solder resist with a high relative dielectric constant is provided on the transmission line. In a material with a high relative dielectric constant, the wavelength is shortened, causing the concentration of electric field energy. Therefore, by providing the solder resist, the influence of the equivalent dielectric constant of the air or molding resin above the solder resist is reduced. Therefore, compared with the case where there is no solder resist, the change of RF characteristics before and after molding can be suppressed. As a result, the operation time for adjusting the RF characteristics can be greatly shortened. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 This is a plan view showing the semiconductor device before mold sealing according to the first embodiment.

[0015] Figure 2 is along Figure 1 A cross-sectional view of the I-II cut.

[0016] Figure 3 It is a cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment.

[0017] Figure 4 It is a cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment.

[0018] Figure 5 It is a graph showing the characteristics of the power amplifier before and after mold sealing.

[0019] Figure 6 This is a cross-sectional view showing a modification of the semiconductor device according to the first embodiment.

[0020] Figure 7 FIG. 1 is a plan view showing a semiconductor device before mold sealing according to the second embodiment.

[0021] Figure 8 is along Figure 7 A cross-sectional view of the I-II cut.

[0022] Fig. 9 1 is a cross-sectional view showing a semiconductor device after mold sealing according to the second embodiment. DETAILED DESCRIPTION

[0023] The evaluation method of a semiconductor device, the manufacturing method of a semiconductor device, and the semiconductor device according to the embodiment will be described with reference to the drawings. The same or corresponding components are sometimes denoted by the same reference numerals, and duplicate descriptions are omitted.

[0024] Implementation Method 1

[0025] Figure 1 This is a plan view showing the semiconductor device before mold sealing according to the first embodiment. Figure 2 is along Figure 1 The semiconductor device is a microwave power amplifier module operating in the GHz band.

[0026] A transmission line 2 is provided on the surface of a multilayer substrate 1 having a thickness of about 400 μm. The transmission line 2 is formed of copper. A back metal 3 for GND connection is provided on the back of the multilayer substrate 1. Transmission lines are also provided on each inner layer of the multilayer substrate 1 (not shown). A dielectric layer 4 is provided between each layer of the multilayer substrate 1. The material of the dielectric layer 4 is epoxy resin, but it may also be a fluororesin, a ceramic material such as alumina, or other materials. The transmission line 2 on the surface side, the transmission line on the inner layer, and the back metal 3 are connected to each other through through holes (not shown) that penetrate the dielectric layer 4 as needed.

[0027] A semiconductor chip 5 is mounted on the surface of the multilayer substrate 1. The leads 6 connect the input and output of the semiconductor chip 5 to the transmission line 2, respectively. Surface mounted components 7a and 7b are connected in series to the transmission line 2 on the input side of the semiconductor chip 5. The surface mounted components 7a and 7b are inductors, capacitors, resistors, etc. that constitute an input impedance matching circuit. The surface mounted component 7c is connected in parallel to the transmission line 2 on the output side of the semiconductor chip 5, and the surface mounted component 7d is connected in series to the transmission line 2 on the output side. One electrode of the surface mounted component 7c is connected to the transmission line 2, and the other electrode is connected to the back metal 3 via a through hole (not shown). The surface mounted components 7c and 7d are inductors, capacitors, resistors, etc. that constitute an output impedance matching circuit. For the sake of simplicity, four surface mounted components 7a to 7d are shown, but usually several dozen surface mounted components are provided.

[0028] For the purpose of protecting the circuit pattern, a solder resist 8 having a thickness of several tens of μm is laminated on the transmission line 2. The material of the solder resist 8 is epoxy resin, etc. For the mounting parts of the surface mounting components 7a to 7d and the bonding parts of the leads 6, the solder resist 8 is not formed on the transmission line 2, but gold plating is performed to prevent oxidation of copper.

[0029] Figure 3 and Figure 4 1 is a cross-sectional view showing a method for manufacturing a semiconductor device according to Embodiment 1. The resin cover 9 has a first recess 10 provided at a portion corresponding to the semiconductor chip 5 and the lead 6, and a second recess 11 provided at a portion corresponding to the surface mounting components 7a to 7d on the lower surface side. The resin cover 9 provided with such a first recess 10 and a second recess 11 can be formed with good precision using NC processing or 3D printing technology. The relative dielectric constant of the resin cover 9 is 3 to 4.

[0030] The resin cover 9 is aligned with the multilayer substrate 1 in such a manner that the semiconductor chip 5 and the lead 6 are housed in the first recess 10 and the surface mounting components 7a to 7d are housed in the second recess 11, so that the resin cover 9 covers the semiconductor device. The first recess 10 and the second recess 11 cannot be confirmed from the outside. The semiconductor chip 5 and the surface mounting components 7a to 7d housed in the first recess 10 and the second recess 11 are in a hollow state. However, the surface side of the multilayer substrate 1 is not completely hollow, but the resin cover 9 is partially in contact with the multilayer substrate 1.

[0031] The opening size of the first recess 10 is made about 0.2 mm larger than the formation area of ​​the semiconductor chip 5 and the lead 6 on one side so that the resin cover 9 does not contact the lead 6. When the surface mounting components 7a to 7d are of a size of 0.6 mm in length and 0.3 mm in width, which is called 0603, the mounting error of the surface mounting components 7a to 7d is about ±0.15 mm. The opening size of the second recess 11 is set to about 1.0 mm × 0.7 mm with a margin of 0.05 mm to cover the above mounting error. If the size of the surface mounting components 7a to 7d changes, the opening size of the second recess 11 also changes. Usually, dozens of surface mounting components 7a to 7d are arranged on the multi-layer substrate 1, so a plurality of second recesses 11 are provided in the resin cover 9.

[0032] Next, while the resin cover 9 is pressed against the transmission line 2 by the pressing jig 12, a current is passed through the transmission line 2, the semiconductor chip 5, and the surface mount components 7a to 7d, and the RF characteristics of the semiconductor device are evaluated. The resin cover 9 is detachable and can be easily removed by releasing the pressure from the pressing jig 12. Therefore, after the characteristic evaluation, the surface mount components 7a to 7d can be replaced, or the length or height of the lead 6 can be adjusted to improve the characteristics.

[0033] Finally, if Figure 4 As shown, the resin cover 9 is removed, and the transmission line 2, the semiconductor chip 5, and the surface mounting components 7a to 7d are sealed with the molding resin 13. Since the molding resin 13 is made of an epoxy resin having a relative dielectric constant of 3 to 4, the resin cover 9 has a relative dielectric constant equal to that of the molding resin 13. For example, as the material of the resin cover 9, the same epoxy resin as the molding resin 13 is used.

[0034] Next, the effects of this embodiment will be described. Figure 5: is a diagram showing the characteristics of the power amplifier before and after mold sealing. It can be seen that there is a difference in the RF characteristics before and after mold sealing. Therefore, in this embodiment, the RF characteristics of the semiconductor device are checked in a state where the resin cover 9 is pressed on the transmission line 2 by the pressing fixture 12. The relative dielectric constant of the resin cover 9 is 3 to 4, and has a relative dielectric constant equal to that of the molding resin 13. By using the resin cover 9 to cover the upper part of the transmission line 2 whose characteristics vary greatly depending on the presence or absence of the molding resin 13, the equivalent dielectric constant of the transmission line 2 becomes equal to the characteristics after full molding. Therefore, the RF characteristics after mold sealing can be obtained in the measurement before mold sealing. Since it is before mold sealing, the surface mounting components 7a to 7d can be replaced to adjust the characteristics. As a result, the operation time for adjusting the RF characteristics can be greatly shortened. In addition, since a prototype with RF characteristics equal to that of a prototype subjected to full molding can be produced in a laboratory, the operation time in the assembly factory that performs the full molding process can be reduced.

[0035] In addition, the resin cover 9 is aligned with the multilayer substrate 1 in such a manner that the semiconductor chip 5 and the lead 6 are accommodated in the first recess 10, and the surface mount components 7a to 7d are accommodated in the second recess 11. In this way, not only the semiconductor chip 5 but also the surface mount components 7a to 7d can be used as alignment guides, so that the resin cover 9 can cover the multilayer substrate 1 with high alignment accuracy, and thus the transmission line 2 can be accurately covered with the resin cover 9.

[0036] Figure 6 1 is a cross-sectional view showing a modified example of the semiconductor device involved in Embodiment 1. The module in the state where the resin cover 9 is pressed against the transmission line 2 has the same RF characteristics as the module after conventional resin sealing. Therefore, even if the mold sealing is not performed after the resin cover 9 is removed, the resin cover 9 can be bonded to the multilayer substrate 1 using an adhesive or the like (not shown). Thus, a sealed trial product can be easily produced in a laboratory. Therefore, in the case of a full molding operation in an assembly plant where it is desired to perform the full molding process again after adjustment, the process time can also be reduced.

[0037] If the resin cover 9 is soft, the shape of the resin cover 9 collapses when pressed against the transmission line 2, and the resin cover 9 may come into contact with the leads 6 and the like on the surface of the multilayer substrate 1, thereby possibly affecting the module characteristics. Therefore, the resin cover 9 is preferably hard.

[0038] Implementation Method 2

[0039] Figure 7 FIG. 1 is a plan view showing a semiconductor device before mold sealing according to the second embodiment. Figure 8 is along Figure 7sectional view cut at I-II of FIG. In the present embodiment, the solder resist 14 with a relative dielectric constant of 4.5 or more is laminated on the surface side of the multilayer substrate 1 except for the area of ​​several hundred μm around the semiconductor chip 5, the lead 6 and the surface mounting components 7a to 7d. Therefore, a double-layer structure of the solder resist 8 with a relative dielectric constant of 3 to 4 and the solder resist 14 with a relative dielectric constant of 4.5 or more is provided on the transmission line 2. The other structures are the same as those in the first embodiment.

[0040] In addition, a gap 15 of about several hundred μm is left between the solder resist 14 and the surface mounted components 7a to 7d, so that tweezers can enter and replace the surface mounted components 7a to 7d. If the height of the solder resist 14 is the same as the height of the surface mounted components 7a to 7d, it is difficult to use tweezers to clamp the surface mounted components 7a to 7d for replacement. Therefore, the height of the solder resist 14 is preferably lower than the height of the surface mounted components 7a to 7d, and is about half the height of the surface mounted components 7a to 7d. For example, the height of the surface mounted component called 0603 is 0.3mm, so the height of the solder resist 14 is about 0.15mm.

[0041] Fig. 9 This is a cross-sectional view showing a semiconductor device after mold sealing according to Embodiment 2. After evaluating the RF characteristics of the semiconductor device and adjusting the characteristics by replacing surface mount components 7a to 7d, the surface is sealed with molding resin 13 while solder resist 14 remains.

[0042] Before and after molding, the air with a relative dielectric constant of 1 on the solder resist of the transmission line 2 is replaced by the molding resin 13 with a relative dielectric constant of 3 to 4. Therefore, the equivalent dielectric constant observed in the entire transmission line 2 changes, resulting in changes in the RF characteristics. Therefore, in this embodiment, a solder resist 14 with a high relative dielectric constant is provided on the transmission line 2. In a material with a high relative dielectric constant, the wavelength is shortened, causing the concentration of electric field energy. Therefore, by providing the solder resist 14, the influence of the equivalent dielectric constant of the air or the molding resin 13 above the solder resist 14 is reduced. Therefore, compared with the case where there is no solder resist 14, the change of RF characteristics before and after molding can be suppressed. As a result, a sample with RF characteristics that are extremely close to the molded and sealed product during mass production can be produced in a short time. Since it is before molding and sealing, the surface mounting components 7a to 7d can be replaced to adjust the characteristics. As a result, the operation time for adjusting the RF characteristics can be greatly shortened.

[0043] In addition, the intensity of the electric field decreases as the distance from the transmission line 2 increases upward, so the change in the equivalent dielectric constant can be suppressed as the distance from the portion where the dielectric constant changes increases from the transmission line 2. Therefore, the solder resist 14 is thicker than the ordinary solder resist 8 having a thickness of several tens of μm and is provided to half the height of the surface mounting components 7a to 7d.

[0044] In addition, since the portion other than the transmission line 2 also has some changes depending on whether the mold resin 13 is coated, the characteristics are qualitatively stabilized by providing the solder resist 14. However, if the change is small compared to the portion of the transmission line 2, the quantitative effectiveness cannot be expected too much. Therefore, the solder resist 14 on the portion other than the transmission line 2 is not necessary.

[0045] Even without the solder resist 8 having a relative dielectric constant of 3 to 4, the effect can be obtained as long as the solder resist 14 having a relative dielectric constant of 4.5 or more is laminated with a thickness of about half the height of the surface mount components 7a to 7d.

[0046] Description of Reference Numerals

[0047] 1…multilayer substrate; 2…transmission line; 5…semiconductor chip; 7a to 7d…surface mount components; 8, 14…solder resist; 9…resin cover; 10…first recess; 11…second recess; 12…pressing jig; 13…molding resin; 15…gap.

Claims

1. A method for evaluating a semiconductor device, comprising evaluating a semiconductor device in which a transmission line is provided on a surface of a substrate, a semiconductor chip and a surface mount component are mounted on the surface of the substrate and are connected to each other via the transmission line, It is characterized in that The semiconductor device evaluation method comprises the following steps: A step of preparing a resin cover having a first recess provided at a portion corresponding to the semiconductor chip and a second recess provided at a portion corresponding to the surface mounting component; as well as The step of evaluating the semiconductor device by aligning the resin cover so that the semiconductor chip is housed in the first recess and the surface mount component is housed in the second recess, and pressing the resin cover against the transmission line with a pressing jig, The relative dielectric constant of the resin cover is 3-4.

2. A method for manufacturing a semiconductor device, characterized in that: The following processes are available: A step of forming a transmission line on a surface of a substrate; A step of mounting a semiconductor chip and a surface mount component on the surface of the substrate and connecting them to each other through the transmission line; A step of preparing a resin cover having a first recess provided at a portion corresponding to the semiconductor chip and a second recess provided at a portion corresponding to the surface mounting component; as well as The step of evaluating the semiconductor device by aligning the resin cover so that the semiconductor chip is housed in the first recess and the surface mount component is housed in the second recess, and pressing the resin cover against the transmission line with a pressing jig, The relative dielectric constant of the resin cover is 3-4.

3. The method for manufacturing a semiconductor device according to claim 2, wherein: The method further comprises the step of sealing the transmission line, the semiconductor chip, and the surface-mounted component with a molding resin having a relative dielectric constant of 3 to 4 after the evaluation.

4. The method for manufacturing a semiconductor device according to claim 2, wherein: The method further includes bonding the resin cover to the substrate after the evaluation.

5. A semiconductor device, characterized in that: have: substrate; A transmission line is arranged on the surface of the substrate; A semiconductor chip and a surface mounted component are mounted on the surface of the substrate and are connected to each other via the transmission line; A solder resist covering the transmission line; as well as a molding resin covering the transmission line, the semiconductor chip, the surface mount component, and the solder resist, The solder resist has a relative dielectric constant of 4.5 or more.

6. The semiconductor device according to claim 5, wherein: The solder resist has a two-layer structure of a resist having a relative dielectric constant of 3 to 4 and a resist having a relative dielectric constant of 4.5 or more.

7. The semiconductor device according to claim 5 or 6, characterized in that: The solder resist is provided to a half of the height of the surface mount component.

8. The semiconductor device according to any one of claims 5 to 7, wherein: A gap is left between the surface mount component and the solder resist.

9. The semiconductor device according to any one of claims 5 to 8, wherein: The height of the solder resist is lower than the height of the surface mount component.

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