LabVIEW test method for multi-channel programmable output clock buffer

Abstract

The application belongs to the technical field of automatic test program, and particularly relates to a LabVIEW test method of a multi-channel programmable output clock buffer. The method comprises the following steps: initializing the clock buffer after power-on; resetting the FSWP spectrum analyzer and clearing the previous interface settings; switching the radio frequency switch to channel 1 and opening the channel 1 output; setting the signal source input frequency; setting the signal source input amplitude; starting the signal source input, and outputting the set frequency and amplitude to the input end of the clock buffer; starting the register configuration module, and transmitting the 174 24-bit register values to the SPI in sequence through the serial port, and then transmitting the SPI to the clock buffer; reading the data on the FSWP spectrum analyzer; and the method automatically measures the key indicators of the 14-channel clock buffer, saves the data and judges the advantages and disadvantages. The method reduces the burden of the test personnel, reduces the test time cost, and avoids causing data errors.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of automatic test program, and particularly relates to a LabVIEW test method of a multi-channel programmable output clock buffer. BACKGROUND

[0002] In modern electronic systems, clock buffers have always been a very important component, especially in the process of hardware design and system operation, their role is increasingly valued. The circuit developed by the 58th Institute of China Electronics Technology Group is a 14-way low-noise and configurable output clock buffer, which can generate up to 7 DCLK and SYSREF clock trees required by JESD204B interface; the DCLK and SYSREF clock tree clock outputs support different output modes, including CML, LVDS, LVPECL and LVCOMS. It has been widely used in data converter clock, phased array reference distribution and microwave baseband card fields. This clock buffer can send address and data to configure output mode and frequency through SPI transmission protocol, and can independently and flexibly adjust the frequency and phase of 14 channels. The working environment ranges from-55 DEG C to +105 DEG C.

[0003] In the existing test environment, the independent channels are often connected to the FSWP spectrum analyzer receiving end by using the radio frequency line SMA head, and after measuring one channel, the radio frequency line is pulled out and replaced with another channel, until 14 channels are measured; or the radio frequency switch is manually switched to test each channel, and finally the data on the spectrum analyzer is recorded on paper. The whole test process is complicated, the radio frequency line is often pulled out and inserted, which is easy to damage, and it is also troublesome to record and arrange data, and the test time is relatively long, which cannot meet the production batch test demand. SUMMARY

[0004] The purpose of the application is to overcome the above-mentioned deficiencies of the prior art, and the application provides a LabVIEW test method of a multi-channel programmable output clock buffer, which uses LabVIEW to realize an automatic test program system and an automatic saving method; the program-controlled instrument automatically measures, saves data and judges the advantages and disadvantages of the key indicators of the 14-channel clock buffer. Reduce the burden of test personnel, reduce the test time cost, and avoid data errors.

[0005] To solve the above technical problems, the application provides a LabVIEW test method of a multi-channel programmable output clock buffer, comprising the following steps:

[0006] Step 1: power-on initialization of the clock buffer;

[0007] Step 2: reset the FSWP spectrum analyzer to clear the previous interface settings;

[0008] Step 3: The radio frequency switch is switched to channel 1, and the channel 1 output is turned on;

[0009] Step 4: The signal source input frequency is set;

[0010] Step 5: The signal source input amplitude is set;

[0011] Step 6: The signal source input is turned on, and the set frequency and amplitude are output to the input end of the clock buffer;

[0012] Step 7: The register configuration module is turned on, and the 174 24-bit register values are sequentially transmitted to the SPI through the serial port, and the SPI is sent to the clock buffer;

[0013] Step 8: The data on the FSWP spectrum analyzer is read;

[0014] Step 9: The real-time frequency swing, phase noise and jitter parameters are displayed on the test system interface;

[0015] Step 10: It is judged whether the above parameters are qualified, if qualified, PASS is displayed, and the green light is on, otherwise FAIL is displayed, and the light is not on; it is judged whether the switch channel is greater than 14, if greater than 14, the data is saved and the test is ended, otherwise the channel of the radio frequency switch is moved by 1 bit, and the step 4 is jumped to continue to repeat the operation.

[0016] Preferably, before the power-on initialization of the clock buffer in the step 1, it further includes: ensuring that the clock buffer, the FSWP spectrum analyzer and the radio frequency switch are connected on the bus.

[0017] Preferably, the connection circuit of the clock buffer includes: the output end of the FSWP spectrum analyzer is connected to the input end of the clock buffer, two output ends of the clock buffer are respectively connected to the input ends of the FSWP spectrum analyzer and the radio frequency switch, and the output ends of the FSWP spectrum analyzer and the radio frequency switch are respectively connected to the LabVIEW host computer through the serial port line and the network line.

[0018] Preferably, the algorithm of the register configuration module in the step 7 specifically includes:

[0019] Step I: The LabVIEW host computer sends a start configuration command;

[0020] Step II: The UART1 serial port PA9 and PA10 pins of the Stm32f103 single-chip microcomputer are initialized;

[0021] Step III: The SPI1 port PA4, PA5, PA6 and PA7 pins of the Stm32f103 single-chip microcomputer are initialized;

[0022] Step IV: reading the register value saved in the document, and registering the M0 bit, the number of registered is added by 1;

[0023] Step V: dividing the single 24-bit register value into three 8-bit data;

[0024] Step VI: repeating the above step IV, step V, and sending the register in turn until the M0+1 bit is greater than the X-bit address;

[0025] Step VII: transmitting to SPI1 through the serial port, and SPI1 sends to the clock buffer.

[0026] Preferably, the M0 of the M1-bit register value in the step IV is 0.

[0027] Preferably, the X-bit address range of the register sent in the step VI is 0-174.

[0028] Compared with the prior art, the present application has the following beneficial effects:

[0029] The present application realizes the automatic test and saving method by LabVIEW; the program-controlled instrument automatically measures, saves data and judges the advantages and disadvantages of the key indicators of the 14-channel clock buffer. The present application reduces the burden of the test personnel, reduces the test time cost, and avoids causing data errors. BRIEF DESCRIPTION OF DRAWINGS

[0030] Figure 1 It is a common test hardware connection diagram in the prior art.

[0031] Figure 2 It is a test system hardware connection diagram of the present application.

[0032] Figure 3 It is a flow chart of the LabVIEW test method of the present application.

[0033] Figure 4 It is a flow chart of the register configuration module algorithm of the present application.

[0034] Figure 5 It is a test parameter display result interface diagram of the present application. DETAILED DESCRIPTION

[0035] The present application will be further described in detail below in combination with the drawings and specific embodiments. The advantages and features of the present application will be more apparent according to the following description. It should be noted that the drawings are very simplified and use non-precise proportions, only to facilitate and clarify the purpose of assisting the description of the embodiments of the present application.

[0036] As Figure 2As shown, the embodiment of the application discloses a LabVIEW test method of a multi-channel programmable output clock buffer, and the clock buffer test board, the FSWP spectrum analyzer and the radio frequency switch are connected to a computer through a network cable and a serial port cable according to a hardware connection diagram.

[0037] As shown, after the loading program, the automatic running is started, and the test temperature includes the following steps: Figure 3

[0038] ①The clock buffer is started (power-on initialization), and it is ensured that the clock buffer, the FSWP spectrum analyzer and the radio frequency switch are connected on the bus;

[0039] ②The FSWP spectrum analyzer is reset, and the previous interface setting is cleared;

[0040] ③The radio frequency switch is switched to channel 1, and the channel 1 output is turned on;

[0041] ④The signal source input frequency is set;

[0042] ⑤The signal source input amplitude is set;

[0043] ⑥The signal source input is turned on, and the set frequency and amplitude are output to the clock buffer input end;

[0044] ⑦The register configuration module is turned on, and the 174 24-bit register values are sequentially transmitted to the SPI through the serial port, and the SPI is sent to the clock buffer;

[0045]

[0046] ⑨The real-time frequency swing, phase noise and jitter parameters are displayed on the test system interface.

[0047] ⑩It is judged whether the parameters are qualified, if yes, PASS is displayed, and the green light is bright, otherwise, FAIL is displayed, and the light is not bright; it is judged whether the switch channel is greater than 14, if yes, the data is saved, and the test is ended, otherwise, the radio frequency switch channel is moved by 1 bit, and the step ④ is jumped to continue to repeat the operation.

[0048] As shown, the register configuration module algorithm in the step ⑦ is specifically as follows: Figure 4 I、The LabVIEW host computer sends a start configuration command;

[0049] II、The Stm32f103 single-chip microcomputer UART1 serial port PA9 and PA10 pin initialization;

[0050] III、The Stm32f103 single-chip microcomputer SPI1 port PA4, PA5, PA6 and PA7 pin initialization;

[0051]

[0052] ​​​IV, read the register value saved in the document, and register the M0 bit, the number of registered is added 1;

[0053] V, the single 24-bit register value is divided into 3 8-bit data;

[0054] VI, repeat IV, V, send the register in turn until the M0+1 bit is greater than the X bit address;

[0055] VII, through the serial port to the SPI1, SPI1 sends to the clock buffer.

[0056] As shown in Figure 5 , for real-time display of the output frequency of the clock buffer, and the corresponding amplitude, phase noise and jitter parameter values. There is also the result display after the performance judgment of the whole circuit after the test is completed.

[0057] The above description is only a description of the preferred embodiment of the present application, and is not any limitation on the scope of the present application. Any modification made by a person skilled in the art according to the above disclosure is within the protection scope of the claims.

Claims

1. A LabVIEW testing method of a multi-channel programmable output clock buffer, characterized in that, It comprises the following steps: Step 1: power-on initialization of the clock buffer; Step 2: reset the FSWP spectrum analyzer, clear the previous interface settings; Step 3: switch the radio frequency switch to channel 1, turn on the channel 1 output; Step 4: set the signal source input frequency; Step 5: set the signal source input amplitude; Step 6: turn on the signal source input, output the set frequency and amplitude to the input end of the clock buffer; Step 7: turn on the register configuration module, sequentially transmit the 174 24-bit register values to the SPI through the serial port, and the SPI sends them to the clock buffer; Step 8: read the data on the FSWP spectrum analyzer; Step 9: display the real-time frequency swing, phase noise and jitter parameters on the test system interface; Step 10: judge whether the above parameters are qualified, if qualified, display PASS and green light, otherwise display FAIL and no light; if the switch channel is greater than 14, save the data and end the test, otherwise move the channel of the radio frequency switch by 1 and jump to step 4 for repeated operation. The connection circuit of the clock buffer comprises: the output end of the FSWP spectrum analyzer is connected to the input end of the clock buffer, two output ends of the clock buffer are connected to the input ends of the FSWP spectrum analyzer and the radio frequency switch respectively, and the output ends of the FSWP spectrum analyzer and the radio frequency switch are connected to the LabVIEW host computer through serial port lines and network lines respectively.

2. The LabVIEW testing method of a multi-channel programmable output clock buffer according to claim 1, wherein, Before the power-on initialization of the clock buffer in step 1, it further comprises: ensuring that the clock buffer, FSWP spectrum analyzer and radio frequency switch are connected on the bus.

3. The LabVIEW testing method of a multi-channel programmable output clock buffer as claimed in claim 1, wherein, The algorithm of the register configuration module in step 7 comprises: Step I: the LabVIEW host computer sends a start configuration command; Step II: initialize the UART1 serial port PA9 and PA10 pins of the Stm32f103 single-chip microcomputer; Step III: initialize the SPI1 port PA4, PA5, PA6 and PA7 pins of the Stm32f103 single-chip microcomputer; Step IV: read the register values saved in the document, and register M0 bits, and add 1 to the number of registered bits; Step V: divide the single 24-bit register value into three 8-bit data; Step VI: repeat steps IV and V above, and sequentially send the registers until the M0+1 bit is greater than the X-bit address; Step VII: transmit the registers to the SPI1 through the serial port, and the SPI1 sends them to the clock buffer.

4. The LabVIEW testing method of a multi-channel programmable output clock buffer according to claim 3, wherein, In step IV, the M0 of the M1-bit register value is 0.

5. The LabVIEW testing method of a multi-channel programmable output clock buffer as claimed in claim 3, wherein, In step VI, the X-bit address range of the transmitted register is 0-174.

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