Hybrid resonance-based sensing integrated optical chip and preparation method thereof

Abstract

The invention discloses a mixed resonance-based sensing integrated optical chip and a preparation method thereof, and relates to the technical field of photoelectric integration. The device comprises a silicon substrate, an oxidation buried layer is deposited on the top of the silicon substrate, a multi-layer rectangular waveguide is installed above the oxidation buried layer, one end of the multi-layer rectangular waveguide is flush with the oxidation buried layer, a silicon rectangular waveguide is installed at the other end of the multi-layer rectangular waveguide, and a reverse tapering part is arranged at the end, facing the center of the oxidation buried layer, of the multi-layer rectangular waveguide. A forward tapering part is arranged at one end, away from the center of the oxidation buried layer, of the silicon rectangular waveguide. Hybrid integration of the dielectric-metal hybrid resonant cavity, the silicon-on-chip and the common dielectric waveguide is realized based on on-chip optical interconnection, and a quasi-continuous spectrum bound state is excited by using strong coupling between optical and plasma modes, so that high-sensitivity on-chip optical sensing can be realized, the quality factor is greatly improved, and the application range is wide. And the transmission loss is relatively low.

Description

Technical Field

[0001] The present invention relates to the field of optoelectronic integration technology, and in particular to a hybrid resonance-based synaesthesia integrated optical chip and a preparation method thereof. Background Art

[0002] In recent years, plasma structures have been increasingly used in SOI-based on-chip optical sensing devices, which not only break the diffraction limit but also improve sensitivity. However, traditional plasma structures are limited by large mode losses and small quality factors, making it difficult to meet the current needs of high-integration, high-sensitivity on-chip optical sensing. In this case, relying on the inherent high quality factor advantage of quasi-continuous spectrum bound states, combined with the small size and high sensitivity of plasma, building on-chip optical interconnects based on Si waveguides has become an important means to break through the current plasma bottleneck.

[0003] In 2017, Nature reported that in a sub-micron dielectric resonant cavity, the coupling of transverse mode and longitudinal mode can produce quasi-continuous spectrum bound states with extremely high quality factors. This optical resonant structure is called a supercavity. Although supercavities have many advantages, there are still some problems to be solved in terms of structure, testing, and sensing. The quasi-continuous spectrum bound states in supercavities can generally only be excited near the resonance avoidance intersection of the dispersion range, and there are very strict requirements on the aspect ratio of the cavity cross section and the refractive index of the material. This limits the design of supercavities to a certain extent and makes it more difficult to integrate them with different units.

[0004] Taking all the above factors into consideration, this patent is mainly based on the theory of strong coupling of optical modes, develops a dielectric-metal hybrid resonant cavity similar to a supercavity, fully utilizes the high compatibility of the SOI platform, combines Si waveguides to build an on-chip photon-plasma hybrid optical path, explores the excitation conditions of the optical-plasma mode hybrid quasi-continuous spectrum bound state and the on-chip optical interconnection integration scheme of the subwavelength plasma resonant cavity, thereby solving the bottleneck problems of high plasma sensing loss, low integration, and small quality factor. In addition, a new type of on-chip mode spot converter will be designed and manufactured to reduce the end coupling loss of Si waveguides and optical fibers, paving the way for the application of quasi-continuous spectrum bound state optical sensor chips in optical fiber systems. Based on this patent, the performance of on-chip optical sensing can be greatly enhanced, providing a way to achieve high-performance, low-cost integrated optical sensor chips.

[0005] To this end, we propose a quasi-continuous spectrum bound-state integrated optical sensor with a hybrid resonant cavity and a preparation method. Summary of the invention

[0006] The purpose of the present invention is to provide a hybrid resonance-based integrated optical chip and a preparation method, to design and implement an on-chip optical interconnection integration solution based on the excitation conditions of the optical-plasmon mode hybrid quasi-continuum bound state and a subwavelength plasma resonant cavity, thereby solving the problems of high plasma sensing loss, low integration and small quality factor.

[0007] According to a first aspect of the present invention, in order to achieve the above-mentioned purpose, the present invention provides the following technical solutions: a hybrid resonance-based synaesthesia integrated optical chip, comprising a silicon substrate, a buried oxide layer is deposited on the top of the silicon substrate, a multilayer rectangular waveguide is installed above the buried oxide layer, one end of the multilayer rectangular waveguide is kept flush with the buried oxide layer, and a silicon rectangular waveguide is installed on the other end, a reverse taper portion is provided at one end of the multilayer rectangular waveguide facing the center of the buried oxide layer, and a forward taper portion is provided at one end of the silicon rectangular waveguide away from the center of the buried oxide layer, and the forward taper portion is completely covered in the reverse taper portion to form a directional coupling structure;

[0008] The multilayer rectangular waveguide and the silicon rectangular waveguide as a whole form a coupling unit, the number of the coupling units is at least two, and the two coupling units are symmetrically arranged along the length direction of the buried oxide layer with the center line of the buried oxide layer as the symmetry axis;

[0009] A gold resonant ring is installed at the center between the two coupling units, a hybrid resonant cavity is formed inside the gold resonant ring, and two openings are opened in the direction of the straight waveguide at a position of the gold resonant ring close to the silicon rectangular waveguide, for near-field coupling between the silicon rectangular waveguides on both sides and the hybrid resonant cavity;

[0010] A silicon disk is arranged inside the gold resonance ring, the center of the silicon disk coincides with the center of the gold resonance ring, and the silicon disk and the gold resonance ring are indirectly coupled.

[0011] Furthermore, the multilayer rectangular waveguide is integrally formed with the reverse tapered portion, and the multilayer rectangular waveguide is sequentially formed with a GaN layer, a Si3N4 layer and a SU-8 photoresist layer from bottom to top, and the refractive indices of the GaN layer, the Si3N4 layer and the SU-8 photoresist layer in the near-infrared band are 2.4, 2 and 1.53 respectively.

[0012] Furthermore, the thickness of the silicon rectangular waveguide is equal to the thickness of the hybrid resonant cavity, both of which are 220 nm.

[0013] Furthermore, the width of the reverse tapered portion gradually decreases along one side of the buried oxide layer toward the center;

[0014] The forward tapered portion is integrally formed with the silicon rectangular waveguide, and the forward tapered portion gradually decreases along the center of the oxide buried layer toward one side.

[0015] Furthermore, the thickness of the buried oxide layer is set to 2 μm.

[0016] Furthermore, the radius of the silicon disk is set to 390nm to 430nm, and the thickness of the silicon disk is set to 200nm to 220nm.

[0017] Furthermore, the inner and outer radii of the gold resonance ring are 1.4 μm to 1.6 μm and 1.7 μm to 1.9 μm respectively, and the width of the opening is 100 nm to 150 nm.

[0018] Furthermore, the center of the gold resonant ring coincides with the center point of the center line of the silicon rectangular waveguides arranged on both sides, and there is a certain distance between the silicon rectangular waveguides on both sides and the openings on the gold resonant ring.

[0019] Furthermore, the silicon rectangular waveguide and the hybrid resonant cavity form an on-chip optical interconnection by means of near-field coupling, and the light field input into the second rectangular waveguide contacts and couples with the hybrid resonant cavity, thereby exciting a plasma mode;

[0020] The silicon disk is used to excite the optical mode through indirect coupling with the gold resonant ring.

[0021] According to a second aspect of the present invention, the present invention provides a method for preparing a synaesthesia integrated optical chip based on hybrid resonance, which is used to prepare the above-mentioned synaesthesia integrated optical chip based on hybrid resonance, and specifically includes the following steps:

[0022] S1. First, a 350nm thick electron beam photoresist layer is laid on the top silicon of the silicon substrate, and the silicon rectangular waveguide and silicon disk are produced by electron beam lithography and dry etching;

[0023] S2. A 100 nm thick GaN film and a 100 nm thick Si3N4 film are grown on a silicon substrate by PECVD, and then a 350 nm thick electron beam photoresist is laid, and a Si3N4 / GaN multilayer structure is produced by electron beam lithography and dry etching;

[0024] S3. Then, a 2.7 μm thick SU-8 photoresist is laid on the Si3N4 / GaN multilayer structure, and the SU-8 / Si3N4 / GaN multilayer waveguide is prepared by one-time film throwing, UV lithography, development, and curing;

[0025] S4. Lay a 500nm thick layer of electron beam photoresist on the chip with the waveguide pattern, and pattern the gold resonant ring and the silicon disk by electron beam lithography;

[0026] S5. A 220 nm thick gold layer is deposited on the chip with the electron beam photoresist pattern by a metal deposition process. After the metal deposition is completed, the chip is placed in an acetone solution and the electron beam photoresist on the chip is removed by ultrasonic cleaning. At this time, only the gold resonant ring and silicon disk directly deposited on the buried oxide layer are retained, and the dielectric-metal hybrid resonant cavity is prepared;

[0027] S6. The patterned chip is cleaned for a second time to remove all residual photoresist and complete the device preparation;

[0028] S7. Finally, the chip that has been prepared is packaged based on a light array system. The single-mode optical fiber and the multi-layer rectangular waveguide are end-face coupled and connected, and then bonded with ultraviolet curing glue to complete the optical packaging of the device.

[0029] The present invention has at least the following beneficial effects:

[0030] The present invention realizes the hybrid integration of dielectric-metal hybrid resonant cavity with on-chip silicon and ordinary dielectric waveguide based on on-chip optical interconnection, and utilizes the strong coupling between optical and plasma modes to excite quasi-continuous spectrum bound states, which can not only realize high-sensitivity on-chip optical sensing, but also greatly improve the quality factor and have low transmission loss.

[0031] Of course, any product implementing the present invention does not necessarily need to achieve all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 It is a three-dimensional schematic diagram of the overall structure of the present invention;

[0033] Figure 2 It is a top view schematic diagram of the overall structure of the present invention;

[0034] Figure 3 The on-chip spot converter composed of a multilayer rectangular waveguide and a silicon rectangular waveguide of the present invention, wherein (a) is a three-dimensional structure diagram of the on-chip spot converter; (b) is a coupling efficiency diagram of the spot converter and the silicon waveguide; (c) is a coupling efficiency diagram of the spot converter and the single-mode optical fiber;

[0035] Figure 4 : is a simple harmonic oscillator oscillation model of the hybrid resonant cavity in the present invention, wherein (a) is a three-dimensional structure diagram of the resonant cavity; (b) is a top view of the resonant cavity; (c) is a schematic diagram of the simple harmonic oscillator model of the resonant cavity;

[0036] Figure 5 A schematic diagram of a quasi-continuous spectrum bound state mode excited by the hybrid resonant cavity in the present invention;

[0037] Figure 6This is an analysis of the refractive index sensing performance of the optical chip described in the present invention, wherein (a) is an output spectrum diagram under different refractive indices; and (b) is a relationship diagram between the central wavelength of the quasi-continuous spectrum bound state resonance signal and the ambient refractive index.

[0038] Reference numerals:

[0039] 1. Silicon substrate; 2. Oxide buried layer; 3. Multilayer rectangular waveguide; 31. GaN layer; 32. Si3N4 layer; 33. SU-8 photoresist layer; 4. Reverse tapered portion; 5. Silicon rectangular waveguide; 6. Forward tapered portion; 7. Gold resonant ring; 8. Opening; 9. Silicon disk. DETAILED DESCRIPTION

[0040] The following will be combined with the drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0041] The present invention comprises a silicon rectangular waveguide 5 and a SU-8 / Si3N4 / GaN multilayer rectangular waveguide, wherein a tapered overlapping region exists between the silicon rectangular waveguide 5 and the SU-8 / Si3N4 / GaN multilayer rectangular waveguide for mode spot coupling; the number of the multilayer rectangular waveguide 3 and the silicon rectangular waveguide 5 is set to two, wherein the two SU-8 / Si3N4 / GaN multilayer rectangular straight waveguides are respectively used as input and output ports for direct end face coupling with external single-mode optical fibers; the two silicon rectangular straight waveguides are mainly divided into an input part and an output part, wherein the silicon rectangular straight waveguide of the input part mainly introduces the input optical signal into a dielectric-metal hybrid resonant cavity and excites a quasi-continuous spectrum bound state mode through near-field coupling, and the output silicon rectangular straight waveguide mainly derives the quasi-continuous spectrum bound state in the resonant cavity; the dielectric-metal hybrid resonant cavity is used as a core resonant unit, and its structure can not only simultaneously satisfy the excitation of plasma and traditional optical modes, but also enable the two modes to be strongly coupled, thereby exciting an optical-plasma hybrid quasi-continuous spectrum bound state.

[0042] See also Figure 1-Figure 6 The present invention provides a technical solution: a hybrid resonance-based synaesthesia integrated optical chip, comprising a silicon substrate 1, a buried oxide layer 2 is deposited on the top of the silicon substrate 1, a multilayer rectangular waveguide 3 is installed above the buried oxide layer 2, one end of the multilayer rectangular waveguide 3 is kept flush with the buried oxide layer 2, and a silicon rectangular waveguide 5 is installed on the other end, a reverse taper portion 4 is arranged at one end of the multilayer rectangular waveguide 3 facing the center of the buried oxide layer 2, and a forward taper portion 6 is arranged at one end of the silicon rectangular waveguide 5 away from the center of the buried oxide layer 2, and the forward taper portion 6 is completely covered in the reverse taper portion 4 to form a directional coupling structure;

[0043] The multilayer rectangular waveguide 3 and the silicon rectangular waveguide 5 constitute a coupling unit as a whole. The number of coupling units is at least two, and the two coupling units are symmetrically arranged along the length direction of the oxide buried layer 2 with the center line of the oxide buried layer 2 as the symmetry axis;

[0044] A gold resonant ring 7 is installed at the center between the two coupling units, a hybrid resonant cavity is formed inside the gold resonant ring 7, and two openings 8 are provided along the straight waveguide direction at a position of the gold resonant ring 7 close to the silicon rectangular waveguide 5, for near-field coupling between the silicon rectangular waveguides 5 on both sides and the hybrid resonant cavity;

[0045] A silicon disk 9 is arranged inside the gold resonance ring 7 , the center of the silicon disk 9 coincides with the center of the gold resonance ring 7 , and the silicon disk 9 and the gold resonance ring 7 are indirectly coupled.

[0046] According to the technical solution of this embodiment, the multilayer rectangular waveguide 3 serves as a secondary waveguide structure, and one end is directly end-to-end connected to the single-mode optical fiber, so as to introduce the optical signal into the chip with a small coupling loss, and the other end is connected to the reverse tapered portion 4 of the silicon rectangular waveguide 5 to form a coated directional coupling structure, realize template conversion, and provide efficient fiber-chip optical coupling. The multilayer rectangular waveguide 3 and the reverse tapered portion 4 are integrally formed, and the multilayer rectangular waveguide 3 is sequentially formed with a GaN layer 31, a Si3N4 layer 32 and a SU-8 photoresist layer 33 from bottom to top, and the refractive indices of the GaN layer 31, the Si3N4 layer 32 and the SU-8 photoresist layer 33 in the near-infrared band are 2.4, 2, and 1.53, respectively, wherein SU-8 is an epoxy resin polymer GM-1040 produced by Gerste ltec.

[0047] Furthermore, two symmetrical silicon rectangular waveguides 5 are primary optical interconnect structures, which are mainly used for on-chip optical signal transmission. They can be near-field coupled with the hybrid resonant cavity as an excitation source for exciting plasma modes, and can also detect quasi-continuous spectrum bound state optical signals in the resonant cavity. The silicon rectangular waveguide 5 is made of silicon material, and the thickness of the silicon rectangular waveguide 5 is equal to the thickness of the hybrid resonant cavity, both of which are 220 nm.

[0048] According to the technical solution of this embodiment, the width of the reverse tapered portion 4 gradually decreases along one side of the oxide buried layer 2 toward the center, the forward tapered portion 6 is integrally formed with the silicon rectangular waveguide 5, and the width of the forward tapered portion 6 gradually decreases along the center of the oxide buried layer 2 toward one side, and the forward tapered portion 6 is completely covered in the GaN layer 31 and the Si3N4 layer 32 of the reverse tapered portion 4 to form a directional coupling structure, so that the size of the mode spot can be converted between the multilayer rectangular waveguide 3 and the silicon rectangular waveguide 5, such as Figure 3As shown, (a) is the structural diagram of the on-chip spot converter; (b) is the coupling efficiency diagram of the spot converter and the silicon waveguide; and (c) is the coupling efficiency diagram of the spot converter and the single-mode optical fiber.

[0049] According to the technical solution of this embodiment, the thickness of the buried oxide layer 2 deposited on the SOI silicon substrate 1 is set to 2μm, serving as the SiO2 lower cladding layer of the entire on-chip optical interconnection structure. It should be noted that the thickness of the buried oxide layer 2 is not specifically limited in this embodiment and can be selected according to actual needs.

[0050] According to the technical solution of this embodiment, the outer ring of the dielectric-metal hybrid resonant cavity is called a gold resonant ring 7 with symmetrical openings 8, and the resonant structure at the center of the resonant cavity is called a silicon disk 9. The gold resonant ring 7 completely wraps the silicon disk 9, and only two symmetrical openings 8 are opened near the silicon rectangular waveguide 5. The size of the opening 8 can be set to 100nm-150nm, and can be set to 100nm in this embodiment. The gold resonant ring 7 is directly coupled with the silicon rectangular waveguide 5 to form an on-chip optical interconnection. Since the two are very close, near-field coupling is convenient. The light field input into the silicon rectangular waveguide 5 can directly contact and couple with the metal structure of the resonant cavity without going through a long distance of spatial divergence, thereby exciting a plasma mode; the optical mode in the silicon disk 9 structure can be excited by indirect coupling with the gold resonant ring 7, and the photon-plasma quasi-continuum bound state finally excited in the resonant cavity can be excited by The evanescent field is coupled with the silicon rectangular waveguide 5 of the output part, thereby exporting the optical signal in the resonant cavity. The dielectric-metal hybrid resonant cavity serves as the core resonant unit, and its structure can simultaneously satisfy the excitation of plasma and traditional optical modes, and can make the two modes strongly coupled, thereby exciting an optical-plasma hybrid quasi-continuous spectrum bound state. Moreover, since the resonant cavity has a compact structure and an extremely small size, there is a strong coupling between the plasma mode excited by the silicon rectangular waveguide 5 and the optical mode generated by indirect coupling, and then hybridizes into a quasi-continuous spectrum bound state mode. Different from the traditional supercavity and plasma quasi-continuous spectrum bound state modes, this optical-plasma hybrid quasi-continuous spectrum bound state not only has a large number of mode fields bound on the surface of the metal structure, and is very sensitive to the refractive index of the surrounding environment, but also effectively reduces the negative impact of metal absorption on the mode, further reducing the overall loss of the chip.

[0051] It should be noted that plasma mode refers to the process of generating a plasma effect when a sensor receives a light signal through specific design and processing, thereby improving the signal-to-noise ratio, reducing noise, and enhancing detection performance. The plasma effect is an optical phenomenon. When light waves interact with matter, they can stimulate plasma regions formed by charged particles, which affect the propagation and reception of light. By controlling the formation and distribution of plasma regions, the performance of the sensor can be optimized to a certain extent, enabling it to obtain better signal-to-noise ratios and detection capabilities in different bands and under different conditions.

[0052] Furthermore, in on-chip optical sensors, generating optical modes refers to a mechanism that enables the sensor to selectively respond to and absorb light within a specific wavelength or spectral range through specific design and processing, thereby achieving specific functions and performance; optical modes usually include polarization state, vibration direction, band structure, quantum coherence and other aspects. Different optical modes will have an important impact on the sensor's imaging quality, spectral response range, anti-interference ability, power consumption and other performance. Therefore, by controlling and adjusting the combination and relative intensity of optical modes, on-chip optical sensors can be customized and optimized in different application scenarios.

[0053] Furthermore, the radius of the silicon disk 9 can be set to 390 nm to 430 nm, and the thickness of the silicon disk 9 can be set to 200 nm to 220 nm, which is not specifically limited in this embodiment and can be selected according to actual needs.

[0054] Furthermore, the inner and outer radii of the gold resonance ring 7 are 1.4 μm to 1.6 μm and 1.7 μm to 1.9 μm respectively, the center of the gold resonance ring 7 coincides with the center point of the center line of the silicon rectangular waveguides 5 arranged on both sides, and there is a certain distance between the silicon rectangular waveguides 5 on both sides and the openings 8 on the gold resonance ring 7, and the distance size can be set to 210 nm. This embodiment is not specifically limited here and can be selected according to actual needs.

[0055] like Figure 4 As shown in (a) to (c), according to the simple harmonic oscillator coupling model, the resonant cavity designed in this embodiment can be divided into two structures: a plasma resonance structure and an optical resonance structure, and the coupling between the two satisfies the following rule:

[0056]

[0057] In the formula, x c , γ c and ω represent the resonance amplitude, damping coefficient and resonance frequency of the excited mode in the resonant cavity respectively; g in (ω) represents the near-field coupling coefficient between the input silicon waveguide and the dielectric-metal hybrid resonant cavity; here, the excitation light field satisfies: E(t) = E0e-iωt , the resonant amplitude of the mode: x c (t) = x c e -iωt .

[0058] At the output end, the silicon rectangular waveguide 5 can also couple with the dielectric-metal hybrid resonant cavity, thereby deriving the optical-plasmonic hybrid quasi-continuum bound state generated by it, and the output light field satisfies:

[0059]

[0060] In the formula, x Si and γ Si represents the amplitude and attenuation coefficient of the transmitted light wave in the output silicon waveguide; g out (ω) is the near-field coupling coefficient between the output silicon waveguide and the dielectric-metal hybrid resonator; for most cases, γ c Much larger than γ Si , and g in (ω)≈g out (ω).

[0061] The hybrid resonance-based synaesthesia integrated optical chip provided in this embodiment mainly forms on-chip optical interconnection by near-field coupling of silicon waveguides, which is directly optically coupled with the dielectric-metal hybrid resonant cavity on chip, so it is easier to realize the optoelectronic packaging of the chip; since no upper cladding layer is made, the dielectric-metal hybrid resonant cavity is directly exposed to the air and can be in direct contact with the surrounding environment; Figure 5 As shown, since the quasi-continuous spectrum bound state generated by the hybridization of the optical mode and the plasma mode is not mainly bound inside the material, a large amount of mode field is in the air layer, so it can respond to the refractive index changes of the surrounding environment in real time, that is, once the refractive index of the environment changes, the resonant characteristics of the plasma mode will also change, causing the resonant frequency to shift.

[0062] like Figure 6 As shown in (a) and (b), (a) is the output spectrum under different refractive indices; (b) is the relationship between the central wavelength of the quasi-continuous spectrum bound state resonance signal and the ambient refractive index. The synaesthesia-integrated hybrid resonance integrated optical sensor of this embodiment can achieve high-sensitivity refractive index detection for different ambient refractive indices (1.315-1.365). As the ambient refractive index increases, it can be seen that the resonance peak corresponding to the quasi-continuous spectrum bound state undergoes an obvious red shift. The simulation results show that the wavelength of the resonance peak is linearly related to the refractive index of the surrounding environment. The sensor sensitivity of the chip is calculated to be about 300nm / RI U, which fully meets the requirements of high-performance on-chip optical sensing.

[0063] In summary, the present invention uses a dielectric-metal hybrid resonant cavity as the core element of the device, and a silicon rectangular waveguide 5 as an excitation and transmission unit of an on-chip optical signal. The optical signal of an external light source is transmitted through the silicon rectangular waveguide 5 at the input end for the excitation of a quasi-continuous spectrum bound state, and the silicon rectangular straight waveguide at the output end can derive a stable quasi-continuous spectrum bound state sensing signal in the resonant cavity through near-field coupling; the multilayer rectangular waveguide 3 is used as a secondary waveguide structure, and is coupled with an external single-mode optical fiber and the silicon rectangular waveguide 5, respectively, to achieve template conversion, and provide high-efficiency optical fiber-chip optical coupling;

[0064] Among them, the combination of the multilayer rectangular waveguide 3 and the silicon rectangular waveguide 5 constitutes an on-chip mode spot converter, and the large-sized multilayer rectangular waveguide 3 introduces the optical signal into the chip with a small coupling loss, further reducing the insertion loss of the chip, and utilizing the strong coupling between the optical mode and the plasma mode to excite the quasi-continuous spectrum bound state, it can also realize high-sensitivity on-chip optical sensing, greatly improving the quality factor.

[0065] Embodiment 2:

[0066] The present invention provides a method for preparing a synaesthesia integrated optical chip based on hybrid resonance, which is used to prepare the above-mentioned synaesthesia integrated optical chip based on hybrid resonance, and specifically includes the following steps:

[0067] S1. First, a 350 nm thick electron beam photoresist layer is laid on the top silicon of the silicon substrate 1, and a silicon rectangular waveguide 5 and a silicon disk 9 are produced by electron beam lithography and dry etching;

[0068] S2. A 100nm thick GaN film and a 100nm thick Si3N4 film were grown on a silicon substrate 1 by PECVD, and then a 350nm thick electron beam photoresist was laid, and a Si3N4 / GaN multilayer structure was produced by electron beam lithography and dry etching;

[0069] S3. Then, a 2.7 μm thick SU-8 photoresist is laid on the Si3N4 / GaN multilayer structure, and the SU-8 / Si3N4 / GaN multilayer waveguide is prepared by one-time film throwing, UV lithography, development, and curing;

[0070] S4. A 500nm thick layer of electron beam photoresist is laid on the chip with the waveguide pattern, and the pattern of the gold resonant ring 7 and the silicon disk 9 is formed by electron beam lithography;

[0071] S5. A 220 nm thick gold layer is deposited on the chip with the electron beam photoresist pattern by a metal deposition process. After the metal deposition is completed, the chip is placed in an acetone solution and the electron beam photoresist on the chip is removed by ultrasonic cleaning. At this time, only the gold resonant ring 7 and the silicon disk 9 directly deposited on the buried oxide layer 2 are retained, and the dielectric-metal hybrid resonant cavity is prepared;

[0072] S6. The patterned chip is cleaned for a second time to remove all residual photoresist and complete the device preparation;

[0073] S7. Finally, the chip that has been prepared is packaged based on the light array system, the single-mode optical fiber is end-face coupled and docked with the multi-layer rectangular waveguide 3, and UV-curing adhesive is used for bonding to complete the optical packaging of the device. The entire manufacturing process is compatible with the current CMOS processing technology.

[0074] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.

[0075] For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to the specific circumstances. When an element is referred to as being "assembled on", "installed on", "fixed on" or "set on" another element, it can be directly on the other element or there can also be a centered element. When an element is considered to be "connected" to another element, it can be directly connected to the other element or there may be a centered element at the same time. The terms "vertical", "horizontal", "up", "down", "left", "right" and similar expressions used herein are only for illustrative purposes and are not intended to be the only implementation method.

[0076] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

[0077] In the description of this specification, the description with reference to the terms "one embodiment", "example", "specific example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

Claims

1. A hybrid resonance-based synaesthesia integrated optical chip, comprising a silicon substrate (1), characterized in that: An oxide buried layer (2) is deposited on the top of the silicon substrate (1), a multilayer rectangular waveguide (3) is installed above the oxide buried layer (2), one end of the multilayer rectangular waveguide (3) is kept flush with the oxide buried layer (2), and a silicon rectangular waveguide (5) is installed on the other end, a reverse taper portion (4) is provided at one end of the multilayer rectangular waveguide (3) facing the center of the oxide buried layer (2), and a forward taper portion (6) is provided at one end of the silicon rectangular waveguide (5) away from the center of the oxide buried layer (2), and the forward taper portion (6) is completely covered in the reverse taper portion (4) to form a directional coupling structure; The multilayer rectangular waveguide (3) and the silicon rectangular waveguide (5) integrally form a coupling unit, the number of the coupling units is at least two, and the two coupling units are symmetrically arranged along the length direction of the buried oxide layer (2) with the center line of the buried oxide layer (2) as the symmetry axis; A gold resonant ring (7) is installed at the center between the two coupling units, a hybrid resonant cavity is formed inside the gold resonant ring (7), and two openings (8) are provided in the direction of the straight waveguide at a position of the gold resonant ring (7) close to the silicon rectangular waveguide (5), for near-field coupling between the silicon rectangular waveguides (5) on both sides and the hybrid resonant cavity; A silicon disk (9) is arranged inside the gold resonance ring (7), the center of the silicon disk (9) coincides with the center of the gold resonance ring (7), and the silicon disk (9) and the gold resonance ring (7) are indirectly coupled.

2. The hybrid resonance-based synaesthesia integrated optical chip according to claim 1, characterized in that: The multilayer rectangular waveguide (3) and the reverse tapered portion (4) are integrally formed, and the multilayer rectangular waveguide (3) is sequentially formed with a GaN layer (31), a Si3N4 layer (32), and a SU-8 photoresist layer (33) from bottom to top, wherein the forward tapered portion (6) in the silicon rectangular waveguide (5) is completely encapsulated in the GaN layer (31) and the Si3N4 layer (32), and the refractive indices of the GaN layer (31), the Si3N4 layer (32), and the SU-8 photoresist layer (33) in the near-infrared band are 2.4, 2, and 1.53, respectively.

3. The hybrid resonance-based synaesthesia integrated optical chip according to claim 2, characterized in that: The thickness of the silicon rectangular waveguide (5) is equal to the thickness of the hybrid resonant cavity, both of which are 220 nm.

4. The hybrid resonance-based synaesthesia integrated optical chip according to claim 3, characterized in that: The width of the reverse tapered portion (4) gradually decreases along one side of the oxide buried layer (2) toward the center; The forward tapered portion (6) is integrally formed with the silicon rectangular waveguide (5), and the forward tapered portion (6) gradually decreases along the center of the oxide buried layer (2) toward one side.

5. The hybrid resonance-based synaesthesia optical chip according to claim 4, characterized in that: The thickness of the buried oxide layer (2) is set to 2 μm.

6. The hybrid resonance-based synaesthesia integrated optical chip according to claim 5, characterized in that: The radius of the silicon disk (9) is set to be between 390 nm and 430 nm, and the thickness of the silicon disk (9) is set to be between 200 nm and 220 nm.

7. The hybrid resonance-based synaesthesia optical chip according to claim 5, characterized in that: The inner and outer radii of the gold resonance ring (7) are 1.4 μm to 1.6 μm and 1.7 μm to 1.9 μm respectively, and the width of the opening (8) is 100 nm to 150 nm.

8. The hybrid resonance-based synaesthesia integrated optical chip according to claim 7, characterized in that: The center of the gold resonant ring (7) coincides with the center point of the center line of the silicon rectangular waveguides (5) arranged on both sides, and there is a certain distance between the silicon rectangular waveguides (5) on both sides and the openings (8) on the gold resonant ring (7).

9. The hybrid resonance-based synaesthesia optical chip according to claim 8, characterized in that: The silicon rectangular waveguide (5) and the hybrid resonant cavity form an on-chip optical interconnection by means of near-field coupling, and the light field input into the second rectangular waveguide contacts and couples with the hybrid resonant cavity, thereby exciting a plasma mode; The silicon disk (9) is used to excite an optical mode by indirectly coupling with the gold resonant ring (7).

10. A method for preparing a synaesthesia integrated optical chip based on hybrid resonance, used for preparing a synaesthesia integrated hybrid resonance type integrated optical sensor according to any one of claims 1 to 9, specifically comprising the following: S1. First, a 350 nm thick electron beam photoresist layer is laid on the top silicon of the silicon substrate (1), and a silicon rectangular waveguide (5) and a silicon disk (9) are produced by electron beam lithography and dry etching; S2. A 100 nm thick GaN film and a 100 nm thick Si3N4 film were grown on a silicon substrate (1) by PECVD, and then a 350 nm thick electron beam photoresist layer was laid, and a Si3N4 / GaN multilayer structure was produced by electron beam lithography and dry etching; S3. Then, a 2.7 μm thick SU-8 photoresist is laid on the Si3N4 / GaN multilayer structure, and the SU-8 / Si3N4 / GaN multilayer waveguide is prepared by one-time film throwing, UV lithography, development, and curing; S4. Laying a 500nm thick layer of electron beam photoresist on the chip with the waveguide pattern, the pattern of the gold resonant ring (7) and the silicon disk (9) is formed by electron beam lithography; S5. A 220 nm thick gold layer is deposited on the chip with the electron beam photoresist pattern by a metal deposition process. After the metal deposition is completed, the chip is placed in an acetone solution and the electron beam photoresist on the chip is removed by ultrasonic cleaning. At this time, only the gold resonant ring (7) and the silicon disk (9) directly deposited on the oxide buried layer (2) are retained, and the dielectric-metal hybrid resonant cavity is prepared; S6. The patterned chip is cleaned for a second time to remove all residual photoresist and complete the device preparation; S7. Finally, the chip that has been prepared is packaged based on a light array system, the single-mode optical fiber is end-face coupled and docked with the multi-layer rectangular waveguide (3), and then bonded with ultraviolet curing glue to complete the optical packaging of the device.

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