Circuit board

Abstract

A circuit board is provided. The circuit board includes: a substrate portion including at least one circuit wiring; an adhesive layer disposed on a first side of the substrate portion; and a metal reinforcement layer disposed opposite to the substrate portion with respect to the adhesive layer, in which the metal reinforcement layer includes a first surface having a convex portion and a second surface disposed opposite to the first surface.

Description

Technical Field

[0001] The following description relates to a circuit board. Background Art

[0002] In view of the progress of the electronics industry, electronic devices in the field of information technology (IT), including cameras and mobile phones, have a thin form factor, and thus circuit boards are desired to be simultaneously miniaturized, thin, and high-density.

[0003] A circuit board forms a circuit pattern with a conductive material such as copper on an insulating material, and with the miniaturization of electronic devices in the IT field (including cameras and mobile phones), methods for manufacturing various ultra-thin circuit boards have been proposed, an example of which may be forming a cavity on the circuit board and mounting an electronic component such as an integrated circuit (IC), an active element, or a passive element in the cavity.

[0004] Such an ultra-thin circuit board may reduce the rigidity of the circuit board, which may aggravate the warpage problem, and the warpage generated on the circuit board may cause performance degradation of an electronic device used.

[0005] The above information is presented as background information only to help understand the present disclosure. The above description should not be interpreted as these contents belonging to the prior art of the present disclosure. Summary of the invention

[0006] This summary is provided to introduce selected concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

[0007] In one general aspect, a circuit board includes: a substrate portion including at least one circuit wiring; an adhesive layer disposed on a first side of the substrate portion; and a metal reinforcement layer disposed opposite to the substrate portion relative to the adhesive layer, wherein the metal reinforcement layer includes a first surface having a protrusion and a second surface disposed opposite to the first surface.

[0008] The second surface of the metal reinforcement layer may have a recessed portion.

[0009] A position of the convex portion of the first surface of the metal reinforcement layer and a position of the concave portion of the second surface of the metal reinforcement layer may correspond to each other.

[0010] The convex portions may be provided in number of at least two.

[0011] The first surface of the metal reinforcement layer may contact the first surface of the adhesive layer.

[0012] The first surface of the adhesive layer may have concave portions corresponding to the convex portions of the first surface of the metal reinforcement layer.

[0013] The convex portion of the metal reinforcement layer may have a dome shape.

[0014] The convex portion of the metal reinforcement layer may have a rectangular column shape.

[0015] The substrate portion may include: a first protection layer disposed on the adhesive layer; a first connection pad disposed in the first protection layer; a first insulating layer disposed on the first protection layer; and a first circuit wiring disposed in the first insulating layer.

[0016] The substrate portion may further include a first via layer provided in the first insulating layer and connected to the first circuit wiring and the first connection pad.

[0017] The substrate part may further include a cavity, and at least a portion of the cavity is disposed in the first insulating layer.

[0018] The cavity may extend to the first protective layer.

[0019] The substrate portion may include: a core layer, which is arranged opposite to the adhesive layer and the metal reinforcement layer; a first insulating layer, which is arranged between the adhesive layer and the core layer; a second insulating layer, which is arranged opposite to the first insulating layer relative to the core layer; a first circuit wiring, which is arranged in the first insulating layer; and a second circuit wiring, which is arranged in the second insulating layer.

[0020] The substrate portion may further include: a first connecting pad, which is arranged opposite to the core layer relative to the first insulating layer and is arranged on the surface of the first insulating layer; and a second connecting pad, which is arranged opposite to the core layer relative to the second insulating layer and is arranged on the surface of the second insulating layer.

[0021] The substrate portion may further include: a first via layer disposed in the first insulating layer; and a second via layer disposed in the second insulating layer.

[0022] The substrate portion may also include: a first protective layer, which is arranged opposite to the first insulating layer and the core layer, and is arranged to embed at least a portion of the first connecting pad; and a second protective layer embedded, which is arranged opposite to the second insulating layer and the core layer, and is arranged to embed at least a portion of the second connecting pad.

[0023] Other features and aspects will be readily apparent from the following detailed description and accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 A cross-sectional view of an example circuit board is shown in accordance with one or more embodiments.

[0025] Figure 2 Show Figure 1 A top plan view of an example metal reinforcement layer of an example circuit board is shown.

[0026] Figure 3 Show Figure 1 A cross-sectional view of a variation of the example circuit board shown in FIG.

[0027] Figure 4 Show Figure 3 A top plan view of the metal reinforcement layer of an example circuit board is shown.

[0028] Figure 5 The following are the results of measuring the warpage of the circuit board of the comparative example in the warpage comparison experiment in the temperature drop environment.

[0029] Figure 6 The following are the results of measuring the occurrence of warpage on the circuit board of Example 1 in a warpage comparison experiment in a temperature drop environment.

[0030] Figure 7 The following are the results of measuring the occurrence of warpage on the circuit board of Example 2 in a warpage comparison experiment in a temperature drop environment.

[0031] Figure 8 The following are the results of measuring the warpage of the circuit board of the comparative example in the warpage comparison experiment under the temperature increase environment.

[0032] Fig. 9 The following are the results of measuring the occurrence of warpage on the circuit board of Example 1 in a warpage comparison experiment in a temperature-elevated environment.

[0033] Fig.10 The following are the results of measuring the occurrence of warpage on the circuit board of Example 2 in a warpage comparison experiment in a temperature-elevated environment.

[0034] Throughout the drawings and detailed description, like reference numerals refer to like elements unless otherwise noted. The drawings may not be drawn to scale, and the relative size, proportion, and depiction of elements in the drawings may be exaggerated for clarity, illustration, and convenience. DETAILED DESCRIPTION

[0035] Hereinafter, examples of the present disclosure will be described in detail with reference to the accompanying drawings, but it should be noted that the examples are not limited thereto.

[0036] The following specific embodiments are provided to help the reader gain a comprehensive understanding of the methods, devices, and / or systems described herein. However, various changes, modifications, and equivalents of the methods, devices, and / or systems described herein will be readily understood after understanding the present disclosure. For example, the order of operations described herein is merely an example and is not limited to the order of operations set forth herein, but may be changed as will be readily understood after understanding the present disclosure, except for operations that must occur in a particular order. In addition, descriptions of features known in the art may be omitted for clarity and simplicity.

[0037] The features described herein may be implemented in different forms and should not be construed as being limited to the examples described herein. Rather, the examples described herein have been provided only to illustrate some of the many possible ways to implement the methods, devices, and / or systems described herein that will be readily understood after understanding the present disclosure.

[0038] Throughout the specification, when an element such as a layer, a region or a substrate is described as being "on", "connected to" or "coupled to" another element, it may be directly "on", "connected to" or "coupled to" another element, or one or more other elements may be present. Conversely, when an element is described as being "directly on", "directly connected to" or "directly coupled to" another element, there are no other elements present.

[0039] As used herein, the term “and / or” includes any one and any combination of any two or more of the associated listed items; similarly, “at least one of…” includes any one and any combination of any two or more of the associated listed items.

[0040] Although terms such as "first", "second", and "third" may be used herein to describe various members, components, regions, layers, or portions, these members, components, regions, layers, or portions are not limited by these terms. Rather, these terms are only used to distinguish one member, component, region, layer, or portion from another member, component, region, layer, or portion. Therefore, without departing from the teachings of the examples described herein, the first member, first component, first region, first layer, or first portion mentioned in the examples may also be referred to as the second member, second component, second region, second layer, or second portion.

[0041] For ease of description, spatially relative terms such as "above", "upper", "below", "lower" and the like may be used herein to describe the relationship of one element to another element as shown in the figure. In addition to the orientation depicted in the figure, such spatially relative terms are intended to include different orientations of the device in use or operation. For example, if the device in the figure is turned over, an element described as being "above" or "upper" relative to another element will be "below" or "lower" relative to the other element. Therefore, the term "above" includes both an upper orientation and a lower orientation depending on the spatial orientation of the device. The device may also be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially relative terms used herein will be interpreted accordingly.

[0042] In addition, throughout the specification, the expression "in a plan view" means observing an object portion from above, and the expression "in a cross-sectional view" means observing a cross section obtained by vertically cutting the object portion from the side.

[0043] The terms used herein are only used to describe various examples and are not used to limit the present disclosure. Unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. The terms "include", "comprising", and "having" specify the presence of the stated features, quantities, operations, components, elements, and / or combinations thereof, but do not exclude the presence or addition of one or more other features, quantities, operations, components, elements, and / or combinations thereof.

[0044] Variations in the shapes shown in the drawings may occur due to manufacturing techniques and / or tolerances. Therefore, the examples described herein are not limited to the specific shapes shown in the drawings but include variations in shapes that occur during manufacturing.

[0045] Throughout the specification, the substrate may have a structure that is wide in a plan view and thin in a cross-sectional view, the “plane direction DRW of the substrate” may refer to a direction parallel to the wide and flat surface of the substrate, and the “thickness direction or height direction DRH of the substrate” may refer to a direction perpendicular to the wide and flat surface of the substrate.

[0046] Here, it should be noted that the use of the term "may" with respect to an example (e.g., with respect to what an example may include or may implement) means that there is at least one example that includes or implements such a feature, without limiting that all examples include or implement such a feature.

[0047] As will be readily understood after understanding the present disclosure, the features of the examples described herein may be combined in various ways. In addition, although the examples described herein have various configurations, it will be readily understood after understanding the present disclosure that other configurations are also feasible.

[0048] One or more examples may provide a circuit board that improves warpage of the circuit board while maintaining the thickness of the circuit board.

[0049] According to the circuit board of one or more examples, by forming a convex portion in a metal reinforcement layer to increase bending rigidity, a circuit board having improved warpage even with a thin thickness can be provided.

[0050] Figure 1 A cross-sectional view of an example circuit board is shown in accordance with one or more embodiments.

[0051] Reference Figure 1 The circuit board according to one or more embodiments may include a substrate portion 10, a cavity 20 located in the substrate portion 10, a metal reinforcement layer 30 located below the substrate portion 10, and an adhesive layer 50 interposed between the substrate portion 10 and the metal reinforcement layer 30. The substrate portion 10 includes at least one circuit wiring.

[0052] In an example, the substrate portion 10 may be a printed circuit board (e.g., a flexible printed circuit board). The substrate portion 10 may include a core layer 100, a first insulating layer 130 below the core layer 100, a first circuit wiring 110 in the first insulating layer 130, a first via layer 170 in the first insulating layer 130, a first connection pad 150 below the first insulating layer 130, a second insulating layer 230 above the core layer 100, a second circuit wiring 210 in the second insulating layer 230, a second via layer 270 in the second insulating layer 230, and a second connection pad 250 above the second insulating layer 230.

[0053] The core layer 100 may have a predetermined area and thickness. The core layer 100 may have a first surface 100a and a second surface 100b formed to be opposite to each other. The core layer 100 may have a structure that is wide in a plan view and thin in a cross-sectional view. A direction perpendicular to the first surface 100a or the second surface 100b may refer to a direction perpendicular to a wide and flat surface of the core layer 100.

[0054] The core layer 100 may include a thermosetting resin (such as, but not limited to, epoxy resin, polyimide, etc.) or a thermoplastic resin (such as polyethylene (PE), polycarbonate (PC), or polyvinyl chloride (PVC)), and may also include a resin containing a reinforcing material (such as glass fiber) and / or an inorganic filler, etc. For example, the core layer 100 may include a prepreg, ABF (Ajinomoto Buildup Film), a photosensitive dielectric (PID), a BT (bismaleimide triazine) resin, etc.

[0055] The first circuit wiring 110 may be located below the first surface 100a of the core layer 100. The first circuit wiring 110 may transmit electrical signals. The first circuit wiring 110 may be arranged in various patterns. By way of example only, the first circuit wiring 110 may include a conductive material such as, but not limited to, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof.

[0056] Figure 1 The first circuit wiring 110 is shown to be configured to be arranged in a single wiring layer on the first surface 100a. However, the example is not limited to this. The first circuit wiring 110 can be a multi-layer wiring layer stacked downward, and can include a wiring layer located on the first surface 100a, which also falls within the scope of the present disclosure. The multi-layer wiring layers can be connected to each other through a via layer.

[0057] The first insulating layer 130 may be located below the first surface 100a of the core layer 100. The first circuit wiring 110 may be embedded in the first insulating layer 130. The first insulating layer 130 may include a thermosetting resin (such as but not limited to epoxy resin, polyimide, etc.), a thermoplastic resin (such as polyethylene (PE), polycarbonate (PC), polyvinyl chloride (PVC), etc.). In addition, the first insulating layer 130 may include a resin containing a reinforcing material (such as but not limited to glass fiber) and / or an inorganic filler. In an example, the first insulating layer 130 may include a prepreg, an Ajinomoto deposited film (ABF), a photosensitive dielectric (PID), etc., but is not limited thereto.

[0058] The first connection pads 150 may be located below the first insulating layer 130. That is, the first connection pads 150 may be located on one surface of the first insulating layer 130. One surface of the first insulating layer 130 may refer to a surface opposite to a surface of the first insulating layer 130 contacting the core layer 100. The first connection pads 150 may be disposed below the first insulating layer 130 in various patterns. The first connection pads 150 may include a conductive material such as, but not limited to, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof.

[0059] The first via layer 170 may be located in the first insulating layer 130 and may connect the first circuit wiring 110 and the first connection pad 150. In an example, the first via layer 170 may include copper (Cu), silver (Ag), palladium (Pd), aluminum (Al), nickel (Ni), titanium (Ti), gold (Au), platinum (Pt), or alloys thereof, etc. The first via layer 170 may be formed of the same material as the first circuit wiring 110.

[0060] The first protective layer 190 may be disposed under the first insulating layer 130. The first protective layer 190 may include an insulating material such as a solder resist. At least a portion of the first connection pad 150 may be embedded in the first protective layer 190.

[0061] The second circuit wiring 210 may be located above the second surface 100b of the core layer 100. The second circuit wiring 210 may transmit electrical signals. The second circuit wiring 210 may be arranged in various patterns. The second circuit wiring 210 may include a conductive material such as, but not limited to, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof.

[0062] Figure 1 The second circuit wiring 210 is shown to be configured as a single wiring layer disposed on the second surface 100b. However, the example is not limited thereto. The second circuit wiring 210 may be a multi-layer wiring layer stacked on the second surface 100b, which also falls within the scope of the present disclosure. The multi-layer wiring layers may be connected to each other through via layers.

[0063] The second insulating layer 230 may be located above the second surface 100b of the core layer 100. The second circuit wiring 210 may be embedded in the second insulating layer 230. The second insulating layer 230 may include a thermosetting resin (such as, but not limited to, epoxy resin, polyimide, etc.), a thermoplastic resin (such as polyethylene (PE), polycarbonate (PC), polyvinyl chloride (PVC), etc.). In addition, the second insulating layer 230 may include a resin containing a reinforcing material (such as glass fiber) and / or an inorganic filler. In an example, the second insulating layer 230 may include a prepreg, an Ajinomoto deposited film (ABF), a photosensitive dielectric (PID), etc., but is not limited thereto.

[0064] The second connection pads 250 may be located above the second insulating layer 230. That is, the second connection pads 250 may be located on one surface of the second insulating layer 230. One surface of the second insulating layer 230 may refer to a surface opposite to a surface of the second insulating layer 230 contacting the core layer 100. The second connection pads 250 may be disposed above the second insulating layer 230 in various patterns. The second connection pads 250 may include a conductive material such as, but not limited to, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof.

[0065] The second via layer 270 may be located in the second insulating layer 230, and may connect the second circuit wiring 210 and the second connection pad 250. For example, the second via layer 270 may include copper (Cu), silver (Ag), palladium (Pd), aluminum (Al), nickel (Ni), titanium (Ti), gold (Au), platinum (Pt), or alloys thereof, etc. The second via layer 270 may be formed of the same material as the second circuit wiring 210.

[0066] The second protective layer 290 may be disposed over the second insulating layer 230. The second protective layer 290 may include an insulating material such as a solder resist. At least a portion of the second connection pad 250 may be embedded in the second protective layer 290.

[0067] The cavity 20 may be formed in the substrate portion 10. The cavity 20 may pass through the substrate portion 10 along the height direction DRH, or may be located in a portion of the substrate portion 10. In an example, at least a portion of the cavity 20 may be located in the first insulating layer 130 and may extend to the first protective layer 190. As another example, the cavity 20 may extend from the first protective layer 190 to the second protective layer 290. Figure 1 , the width of the cavity 20 is shown as being constant, but is not limited thereto. In an example, the width of the cavity 20 may vary according to the height, that is, the width of the cavity 20 overlapping the first protective layer 190 and the width of the cavity 20 overlapping the second protective layer 290 may be different from each other. In an example, the cavity 20 may have a portion whose width gradually increases from the first protective layer 190 to the second protective layer 290. The electronic component EC mounted on the substrate portion 10 may be located in the cavity 20. In a non-limiting example, the electronic component EC may be an integrated circuit (IC). The cavity 20 may be formed in plurality and may be positioned to be spaced apart from each other.

[0068] The metal reinforcement layer 30 may be disposed below the substrate portion 10. The metal reinforcement layer 30 supports the substrate portion 10 to prevent warping. The metal reinforcement layer 30 may include a metal material such as, but not limited to, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof, but is not limited thereto.

[0069] The adhesive layer 50 may be interposed between the substrate portion 10 and the metal reinforcement layer 30. That is, the metal reinforcement layer 30 may be attached to the substrate portion 10 through the adhesive layer 50. In an example, the adhesive layer 50 may include a conductive material. The adhesive layer 50 may electrically interconnect the substrate portion 10 and the metal reinforcement layer 30. At this time, the metal reinforcement layer 30 may serve as a ground layer.

[0070] Figure 2 It is shown Figure 1 A top plan view of the metal reinforcement layer of a circuit board is shown.

[0071] Reference Figure 1 and Figure 2 , the metal reinforcement layer 30 may have a first surface 30a and a second surface 30b opposite to each other. In an example, the adhesive layer 50 may be attached to the first surface 30a. The convex portion 310 may be formed on the first surface 30a. The convex portion 310 may be provided in a number of at least two. A plurality of convex portions 310 may be formed on the first surface 30a, and the metal reinforcement layer 30 formed with the plurality of convex portions 310 has a relief structure in which a convex shape protrudes at regular intervals. The concave portion 330 may be formed in the second surface 30b. The convex portion 310 may have a dome shape. The convex portion 310 and the concave portion 330 may be formed to correspond to each other. That is, the convex portion 310 and the concave portion 330 may overlap each other in a plan view, and the concave portion 330 may be formed in a spherical concave shape corresponding to the dome shape of the convex portion 310. When the convex portion 310 and the concave portion 330 are formed to correspond to each other in position, bending rigidity against pressure applied from above increases, and thus warpage can be improved even without increasing the thickness of the metal reinforcement layer 30. Other substrate components may not be bonded to the second surface 30b.

[0072] The adhesive layer 50 may be interposed between the substrate portion 10 and the metal reinforcement layer 30 to attach the substrate portion 10 to the metal reinforcement layer 30. In addition, when the electronic component EC is inserted into the cavity 20, the adhesive layer 50 may provide a location where the electronic component EC can be placed. In addition, the adhesive layer 50 may fix the electronic component EC located in the cavity 20. The recess 510 may be formed on the first surface of the adhesive layer 50 in contact with the first surface 30a of the metal reinforcement layer 30. The recess 510 may have a spherical concave shape corresponding to the dome-shaped convex portion 310 formed on the first surface 30a of the metal reinforcement layer 30.

[0073] Figure 3 It is shown Figure 1 and Figure 2 A deformed cross-sectional view of a circuit board is shown. Figure 4 It is shown Figure 3 A top plan view of the metal reinforcement layer of a circuit board is shown.

[0074] Figure 3 and Figure 4 The circuit board shown may have Figure 1 and Figure 2 That is, the circuit board according to the embodiment may include a substrate portion 10 , a cavity 20 disposed in the substrate portion 10 , an adhesive layer 60 disposed under the substrate portion 10 , and a metal reinforcement layer 40 disposed under the adhesive layer 60 .

[0075] Reference Figure 3 and Figure 4, the metal reinforcement layer 40 of the circuit board according to the embodiment may be formed with a convex portion 410 having a rectangular column shape in a plan view on the first surface 40a. Figure 3 It is shown that the edge of the convex portion 410 has a sharp corner shape, but is not limited thereto, and the edge of the convex portion 410 may also have a curved shape.

[0076] The recess 430 may be formed in the second surface 40b of the metal reinforcement layer 40. In an example, the position of the recess 430 may be formed to correspond to the position of the convex portion 410. That is, the convex portion 410 and the recess 430 may overlap in a plan view, and the recess 430 may be formed in a rectangular concave shape corresponding to the rectangular column shape of the convex portion 410.

[0077] The recess 610 may be formed on the first surface of the adhesive layer 60 contacting the first surface 40a of the metal reinforcement layer 40. The recess 610 may be formed in a rectangular concave shape corresponding to the rectangular column-shaped protrusion 410 formed on the first surface 40a of the metal reinforcement layer 40.

[0078] As such, according to the circuit board of the embodiment, the respective protrusions 310 and 410 formed on the respective metal reinforcement layers 30 and 40 increase the bending rigidity of the circuit board, and thus, the warpage can be improved while maintaining the overall thickness of the circuit board.

[0079] [Warp comparison test]

[0080] In the following, reference will be made to Figures 5 to 10 Describe the warpage comparison experiment.

[0081] (Examples and Comparative Examples)

[0082] Circuit boards of Comparative Example, Example 1, and Example 2 in which a printed circuit board as a substrate layer and a metal plate as a metal reinforcement layer were bonded via an adhesive layer were manufactured in plural quantities.

[0083] The printed circuit board was manufactured to have an elastic modulus of 25 GPa, a Poisson's ratio of 0.3, a coefficient of thermal expansion (CTE) of 15 ppm / °C (when the temperature is below 200°C) and 25 ppm / °C (when the temperature exceeds 200°C), and dimensions of 10 mm×15 mm×0.25 mm.

[0084] The metal plate was manufactured to have an elastic modulus of 110 GPa, a Poisson's ratio of 0.3, a thermal expansion coefficient of 11 ppm / ° C., and a size of 10 mm×15 mm×0.15 mm.

[0085] The adhesive layer was manufactured to have an elastic modulus of 3 GPa, a Poisson's ratio of 0.3, a thermal expansion coefficient of 71 ppm / °C (when the temperature is below 57°C) and 129 ppm / °C (when the temperature exceeds 57°C), and a size of 10 mm×15 mm×0.25 mm.

[0086] The metal plate of the comparative example was prepared so that both surfaces were flat (flat metal plate).

[0087] In the metal plate of Example 1, a plurality of dome-shaped convex portions with a height of 0.03 mm are formed on the first surface, and concave portions with a height of 0.03 mm corresponding to the convex portions are formed in the second surface (circular pattern metal plate). The convex portions and the concave portions are formed by a process of applying pressure to the second surface.

[0088] In the metal plate of Example 2, a plurality of convex portions in the shape of rectangular columns with a height of 0.03 mm are formed on the first surface, and concave portions with a height of 0.03 mm corresponding to the convex portions are formed in the second surface (square pattern metal plate). The convex portions and the concave portions are formed by a process of applying pressure to the second surface.

[0089] (Experimental Example 1: Warpage Measurement under Cooling Conditions)

[0090] Figures 5 to 7 : is a graph showing the measurement results of the warpage generation for each of the circuit boards of the comparative example, Example 1, and Example 2 in the warpage comparison experiment in the temperature drop environment.

[0091] In Experimental Example 1, while the temperature was lowered from a reference temperature of 170° C. without warping to a room temperature of 25° C., height differences from a reference height of 0.00 to a plurality of points were measured.

[0092] Table 1:

[0093] Warpage measurement results in a cooling environment

[0094] 170℃ to 25℃ Comparison Examples Example 1 Example 2 Determination of warpage -109.1μm -95.57μm -79.68μm Warpage ratio 1.0 0.876 0.730

[0095] In Table 1, the measured warp is the value with the largest absolute value among the height differences from the reference height 0.00 to each measuring point. The warp ratio is the relative ratio of the measured warps of Example 1 and Example 2 when the measured warp of the comparative example is 1.0.

[0096] As shown in Table 1, the warpage of the circuit board using the flat metal plate was determined to be the highest. The circuit board using the circular pattern metal plate showed better improved warpage than the flat metal plate, and the square pattern metal plate showed the best improved warpage.

[0097] (Experimental Example 2: Warpage Measurement under Heating Conditions)

[0098] Figures 8 to 10 The results of measurement of warpage generation for each of the circuit boards of the comparative example, Example 1, and Example 2 in the warpage comparison experiment under a temperature increase environment are shown.

[0099] In Experimental Example 2, while the temperature was increased from a reference temperature of 170° C. without warping to a high temperature of 260° C., height differences from a reference height of 0.00 to a plurality of points were measured.

[0100] Table 2:

[0101] Warpage measurement results in a temperature-elevated environment

[0102] 170℃ to 260℃ Comparison Examples Example 1 Example 2 Determination of warpage 116.4μm 101.2μm 82.43μm Warpage ratio 1.0 0.869 0.708

[0103] In Table 2, the measured warp is the value with the largest absolute value among the height differences from the reference height 0.00 to each measuring point. The warp ratio is the relative ratio of the measured warps of Example 1 and Example 2 when the measured warp of the comparative example is 1.0.

[0104] As shown in Table 2, the warpage of the circuit board using the flat metal plate was determined to be the highest. The circuit board using the circular pattern metal plate showed better improved warpage than the flat metal plate, and the square pattern metal plate showed the best improved warpage.

[0105] Although specific examples have been shown and described above, it will be readily understood after understanding the present disclosure that various changes in form and detail may be made in these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein are considered to be descriptive only and not for limiting purposes. The description of the features or aspects in each example will be considered to apply to similar features or aspects in other examples. If the described techniques are performed in a different order, and / or if the components in the described systems, architectures, devices, or circuits are combined in different ways, and / or replaced or supplemented by other components or their equivalents, suitable results may be achieved. Therefore, the scope of the present disclosure is not limited by specific embodiments, but by the claims and their equivalents, and all variations within the scope of the claims and their equivalents should be interpreted as included in the present disclosure.

Claims

1. A circuit board, comprising: A substrate portion including at least one circuit wiring; an adhesive layer disposed on the first side of the substrate portion; as well as A metal reinforcement layer is disposed opposite to the adhesive layer and the substrate portion. The metal reinforcement layer includes a first surface having a convex portion and a second surface arranged opposite to the first surface.

2. The circuit board according to claim 1, wherein: The second surface of the metal reinforcement layer has a recessed portion.

3. The circuit board according to claim 2, wherein: Positions of the convex portions of the first surface of the metal reinforcement layer and positions of the concave portions of the second surface of the metal reinforcement layer correspond to each other.

4. The circuit board according to claim 1, wherein: The convex parts are provided in number of at least two.

5. The circuit board according to claim 1, wherein: The first surface of the metal reinforcement layer contacts the first surface of the adhesive layer.

6. The circuit board according to claim 5, wherein: The first surface of the adhesive layer has concave portions corresponding to the convex portions of the first surface of the metal reinforcement layer.

7. The circuit board according to claim 1, wherein: The convex portion of the metal reinforcement layer has a dome shape.

8. The circuit board according to claim 1, wherein: The convex portion of the metal reinforcement layer has a rectangular column shape.

9. The circuit board according to claim 1, wherein: The substrate portion comprises: A first protective layer, disposed on the adhesive layer; A first connecting pad is provided in the first protective layer; A first insulating layer, disposed on the first protective layer; and The first circuit wiring is arranged in the first insulating layer.

10. The circuit board according to claim 9, wherein: The substrate portion further includes a first via layer provided in the first insulating layer and connected to the first circuit wiring and the first connection pad.

11. The circuit board according to claim 9, wherein: The substrate portion further includes a cavity, and at least a portion of the cavity is disposed in the first insulating layer.

12. The circuit board according to claim 11, wherein: The cavity extends to the first protective layer.

13. The circuit board according to claim 1, wherein: The substrate portion comprises: A core layer, arranged opposite to the adhesive layer and the metal reinforcement layer; a first insulating layer, disposed between the adhesive layer and the core layer; a second insulating layer, arranged opposite to the first insulating layer relative to the core layer; a first circuit wiring disposed in the first insulating layer; and The second circuit wiring is arranged in the second insulating layer.

14. The circuit board according to claim 13, wherein: The substrate portion further includes: a first connection pad, arranged opposite to the core layer with respect to the first insulating layer and arranged on a surface of the first insulating layer; and The second connection pad is arranged opposite to the core layer with respect to the second insulating layer and is arranged on the surface of the second insulating layer.

15. The circuit board according to claim 14, wherein: The substrate portion further includes: A first via layer, disposed in the first insulating layer; and The second via layer is arranged in the second insulating layer.

16. The circuit board according to claim 14, wherein: The substrate portion further includes: a first protective layer disposed opposite to the core layer relative to the first insulating layer and arranged to embed at least a portion of the first connection pad; and The second protection layer is disposed opposite to the core layer with respect to the second insulating layer and is disposed so as to embed at least a portion of the second connection pad.

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