Circuit board with metallized half-hole and its fabrication method

Abstract

This application discloses a circuit board with metallized half-holes and a method for manufacturing the same. The method includes: providing an inner layer circuit board; stacking an outer layer board on the outside of the inner layer circuit board; placing a first fixture and a second fixture on both sides of the outer layer board and pressing them together, so that the protrusion of the first fixture is embedded in a hole, and pressing the protrusion to bend it and adhere it to the sidewall of the hole; removing the outer layer circuit board and the inner layer circuit board on the side of the hole opposite to the protrusion, and the remaining metallized hole forms a metallized half-hole, thus obtaining a circuit board. The circuit board with metallized half-holes and the method for manufacturing the same described in this application, when retrieving the half-hole, because the sidewall of the metallized hole is not plated with copper, the point of contact with the milling cutter is a dielectric layer rather than a copper-plated layer, thus greatly reducing the probability of copper wires and copper peeling, and improving product yield.

Description

Technical Field

[0001] This application relates to the field of circuit board technology, and in particular to a circuit board with metallized half-holes and a method for manufacturing the same. Background Technology

[0002] A metallized half-hole refers to a design where only half of the hole is metallized on the circuit board outline, with the other half milled off during the forming process. Metallized half-holes combine the conductivity of a round hole with the ability to be soldered and fixed using the hole wall, thus securing chip pins. Therefore, they are commonly used for mounting high-precision IC chips.

[0003] Currently, CNC milling machines are commonly used to shape metallized holes. During the milling process, because the inner contour of the metallized hole is already completed before shaping, the copper plating layer in the hole sidewall area has sufficient room to extend. Combined with the good ductility of the copper plating layer itself, this easily leads to problems such as copper peeling and the formation of burrs (copper wires, streaks). Copper wires remaining in the metallized half-hole can easily cause problems such as weak solder joints, incomplete soldering, and short circuits during product welding, reducing product yield. Summary of the Invention

[0004] In view of this, this application proposes a circuit board with metallized half-holes and a method for manufacturing the same, in order to reduce the probability of copper peeling and burrs (copper wires, burrs) and improve product yield.

[0005] One embodiment of this application provides a method for manufacturing a circuit board with metallized half-holes, which includes the following steps:

[0006] An inner circuit board is provided, the inner circuit board including a first substrate layer, a first circuit layer formed on the surface of the first substrate layer, a dielectric layer, a second circuit layer formed on the surface of the dielectric layer, and an adhesive layer located between the first circuit layer and the dielectric layer; the inner circuit board has a through hole penetrating the inner circuit board along the thickness direction.

[0007] An outer layer substrate is stacked on the outside of the inner layer circuit board. The outer layer substrate includes an adhesive layer, a second substrate layer, and a metal layer arranged sequentially. The adhesive layer is located between the inner layer circuit board and the second substrate layer. The outer layer substrate has a through hole, and a portion of the adhesive layer, the second substrate layer, and the metal layer protrudes from the sidewall of the through hole to form a protrusion. A portion of the sidewall of the through hole is recessed inward to form a groove, and the bottom wall of the groove is the second substrate layer along the recess direction.

[0008] A first fixture and a second fixture are placed on both sides of the outer substrate. The first fixture includes a body and a boss protruding from the body. The first fixture and the second fixture are pressed together to bond the inner circuit board to the outer substrate. The boss is embedded in the through hole and the through hole to squeeze the protrusion so that the protrusion bends and bonds to the side wall of the through hole.

[0009] Remove the first fixture and the second fixture, and fabricate the metal layer to form an outer circuit layer. The outer circuit layer, the second substrate layer, and the adhesive layer form an outer circuit board.

[0010] The through hole and the through hole form a metallized hole. The outer circuit board and the inner circuit board on the side opposite to the protrusion in the metallized hole are removed, and the remaining metallized hole forms a metallized half hole, thus obtaining the circuit board.

[0011] In one embodiment, the protrusion is made of silicone.

[0012] In one embodiment, the method for fabricating the inner layer circuit substrate includes the following steps:

[0013] A first copper-clad laminate is provided, the first copper-clad laminate including a first substrate layer and a first copper foil layer disposed on at least one surface of the first substrate layer, and the first copper foil layer is fabricated to form a first circuit layer;

[0014] An adhesive layer and a second copper-clad laminate are laminated on the outside of the first circuit layer. The second copper-clad laminate includes a dielectric layer and a second copper foil layer disposed on the surface of the dielectric layer. The adhesive layer is located between the first circuit layer and the dielectric layer.

[0015] The second copper foil layer is fabricated to form the second circuit layer, and the through hole is provided through the second circuit layer, the dielectric layer, the adhesive layer, the first circuit layer and the first substrate layer to obtain the inner circuit substrate.

[0016] In one embodiment, after the step of "forming the first copper foil layer into a first circuit layer", the method for preparing the inner circuit substrate further includes: setting a first protective layer on the surface of the first circuit layer opposite to the first substrate layer.

[0017] In one embodiment, the adhesive layer has an opening, and the first protective layer covers the opening.

[0018] In one embodiment, before the step of "removing the outer circuit board and the inner circuit board disposed opposite to the protrusion", the preparation method further includes: providing a second protective layer on the surface of the outer circuit layer away from the second substrate layer.

[0019] In one embodiment, after the step of setting the second protective layer, the preparation method further includes: setting an opening, the opening penetrating the outer circuit board, the second circuit layer and the dielectric layer, and communicating with the opening to form a blind via, wherein the surface of the first protective layer is exposed from the blind via.

[0020] One embodiment of this application provides a circuit board with metallized half-holes, comprising an inner circuit board and an outer circuit board. The inner circuit board includes a first substrate layer, a first circuit layer formed on the surface of the first substrate layer, a dielectric layer, a second circuit layer formed on the surface of the dielectric layer, and an adhesive layer located between the first circuit layer and the dielectric layer. The outer circuit board includes an adhesive layer, a second substrate layer, and an outer circuit layer formed on the surface of the second substrate layer, wherein the adhesive layer is located between the second substrate layer and the second circuit layer.

[0021] The circuit board has a metallized half-hole that penetrates the inner circuit board and the outer circuit board. The outer circuit board also includes a protrusion located within the metallized half-hole, the protrusion protruding from the sidewall of the metallized half-hole. Along the radial direction of the metallized half-hole, the protrusion includes the adhesive layer, the second substrate layer, and the metal layer, the adhesive layer being located between the adhesive layer and the second substrate layer.

[0022] In one embodiment, the circuit board further includes a conductive structure that electrically connects the first circuit layer, the second circuit layer, and the outer circuit layer.

[0023] In one embodiment, the circuit board further includes a first protective layer and a second protective layer. The first protective layer is disposed on the surface of the first circuit layer opposite to the first substrate layer, and the second protective layer is disposed on the surface of the outer circuit layer opposite to the second substrate layer.

[0024] The circuit board with metallized half-holes and its manufacturing method described in this application greatly reduce the probability of copper wires and copper peeling during the half-hole refining process because the sidewalls of the metallized holes are not electroplated with copper, and the point of contact with the milling cutter is a dielectric layer rather than an electroplated copper layer. This improves the product yield. Attached Figure Description

[0025] Figure 1 This is a schematic diagram of a milling cutter milling a semi-metallized hole according to an embodiment of the prior art.

[0026] Figures 2 to 7 This is a cross-sectional view of the fabrication of an inner layer circuit board according to an embodiment of this application.

[0027] Figure 8for Figure 7 The diagram shows a plan view of the inner layer circuit board.

[0028] Figure 9 In order to be in Figure 7 The diagram shows a cross-sectional view of an outer layer substrate stacked on the outside of an inner layer circuit board.

[0029] Figure 10 for Figure 9 The diagram shows a plan view of the outer substrate.

[0030] Figure 11 In order to be in Figure 9 The diagram shows a cross-sectional view of the structure in which the first and second fixtures are placed and pressed together.

[0031] Figure 12 To remove Figure 11 The first and second fixtures are shown in a cross-sectional view after the wiring is fabricated.

[0032] Figure 13 for Figure 12 The diagram shows a plan view of the structure.

[0033] Figure 14 To remove Figure 12 A cross-sectional view of the circuit board obtained after a portion of the structure described in the figure.

[0034] Figure 15 for Figure 14 The circuit board shown is a plan view.

[0035] Explanation of main component symbols

[0036] Circuit board 100

[0037] Metallized half-hole 110

[0038] Inner circuit board 10

[0039] First substrate layer 11

[0040] First line layer 12

[0041] Dielectric layer 13

[0042] Second line layer 14

[0043] Adhesive layer 15

[0044] First protective layer 16

[0045] First copper-clad laminate 10a

[0046] First copper foil layer 12a

[0047] Second copper-clad laminate 10b

[0048] Second copper foil layer 14b

[0049] Opening 150

[0050] 160mm opening

[0051] Blind hole 170

[0052] Through hole 101

[0053] Part 1 1011

[0054] Part Two 1012

[0055] Outer substrate 20a

[0056] Outer circuit board 20

[0057] Adhesive layer 21

[0058] Second substrate layer 22

[0059] Metal layer 23

[0060] Protrusion 24

[0061] Outer circuit layer 25

[0062] Second protective layer 26

[0063] Through holes 201, 202

[0064] Groove 203

[0065] The first fixture 30

[0066] Main body part 31

[0067] 32 convex part

[0068] Second fixture 40

[0069] Conductive structure 50

[0070] The following detailed description, in conjunction with the accompanying drawings, further illustrates the embodiments of this application. Detailed Implementation

[0071] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which embodiments of this application belong. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the embodiments of this application.

[0072] It should be noted that all directional indicators (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicator will also change accordingly.

[0073] Embodiments of this application are described herein with reference to cross-sectional views, which are schematic diagrams of idealized embodiments (and intermediate configurations) of this application. Therefore, variations in the shapes illustrated due to manufacturing processes and / or tolerances are foreseeable. Consequently, embodiments of this application should not be construed as limited to the specific shapes of the areas illustrated herein, but should include, for example, deviations in shape due to manufacturing processes. The areas shown in the figures are merely illustrative, and their shapes are not intended to represent the actual shapes of the illustrated devices, nor are they intended to limit the scope of this application.

[0074] like Figure 1 As shown, in the prior art, when milling semi-metallized holes using a CNC milling machine (milling cutter), the spindle rotates clockwise and the cutting tool moves counterclockwise. When the milling cutter cuts points A and B, both points A and B are subjected to a shearing force F to the right. The difference is: at point A, the milling cutter first cuts the substrate layer, severing it before continuing to cut the copper plating layer; at point B, the milling cutter first cuts the copper plating layer, and under the action of F, presses the copper plating layer against the substrate layer at point B, causing it to lose its extension space, resulting in a clean and smooth fracture. The copper plating layer (hole copper) at point A is a continuous crystal with very good ductility. Under the action of the shearing force F, the copper plating layer at point A has exactly one extension space, so the copper plating layer at point A extends along the direction of the milling cutter's movement until F overcomes the bonding force between its crystals, and burrs (burrs, copper wires) are formed. If the copper plating layer does not bond well with the substrate and is insufficient to resist the effect of F, the copper plating layer on the hole wall near the pattern area at point A will partially peel off, resulting in copper peeling.

[0075] Therefore, this application proposes a circuit board with metallized half-holes and a method for manufacturing the same, in order to reduce the probability of copper peeling and burrs (copper wires, burrs) and improve product yield.

[0076] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0077] Please see Figures 2 to 15 The first aspect of this application provides a method for fabricating a circuit board 100 having a metallized half-hole 110, which includes steps S10 to S60. It is understood that the step numbers are intended to clearly describe the specific fabrication method and are not intended to limit the order of the steps.

[0078] Please see Figures 2 to 7 In step S10, an inner layer circuit board 10 is provided. The inner layer circuit board 10 includes a first substrate layer 11, a first circuit layer 12 formed on the surface of the first substrate layer 11, a dielectric layer 13, a second circuit layer 14 formed on the surface of the dielectric layer 13, and an adhesive layer 15 located between the first circuit layer 12 and the dielectric layer 13. The method for preparing the inner layer circuit board 10 may include steps S11 to S16.

[0079] like Figure 2 As shown, in step S11, a first copper-clad laminate 10a is provided. The first copper-clad laminate 10a includes a first substrate layer 11 and a first copper foil layer 12a disposed on at least one surface of the first substrate layer 11. In this embodiment, the first copper foil layer 12a is disposed on two opposite surfaces of the first substrate layer 11. In other embodiments, the first copper foil layer 12a may be disposed on only one surface (upper surface or lower surface) of the first substrate layer 11.

[0080] The material of the first substrate layer 11 may be, but is not limited to, polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate dimethyl acid glycol ester (PEN), polydimethylsiloxane (PDMS), liquid crystal polymer (LCP), modified polyimide (MPI), etc. In this embodiment, the material of the first substrate layer 11 is PI.

[0081] like Figure 3 As shown, in step S12, the first copper foil layer 12a is fabricated to form the first circuit layer 12. The first circuit layer 12 can be fabricated by steps such as lamination, exposure, development, etching, and film removal. These steps are common techniques in the field and will not be described in detail here.

[0082] like Figure 4 As shown, in step S13, a first protective layer 16 can also be formed on the surface of the first circuit layer 12 facing away from the first substrate layer 11. The first protective layer 16 only covers a portion of the surface of the first circuit layer 12. In this embodiment, the first protective layer 16 is a cover-lay (CVL). In other embodiments, the first protective layer 16 can also be a solder resist layer.

[0083] like Figure 5 and Figure 6As shown, in step S14, the adhesive layer 15 and the second copper clad laminate 10b are pressed onto the outside of the first circuit layer 12 (the side opposite to the first substrate layer 11).

[0084] like Figure 5 As shown, an adhesive layer 15 and a second copper-clad laminate 10b can be sequentially stacked on the outside of the first circuit layer 12. The second copper-clad laminate 10b includes a dielectric layer 13 and a second copper foil layer 14b disposed on one surface of the dielectric layer 13. The dielectric layer 13 can be made of one of the following: FR-4 grade polyimide, polypropylene, liquid crystal polymer, polyetheretherketone, polyethylene terephthalate, and polyethylene naphthalate. The adhesive layer 15 is located between the first circuit layer 12 and the dielectric layer 13. The adhesive layer 15 can have an opening 150 extending through the adhesive layer 15 along its thickness direction. The opening 150 is approximately corresponding to the first protective layer 16, and the orthographic projection of the first protective layer 16 onto the adhesive layer 15 can cover the opening 150. The adhesive layer 15 can be made of conventional or unconventional adhesives in the art. In this embodiment, the adhesive layer 15 is made of polypropylene (PP). In this embodiment, the first circuit layer 12 has two layers, and an adhesive layer 15 and a second copper clad laminate 10b are respectively stacked on the outer side of the two first circuit layers 12.

[0085] Then, the above structure can be pressed using a high-speed press or similar device to obtain, as shown in the figure. Figure 6 The structure is shown. After lamination, the adhesive layer 15 bonds the dielectric layer 13 and the first circuit layer 12, and covers part of the surface of the first protective layer 16. One end of the opening 150 is the dielectric layer 13, and the other end is the first protective layer 16.

[0086] like Figure 6 As shown, in step S15, the second copper foil layer 14b is fabricated to form the second circuit layer 14. The second circuit layer 14 can be fabricated by steps such as lamination, exposure, development, etching, and film removal. These steps are common techniques in the field and will not be described in detail here.

[0087] like Figure 7 As shown, step S16 can be performed by, but is not limited to, mechanical drilling, laser drilling, etc. Figure 6 A through-hole 101 is formed in the structure shown to obtain an inner circuit board 10. The through-hole 101 penetrates the entire inner circuit board 10 along the thickness direction, that is, it penetrates the second circuit layer 14, the dielectric layer 13, the adhesive layer 15, the first circuit layer 12 and the first substrate layer 11.

[0088] like Figure 7 As shown, along the thickness direction of the inner circuit board 10 (i.e., Figure 7In the vertical direction, the diameter of the through hole 101 is not constant. Along the thickness direction, the through hole 101 can be divided into a first part 1011 and a second part 1012. The sidewall of the first part 1011 is the second circuit layer 14, and the sidewall of the second part 1012 is the dielectric layer 13, the adhesive layer 15, and the first substrate layer 11. The diameter of the hole in the first part 1011 is larger than that in the second part 1012; that is, along the radial direction, the surfaces of the adhesive layer 15 and the first substrate layer 11 protrude beyond the surface of the second circuit layer 14. Therefore, in Figure 8 In the plan view of the inner circuit board 10 near the region of the through hole 101 shown, the dielectric layer 13 can be seen on the sidewall of the through hole 101.

[0089] Please see Figure 9 In step S20, an outer layer substrate 20a is stacked on the outside of the inner layer circuit substrate 10. In this embodiment, an outer layer substrate 20a is stacked on both the upper and lower sides of the inner layer circuit substrate 10. In other embodiments, an outer layer substrate 20a may be stacked only on the upper or lower side of the inner layer circuit substrate 10.

[0090] The outer substrate 20a includes an adhesive layer 21, a second substrate layer 22, and a metal layer 23 disposed sequentially. The adhesive layer 21 is located between the inner circuit board 10 and the second substrate layer 22. The adhesive layer 21 may be, but is not limited to, epoxy-based pure adhesive (BS), the second substrate layer 22 may be, but is not limited to, PI, and the metal layer 23 may be, but is not limited to, copper.

[0091] In this embodiment, the lower outer substrate 20a has a through hole 201, and the upper outer substrate 20a has a through hole 202. Both through holes 201 and 202 penetrate the adhesive layer 21, the second substrate layer 22, and the metal layer 23 along the thickness direction. The diameter of the through hole 201 is smaller than the diameter of the second portion 1012 of the through hole 101, and the diameter of the through hole 202 is approximately the same as the diameter of the first portion 1011. The through hole 202 is correspondingly disposed to the first portion 1011, and the sidewall of the through hole 201 can be correspondingly disposed to the sidewall of the second portion 1012.

[0092] like Figure 9 and Figure 10As shown, a portion of the adhesive layer 21, the second substrate layer 22, and the metal layer 23 protrude from the sidewall of the through-hole 201, forming a protrusion 24. The protrusion 24 can be considered as a portion of the circular through-hole 201 where a portion of the sidewall bulges towards the center. A portion of the sidewall of the through-hole 201 is recessed inward to form a groove 203. Along the recessed direction (i.e., the radial direction of the through-hole 201), the bottom wall of the groove 203 is the second substrate layer 22. That is, a portion of the surface of the second substrate layer 22 can be exposed through the groove 203. In this embodiment, there are two grooves 203 within the through-hole 201, located on both sides of the protrusion 24, and the two grooves 203 can be symmetrically arranged about the protrusion 24.

[0093] It is understandable that when only one outer substrate 20a is stacked, the outer substrate 20a is an outer substrate 20a with a small aperture through hole 201 and a protrusion 24 formed in the through hole 201.

[0094] Please see Figure 11 In step S30, a first fixture 30 and a second fixture 40, respectively adapted to each other, are placed on both sides of the outer substrate 20a. The first fixture 30 includes a body portion 31 and a boss portion 32 protruding from the body portion 31, and the cross-section of the first fixture 30 is approximately T-shaped. The second fixture 40 is approximately plate-shaped and can be pressed against the boss portion 32 of the first fixture 30 to press the structure to be pressed. The first fixture 30 is placed on one side of the outer substrate 20a having the protrusion 24. When there are two outer substrates 20a, the second fixture 40 is placed outside the other outer substrate 20a; when there is only one outer substrate 20a, the second fixture 40 is placed outside the second circuit layer 14 away from the outer substrate 20a (which has the protrusion 24). The boss portion 32 is placed approximately corresponding to the through hole 201.

[0095] After placing the first fixture 30 and the second fixture 40, press the first fixture 30 and the second fixture 40 together to bond the inner circuit board 10 to the outer circuit board 20a, and insert the boss portion 32 into the through hole 201 and the through hole 101 of the inner circuit board 10, so as to press the protrusion 24 to bend and bond it to the side wall of the through hole 101. The protrusion 24 is bent at approximately 90°, so that the adhesive layer 21 is bonded to the dielectric layer 13 and the adhesive layer 15 on the side wall of the through hole 101.

[0096] In some embodiments, the protrusion 32 is made of silicone. When pressed into the through hole 201, the silicone will deform due to compression, thereby pressing the protrusion 24 to the sidewall of the through hole 101 without damaging the protrusion 24.

[0097] Please see Figure 12In step S30, the first fixture 30 and the second fixture 40 are removed, and the metal layer 23 is fabricated to form the outer circuit layer 25. The outer circuit layer 25, the second substrate layer 22, and the adhesive layer 21 form the outer circuit board 20. That is, after the metal layer 23 in the outer circuit board 20a is fabricated to form the outer circuit layer 25, the outer circuit board 20 is formed. It is understood that the outer circuit board 20 still includes a protrusion 24 located in the through hole 101. The metal layer 23 of the protrusion 24 may not be fabricated as a circuit pattern, but it can be connected and conductive with the outer circuit layer 25.

[0098] In some embodiments, prior to the step of fabricating the metal layer 23 into the outer circuit layer 25, steps such as drilling and electroplating can be performed. Figure 12 A conductive structure 50 is formed in the structure shown. During electroplating, a thin copper layer (not shown) is formed on the surface of the metal layer 23. This thin copper layer can be fabricated together with the metal layer 23 to form the outer circuit layer 25. The conductive structure 50 electrically connects the first circuit layer 12, the second circuit layer 14, and the outer circuit layer 25. The conductive structure 50 can be, but is not limited to, a conductive via.

[0099] like Figure 13 As shown in the plan view, the sidewall of the through hole 101 protrudes beyond the sidewall of the through hole 202. The uppermost layer of the sidewall of the through hole 101 is the dielectric layer 13.

[0100] Please see Figure 14 In step S40, a second protective layer 26 may be provided on the surface of the outer circuit layer 25 facing away from the second substrate layer 22. The second protective layer 26 may be a solder resist layer. The second protective layer 26 may also be filled into the conductive structure 50.

[0101] Please continue reading. Figure 14 In step S50, an opening 160 can also be provided. The opening 160 penetrates the outer circuit board 20 (the second protective layer 26 is also penetrated), the second circuit layer 14 and the dielectric layer 13 along the thickness direction, and communicates with the opening 150 to form a blind via 170. The surface of the first protective layer 16 is exposed through the blind via 170, that is, the bottom wall of the blind via 170 is the first protective layer 16.

[0102] Please continue reading. Figure 14 Step S60, through holes 201, 202 and through hole 101 (see) Figure 12 A metallized hole (not shown) is formed, and the outer circuit board 20 and inner circuit board 10 on the side opposite to the protrusion 24 in the metallized hole are removed (i.e., the outer circuit board 20 and inner circuit board 10 are removed). Figure 14 The portion to the right of the protrusion 24 (i.e., the half-hole), the remaining metallized hole forms a metallized half-hole 110, thus obtaining the circuit board 100.

[0103] like Figure 13 and Figure 15 As shown, when retrieving a half-hole, because the sidewall of the metallized hole is not plated with copper, the point of contact with the milling cutter is the dielectric layer 13 instead of the plated copper layer, which greatly reduces the probability of copper wires and copper peeling.

[0104] Please see Figure 14 The second aspect of this application provides a circuit board 100 having a metallized half-hole 110, which includes an inner circuit board 10 and an outer circuit board 20.

[0105] The inner circuit board 10 includes a first substrate layer 11, a first circuit layer 12 formed on the surface of the first substrate layer 11, a dielectric layer 13, a second circuit layer 14 formed on the surface of the dielectric layer 13, and an adhesive layer 15 located between the first circuit layer 12 and the dielectric layer 13.

[0106] The outer circuit board 20 includes an adhesive layer 21, a second substrate layer 22, and an outer circuit layer 25 formed on the surface of the second substrate layer 22. The adhesive layer 21 is located between the second substrate layer 22 and the second circuit layer 14.

[0107] The circuit board 100 has a metallized half-hole 110, which is located approximately at the edge of the circuit board 100 and penetrates the inner circuit board 10 and the outer circuit board 20. The outer circuit board 20 also includes a protrusion 24 located within the metallized half-hole 110, protruding from the sidewall of the metallized half-hole 110. Along the radial direction of the metallized half-hole 110, the protrusion 24 encapsulates an adhesive layer 21, a second substrate layer 22, and a metal layer 23. The adhesive layer 21 is located between the adhesive layer 15 and the second substrate layer 22, and the metal layer 23 is electrically connected to the outer circuit layer 25.

[0108] In some embodiments, such as Figure 14 As shown, the circuit board 100 also includes a conductive structure 50. The conductive structure 50 electrically connects the first circuit layer 12, the second circuit layer 14, and the outer circuit layer 25. The conductive structure 50 may be, but is not limited to, a conductive via.

[0109] In some embodiments, such as Figure 14 As shown, the circuit board 100 also includes a first protective layer 16 and a second protective layer 26. The first protective layer 16 is disposed on the surface of the first circuit layer 12 facing away from the first substrate layer 11, and the second protective layer 26 is disposed on the surface of the outer circuit layer 25 facing away from the second substrate layer 22. The second protective layer 26 may also be filled into the conductive structure 50.

[0110] In some embodiments, such as Figure 14As shown, the circuit board 100 also includes a blind via 170. The blind via 170 penetrates the outer circuit board 20 (the second protective layer 26 is also penetrated) along its thickness direction, the second circuit layer 14, the dielectric layer 13, and the adhesive layer 15. The surface of the first protective layer 16 is exposed through the blind via 170, meaning the bottom wall of the blind via 170 is the first protective layer 16. The blind via 170 can increase the width of the traces, reduce the resistance and inductance of the circuit board 100, reduce impedance fluctuations, and help improve the quality and speed of signal transmission. Furthermore, it can dissipate heat from the circuit board 100, reducing its operating temperature and thus improving its reliability and stability. In some embodiments, the blind via 170 is also referred to as a window.

[0111] The circuit board 100 with metallized half-hole 110 and its preparation method described in this application greatly reduce the probability of copper wires and copper peeling when the half-hole is being retrieved, because the sidewall of the metallized hole 180 is not electroplated with copper, and the point of contact with the milling cutter is the dielectric layer 13 instead of the electroplated copper layer. This improves the product yield.

[0112] The above description describes some specific embodiments of this application, but in actual applications, the application should not be limited to these embodiments. For those skilled in the art, other modifications and alterations made based on the technical concept of this application should fall within the protection scope of this application.

Claims

1. A method for fabricating a circuit board with metallized half-holes, characterized in that, The preparation method includes the following steps: An inner circuit board is provided, the inner circuit board including a first substrate layer, a first circuit layer formed on the surface of the first substrate layer, a dielectric layer, a second circuit layer formed on the surface of the dielectric layer, and an adhesive layer located between the first circuit layer and the dielectric layer; the inner circuit board has a through hole penetrating the inner circuit board along the thickness direction. An outer layer substrate is stacked on the outside of the inner layer circuit board. The outer layer substrate includes an adhesive layer, a second substrate layer, and a metal layer arranged sequentially. The adhesive layer is located between the inner layer circuit board and the second substrate layer. The outer layer substrate has a through hole, and a portion of the adhesive layer, the second substrate layer, and the metal layer protrudes from the sidewall of the through hole to form a protrusion. A portion of the sidewall of the through hole is recessed inward to form a groove, and the bottom wall of the groove is the second substrate layer along the recess direction. A first fixture and a second fixture are placed on both sides of the outer substrate. The first fixture includes a body and a boss protruding from the body. The first fixture and the second fixture are pressed together to bond the inner circuit board to the outer substrate. The boss is embedded in the through hole and the through hole to squeeze the protrusion so that the protrusion bends and bonds to the side wall of the through hole. Remove the first fixture and the second fixture, and fabricate the metal layer to form an outer circuit layer. The outer circuit layer, the second substrate layer, and the adhesive layer form an outer circuit board. The through hole and the through hole form a metallized hole. The outer circuit board and the inner circuit board on the side opposite to the protrusion in the metallized hole are removed, and the remaining metallized hole forms a metallized half hole, thus obtaining the circuit board.

2. The preparation method according to claim 1, characterized in that, The protrusion is made of silicone.

3. The preparation method according to claim 1, characterized in that, The method for preparing the inner layer circuit substrate includes the following steps: A first copper-clad laminate is provided, the first copper-clad laminate including a first substrate layer and a first copper foil layer disposed on at least one surface of the first substrate layer, and the first copper foil layer is fabricated to form a first circuit layer; An adhesive layer and a second copper-clad laminate are laminated on the outside of the first circuit layer. The second copper-clad laminate includes a dielectric layer and a second copper foil layer disposed on the surface of the dielectric layer. The adhesive layer is located between the first circuit layer and the dielectric layer. The second copper foil layer is fabricated to form the second circuit layer, and the through hole is provided through the second circuit layer, the dielectric layer, the adhesive layer, the first circuit layer and the first substrate layer to obtain the inner circuit substrate.

4. The preparation method according to claim 3, characterized in that, After the step of "forming the first copper foil layer into a first circuit layer", the method for preparing the inner circuit substrate further includes: setting a first protective layer on the surface of the first circuit layer opposite to the first substrate layer.

5. The preparation method according to claim 4, characterized in that, The adhesive layer has an opening, and the first protective layer covers the opening.

6. The preparation method according to claim 5, characterized in that, Before the step of "removing the outer circuit board and the inner circuit board disposed opposite to the protrusion", the preparation method further includes: providing a second protective layer on the surface of the outer circuit layer away from the second substrate layer.

7. The preparation method according to claim 6, characterized in that, After the step of setting the second protective layer, the preparation method further includes: setting an opening, the opening penetrating the outer circuit board, the second circuit layer and the dielectric layer, and communicating with the opening to form a blind hole, the surface of the first protective layer being exposed from the blind hole.

8. A circuit board with metallized half-holes, characterized in that, include: The inner circuit board includes a first substrate layer, a first circuit layer formed on the surface of the first substrate layer, a dielectric layer, a second circuit layer formed on the surface of the dielectric layer, and an adhesive layer located between the first circuit layer and the dielectric layer. and An outer circuit board includes an adhesive layer, a second substrate layer, and an outer circuit layer formed on the surface of the second substrate layer, wherein the adhesive layer is located between the second substrate layer and the second circuit layer. The circuit board has a metallized half-hole that penetrates the inner circuit board and the outer circuit board. The outer circuit board also includes a protrusion located within the metallized half-hole, which protrudes from the sidewall of the metallized half-hole. Along the radial direction of the metallized half-hole, the protrusion includes the adhesive layer, the second substrate layer, and the metal layer, with the adhesive layer located between the adhesive layer and the second substrate layer.

9. The circuit board with metallized half-holes as described in claim 8, characterized in that, The circuit board also includes a conductive structure that electrically connects the first circuit layer, the second circuit layer, and the outer circuit layer.

10. The circuit board with metallized half-holes as described in claim 8, characterized in that, The circuit board further includes a first protective layer and a second protective layer. The first protective layer is disposed on the surface of the first circuit layer opposite to the first substrate layer, and the second protective layer is disposed on the surface of the outer circuit layer opposite to the second substrate layer.

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