Display panel and display device

Abstract

The invention relates to a display panel and a display device. The display panel comprises a display area and a non-display area. The display area comprises a plurality of first data lines which extend in the second direction and are arranged in the first direction; the non-display area comprises a plurality of fan-out lines; the display area further comprises a plurality of connecting lines, and the connecting lines comprise first connecting lines extending in the first direction and second connecting lines extending in the second direction; the same first connecting line comprises a first sub-segment and a second sub-segment which are arranged on different layers, the first sub-segment and the second sub-segment are electrically connected, the first sub-segment and the second connecting line are arranged on different layers, and the second sub-segment and the second connecting line are arranged on the same layer; the auxiliary signal lines extend in the second direction and are arranged in the first direction; the auxiliary signal lines and the second sub-segments are arranged on different layers, and the auxiliary signal lines and the second sub-segments are overlapped in the thickness direction of the display panel. According to the technical scheme, the color cast of the display panel is reduced, and the light transmittance of the display panel is improved.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the continuous development of display technology, display products are increasingly moving towards narrow borders. In order to better realize display products with narrow bottom borders, related technologies use a technology that places part of the fan-out lines in the display area (Fanout inAA, FIAA) to reduce the width of the bottom border.

[0003] However, the FIAA design may result in an excessive number of vias during the cross-line design process, thereby affecting the flatness of the film layer in the light-emitting area and causing color deviation in the display panel. In addition, an excessive number of vias may reduce the light-transmitting area, affecting the light transmittance of the display panel. Summary of the invention

[0004] In order to solve the above technical problems, the present disclosure provides a display panel and a display device, which reduce the color deviation of the display panel and improve the light transmittance of the display panel.

[0005] In a first aspect, the present disclosure provides a display panel, comprising:

[0006] a display area and a non-display area, wherein the non-display area is located on at least one side of the display area;

[0007] The display area includes a plurality of first data lines extending along a second direction and arranged along the first direction, and the first direction intersects with the second direction;

[0008] The non-display area includes a plurality of fan-out lines;

[0009] The display area further includes a plurality of connection lines, the first data line is connected to the fan-out line through the connection lines, the connection lines include a first connection line extending along the first direction and a second connection line extending along the second direction, the first connection line is electrically connected to the second connection line, the first connection line is electrically connected to the first data line, and the second connection line is electrically connected to the fan-out line;

[0010] The same first connecting line includes a first subsegment and a second subsegment arranged in different layers, the first subsegment and the second subsegment both extend along the first direction, the first subsegment and the second subsegment are electrically connected, the first subsegment and the second connecting line are arranged in different layers, and the second subsegment and the second connecting line are arranged in the same layer;

[0011] A plurality of auxiliary signal lines are provided, wherein the auxiliary signal lines extend along the second direction and are arranged along the first direction; the auxiliary signal lines and the second sub-segments are arranged in different layers, and the auxiliary signal lines and the second sub-segments overlap along the thickness direction of the display panel.

[0012] In a second aspect, the present disclosure further provides a display device, comprising the display panel as described in the first aspect.

[0013] Compared with the prior art, the technical solution provided by the present invention has the following advantages:

[0014] The present disclosure provides a display panel and a display device, wherein the display panel comprises: a display area and a non-display area, wherein the non-display area is located on at least one side of the display area; the display area comprises a plurality of first data lines extending along a second direction and arranged along a first direction, wherein the first direction intersects with the second direction; the non-display area comprises a plurality of fan-out lines; the display area further comprises a plurality of connection lines, wherein the first data lines are connected to the fan-out lines through the connection lines, wherein the connection lines comprise a first connection line extending along the first direction and a second connection line extending along the second direction, wherein the first connection line is electrically connected to the second connection line, the first connection line is electrically connected to the first data line, and the second connection line is electrically connected to the fan-out line; the same first connection line comprises a first sub-segment and a second sub-segment arranged in different layers, wherein the first sub-segment and the second sub-segment both extend in the first direction, the first sub-segment and the second sub-segment are electrically connected, the first sub-segment and the second connection line are arranged in different layers, and the second sub-segment and the second connection line are arranged in the same layer; a plurality of auxiliary signal lines, wherein the auxiliary signal lines extend in the second direction and are arranged in the first direction; the auxiliary signal lines are arranged in different layers from the second sub-segment, and the auxiliary signal lines and the second sub-segment overlap along the thickness direction of the display panel. Therefore, the present invention discloses that, by setting the first sub-segment and the second connecting line in different layers, and setting the second sub-segment and the second connecting line in the same layer, only two vias need to be set on the first connecting line to realize the crossing of the auxiliary signal line, and no via is required between the second sub-segment and the second connecting line. This avoids the problem of too many vias in the prior art that when the auxiliary signal line is used to cross the first connecting line extending along the first direction, the second sub-segment and the second connecting line still need to be electrically connected through vias, thereby reducing the number of vias in the display panel. The reduction in the number of vias also improves the flatness of the insulating film layer corresponding to the punching position, reduces the degree of unevenness of the insulating film layer, thereby reducing the color deviation of the display panel. The reduction in the number of vias also correspondingly reduces the area of ​​metal usage, thereby improving the light transmittance of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0016] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0017] Figure 1 A schematic diagram of the structure of a display panel provided in an embodiment of the present disclosure;

[0018] Figure 2 for Figure 1 A local enlarged schematic diagram of the AA' region in the middle;

[0019] Figure 3 A schematic diagram of the structure of another display panel provided in an embodiment of the present disclosure;

[0020] Figure 4 A schematic structural diagram of a first connecting line, an auxiliary signal line and a first data line in a pixel circuit provided by an embodiment of the present disclosure;

[0021] Figure 5 for Figure 2 A local enlarged schematic diagram of the middle BB' region;

[0022] Figure 6 A schematic diagram of a cross-sectional structure of a display panel provided in an embodiment of the present disclosure;

[0023] Figure 7 A schematic cross-sectional structure diagram of another display panel provided in an embodiment of the present disclosure;

[0024] Figure 8 A schematic diagram of the structure of a pixel circuit provided by an embodiment of the present disclosure;

[0025] Fig. 9 for Figure 7 A schematic diagram of a structure in which an active layer, a first metal layer, a second metal layer, a third metal layer and a capacitor metal layer are superimposed;

[0026] Fig.10 A schematic diagram of the structure of a display device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0027] In order to more clearly understand the above-mentioned objectives, features and advantages of the present disclosure, the scheme of the present disclosure will be further described below. It should be noted that the embodiments of the present disclosure and the features in the embodiments can be combined with each other without conflict.

[0028] In the following description, many specific details are set forth to facilitate a full understanding of the present disclosure, but the present disclosure may also be implemented in other ways different from those described herein; it is obvious that the embodiments in the specification are only part of the embodiments of the present disclosure, rather than all of the embodiments.

[0029] In the related art, the design of FIAA may result in an excessive number of vias during the cross-line design process, thereby affecting the flatness of the film layer in the light-emitting area and causing color deviation of the display panel. In addition, an excessive number of vias may reduce the light-transmitting area, affecting the transmittance of the display panel.

[0030] In order to solve the above problems, an embodiment of the present disclosure provides a display panel, which includes: a display area and a non-display area, wherein the non-display area is located on at least one side of the display area; the display area includes a plurality of first data lines extending along a second direction and arranged along a first direction, wherein the first direction intersects with the second direction; the non-display area includes a plurality of fan-out lines; the display area also includes a plurality of connecting lines, wherein the first data lines are connected to the fan-out lines through the connecting lines, wherein the connecting lines include a first connecting line extending along the first direction and a second connecting line extending along the second direction, wherein the first connecting line is electrically connected to the second connecting line, the first connecting line is electrically connected to the first data line, and the second connecting line is electrically connected to the fan-out line; the same first connecting line includes a first sub-segment and a second sub-segment arranged in different layers, wherein the first sub-segment and the second sub-segment both extend in the first direction, the first sub-segment and the second sub-segment are electrically connected, the first sub-segment and the second connecting line are arranged in different layers, and the second sub-segment and the second connecting line are arranged in the same layer; a plurality of auxiliary signal lines, wherein the auxiliary signal lines extend in the second direction and are arranged in the first direction; the auxiliary signal line and the second sub-segment are arranged in different layers, and the auxiliary signal line and the second sub-segment overlap along the thickness direction of the display panel. Therefore, by setting the first sub-segment and the second connecting line in different layers and the second sub-segment and the second connecting line in the same layer, only two vias need to be set on the first connecting line to realize the crossing of the auxiliary signal line, and no via is required between the second sub-segment and the second connecting line, thereby avoiding the problem of too many vias in the prior art that when the auxiliary signal line is used to cross the first connecting line extending along the first direction, the second sub-segment and the second connecting line still need to be electrically connected through vias, thereby reducing the number of vias in the display panel. The reduction in the number of vias also improves the flatness of the insulating film layer corresponding to the punching position and reduces the degree of unevenness of the insulating film layer, thereby reducing the color deviation of the display panel. The reduction in the number of vias also correspondingly reduces the area used for metal and improves the light transmittance of the display panel.

[0031] Figure 1 A schematic diagram of the structure of a display panel provided in an embodiment of the present disclosure is shown in FIG. Figure 2 for Figure 1 A local enlarged schematic diagram of the AA' region in the middle. Figure 1 and Figure 2The display panel 100 includes a display area AA and a non-display area NA at least partially surrounding the display area AA, wherein the display area AA is used to display images, the non-display area NA is located on at least one side of the display area AA, and the non-display area NA at least partially surrounds the display area AA. For example, the non-display area NA can be arranged in at least a part of the space on at least one side of the display area AA, and is used to lay out peripheral circuits and wiring to transmit display signals such as drive signals and power signals to the display area AA. The non-display area NA is not used to display images, and can also be called a frame area. The smaller the proportion of the non-display area NA in the plane area of ​​the display panel 100, the higher the proportion of the display area AA, and the easier it is to achieve a narrow-frame full-screen display.

[0032] Figure 1 exemplarily shows that the display area AA includes a plurality of first data lines 11 extending along the second direction Y and arranged along the first direction X. The first data lines 11 can be used, for example, to provide data voltage signals to pixel circuits electrically connected thereto in the display panel 100, that is, to provide driving signals for the display panel 100 to realize display functions. Figure 1 The first direction Y and the second direction X are perpendicular to each other in a direction parallel to the plane where the display panel 100 is located. The subsequent drawings can be referred to for understanding and will not be described in detail.

[0033] The non-display area NA, for example, further includes a fan-out area A1, and the fan-out area A1 includes a plurality of fan-out lines 3. The display area AA further includes a plurality of connection lines 2, and the first data line 11 is electrically connected to the fan-out line 3 through the connection line 2. The connection line 2 includes a first connection line 21 extending along a first direction X and a second connection line 22 extending along a second direction Y, a first end of the first connection line 21 is electrically connected to the first data line 11, a second end of the first connection line 21 is electrically connected to a first end of the second connection line 22, and a second end of the second connection line 22 is electrically connected to the fan-out line 3.

[0034] The same first connecting line 21 extending along the first direction X includes a first subsegment 211 and a second subsegment 212 . The first subsegment 211 and the second subsegment 212 both extend along the first direction X, and the first subsegment 211 and the second subsegment 212 are electrically connected.

[0035] Continue to combine Figure 1 and Figure 2The display panel 100 further includes a plurality of auxiliary signal lines 4, which extend along the second direction Y and are arranged along the first direction X. The auxiliary signal lines 4 are used to balance the voltage drops at different positions in the display panel 100, which is beneficial to improving the display uniformity. The auxiliary signal line 4 and the second sub-segment 212 are arranged in different layers, and along the thickness direction of the display panel 100, the auxiliary signal line 4 and the second sub-segment 212 overlap, so it is only necessary to electrically connect the first sub-segment 211 and the second sub-segment 212 through a via hole on one side of the auxiliary signal line 4, and the first sub-segment 211 and the second sub-segment 212 are electrically connected through a via hole on the other side of the auxiliary signal line 4, and the first sub-segment 211 and the second connecting line 22 are arranged in different layers, and the second sub-segment 212 and the second connecting line 22 are arranged in the same layer, and the auxiliary signal line 4 is provided. Figure 2 Different filling patterns represent different film layers, and the same filling pattern represents the same film layer. Only two vias need to be set on the first connecting line 21 to realize the cross-line of the auxiliary signal line 4. No via is required between the second sub-segment 212 and the second connecting line 22. This avoids the problem of too many vias in the prior art that when the auxiliary signal line 4 is used to cross the first connecting line 21 extending along the first direction X, the second sub-segment 212 still needs to be electrically connected to the second connecting line 22 using a via. This reduces the number of vias in the display panel 100. The reduction in the number of vias also improves the flatness of the film layer corresponding to the punching position and reduces the degree of unevenness of the film layer, thereby reducing the color deviation of the display panel 100. The reduction in the number of vias also correspondingly reduces the area of ​​metal usage and improves the light transmittance of the display panel 100.

[0036] Figure 3 A schematic diagram of the structure of another display panel provided in an embodiment of the present disclosure, Figure 4 The structure diagram of the first connection line, the auxiliary signal line and the first data line in a pixel circuit provided by an embodiment of the present disclosure is shown in FIG. Figure 3 and Figure 4 The display panel 100 further includes: a plurality of pixel circuits 5 arranged in an array, and in the pixel circuits 5 , the number of the first connection lines 21 is less than the number of the auxiliary signal lines 4 .

[0037] Figure 3 It is exemplarily shown that the display panel 100 also includes a plurality of pixel circuits 5 arranged in an array, and the light-emitting element driven by the pixel circuit 5 may be, for example, an organic light-emitting diode, or the light-emitting element may also be a light-emitting device such as a micro light-emitting diode or a sub-millimeter light-emitting diode, which is not limited in this embodiment.

[0038] Since the number of auxiliary signal lines 4 in the pixel circuit 5 is greater than the number of first connection lines 21, in the related art, the number of vias required when the auxiliary signal lines 4 are used to cross the first connection lines 21 is greater than the number of vias required when the first connection lines 21 are used to cross the auxiliary signal lines 4. Figure 4 It is exemplarily shown that only two vias are required on a first connecting line 21 to achieve the crossing of two auxiliary signal lines 4, which greatly reduces the number of vias, improves the flatness of the film layer corresponding to the punching position, reduces the unevenness of the film layer, improves the color deviation problem of the display panel 100, and improves the transmittance of the display panel 100.

[0039] Figure 5 for Figure 2 Schematic diagram of a partial enlargement of the BB' region. Figure 2 and Figure 5 The first sub-segment 211 includes a first portion 2111 and a second portion 2112 that are disconnected from each other. Along the first direction X, the first portion 2111 and the second portion 2112 are respectively located at opposite sides of the auxiliary signal line 4.

[0040] Specifically, combined Figure 2 and Figure 5 In the embodiment of the present disclosure, a first sub-segment 211 extending along the first direction X includes a first portion 2111 and a second portion 2112 that are disconnected from each other. The first portion 2111 and the second portion 2112 are respectively located on opposite sides of the auxiliary signal line 4, so that the auxiliary signal line 4 on the same layer as the first sub-segment 211 is avoided by the disconnected first portion 2111 and the second portion 2112. While the electrical connection between the first sub-segment 211 and the second sub-segment 212 that are arranged in different layers can be achieved, the short circuit problem between the first sub-segment 211 and the auxiliary signal line 4 is avoided, thereby improving the manufacturing yield of the display panel 100.

[0041] Optionally, combined Figure 2 and Figure 5 The first portion 2111 is electrically connected to the second sub-segment 212 through the first via hole K1, and the second portion 2112 is electrically connected to the second sub-segment 212 through the second via hole K2. Along the first direction X, the first via hole K1 and the second via hole K2 are respectively located on opposite sides of the auxiliary signal line 4.

[0042] Specifically, combined Figure 2 and Figure 5The first sub-segment 211 and the second sub-segment 212 arranged in different layers can be electrically connected through the via K. Along the first direction X, the first part 2111 located on one side of the auxiliary signal line 4 is electrically connected to the second sub-segment 212 through the first via K1, and the second part 2112 located on the other side of the auxiliary signal line 4 is electrically connected to the second sub-segment 212 through the second via K2, so that the first part 2111 of the first sub-segment 211 on one side of the auxiliary signal line 4, the second sub-segment 212 crossing the auxiliary signal line 4, and the second part 2112 of the first sub-segment 211 located on the other side of the auxiliary signal line 4 are electrically connected. It can also meet the requirements that the first part 2111 and the second sub-segment 212 at least partially overlap, and the second part 2112 and the second sub-segment 212 at least partially overlap, so as to reduce the impedance of the first connecting line 21, and at the same time, the short circuit problem between the first sub-segment 211 and the auxiliary signal line 4 in the same layer can be avoided by disconnecting the first part 2111 and the second part 2112, thereby ensuring the manufacturing yield of the display panel 100.

[0043] Figure 2 FIG. 2 also exemplarily shows that the first data line 11 is electrically connected to the first sub-segment 211 through the third via K3 .

[0044] Optionally, combined Figure 2 , Figure 4 and Figure 5 The second sub-segment 212 and the second connecting line 22 are an integral structure.

[0045] Specifically, combined Figure 2 , Figure 4 and Figure 5 The first sub-segment 211 and the second connection line 22 are arranged in different layers, and the second sub-segment 212 and the second connection line 22 are arranged in the same layer. The second sub-segment 212 and the second connection line 22 arranged in the same layer can be set as an integrated structure, while reducing the number of vias, and there is no need to prepare the second sub-segment 212 and the second connection line 22 separately, thereby simplifying the preparation process of the display panel 100 and improving the preparation efficiency of the display panel 100. It should be noted that Figure 2 , Figure 4 and Figure 5 For the sake of clarity, the transparency of the film filling pattern of the second sub-segment 212 is adjusted, and the second sub-segment 212 and the second connecting line 22 can still be regarded as being arranged in the same layer and forming an integrated structure.

[0046] Figure 6 A schematic diagram of a cross-sectional structure of a display panel provided in an embodiment of the present disclosure. Optionally, Figure 6 As shown, along the thickness direction of the display panel 100 , the first sub-segment 211 and the second sub-segment 212 are distributed in adjacent metal layers of the display panel 100 . Figure 6 Only part of the metal layer is shown as an example, and the specific film layer settings can refer to the drawings of subsequent embodiments.

[0047] Specifically, Figure 6 As shown, along the thickness direction of the display panel 100, the first sub-segment 211 and the second sub-segment 212 are arranged in adjacent metal layers of the display panel 100, so that the distance between the first sub-segment 211 and the second sub-segment 212 along the thickness direction of the display panel 100 is shortened as much as possible, thereby shortening the distance of the via hole between the first sub-segment 211 and the second sub-segment 212, reducing the difficulty of electrical connection between the first sub-segment 211 and the second sub-segment 212 through the via hole, and improving the preparation efficiency of the display panel 100.

[0048] Figure 7 Another cross-sectional structure diagram of a display panel provided in an embodiment of the present disclosure is shown in FIG. 1 . It can be understood that: Figure 7 It is only for illustrating the positions of the first sub-segment 211, the auxiliary signal line 4, the second sub-segment 212 and other film layers in the thickness direction of the display panel 100, and does not represent the positional relationship in the horizontal direction, that is, in the direction parallel to the plane where the display panel 100 is located. Figure 7 As shown, the display panel 100 also includes a substrate 10, a first metal layer 6 and a second metal layer 7; the second metal layer 7 is located on the side of the first metal layer 6 away from the substrate 10; the first metal layer 6 includes a first sub-segment 211 and an auxiliary signal line 4, and the second metal layer 7 includes a second sub-segment 212.

[0049] Specifically, Figure 7 As shown, the display panel 100 includes a substrate 10, which is used to support and protect the film layer located thereon. The substrate 10 can be a rigid substrate, for example, the material of the substrate 101 is glass, and the substrate 10 can also be a flexible substrate. For example, the material of the substrate 10 can include one or more combinations of polymer resins of polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate and cellulose acetate propionate. The material of the substrate 10 is not specifically limited in the embodiments of the present disclosure.

[0050] The first metal layer 6 is located on one side of the substrate 10, and the first metal layer 6 can be used as a source and drain metal layer of the transistor T, for example. The second metal layer 7 is located on the side of the first metal layer 6 away from the substrate 10. The first metal layer 6 can include, for example, a first sub-segment 211 and an auxiliary signal line 4, and the second metal layer 7 can include, for example, a second sub-segment 212.

[0051] In the embodiment of the present disclosure, the first sub-segment 211 and the auxiliary signal line 4 are arranged on the first metal layer 6, and the second sub-segment 212 is arranged on the second metal layer 7, so that the first sub-segment 211 and the auxiliary signal line 4 are distributed with the second sub-segment 212 in two adjacent metal layers, thereby reducing the difficulty of electrically connecting the first sub-segment 211 and the second sub-segment 212, and the first sub-segment 211 and the auxiliary signal line 4 are arranged on the same metal layer, thereby reducing the thickness of the display panel 100, which is conducive to the thinness of the display device.

[0052] Figure 8 A schematic diagram of a pixel circuit according to an embodiment of the present disclosure is shown in FIG. Fig. 9 for Figure 7 Schematic diagram of the structure after the active layer, the first metal layer, the second metal layer, the third metal layer and the capacitor metal layer are superimposed. Optionally, in combination Figure 8 and Fig. 9 The display panel 100 further includes a power signal line PVDD, which extends along the second direction Y and is arranged along the first direction X; the second metal layer 7 further includes the power signal line PVDD, a first data line 11 and a second connection line 22 .

[0053] Exemplarily, the pixel circuit 5 refers to a minimum repeating unit of a circuit structure that drives the corresponding light-emitting element D1 to emit light. Figure 8 exemplarily shows that the pixel circuit 5 includes seven transistors T1 to T7 and a capacitor Cst. The first light-emitting control transistor T1 and the second light-emitting control transistor T6 are turned off when the light-emitting control signal provided by the light-emitting control signal line EMIT is at a high level, and are turned on when the light-emitting control signal is at a low level, so that the light-emitting element D1 emits light in the light-emitting stage. The first reset transistor T5 can be, for example, a dual-gate transistor, which is turned on when the first scanning signal provided by the first scanning signal line S1 is at a low level, and is used to write the reference voltage signal provided by the reference signal line Vref to the first node N1. When the third scanning signal provided by the third scanning signal line SP is at a low level, the data writing transistor T2 writes the data signal provided by the data signal line DATA to the driving transistor T3. The data signal line DATA can include, for example, the first data line 11 and the second data line 12. The threshold compensation transistor T4 is turned on when the second scanning signal provided by the second scanning signal line S2 is at a low level. The second reset transistor T7 is turned on when the second scanning signal provided by the second scanning signal line S2 is at a low level, and writes the anode reset signal provided by the reference signal line Vref to the fourth node N4. Among them, the second end of the first light-emitting control transistor T1, the first end of the driving transistor T3 and the first end of the data writing transistor T2 are all connected to the N2 node, and the second end of the driving transistor T3, the second end of the threshold compensation transistor T4 and the first end of the second light-emitting control transistor T6 are all connected to the N3 node.

[0054] Reference Figure 8 and Fig. 9 The display panel 100 further includes a power signal line PVDD, which can be used to provide a power signal to each pixel circuit 5 in the display area AA. The power signal line PVDD extends along the second direction Y and is arranged along the first direction X.

[0055] Fig. 9 The same fill pattern represents the same layer, and different fill patterns represent different layers. The second metal layer 7 also includes, for example, a power signal line PVDD, a first data line 11, and a second connection line 22. The power signal line PVDD, the first data line 11, and the second connection line 22 are arranged in the same film layer, which can reduce the occupation of the metal film layer, reduce the thickness of the display panel 100, and facilitate the thinness of the display device. In addition, the second connection line 22 and the second sub-segment 212 are both arranged in the second metal layer 7, so that the second connection line 22 and the second sub-segment 212 form an integrated structure, thereby simplifying the preparation process of the display panel 100 and improving the preparation efficiency of the display panel 100. In addition, the first connecting line 21 and the second connecting line 22 are both made of the film layer existing in the display panel 100, so there is no need to add a new conductive film layer in the display panel 100, which can avoid adding additional mask processes and reduce process steps, which is beneficial to saving the overall production cost of the display panel 100. Moreover, by not adding a new conductive film layer, coupling problems between the introduced new conductive film layer and the conductive structure in the existing film layer can be avoided, thereby reducing the wiring difficulty of the display panel 100.

[0056] Optionally, combined Figure 7 and Fig. 9 The display panel 100 also includes a third metal layer 8 and a capacitor metal layer 9. The third metal layer 8 is located on a side of the first metal layer 6 close to the substrate 10, and the capacitor metal layer 9 is located between the first metal layer 6 and the third metal layer 8; the third metal layer 8 includes a first scanning signal line S1 and a second scanning signal line S2, and the capacitor metal layer 9 includes a reference signal line Vref; wherein the reference signal line Vref, the first scanning signal line S1 and the second scanning signal line S2 all extend along the first direction X and are arranged along the second direction Y.

[0057] Specifically, combined Figure 7 and Fig. 9The display panel 100 further includes a third metal layer 8, which is located between the substrate 10 and the first metal layer 6. The third metal layer 8 may include, for example, a gate metal layer of the transistor T. The third metal layer 8 also includes a first scan signal line S1 and a second scan signal line S2. The third metal layer 8 also includes, for example, a light emitting control signal line E1. The reference signal line Vref, the first scan signal line S1 and the second scan signal line S2 all extend along the first direction X and are arranged along the second direction Y. The first electrode Cst1 of the storage capacitor Cst may be located in the capacitor metal layer 9, and the second electrode Cst2 of the storage capacitor Cst may be located in the third metal layer 8.

[0058] Reference Figure 7 The display panel 100, for example, further includes an active layer Poly, which is located between the third metal layer 8 and the substrate 10. When the transistor T in the pixel circuit 5 of the display panel 100 includes a polysilicon transistor, the active layer Poly is, for example, a polysilicon layer; when the transistor T in the pixel circuit 5 of the display panel 100 includes a metal oxide transistor, the active layer Poly is, for example, a metal oxide semiconductor layer. The display panel 100, for example, further includes an anode metal layer RE, which is located on the side of the second metal layer 7 away from the substrate 10.

[0059] Alternatively, if Fig. 9 As shown, the auxiliary signal line 4 is electrically connected to the reference signal line Vref.

[0060] Specifically, Fig. 9 As shown, the auxiliary signal line 4 and the reference signal line Vref are arranged in different layers. The auxiliary signal line 4 can be electrically connected to the reference signal line Vref through a via, for example, for transmitting the reference signal. Since the auxiliary signal line 4 extends along the second direction Y and is arranged along the first direction X, and the reference signal line Vref extends along the first direction X and is arranged along the second direction Y, according to this arrangement, the auxiliary signal line 4 and the reference signal line Vref can form a grid structure, which can balance the voltage drop of the reference signal at different positions in the display panel 100, which is beneficial to improving the display uniformity of the display panel 100.

[0061] Alternatively, if Figure 1 As shown, along the second direction Y, the display area AA includes a second display area AA2 and a first display area AA1 located on opposite sides of the second display area AA2, and the first data line 11 is located in the first display area AA1; the display panel 100 also includes a plurality of second data lines 12 extending along the second direction Y and arranged along the first direction X, the second data lines 12 are located in the second display area AA2, and the second data lines 12 are electrically connected to the fan-out lines 3.

[0062] Specifically, the display area AA includes, for example, a first display area AA1 and a second display area AA2. Figure 1Taking the direction shown as an example, the second display area AA2 is located on the left and / or right side of the first display area AA1. In other embodiments, the second display area AA2 may also be located at other positions, which is not limited here.

[0063] The first data line 11 is located in the first display area AA1, and the first data line 11 is electrically connected to the fan-out line 3 through the first connection line 21 and the second connection line 22. The display panel 100 further includes a second data line 12, which extends along the second direction Y and is arranged along the first direction X. The second data line 12 is located in the second display area AA2, and one end of the second data line 12 can be directly electrically connected to other fan-out lines 3 in the non-display area NA within the area corresponding to the second display area AA2. The second data line 12 is also used to provide a data voltage signal to a pixel circuit electrically connected thereto in the display panel 100.

[0064] The display panel provided by the embodiment of the present disclosure includes: a display area and a non-display area, wherein the non-display area is located on at least one side of the display area; the display area includes a plurality of first data lines extending along the second direction and arranged along the first direction, wherein the first direction intersects with the second direction; the non-display area includes a plurality of fan-out lines; the display area also includes a plurality of connection lines, wherein the first data lines are connected to the fan-out lines through the connection lines, wherein the connection lines include a first connection line extending along the first direction and a second connection line extending along the second direction, wherein the first connection line is electrically connected to the second connection line, the first connection line is electrically connected to the first data line, and the second connection line is electrically connected to the fan-out line; the same first connection line includes a first sub-segment and a second sub-segment arranged in different layers, wherein the first sub-segment and the second sub-segment both extend in the first direction, the first sub-segment and the second sub-segment are electrically connected, the first sub-segment and the second connection line are arranged in different layers, and the second sub-segment and the second connection line are arranged in the same layer; a plurality of auxiliary signal lines, wherein the auxiliary signal lines extend in the second direction and are arranged in the first direction; the auxiliary signal lines are arranged in different layers from the second sub-segment, and the auxiliary signal lines and the second sub-segment overlap along the thickness direction of the display panel. Therefore, in the embodiment of the present disclosure, the first sub-segment and the second connecting line are arranged in different layers, and the second sub-segment and the second connecting line are arranged in the same layer. Only two vias are needed on the first connecting line to realize the crossing of the auxiliary signal line, and no via is needed between the second sub-segment and the second connecting line. This avoids the problem of too many vias in the prior art that when the auxiliary signal line is used to cross the first connecting line extending along the first direction, the second sub-segment and the second connecting line still need to be electrically connected through vias, thereby reducing the number of vias in the display panel. The reduction in the number of vias also improves the flatness of the insulating film layer corresponding to the punching position and reduces the degree of unevenness of the insulating film layer, thereby reducing the color deviation of the display panel. The reduction in the number of vias also correspondingly reduces the area used for metal and improves the light transmittance of the display panel.

[0065] Based on the same inventive concept, the embodiment of the present disclosure also provides a display device, including a display panel as in any one of the above display panel embodiments. Therefore, the display device has the technical features of the display panel provided in the embodiment of the present disclosure, and can achieve the beneficial effects of the display panel provided in the embodiment of the present disclosure. For the similarities, refer to the above description of the display panel provided in the embodiment of the present disclosure, and no further description is given here.

[0066] For example, Fig.10 Schematic diagram of a display device provided by an embodiment of the present disclosure. Fig.10 As shown, the display device provided by the embodiment of the present disclosure includes the display panel 100 provided by any of the above embodiments of the present disclosure. Fig.10 The embodiment only takes a mobile phone as an example to illustrate the display device. It can be understood that the display device provided in the embodiment of the present application can be any electronic product with a display function, including but not limited to the following categories: mobile phones, televisions, laptops, desktop displays, tablet computers, digital cameras, smart bracelets, smart glasses, car displays, medical equipment, industrial control equipment, touch interactive terminals, etc. The embodiment of the present invention does not make special limitations on this.

[0067] The display device provided by the embodiment of the present disclosure includes the above-mentioned display panel, and thus can solve the same technical problems as the above-mentioned display panel embodiment and achieve the same technical effects, which will not be repeated here.

[0068] It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0069] The above are only specific embodiments of the present disclosure, so that those skilled in the art can understand or implement the present disclosure. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure will not be limited to these embodiments herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A display panel, characterized in that: include: a display area and a non-display area, wherein the non-display area is located on at least one side of the display area; The display area includes a plurality of first data lines extending along a second direction and arranged along a first direction, wherein the first direction intersects with the second direction; The non-display area includes a plurality of fan-out lines; The display area further includes a plurality of connection lines, the first data line is connected to the fan-out line through the connection lines, the connection lines include a first connection line extending along the first direction and a second connection line extending along the second direction, the first connection line is electrically connected to the second connection line, the first connection line is electrically connected to the first data line, and the second connection line is electrically connected to the fan-out line; The same first connecting line includes a first subsegment and a second subsegment arranged in different layers, the first subsegment and the second subsegment both extend along the first direction, the first subsegment and the second subsegment are electrically connected, the first subsegment and the second connecting line are arranged in different layers, and the second subsegment and the second connecting line are arranged in the same layer; A plurality of auxiliary signal lines are provided, wherein the auxiliary signal lines extend along the second direction and are arranged along the first direction; the auxiliary signal lines and the second sub-segments are arranged in different layers, and the auxiliary signal lines and the second sub-segments overlap along the thickness direction of the display panel.

2. The display panel according to claim 1, characterized in that: Also includes: A plurality of pixel circuits are arranged in an array, wherein the number of the first connection lines in the pixel circuits is less than the number of the auxiliary signal lines.

3. The display panel according to claim 1, characterized in that: The first sub-segment includes a first portion and a second portion that are disconnected from each other. Along the first direction, the first portion and the second portion are respectively located at two opposite sides of the auxiliary signal line.

4. The display panel according to claim 3, characterized in that: The first portion is electrically connected to the second subsegment through a first via hole, and the second portion is electrically connected to the second subsegment through a second via hole. Along the first direction, the first via hole and the second via hole are respectively located on opposite sides of the auxiliary signal line.

5. The display panel according to claim 1, characterized in that: The second sub-segment and the second connecting line are an integral structure.

6. The display panel according to claim 1, characterized in that: Along the thickness direction of the display panel, the first sub-segment and the second sub-segment are distributed in adjacent metal layers of the display panel.

7. The display panel according to claim 1, characterized in that: Also included is a substrate, a first metal layer, and a second metal layer; The second metal layer is located on a side of the first metal layer facing away from the substrate; The first metal layer includes the first sub-segment and the auxiliary signal line, and the second metal layer includes the second sub-segment.

8. The display panel according to claim 7, characterized in that: Also included are power signal lines extending along the second direction and arranged along the first direction; The second metal layer also includes the power signal line, the first data line and the second connection line.

9. The display panel according to claim 7, characterized in that: It also includes a third metal layer and a capacitor metal layer, wherein the third metal layer is located on a side of the first metal layer close to the substrate, and the capacitor metal layer is located between the first metal layer and the third metal layer; The third metal layer includes a first scan signal line and a second scan signal line, and the capacitor metal layer includes a reference signal line; wherein the reference signal line, the first scan signal line and the second scan signal line all extend along a first direction and are arranged along a second direction.

10. The display panel according to claim 9, characterized in that: The auxiliary signal line is electrically connected to the reference signal line.

11. The display panel according to any one of claims 1 to 10, characterized in that: Along the second direction, the display area includes a second display area and first display areas located at two opposite sides of the second display area, and the first data line is located in the first display area; It also includes a plurality of second data lines extending along a second direction and arranged along the first direction, wherein the second data lines are located in the second display area and are electrically connected to the fan-out lines.

12. A display device, characterized in that: Comprising a display panel as described in any one of claims 1-11.

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