Gating device material and memory
By doping C, Si or N elements into the gated device material in the phase change memory, the crystallization temperature and structural stability of the gated device material are improved, and the gated layer is unstable due to thermal influence during the erasing process is solved. The problem of improving the data reliability of the memory.
Patent Information
- Application Number
- CN202411517207.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-29
- Publication Date
- 2025-02-14
AI Technical Summary
In the erasing process, the gate layer in the phase change memory faces amorphous instability due to heat influence, resulting in a decrease in the control ability of the current, which in turn affects the data reliability of the phase change memory layer.
By doping C, Si or N elements into the gated device material, a specific ratio in the matrix material including As and Se is formed, and the A element forms chemical bonds with As and Se atoms, increasing the crystallization temperature of the gated device material and Structural stability.
It improves the amorphous stability and high temperature resistance of the gated device materials, enhances the current control ability, reduces the risk of misoperation on the phase change memory layer, and improves the data reliability of the memory.
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Figure CN119451558A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor technology, and in particular to a gating device material and a memory. Background Art
[0002] Phase change memory is a new type of non-volatile memory. In order to improve storage density, phase change memory often uses a cross memory array. In order to suppress the impact of crosstalk current on the cross memory array, in addition to the phase change memory layer used for data storage, the phase change memory usually also includes a series gating layer. The phase change memory layer will reach a high temperature during the erase (RESET) process, and the gating layer connected in series with it will also rise in temperature due to the heat of the phase change memory layer, which causes the gating layer to face the risk of amorphous instability and crystallization, and the gating layer's ability to control current is weakened, which in turn causes malfunctions in the phase change memory layer, reducing the data reliability of the phase change memory. Summary of the invention
[0003] The embodiments of the present application disclose a gating device material and a memory, which improve the amorphous stability of the gating device material and thus improve the data reliability of the memory.
[0004] In a first aspect, the present application provides a gating device material, including:
[0005] A matrix material including As and Se elements; and
[0006] The doping material includes an A element, wherein the A element is selected from at least one of C, Si and N; wherein the molar percentage of each of the A elements in the gating device material is greater than 0% and less than or equal to 10%.
[0007] In some embodiments, the mole percentage content of each of the A elements in the gating device material is greater than or equal to 0.1% and less than or equal to 8%.
[0008] In some embodiments, the gate device material further includes a Ge element having a molar percentage content greater than or equal to 0% and less than or equal to 25%.
[0009] In some embodiments, the A element forms a chemical bond with at least one of As, Se, and Ge.
[0010] In some embodiments, the gating device material includes a material represented by chemical formula (1):
[0011] A a Ge x As y Se (100-a-x-y) (1);
[0012] Among them, the molar percentage of element A is a mol%, the molar percentage of element Ge is x mol%, the molar percentage of element As is y mol%, and the molar percentage of element Se is (100-axy) mol%; wherein, 0<a≤30, 0<x≤25, 25≤y≤45.
[0013] In some embodiments, the gating device material includes N a1 Ge x As y Se (100-a1-x-y) , C a2 Ge x As y Se (100-a2-x-y) 、Si a3 Ge x As y Se (100-a3-x-y) , C a2 Si a3 Ge x As y Se (100-a2-a3-x-y) 、N a1 Si a3 Ge x As y Se (100-a1-a3-x-y) and N a1 C a2 Si a3 Ge x As y Se (100-a1-a2-a3-x-y) At least one of; wherein, 0<a1≤10, 0<a2≤10, 0<a3≤10, 0<x≤25, 25≤y≤45.
[0014] In some embodiments, the gating device material includes a material represented by chemical formula (2):
[0015] A a As y Se (100-a-y) (2);
[0016] Among them, the molar percentage of the A element is a mol%, the molar percentage of the As element is y mol%, and the molar percentage of the Se element is (100-ay) mol%; wherein 0<a≤30, 25≤y≤45.
[0017] In some embodiments, the gating device material includes N a1 As y Se (100-a1-y) , C a2 As y Se (100-a2-y)、Si a3 As y Se (100-a3-y) At least one of the following; wherein, 0<a1≤10, 0<a2≤10, 0<a3≤10; 25≤y≤45.
[0018] In some embodiments, the molar percentage ratio of Se atoms to As atoms is greater than 1 and less than or equal to 2.
[0019] In some embodiments, the gating device material includes an As2Se3 compound.
[0020] In some embodiments, the gating device material includes C 0.1 As 35 Se 64.9 、C1Ge 19.8 As 31.7 Se 47.5 、C5Ge 19 As 30.4 Se 45.6 and C 10 Ge 18 As 28.8 Se 43.2 At least one of .
[0021] In a second aspect, the present application further provides a memory, comprising a gating device material layer and a phase change material layer stacked with the gating device material layer, wherein the gating device material layer comprises the gating device material described above.
[0022] In some embodiments, the thickness of the gating device material layer is greater than or equal to 3 nanometers and less than or equal to 100 nanometers.
[0023] In some embodiments, the memory cell further includes a first electrode, a second electrode and a third electrode, the gating device material layer and the phase change material layer are located between the first electrode and the second electrode, and the third electrode is located between the gating device material layer and the phase change material layer.
[0024] In some embodiments, the phase change material layer includes a chalcogenide element.
[0025] In the gating device materials and memories of some embodiments of the present application, a certain proportion of A element is doped into a matrix material including As element and Se element, and A element is selected from at least one of C, Si and N. In this way, the atoms of A element in an appropriate proportion can form bonds with As atoms and Se atoms, and by occupying the bonding positions of As atoms and Se atoms, the crystallization temperature of the gating device material is increased, thereby improving the amorphous stability of the gating device material. In addition, the atoms of A element form bonds with As atoms and Se atoms, which can also reduce the defective octahedral structure inside the gating device material, thereby enhancing the stability of the internal structure of the material and improving the ability of the gating device material to resist thermal disturbances. The improvement of the amorphous stability and the ability to resist thermal disturbances of the gating device material improves the ability of the gating device material to control the current, reduces the risk of misoperation of the phase change storage layer, and improves the data reliability of the storage unit and the memory. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] Figure 1 It is a schematic diagram of a partial three-dimensional structure of a memory according to some embodiments of the present application.
[0027] The reference numerals are as follows:
[0028] 100, memory;
[0029] 10, storage stack;
[0030] 101, first conductive layer; 1011, first conductive wire
[0031] 102, storage layer; 102A, storage unit; 1021, gating device material layer; 1025, phase change material layer; 1022, first electrode; 1023, second electrode; 1024, third electrode;
[0032] 103, a second conductive layer; 1031, a second conductive wire;
[0033] z, first direction; x, second direction; y, third direction. DETAILED DESCRIPTION
[0034] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.
[0035] Please refer to Figure 1As shown, an embodiment of the present application provides a memory 100. The memory 100 includes a plurality of memory stacks 10 stacked along a first direction z to increase the storage density of the memory 100. One memory stack 10 may include a first conductive layer 101, a memory layer 102, and a second conductive layer 103 stacked along the first direction z.
[0036] The first conductive layer 101 includes a first conductive line 1011 extending along a second direction x. The second conductive layer 103 includes a second conductive line 1031 extending along a third direction y. The first conductive line 1011 is one of a bit line and a word line. The second conductive line 1031 is the other of the bit line and the word line. In one exemplary embodiment, the first conductive line 1011 is a bit line and the second conductive line 1031 is a word line. In another exemplary embodiment, the first conductive line 1011 is a word line and the second conductive line 1031 is a bit line.
[0037] Any two of the first direction z, the second direction x, and the third direction y intersect each other. Exemplarily, any two of the first direction z, the second direction x, and the third direction y are perpendicular to each other, but the present invention is not limited thereto.
[0038] The storage layer 102 includes a plurality of storage units 102A arranged in an array. One storage unit 102A is connected to the first wire 1011 and the second wire 1031 at two ends in the first direction z, respectively, so that the storage unit 102A receives electrical signals transmitted by the first wire 1011 and the second wire 1031 .
[0039] In some embodiments, a memory cell 102A includes a gating device material layer 1021 .
[0040] In some embodiments, the thickness of the gate device material layer 1021 is greater than or equal to 3 nanometers and less than or equal to 100 nanometers. In this way, the thickness of the gate device material layer 1021 is appropriate, and applying a suitable operating voltage or operating current to the gate device material layer 1021 can make the gate device material layer 1021 conductive. Optionally, the thickness of the gate device material layer 1021 is 5 nanometers to 80 nanometers, 8 nanometers to 70 nanometers, 10 nanometers to 60 nanometers, 15 nanometers to 50 nanometers, 20 nanometers to 45 nanometers, or 25 nanometers to 35 nanometers.
[0041] In some embodiments, a memory cell 102A may further include a phase change material layer 1025. The phase change material layer 1025 may switch between a crystalline state and an amorphous state. The phase change material layer 1025 and the gate device material layer 1021 are stacked in the first direction z, the phase change material layer 1025 and the gate device material layer 1021 are disposed between the first electrode 1022 and the second electrode 1023, and the third electrode 1024 is disposed between the phase change material layer 1025 and the gate device material layer 1021.
[0042] It should be noted that, when the memory cell 102A includes a stacked phase change material layer 1025 and a gate device material layer 1021, the phase change material layer 1025 is used as the memory layer 102 to store data, and the gate device material layer 1021 is used as a switch to achieve the correct addressing of the memory cell 102A and reduce the leakage current of the memory cell 102A.
[0043] In some embodiments, the phase change material layer 1025 may include a chalcogenide. The chalcogenide includes at least one of selenium and tellurium. In some embodiments, the phase change material layer 1025 may include a phase change matrix material, and the phase change matrix material includes at least one of Ge, Te, and Sb, but is not limited thereto. For example, the phase change matrix material may include at least one of a Ge-Te binary compound, a Sb-Te binary compound (e.g., Sb2Te3), a Bi-Te binary compound, a Ge-Sb-Te ternary compound, a Ga-Sb binary compound, and Sb.
[0044] In some implementations, the phase change material layer 1025 may further include a doping material to improve the performance of the phase change material layer 1025. The doping material includes, but is not limited to, at least one of In element, Sn element, C element, Si element, and N element.
[0045] In some embodiments, the first electrode 1022, the second electrode 1023, and the third electrode 1024 include at least one of a metal material and a non-metallic conductive material. The metal material includes, but is not limited to, at least one of tungsten, titanium, titanium nitride, silver, gold, copper, and aluminum. The non-metal material includes, but is not limited to, at least one of amorphous carbon, carbon nanotubes, and graphene.
[0046] like Figure 1 As shown, in some embodiments, the second conductive layers 103 of two adjacent memory stacks 10 in the first direction z can be disposed adjacent to each other. In this way, the second conductive layers 103 of two adjacent memory stacks 10 can be formed simultaneously, simplifying the manufacturing process of the memory 100.
[0047] In some other embodiments, two adjacent memory stacks 10 in the first direction z may share a second conductive layer 103 to reduce the number of film layers in the memory 100 and simplify the manufacturing process of the memory 100 .
[0048] In some other embodiments, the memory 100 may also include Figure 1 A storage stack 10 is shown.
[0049] In some other embodiments, the memory cell 102A of the memory 100 may also only include a gating device.
[0050] for Figure 1 In the memory 100 shown, the stability of the gating device material layer 1021 will affect its ability to control the current, and the current flowing into the phase-change material layer 1025 will affect the reliability of the data stored in the phase-change material layer 1025.
[0051] Based on this, some embodiments of the present application provide a gate device material for a gate device material layer 1021. The gate device material includes a base material and a doping material. The base material includes As and Se elements. The doping material includes an A element, and the A element is selected from at least one of C, Si and N. The molar percentage of each of the A elements in the gate device material is greater than 0% and less than or equal to 10%.
[0052] By doping a proper amount of A element into a matrix material including As elements and Se elements, the atoms of A element can form bonds with As atoms and Se atoms, and by occupying the bonding sites of As atoms and Se atoms, the crystallization temperature of the gating device material is increased, thereby improving the amorphous stability and high temperature resistance of the gating device material.
[0053] In addition, the atoms of element A form bonds with As atoms and Se atoms, which can also reduce the defective octahedral structure inside the gating device material, thereby enhancing the stability of the internal structure of the material and improving the ability of the gating device material to resist thermal disturbances.
[0054] Furthermore, the electronegativity difference between the atoms of element A and the atoms of As and Se is greater than that between As and Se atoms, and there is a certain difference in atomic radius between the atoms of element A and the atoms of As and Se. Therefore, the bond energy formed is higher, and the connection between atoms is more stable, which reduces the probability of rearrangement between atoms to form tiny crystal seeds and avoids the formation of large-sized grains, which helps to stabilize the amorphous state of the gating device material. The improvement of the amorphous stability and resistance to thermal disturbance of the gating device material improves the control ability of the gating device material on the current, thereby reducing the risk of misoperation of the phase change storage layer and improving the data storage reliability of the storage unit and memory.
[0055] In addition, the matrix material includes As and Se elements, which can reduce the off-state leakage current of the gate device including the gate device material and improve the switch selection ratio of the gate device. The content of each of the A elements is appropriate, which improves the problem that the turn-on threshold voltage of the gate device is too large and the turn-off leakage current is large due to the excessive content of each of the A elements, reduces the switching difficulty of the gate device, and reduces the power consumption of the memory.
[0056] In some embodiments, the molar percentage of each of the A elements in the gating device material is greater than or equal to 0.1% and less than or equal to 8%. In this way, the crystallization temperature of the gating device material is increased, thereby improving the amorphous stability and high temperature resistance of the gating device material. At the same time, it is ensured that the gating device including the gating device material has a suitable threshold voltage, improves the problem of excessively high turn-on threshold voltage and large turn-off leakage current of the gating device caused by excessively high content of each of the A elements, reduces the switching difficulty of the gating device, and reduces the power consumption of the memory.
[0057] Optionally, in the gating device material, the molar percentage of each of the A elements in the gating device material may be greater than or equal to 0.15% and less than or equal to 6%, greater than or equal to 1% and less than or equal to 5%, or greater than or equal to 2% and less than or equal to 4.5%.
[0058] In the gating device material, the molar percentage content of each of the A elements in the gating device material can be any value greater than 0% and less than or equal to 10%, for example, 0.001%, 0.005%, 0.008%, 0.01%, 0.05%, 0.08%, 0.1%, 0.15%, 0.18%, 0.2%, 0.25%, 0.28%, 0.3%, 0.35%, 0.38%, 0.4%, 0.45%, 0.48%, 0.5%, 0.55%, 0.58%, 0.6% , 0.65%, 0.68%, 0.7%, 0.75%, 0.78%, 0.8%, 0.85%, 0.88%, 0.9%, 0.95%, 0.98%, 1%, 1.5%, 1.8%, 2%, 2.5%, 2.8%, 3%, 3.5%, 3.8%, 4%, 4.5%, 4.8%, 5%, 5.5%, 5.8%, 6%, 6.5%, 6.8%, 7%, 7.5%, 7.8%, 8%, 8.5%, 8.8%, 9%, 9.5%, 9.8% or 10%.
[0059] In some embodiments, the gating device material further includes a Ge element having a molar percentage content greater than or equal to 0% and less than or equal to 25%. Thus, when the gating device material includes the Ge element, the Ge atoms can form bonds with the atoms of the A element and the Se atoms, further increasing the crystallization temperature of the gating device material, thereby increasing the amorphous stability and high temperature resistance of the gating device material.
[0060] Optionally, in the gating device material, the molar percentage of the Ge element may be greater than or equal to 0.01% and less than or equal to 24%, greater than or equal to 1% and less than or equal to 22%, greater than or equal to 4% and less than or equal to 20%, greater than or equal to 6% and less than or equal to 20%, or greater than or equal to 8% and less than or equal to 20%.
[0061] Exemplarily, in the gating device material, the molar percentage of the Ge element can be any value greater than or equal to 0% and less than or equal to 25%, for example, 0%, 0.1%, 0.2%, 0.5%, 0.8%, 1%, 2%, 5%, 8%, 10%, 12%, 15%, 18%, 20%, 22% or 25%.
[0062] In some embodiments, the A element forms a chemical bond with at least one of As, Se and Ge. In this way, the problem of reduced stability of the gate device material caused by the bond between Ge, As and Se to form a defective octahedral structure is improved, so that the stability of the internal structure of the material is enhanced, and the ability of the gate device material to resist thermal disturbance is improved. The electronegativity difference between the atoms of the A element and the atoms of Ge, As and Se is greater than that between the atoms of Ge, As and Se, and there is a certain atomic radius difference between the A atoms and the atoms of Ge, As and Se, so the bond energy formed is higher, the connection between the atoms is more stable, and the probability of rearrangement between atoms to form tiny crystal seeds is reduced, avoiding the formation of large-sized grains, which is conducive to the stability of the amorphous state of the gate device material.
[0063] In some embodiments, the gating device material includes a material represented by the chemical formula (1):
[0064] A a Ge x As y Se (100-a-x-y) (1);
[0065] Among them, the molar percentage of A element is a mol%, the molar percentage of Ge element is x mol%, the molar percentage of As element is y mol%, and the molar percentage of Se element is (100-axy) mol%, 0<a≤30, 0<x≤25, 25≤y≤45. In this way, the crystallization temperature of the gate device material is increased, thereby improving the amorphous stability and high temperature resistance of the gate device material. In addition, the off-state leakage current of the gate device is reduced, and the gate device material is ensured to have a high switch selectivity.
[0066] Wherein, 25≤y≤45. In this way, the content of As is appropriate, the crystallization temperature of the gate device material is increased, the off-state leakage current of the gate device is reduced, and the switch selectivity and cycle durability of the gate device are increased. Optionally, 27≤y≤42, 30≤y≤40 or 32≤y≤38. Exemplarily, y can be any value between 25 and 45, such as 25, 27, 29, 31, 33, 35, 37, 39, 41, 43 or 45.
[0067] Among them, 40≤100-axy≤75. In this way, the off-state leakage current of the gating device is reduced, and the switch selectivity of the gating device material is improved. Optionally, 42≤100-axy≤72, 45≤100-axy≤68, or 47≤100-axy≤65. Exemplarily, 100-axy can be any value between 40 and 75, for example, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74 or 75.
[0068] In some embodiments, the gating device material includes N a1 Ge x As y Se (100-a1-x-y) , C a2 Ge x As y Se (100-a2-x-y) 、Si a3 Ge x As y Se (100-a3-x-y) , C a2 Si a3 Ge x As y Se (100-a2-a3-x-y) 、N a1 Si a3 Ge x As y Se (100-a1-a3-x-y) and N a1 C a2 Si a3 Ge x As y Se (100-a1-a2-a3-x-y) At least one of; wherein, 0<a1≤10, 0<a2≤10, 0<a3≤10, 0<x≤25, 25≤y≤45. In this way, the crystallization temperature of the gating device material is increased, thereby improving the amorphous stability and high temperature resistance of the gating device material. In addition, the off-state leakage current of the gating device is reduced, and the gating device material is ensured to have a high switch selectivity.
[0069] In some embodiments, the gating device material includes C a2 Ge x As y Se (100-a2-x-y) In this way, while the crystallization temperature of the gating device material is increased, it is also ensured that the gating device including the pass device material has low leakage current, appropriate threshold voltage and high switch selection ratio.
[0070] In some embodiments, the gating device material includes C a2Ge x As y Se (100-a2-x-y) In this case, 0.1≤a2≤5. In this way, while the crystallization temperature of the gating device material is increased, the gating device including the gating device material is ensured to have low leakage current, suitable threshold voltage and high switch selectivity. In this way, while the performance of the gating device material as a switching material is ensured, its compatibility with the phase change material layer is also improved.
[0071] In some embodiments, the gating device material includes a material represented by the chemical formula (2): A a As y Se (100-a-y) , (2); 0.1≤a≤30, 25≤y≤45. In this way, the crystallization temperature of the gating device material is increased, thereby improving the amorphous stability and high temperature resistance of the gating device material, and improving the reliability of long-term storage of data.
[0072] In some embodiments, when the gate device material includes the material represented by the chemical formula (2), 0.1≤a≤8, 25≤y≤45. Thus, while increasing the crystallization temperature of the gate device material, the switch selectivity of the gate device including the gate device material is increased.
[0073] In some embodiments, the gating device material includes N a1 As y Se (100-a1-y) , C a2 As y Se (100-a2-y) 、Si a3 As y Se (100-a3-y) At least one of; wherein, 0<a1≤10, 0<a2≤10, 0<a3≤10; 25≤y≤45. In this way, the stability of the gating device material in the amorphous state is ensured while improving the reliability of long-term storage of data.
[0074] In some embodiments, the gating device material includes C a2 As y Se (100-a2-y) In the case of , 0.1≤a2≤10, 25≤y≤45. In this way, while increasing the crystallization temperature of the gating device material, the switch selection ratio of the gating device including the gating device material is increased, and the gating device including the gating device material is ensured to have a suitable threshold voltage. Optionally, 0.1≤a2≤5.
[0075] In some embodiments, the ratio of the molar percentage of Se atoms to As atoms is greater than 1 and less than or equal to 2. This is conducive to the formation of As2Se3 compounds between As and Se. The As2Se3 compounds have a high crystallization temperature, which increases the crystallization temperature of the gate device material in the amorphous state, thereby improving the amorphous stability and high temperature resistance of the gate device material.
[0076] In some embodiments, the gate device material includes an As2Se3 compound. Thus, the As2Se3 compound has a high crystallization temperature, which can increase the crystallization temperature of the gate device material in an amorphous state, thereby improving the amorphous stability and high temperature resistance of the gate device material.
[0077] In some embodiments, the crystallization temperature of the gate device material is greater than or equal to 180° C. In this way, the amorphous stability and high temperature resistance of the gate device material are improved. Optionally, the crystallization temperature of the gate device material is greater than 400° C. Optionally, the crystallization temperature of the gate device material is greater than or equal to 500° C.
[0078] In some embodiments, the switch selectivity ratio of the gating device including the gating device material is greater than or equal to 1e4. In this way, the gating device has good switching performance. Optionally, the switch selectivity ratio of the gating device including the gating device material is greater than or equal to 5e4.
[0079] The gating device material can be prepared by sputtering, electron beam evaporation, molecular beam epitaxy, chemical vapor deposition or atomic layer deposition. These methods can all achieve the simple preparation of the gating device material. Among them, sputtering, electron beam evaporation and molecular beam epitaxy are all physical vapor deposition methods. Chemical vapor deposition can specifically be plasma enhanced chemical vapor deposition, hot wire chemical vapor deposition or low pressure chemical vapor deposition.
[0080] In the case where the A element includes at least one of the C element and the Si element, solid-state element doping can be used. Specifically, an A target (such as a C target, a Si target, or a C target and a Si target), a B target (such as a Ge target), an As target, and a Se target are placed on a sputtering target material in a sputtering chamber and fixed; the sputtering chamber is evacuated, and argon gas is introduced to adjust the pressure in the sputtering chamber; the power knob of the target material is adjusted to perform co-sputtering to form a gating device material on the substrate.
[0081] Under the cleaning of A elements including N elements, gaseous element doping can be used. Specifically, a B target (such as a Ge target), an As target and a Se target are placed on a sputtering target material in a sputtering chamber and fixed; the sputtering chamber is evacuated, argon gas is introduced to adjust the pressure in the sputtering chamber, and a certain gaseous doping component (such as N2) is introduced to allow sputtering to be performed in an atmosphere with a certain doping component concentration; the power knob of the target material is adjusted for co-sputtering to form a gating device material on the substrate.
[0082] The performance of the gating device material of the present application is verified below in combination with specific embodiments and comparative examples.
[0083] Table 1
[0084]
[0085]
[0086] The crystallization temperature of the gate device material in Example 1 is greater than the crystallization temperature of the gate device material in Comparative Example 2. Moreover, the crystallization temperature of the gate device material in Examples 2 to 4 is greater than the crystallization temperature of the gate device material in Comparative Example 1. Therefore, doping the C element in the matrix material including the As element and the Se element can improve the amorphous stability of the gate device material.
[0087] In addition, the crystallization temperature of the gating device material in Examples 2 to 3 is greater than or equal to 420° C., and the gating device including the gating device material has a suitable threshold voltage and a low off-state leakage current, and also has a high switch selectivity ratio. In this way, not only the performance required by the gating device material as a switching material is guaranteed, but also its compatibility with the phase change material layer is improved.
[0088] The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application. Ordinary technical personnel in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some of the technical features therein with equivalents. However, these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.
Claims
1. A gating device material, characterized in that: include: Matrix materials, including As and Se elements; as well as The doping material includes an A element, wherein the A element is selected from at least one of C, Si and N; wherein the molar percentage of each of the A elements in the gating device material is greater than 0% and less than or equal to 10%.
2. The gating device material according to claim 1, characterized in that: The gate device material further includes a Ge element whose molar percentage is greater than or equal to 0% and less than or equal to 25%.
3. The gating device material according to claim 2, characterized in that: The A element forms a chemical bond with at least one of As, Se and Ge.
4. The gating device material according to claim 3, characterized in that: The gating device material includes a material represented by the chemical formula (1): A a Ge x As y Se (100-a-x-y) (1); Among them, the molar percentage of element A is amol%, the molar percentage of element Ge is xmol%, the molar percentage of element As is ymol%, and the molar percentage of element Se is (100-axy)mol%; among them, 0<a≤30, 0<x≤25, 25≤y≤45.
5. The gating device material according to claim 4, characterized in that The gating device material includes N a1 Ge x As y Se (100-a1-x-y) , C a2 Ge x As y Se (100-a2-x-y) 、Si a3 Ge x As y Se (100-a3-x-y) , C a2 Si a3 Ge x As y Se (100-a2-a3-x-y) 、N a1 Si a3 Ge x As y Se (100-a1-a3-x-y) and N a1 C a2 Si a3 Ge x As y Se (100-a1-a2-a3-x-y) At least one of; wherein, 0<a1≤10, 0<a2≤10, 0<a3≤10, 0<x≤25, 25≤y≤45.
6. The gating device material according to claim 1, characterized in that: The gating device material includes a material represented by the chemical formula (2): HAS a Ace y To (100-a-y) (2); Among them, the molar percentage of element A is amol%, the molar percentage of element As is ymol%, and the molar percentage of element Se is (100-ay)mol%; among them, 0<a≤30, 25≤y≤45.
7. The gating device material according to claim 6, characterized in that: The gating device material includes N a1 As y Se (100-a1-y) , C a2 As y Se (100-a2-y) 、Si a3 As y Se (100-a3-y) At least one of the following; wherein, 0<a1≤10, 0<a2≤10, 0<a3≤10; 25≤y≤45.
8. The gating device material according to any one of claims 1 to 7, characterized in that: The gating device material includes C 0.1 As 35 Se 64.9 、C1Ge 19.8 As 31.7 Se 47.5 、C5Ge 19 As 30.4 Se 45.6 and C 10 Ge 18 As 28.8 Se 43.2 At least one of .
9. The gating device material according to claim 1, characterized in that: The gate device material includes As2Se3 compound.
10. A memory, characterized in that: The memory comprises a gate device material layer and a phase change material layer stacked with the gate device material layer, wherein the gate device material layer comprises the gate device material according to any one of claims 1 to 9.