Chip testing method and device applied to building energy consumption

Abstract

The invention discloses a chip testing method and device applied to building energy consumption, and the method comprises the steps: firstly judging the module type of a to-be-tested chip, and then testing the chip through an intelligent testing unit; when the simulation module is tested, the intelligent drive control sub-element generates a simulation drive signal, and the simulation module processes the simulation drive signal to obtain a simulation test signal; the intelligent comparison sub-element compares the two components to judge whether the simulation module fails or not; when the ADC module is tested, the intelligent drive control sub-element generates a voltage test signal, the voltage drive unit converts the test voltage into a test voltage, the ADC module processes the test voltage to obtain a voltage digital signal, and the intelligent comparison sub-element compares the test voltage and the voltage digital signal to judge whether the ADC module breaks down or not. According to the invention, whether the function of the module is normal is tested through the driving signal of the intelligent test unit, and the use of special ATE machine equipment for testing is reduced, so that the chip manufacturing and testing cost can be reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of building energy consumption testing, and in particular to a chip testing method and device applied to building energy consumption. Background Art

[0002] The building energy consumption chip is an integrated circuit chip specially used for monitoring, management and control of building energy consumption. It has data collection, data transmission, energy consumption analysis and control functions. The working principle is: the chip is connected to various sensors, and the sensors convert physical quantities (such as current, temperature, etc.) into electrical signals. The chip processes and converts these electrical signals into digital signals, and then transmits the data to other devices or systems according to the preset communication protocol. At the same time, the chip receives instructions from the management system and controls the connected devices according to the instructions.

[0003] Building energy consumption chips generally use digital-to-analog conversion chips. To ensure that the analog part and digital-to-analog conversion functions in the chip are normal, the chip needs to be tested to ensure that the analog module, ADC module, etc. in the chip can operate normally. At present, the main test method for chips is ATE testing. The ATE test method can test the digital and analog parts. However, the dedicated ATE test machine used is usually expensive, which will double the cost of chip production. Summary of the invention

[0004] Purpose of the invention: The purpose of the present invention is to provide a chip testing method and device for building energy consumption to solve the problem that ATE test machines are usually expensive.

[0005] Technical solution: The chip testing method for building energy consumption described in the present invention comprises the following steps:

[0006] Determine the module type of the chip to be tested, and use the intelligent test unit to test the chip, wherein the module type includes an analog module and an ADC module, and the intelligent test unit includes an intelligent drive control sub-element, a voltage drive unit, and an intelligent comparison sub-element;

[0007] When testing the analog module, the intelligent drive control subcomponent generates an analog drive signal, and the analog module processes the analog drive signal to obtain an analog test signal; the intelligent comparison subcomponent compares the analog drive signal and the analog test signal, and when the comparison is inconsistent, it is determined that the analog module is faulty;

[0008] When the ADC module is tested, the intelligent drive control sub-component generates a voltage test signal, the voltage drive unit converts the voltage test signal into a corresponding test voltage, the ADC module processes the test voltage to obtain a voltage digital signal, and the intelligent comparison sub-component compares the voltage digital signal and the voltage test signal. When the comparison is inconsistent, the ADC module is judged to be faulty.

[0009] Furthermore, after the intelligent comparison subcomponent compares the analog drive signal and the analog test signal, it further includes:

[0010] It is determined whether the number of times the analog drive signal is switched meets a preset number. If not, the intelligent drive control sub-element is controlled to continue generating the analog drive signal until the preset number is met.

[0011] Furthermore, the intelligent testing unit also includes a filtering unit. When the analog module is tested, the intelligent drive control sub-component generates an analog drive signal, the filtering unit converts the analog drive signal into an analog filter signal, and the analog module processes the analog filter signal to obtain an analog test signal; the intelligent comparison sub-component compares the analog filter signal and the analog test signal, and when the comparison is inconsistent, it is determined that the analog module is faulty.

[0012] Furthermore, after the analog module processes the analog filtered signal to obtain an analog test signal, the analog test signal is filtered to generate a smooth analog test signal, and the intelligent comparison sub-component compares the analog filtered signal and the smoothed analog test signal, and when the comparison is inconsistent, it is determined that the analog module is faulty.

[0013] Furthermore, the intelligent comparison subcomponent compares the voltage digital signal and the voltage test signal and further includes:

[0014] It is determined whether the intelligent test unit has traversed all voltage test gears. If not, the intelligent drive control sub-element continues to select the untraversed voltage test gears and generates corresponding voltage test signals until all voltage test gears are traversed.

[0015] Furthermore, before the intelligent comparison subcomponent compares the voltage digital signal with the voltage test signal, the smart comparison subcomponent further includes:

[0016] It is determined whether the waiting time for the intelligent comparison sub-component to receive the voltage digital signal exceeds a preset time. If it exceeds the preset time, the test of the ADC module to be tested is terminated and a timeout exception is returned; otherwise, the test continues.

[0017] Furthermore, multiple analog modules are tested serially or in parallel, and multiple ADC models are tested in parallel.

[0018] The chip testing device for building energy consumption described in the present invention comprises a type judgment unit and an intelligent testing unit;

[0019] The type determination unit is used to determine the module type of the chip to be tested, and the module type includes an analog module and an ADC module;

[0020] The intelligent test unit is used to test the chip to be tested. The intelligent test unit includes an intelligent drive control sub-element, a voltage drive unit and an intelligent comparison sub-element;

[0021] When testing the analog module, the intelligent drive control subcomponent generates an analog drive signal, and the analog module processes the analog drive signal to obtain an analog test signal; the intelligent comparison subcomponent compares the analog drive signal and the analog test signal, and when the comparison is inconsistent, it is determined that the analog module is faulty;

[0022] When the ADC module is tested, the intelligent drive control sub-component generates a voltage test signal, the voltage drive unit converts the voltage test signal into a corresponding test voltage, the ADC module processes the test voltage to obtain a voltage digital signal, and the intelligent comparison sub-component compares the voltage digital signal and the voltage test signal. When the comparison is inconsistent, the ADC module is judged to be faulty.

[0023] The electronic device described in the present invention includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the computer program is loaded into the processor, the chip testing method applied to building energy consumption is implemented.

[0024] The computer-readable storage medium of the present invention stores a computer program, and when the computer program is executed by a processor, the chip testing method applied to building energy consumption is implemented.

[0025] Beneficial effects: Compared with the prior art, the advantages of the present invention are: (1) the driving signal of the intelligent test unit is used to test whether the function of the module is normal, which reduces the use of dedicated ATE equipment for testing, thereby reducing the cost of chip manufacturing and testing; (2) according to different test modules, the intelligent test unit can generate corresponding driving signals to test the function. Users do not need additional testing tools and equipment, and can realize a fool-proof test pipeline, thereby reducing the testing cost of the chip. DETAILED DESCRIPTION

[0026] Building energy consumption chips generally use digital-to-analog conversion chips. In order to ensure the normal functions of the analog part and the digital-to-analog conversion in the chip, the chip testing method applied to building energy consumption described in the present invention is applied to the chip module intelligent testing system. The chip module intelligent testing system includes an intelligent testing unit, which can realize intelligent testing of the analog module and ADC module in the chip, ensure the normal functions of the analog module and the ADC module, and reduce the chip production cost.

[0027] The chip testing method for building energy consumption described in this embodiment includes the following steps:

[0028] Determine the type of the module to be tested of the chip, the type of the module to be tested includes an analog module and an ADC module;

[0029] The chip includes an analog module, a digital module, and an analog-to-digital conversion part. In the embodiment, the test of the analog module is mainly aimed at. The analog module part can be divided into two parts in the embodiment of the present application, the analog module part and the analog-to-digital conversion module part (ADC module). Due to the different functions of the analog module and the ADC module, the analog module (the analog module for diagnosis of over-temperature, over-voltage, under-voltage, etc., the output result is a 1-bit signal); the round-trip data of the ADC module is generally multi-bit data, so it is necessary to first determine the type of module to be tested (analog module or ADC module), and then use the corresponding module intelligent testing system and method according to the type;

[0030] According to the determined type of the module to be tested, the module to be tested is tested by using an intelligent testing unit.

[0031] The module intelligent test system described above generates a driving signal in the system, and compares the feedback result of the module to be tested to determine whether the function of the module to be tested is normal. Different types of modules to be tested are tested using different system structures and driving signals.

[0032] Through the testing method of this embodiment, accurate test results can be obtained without the need for dedicated ATE equipment for testing, which can greatly reduce the cost of chip manufacturing and testing; according to different test modules, the intelligent test unit can generate corresponding drive signals to test functions. Testers do not need to organize test excitation signals in advance, nor do they need additional test tools and equipment, etc., and can achieve one-click testing to obtain results, which can save testing time.

[0033] (I) If the module to be tested is a simulation module, the testing method includes the following contents.

[0034] (1) Process steps of single simulation module testing method.

[0035] The simulation module is the module to be tested. The intelligent test unit includes an intelligent drive control sub-component and an intelligent comparison sub-component. The intelligent drive control sub-component generates a drive signal. The intelligent comparison sub-component compares the signal output by the simulation module with the drive signal generated by the intelligent drive control sub-component, and outputs the final comparison result and fault status.

[0036] After determining the module type, the method of using the intelligent test unit to intelligently test the analog module may include: first, the system controls the intelligent drive control sub-element to generate an analog drive signal, and transmits the analog drive signal to the module to be tested, that is, the driving analog signal generated by the analog module is a swap signal of 0 or 1. For example, a 0 drive signal is first generated, and a comparison and judgment is performed through the intelligent comparison sub-element. After that, the intelligent drive control sub-element continues to output a 1 drive signal, and then a comparison and judgment is performed through the intelligent comparison sub-element, or a 1 drive signal is first generated and then a 0 drive signal is generated for testing, and a swap signal of 01 or 10 is generated. It can be tested whether the analog module can operate normally and output the expected signal under a 0 or 1 drive signal, so as to achieve the purpose of testing the function of the analog module.

[0037] The system controls the analog module to process the analog drive signal, generate an analog test signal, and transmit the generated analog test signal to the intelligent comparison sub-component in the intelligent test unit. The system then controls the intelligent comparison sub-component to compare the analog test signal with the analog drive signal. If the comparison results are inconsistent, the intelligent comparison sub-component is controlled to output the analog test signal and the corresponding fault state. If the comparison results are consistent, the analog module test passes. For example, the analog drive signal generated by the intelligent drive control sub-component in the intelligent test unit is 1, and the intelligent test unit transmits the analog drive signal 1 to the analog module. The analog module processes the analog drive signal 1 and outputs the analog test signal and transmits it to the intelligent comparison sub-component. If the analog test signal output by the analog module is 1, the intelligent comparison sub-component compares the two signals and the results are consistent, then the test passes, and continues to generate a 0 signal for testing; if the analog test signal output by the analog module is 0, the intelligent comparison sub-component compares the two signals and the results are inconsistent, then the intelligent comparison sub-component will output the faulty analog test signal 0, as well as the fault state of the module. The reset and startup of the intelligent test unit can be controlled by the register in the chip.

[0038] In this embodiment, since the signals output by the analog modules such as overvoltage, undervoltage, and overtemperature are 1-bit data, a 1-bit signal is generated and output by the intelligent testing unit according to the characteristics of the analog module. After being processed by the analog module, the two signals are compared by the comparison unit to determine the function of the analog module. The above test logic is simple, and one-click testing of the analog modules in the chip can be realized, which can reduce various testing costs.

[0039] Considering that the test result of the analog module may not be accurate enough after only one signal exchange test, the following steps can be performed after controlling the intelligent comparison subcomponent to compare the analog test signal with the analog drive signal:

[0040] First, determine whether the number of swaps of the analog drive signal meets the preset number of times. If the number of swaps of the analog drive signal does not meet the preset number of times, the control drive unit continues to generate the analog drive signal. If the number of swaps of the analog drive signal meets the preset number of times, the test of the current module to be tested ends. For example, the drive signals 10 or 01 generated in sequence can be regarded as a swap of the drive signal. When testing the analog module, theoretically, a 0 signal test is performed once and then a 1 signal test is performed once. If both signal tests are OK, the test can be completed. However, in actual applications, the chip will be used multiple times. There may be contingency in the test process if only one swap is performed. Therefore, the analog module can be tested with multiple signal swaps. For the setting of the number of drive signal swaps, the user can set it according to the actual situation of the chip to ensure the result of the chip test.

[0041] In one embodiment, the module intelligent test system of the chip further includes a filtering unit. Considering that the output result after the analog module processes the signal may have burrs, the following steps may be performed after the analog module is controlled to process the analog drive signal and generate the analog test signal:

[0042] After the analog module processes the analog drive signal and outputs the analog test signal, the system controls the filter unit to process the analog test signal and generate an analog filter signal; controlling the intelligent comparison sub-element to compare the analog test signal with the analog drive signal includes: controlling the intelligent comparison sub-element to compare the analog filter signal with the analog drive signal. It should be noted that the filter unit, that is, the filter, requires a certain amount of time to filter the analog test signal. Therefore, when the intelligent test unit generates the drive signal, a certain amount of time needs to be set for the intelligent test unit. This time is the time required to maintain the filter signal. The user can set the filter time according to the actual filter selected.

[0043] Considering that the analog module may generate burr noise after signal processing, which may affect the comparison results of the subsequent comparison unit, it is necessary to filter the analog test signal output by the analog module to generate a smooth signal for comparison, so as to avoid noise interference as much as possible to ensure the accuracy of the test results.

[0044] The above scheme is aimed at the testing process of a single simulation module. When the user has multiple simulation modules to test, he can choose serial testing or parallel testing. The serial testing method can be understood as testing the simulation modules to be tested one by one, and the parallel testing method can be understood as testing all simulation modules at the same time.

[0045] (2) Simulate the process steps of the module serial test method.

[0046] The system first controls the intelligent drive control sub-element to generate a drive signal, that is, an analog drive signal, and enables the intelligent test unit to maintain the time required for filtering. Then, the system controls the comparison unit to compare the analog drive signal with the analog filter signal; then, it determines whether the number of switching of the drive signal meets the preset number of times. If not, the drive signal is continuously reversed, that is, the intelligent drive control sub-element is controlled to continue to generate the drive signal. If the number of switching meets the requirement, another analog module is switched to perform the test according to the above-mentioned intelligent test method. Finally, it determines whether all the analog modules to be tested have been traversed. If there are any that have not been tested, the untested analog modules are tested. If all the modules to be tested have been traversed, the test ends.

[0047] (3) Process steps of simulating module parallel testing method.

[0048] The system first controls the intelligent drive control sub-component to generate drive signals for all analog modules at the same time. The drive signal is also the analog drive signal, and the intelligent test unit maintains the time required for filtering. Then the system controls the comparison unit to compare the analog drive signal with the analog filter signal. After that, it determines whether the number of switching of the drive signal meets the preset number. If not, the drive signal continues to be reversed, that is, the intelligent drive control sub-component is controlled to continue to generate a drive signal of 010101... If the number of switching meets the requirements, the test of all analog modules to be tested is completed.

[0049] In actual testing, users can choose to use serial or parallel mode according to the actual situation of the chip and test requirements.

[0050] (ii) If the module to be tested is an ADC module, the testing method includes the following contents.

[0051] (1) Process steps for testing a single ADC module.

[0052] The structural framework of the ADC module intelligent test: the system obtains different voltage test gears, controls the intelligent drive control sub-component to generate the corresponding voltage test signal according to the voltage test gear. Since the ADC conversion module converts analog signals into digital signals, directly using digital signals to drive the ADC module may cause inaccurate test results. Therefore, a voltage conversion method is adopted to set a voltage drive unit in the module intelligent test system. Users can set voltage test signals of different gears in advance. The voltage drive unit can convert the voltage test signal into the corresponding specific test voltage. After that, the system controls the voltage drive unit to generate the corresponding test voltage according to the voltage test signal, and transmits the test voltage to the ADC module to be tested. After that, the ADC module to be tested is controlled to convert the test voltage into the corresponding voltage digital signal, and the voltage digital signal is transmitted to the intelligent comparison sub-component; finally, the system controls the intelligent comparison sub-component to compare the voltage digital signal with the voltage test signal; if the comparison is inconsistent, the voltage test signal and the test result are output, and if the comparison is consistent, the ADC module test ends. Specifically, since it is difficult for the ADC module to achieve 100% accurate conversion, there will be certain errors. Therefore, a certain error range needs to be set during comparison. Comparison consistency can also be understood as the converted value is within the allowable error range, and the test passes and ends; comparison inconsistency means that the conversion value is not within the set reasonable error range, then the intelligent comparison sub-component will output the converted voltage test signal and the result of test failure.

[0053] In this embodiment, a real voltage value is generated and converted into a corresponding digital signal after being processed by the ADC module, and then compared with the original driving signal through a comparison unit to test the function of the ADC module. The entire test process is relatively simple, the test logic is simple, and one-click testing of the analog module in the chip can be achieved, thereby saving time, improving efficiency, and reducing testing costs.

[0054] In one embodiment, considering that the test result of the ADC module may be inaccurate if only one voltage conversion test is performed, the following steps may be performed after the intelligent comparison subcomponent is controlled to compare the voltage digital signal with the voltage test signal:

[0055] After the intelligent comparison subcomponent has compared the voltage test signal and the voltage digital signal obtained by ADC conversion, the system determines whether the intelligent test unit has traversed all voltage test gears. If the intelligent test unit has not traversed all voltage test gears, the system controls the intelligent test unit to select the voltage test gear that has not been traversed and generates the corresponding voltage test signal; if the intelligent test unit traverses all voltage test gears, the test of the current ADC module to be tested is completed. Traversing all voltage test gears can also be understood as increasing the number of tests on the ADC module to improve the test accuracy of the ADC module.

[0056] In one embodiment, considering that the test result of the ADC module may be inaccurate if only one voltage conversion test is performed, all voltage test gears are traversed to increase the number of tests, thereby avoiding accidental situations as much as possible and improving the accuracy of the ADC module test.

[0057] In one embodiment, considering that if the ADC module fails to convert successfully due to a problem, the entire test process may be stuck. Therefore, before controlling the intelligent comparison sub-component to compare the voltage digital signal with the voltage test signal, the following steps may be performed:

[0058] After the system controls the ADC module to be tested to convert the test voltage into a corresponding voltage digital signal and transmits the voltage digital signal to the intelligent comparison sub-component, the system first determines whether the waiting time for the intelligent comparison sub-component to receive the voltage digital signal exceeds the preset time; if the waiting time for the intelligent comparison sub-component to receive the voltage digital signal exceeds the preset time, the test of the current ADC module to be tested ends and returns a timeout exception; if the waiting time does not exceed the preset time, the comparison operation continues to determine whether the result of the ADC conversion is accurate.

[0059] In this embodiment, considering that the ADC module cannot convert successfully due to problems, for example, the ADC module cannot return the ADC conversion end mark to the intelligent test unit, the entire test process may be stuck. Therefore, a timeout shutdown mechanism is set to avoid the entire test process from being stuck as much as possible, which wastes too much time and reduces chip test efficiency.

[0060] (2) Steps for serial testing of multiple ADC modules.

[0061] When there are multiple ADC modules that need to be tested, unlike the test of analog modules, users generally need to choose a serial test method to avoid the problem of inaccurate test voltage. The following are the steps for serial testing of multiple ADC modules disclosed in this embodiment: First, the intelligent test unit generates a voltage test signal and transmits it to the voltage drive unit. The voltage drive unit selects the voltage gear according to the voltage test signal. The intelligent test unit generates an ADC conversion command signal and transmits it to the ADC module. The system waits for the ADC module to convert. After the conversion is completed, the ADC module generates a conversion completion signal and transmits it to the intelligent test unit. After that, the expected result is compared with the received conversion result. The expected result can also be understood as a value within a reasonable error range of the original voltage test signal. After the comparison is completed, determine whether all voltage levels have been traversed. If so, switch to another ADC module for testing. If the voltage levels have not been traversed, test the untested voltage levels. After switching the ADC module, test according to the above-mentioned intelligent testing method to determine whether all ADC modules to be tested have been traversed. If not, continue to test the untested ADC modules. If all ADC modules have been traversed, the intelligent testing of multiple ADC modules is completed.

[0062] The chip testing device for building energy consumption described in the present invention comprises a type judgment unit and an intelligent testing unit;

[0063] The type determination unit is used to determine the module type of the chip to be tested, and the module type includes an analog module and an ADC module;

[0064] The intelligent test unit is used to test the chip to be tested. The intelligent test unit includes an intelligent drive control sub-element, a voltage drive unit and an intelligent comparison sub-element;

[0065] When testing the analog module, the intelligent drive control subcomponent generates an analog drive signal, and the analog module processes the analog drive signal to obtain an analog test signal; the intelligent comparison subcomponent compares the analog drive signal and the analog test signal, and when the comparison is inconsistent, it is determined that the analog module is faulty;

[0066] When the ADC module is tested, the intelligent drive control sub-component generates a voltage test signal, the voltage drive unit converts the voltage test signal into a corresponding test voltage, the ADC module processes the test voltage to obtain a voltage digital signal, and the intelligent comparison sub-component compares the voltage digital signal and the voltage test signal. When the comparison is inconsistent, the ADC module is judged to be faulty.

[0067] The electronic device described in the present invention includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the computer program is loaded into the processor, the chip testing method applied to building energy consumption is implemented.

[0068] The computer-readable storage medium of the present invention stores a computer program, and when the computer program is executed by a processor, the chip testing method applied to building energy consumption is implemented.

[0069] The computer-readable storage media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, flash memory, or any other medium that can be used to store the desired program code in the form of instructions or data structures and that can be accessed by a computer.

[0070] The processor is used to execute the computer program stored in the memory to implement each step of the method involved in the above embodiment.

Claims

1. A chip testing method for building energy consumption, characterized in that: The steps include: Determine the module type of the chip to be tested, and use the intelligent test unit to test the chip, wherein the module type includes an analog module and an ADC module, and the intelligent test unit includes an intelligent drive control sub-element, a voltage drive unit, and an intelligent comparison sub-element; When testing the analog module, the intelligent drive control subcomponent generates an analog drive signal, and the analog module processes the analog drive signal to obtain an analog test signal; the intelligent comparison subcomponent compares the analog drive signal and the analog test signal, and when the comparison is inconsistent, it is determined that the analog module is faulty; When the ADC module is tested, the intelligent drive control sub-component generates a voltage test signal, the voltage drive unit converts the voltage test signal into a corresponding test voltage, the ADC module processes the test voltage to obtain a voltage digital signal, and the intelligent comparison sub-component compares the voltage digital signal and the voltage test signal. When the comparison is inconsistent, the ADC module is judged to be faulty.

2. The chip testing method for building energy consumption according to claim 1, characterized in that: After the intelligent comparison subcomponent compares the analog drive signal and the analog test signal, the smart comparison subcomponent further includes: It is determined whether the number of times the analog drive signal is switched meets a preset number. If not, the intelligent drive control sub-element is controlled to continue generating the analog drive signal until the preset number is met.

3. The chip testing method for building energy consumption according to claim 1, characterized in that: The intelligent testing unit also includes a filtering unit. When the analog module is tested, the intelligent drive control sub-component generates an analog drive signal, the filtering unit converts the analog drive signal into an analog filter signal, and the analog module processes the analog filter signal to obtain an analog test signal; the intelligent comparison sub-component compares the analog filter signal and the analog test signal, and when the comparison is inconsistent, it is determined that the analog module is faulty.

4. The chip testing method for building energy consumption according to claim 3 is characterized in that: After the analog module processes the analog filter signal to obtain an analog test signal, it filters the analog test signal to generate a smooth analog test signal. The intelligent comparison sub-component compares the analog filter signal and the smooth analog test signal. When the comparison is inconsistent, it is determined that the analog module is faulty.

5. The chip testing method for building energy consumption according to claim 1, characterized in that: The intelligent comparison subcomponent compares the voltage digital signal and the voltage test signal and further includes: It is determined whether the intelligent test unit has traversed all voltage test gears. If not, the intelligent drive control sub-element continues to select the untraversed voltage test gears and generates corresponding voltage test signals until all voltage test gears are traversed.

6. The chip testing method for building energy consumption according to claim 1, characterized in that: Before the intelligent comparison subcomponent compares the voltage digital signal with the voltage test signal, the following steps are further included: It is determined whether the waiting time for the intelligent comparison sub-component to receive the voltage digital signal exceeds a preset time. If it exceeds the preset time, the test of the ADC module to be tested is terminated and a timeout exception is returned; otherwise, the test continues.

7. The chip testing method for building energy consumption according to claim 1, characterized in that: Perform serial or parallel testing on multiple analog modules and parallel testing on multiple ADC models.

8. A chip testing device for building energy consumption, characterized in that: Including type judgment unit and intelligent testing unit; The type determination unit is used to determine the module type of the chip to be tested, and the module type includes an analog module and an ADC module; The intelligent test unit is used to test the chip to be tested. The intelligent test unit includes an intelligent drive control sub-element, a voltage drive unit and an intelligent comparison sub-element; When testing the analog module, the intelligent drive control subcomponent generates an analog drive signal, and the analog module processes the analog drive signal to obtain an analog test signal; the intelligent comparison subcomponent compares the analog drive signal and the analog test signal, and when the comparison is inconsistent, it is determined that the analog module is faulty; When the ADC module is tested, the intelligent drive control sub-component generates a voltage test signal, the voltage drive unit converts the voltage test signal into a corresponding test voltage, the ADC module processes the test voltage to obtain a voltage digital signal, and the intelligent comparison sub-component compares the voltage digital signal and the voltage test signal. When the comparison is inconsistent, the ADC module is judged to be faulty.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the computer program is loaded into a processor, the chip testing method for building energy consumption according to any one of claims 1 to 7 is implemented.

10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the chip testing method for building energy consumption according to any one of claims 1 to 7 is implemented.