End product testing methods, methods of measuring test system losses, apparatus, media, products

Abstract

The application relates to a method for measuring system loss in a test system in a radio frequency chip finished product test, comprising the following steps: providing a standard chip with a standard test value; inputting a radio frequency signal to the standard chip through a test machine; measuring an output end of a test circuit board to obtain an output test value; determining a test difference value of the output test value and the standard test value, and judging to determine system output loss. The application also relates to a finished product test method, equipment, medium and product for a radio frequency chip.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of radio frequency technology, in particular to a finished product test method for a radio frequency chip, a method for measuring test system loss in finished product test of a radio frequency chip, equipment, medium and product. BACKGROUND

[0002] Finished product test (FT) refers to batch screening test on automatic test equipment (ATE) by using programmed mass production program to distinguish good products from bad products. In particular, in FT of radio frequency chips such as power amplifier (PA) and low noise amplifier (LNA) on ATE, even if the same program is used, there will be errors in the construction of different test environments for the same test equipment, and the errors in the construction of test environments for different equipment of the same type will be even greater. Figure 1 As shown in FIG. 1, it is a test result diagram of a radio frequency (RF) test item (for example, gain) of one of the chips in the same batch after three times of test environment construction on the same test machine, in which the horizontal axis is the input radio frequency signal and the vertical axis is the radio frequency test item. It can be seen that the distribution of the three test results deviates to a certain extent. This problem is caused by the fact that the radio frequency test item is sensitive to the test environment. When the test environment is constructed each time, there will be errors and losses due to the difference in the tightness of the radio frequency cable, the contact condition of the socket and the load board (LB) during installation, and the like. In order to ensure that the test results of the same batch of chips are basically the same each time, the test system (test machine + radio frequency cable + LB + socket) needs to be calibrated to realize smooth mass production of FT. SUMMARY

[0003] In order to solve the above problems and realize accurate calibration of the loss of the test system, the present application provides a method for measuring test system loss in finished product test of a radio frequency chip, the test system comprising a test machine, a test circuit board connected to the test machine, and a socket provided on the test circuit board, the socket being used to install a chip to electrically connect the chip and the test circuit board.

[0004] The test system loss comprises system output loss, and the system output loss comprises output end output contact loss of the socket and the test circuit board and output path loss between the output end of the chip and the output end of the test circuit board.

[0005] The initial output loss is stored in the test machine, and the initial output loss comprises initial output contact loss of the output end of the socket and the test circuit board and / or initial output path loss between the output end of the chip and the output end of the test circuit board.

[0006] The method comprises:

[0007] providing a standard chip, wherein a test item of the standard chip meets a test standard of the finished product test, and the standard chip has a standard test value;

[0008] inputting a radio frequency signal to the standard chip by the test machine, wherein a power of the input radio frequency signal is a sum of a lossless input power and a stored output loss;

[0009] measuring an output end of the test circuit board to obtain an output test value;

[0010] determining a test difference value between the output test value and the standard test value, and judging:

[0011] when the test difference value is within a set error range, determining the initial output loss as the system output loss;

[0012] when the test difference value exceeds the set error range, applying a first compensation deviation to the stored output loss to obtain an adjusted output loss, repeating the steps of inputting a radio frequency signal, measuring an output test value, and determining a test difference value, until the test difference value is within the error range, and determining the adjusted output loss as the system output loss, wherein the adjusted output loss is a sum of the first compensation deviation and the stored output loss, and the stored output loss includes the initial output loss and the adjusted output loss.

[0013] Optionally, the test system loss further includes a system input loss, wherein the system input loss includes an input path loss of the radio frequency signal passing through the input end of the test circuit board to the input end of the chip, and an input contact loss of the input end of the socket and the test circuit board.

[0014] The test machine stores an initial input loss, wherein the initial input loss includes an initial input contact loss of the input end of the socket and the test circuit board and / or an initial input path loss between the input end of the test circuit board and the input end of the chip.

[0015] The method further comprises:

[0016] obtaining a standard gain value of the standard chip;

[0017] testing the output end of the chip to obtain a test output power P out1 , and determining an actual output power P out2 by the following formula: P out2 = system output loss + P out1 ;

[0018] acquiring an input power P sent by the test machine in1 and determining an actual input power P received by the standard chip through the following formula in2 : P in2 = P in1 - the stored input loss;

[0019] determining a test gain value N of the standard chip through the following formula based on the actual output power and the actual input power: out2 -P in2 ;

[0020] determining a gain difference value between the test gain value and the standard gain value, and judging:

[0021] when the gain difference value is within a set error range, determining the initial input loss as the system input loss;

[0022] when the gain difference value exceeds the set error range, applying a second compensation bias to the stored input loss to obtain an adjusted input loss, repeating the steps of testing Pin2 and determining the gain value N, and when the gain difference value is within the error range, determining the adjusted input loss as the system input loss, wherein the adjusted input loss is the sum of the second compensation bias and the stored input loss, and the stored input loss includes the initial input loss and the adjusted input loss.

[0023] Optionally, the standard test value is one of a standard error vector magnitude value, a standard current, and a standard saturation power.

[0024] The output test value is one of an output error vector magnitude value, an output current, and an output power.

[0025] Optionally, the adjustment can include one of a traversal accumulation method, a dichotomy method, and a linear estimation method.

[0026] Optionally, adjusting the initial output loss includes:

[0027] adjusting the initial contact loss and / or the initial output path loss; or

[0028] adjusting the sum of the initial contact loss and the initial output path loss.

[0029] Adjusting the initial input loss includes:

[0030] adjusting the initial contact loss and / or the initial input path loss; or

[0031] adjusting the sum of the initial contact loss and the initial input path loss.

[0032] Optionally, the method further comprises:

[0033] setting a test difference form to record the initial output loss, the adjusted output loss, the output test value, and the test difference; and / or

[0034] setting a gain difference form to record the initial input loss, the adjusted input loss, the test gain value, and the gain difference.

[0035] Optionally, the test machine comprises:

[0036] a multimeter or a power meter or a power board card for testing the output current;

[0037] a radio frequency test module for testing the output error vector magnitude value and the output power.

[0038] Optionally, the input power P in1 , the test output power P out1 , and the actual output power P out2 are stored for calling when in use.

[0039] The application also provides a finished product testing method for a radio frequency chip, which measures the test system loss by using any one of the above methods.

[0040] Based on the test system error, the power of the radio frequency signal to be transmitted by the test machine is adjusted to obtain a calibrated radio frequency signal for testing, and the power of the calibrated radio frequency signal is the power of the radio frequency signal to be transmitted plus the test system loss.

[0041] The application also provides an electronic device, which comprises a memory storing computer executable instructions and a processor; when the instructions are executed by the processor, the device implements the method according to any one of the above methods.

[0042] The application also provides a computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement the steps of the method according to any one of the above methods.

[0043] The application also provides a computer program product, which comprises a computer program, and the computer program is executed by a processor to implement the steps of the method according to any one of the above methods.

[0044] Using the above method, the present application realizes a more accurate calibration of the test system by mutual verification of the output test items and the input test items, such as the output test current and the input test gain. During the FT mass production test, the input loss and output loss obtained by calibration can be used for testing, so that the obtained measurement results will be more accurate and have higher precision. It can also effectively avoid the possibility of directly adding deviations to the test results and causing misjudgment during chip testing, and at the same time eliminate the possibility of unreasonable situations caused by direct linear compensation of the test items. The present application can also be expanded according to different products. For different types of RF products, test items such as current and gain, error vector magnitude (EVM) and gain can be selected. For the transmitting RF component (TX) and the receiving RF component (RX), the TX Gain transmission channel gain and TX Psat transmission channel saturation power, and the RX Gain receiving channel gain and RX IP1 receiving channel input 1dB compression point can be used. The basic principle is that the result of the chip meeting one of the parameters is only related to the input quotient or output quotient loss. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 This is a diagram showing the test results of the chip after setting up the test environment three times on the same test machine.

[0046] Figure 2 Schematic diagram of the structure of the test system according to the embodiment of the present application.

[0047] Figure 3 Schematic diagram of a testing system according to an embodiment of the present application.

[0048] Figure 4 The flowchart is a method for measuring the loss of a test system according to an embodiment of the present application.

[0049] Figure 5 is a curve diagram showing the relationship between current and output power according to an embodiment of the present application.

[0050] Figure 6 Graph showing current, EVM and output power according to an embodiment of the present application.

[0051] Figure 7 is a graph showing the relationship between input power and output power according to an embodiment of the present application.

[0052] Figure 8 Flowchart of measuring input terminal test system error according to an embodiment of the present application.

[0053] Figure 9 is a schematic diagram of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0054] The following will be combined with the accompanying drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. It should be understood that the specific embodiments described herein are only used to illustrate the relevant disclosure and are not intended to limit the disclosure. It should also be noted that for ease of description, only the portions relevant to the relevant disclosure are shown in the drawings.

[0055] First reference Figure 2 The test system used in this application is described below. Test system 200 includes a tester 201, a test circuit board 202 mounted on and electrically connected to tester 201, and a socket 203 for mounting a chip 204 to electrically connect the chip to test circuit board 202. It will be appreciated that the bracket shown in the figure is used to support the tester, and the sorting machine is used to load the chips.

[0056] Combined with reference Figure 3 As shown in the planar schematic diagram of the test system, the RF input signal sent by the test machine 201 is input into the test circuit board 202 through the RF cable and the input end of the test circuit board 202, and then input into the chip 204 through the wiring input path 303 and the chip input end 304 on the test circuit board 202. After that, the RF signal passes through the chip 204, the chip output end 301, and the wiring output path 302 on the test circuit board 202, and is output at the output end of the test circuit board.

[0057] The test system includes losses, and the test system losses include system output losses. The system output losses include output contact losses caused by installation between the socket 203 and the test circuit board 202 (that is, losses caused by contact between the output end of the socket 203 and the test circuit board 202 when the socket 203 is inserted into the test circuit board 202), and output path losses of the output path 302 between the output end of the chip 204 and the output end of the test circuit board 202 (that is, losses on the path of the RF signal transmitted from the output end of the chip to the output end of the test circuit board).

[0058] It is understood that the contact and output paths 302 shown in the figure are merely examples and do not represent actual contact positions and paths.

[0059] In addition, tester 201 also stores initial output loss, which is used to perform initial calibration of the test system at the start of a test. This initial output loss includes the initial output contact loss between socket 203 and the test circuit board and / or the initial output path loss between the output end of chip 204 and the output end of the test circuit board. For ease of explanation, the loss used for calibration at the beginning of a test is referred to as the initial output loss, and the loss determined for calibrating the system upon completion of calibration is referred to as the system output loss. This is achieved by continuously adjusting the output loss during the calibration process.

[0060] During actual testing, a reasonable initial output path loss can be derived through empirical experimentation based on the material and length of the test circuit board in the signal output path. However, the contact loss between the socket and the test circuit board is more difficult to estimate, so the initial output path loss is typically used as the initial output loss. Alternatively, simulation based on a circuit board model can be performed to obtain a more accurate initial output loss.

[0061] It can be understood that the various losses in this application refer to the power loss of the radio frequency signal during the transmission process, and the unit is dBm.

[0062] based on Figure 3 The test system shown, reference Figure 4 The flowchart is used to illustrate the method for measuring the test system loss in the test of RF chip finished products proposed in this application.

[0063] In step 401, a standard chip is provided. The standard chip is the GU chip mentioned above, and its test items all meet the test standards for finished product testing. Therefore, the standard chip has a standard test value X, which is directly readable information stored in a tester or other storage device.

[0064] It is understandable that the test standard is a range of values, and the test values ​​of each test item of the standard chip that meets the test standard are all fixed values. The test value of an appropriate test item is selected from each test item to serve as the standard test value.

[0065] In this embodiment, the appropriate test item may be current. Figure 5The relationship curve of current and output power shows that when the current is in the range of 0-i1, the measured chip is in the linear working area; when the current is in the range of i1-i2, the measured chip is in the saturation area, and the current size does not affect the size of the output power; when the current is greater than i2, the output power will rapidly decrease with the increase of the current, and even the chip will be burned out. That is, when the chip is in the linear area, the output power will gradually increase with the increase of the current; when the chip is in the saturation area, the output power will not significantly increase even if the current continuously increases; when the chip is in the saturation area, the output power will rapidly decrease with the increase of the current, and even the chip will be burned out. The present application is calibrated according to the correlation of the current and the output power in the linear area. In addition, since Gain=Pout-Pin, and Pin is a known small signal controlled by the tester in the calibration process, the chip is ensured to work in the linear area, so the power can be converted into gain by using the relationship diagram in Figure 5 , and the system loss can be tested by using the relationship between the current and the power.

[0066] Therefore, in the embodiment of the present application, the current that makes the chip in the linear working area can be selected as the appropriate test item according to the linear correlation between the current and the output power, that is, the standard current value of the GU chip is used as the standard test value.

[0067] In addition, as shown in the relationship diagrams of the current and the output power and the error vector magnitude (EVM) and the output power in Figure 6 , it can be seen that, similar to the current and the output power, the EVM also has a certain linear relationship with the output power, and in the linear working area, the greater the output power, the greater the EVM. Therefore, the standard EVM value of the GU chip can also be selected as the standard test value, and the same method can be used for measuring the system output loss.

[0068] Referring to the curve diagram of the input power and the output power in Figure 7 , when the chip is in the saturation area, changing the input power will not change the size of the output power, that is, the loss of the test system will not affect the size of the output power. Therefore, the output power (saturation power) obtained by the test can be equal to the saturation power of the GU by adjusting the loss of the output end, so as to obtain the loss that needs to be compensated by the output end. Therefore, the standard saturation power can also be used as the standard test value.

[0069] In step 402, the tester inputs a radio frequency signal to the standard chip, and the power of the input radio frequency signal is the sum of the lossless input power and the stored system output loss. After the standard chip receives the input radio frequency signal, the corresponding signal can be output at the output end.

[0070] The lossless input power is the power inputted by the tester to the standard chip without considering the loss. For example, the power of the radio frequency signal to be transmitted is A before the loss adjustment of the system (it can also be considered as the case without system loss), and the power received by the output end of the test circuit board in the ideal case (without loss) is B; however, the power received by the output end of the test circuit board is less than B due to the loss of the test system, and therefore the power of the radio frequency signal to be transmitted needs to be adjusted to the sum of A and the loss, which is the initial output loss stored in the tester before calibration; when the loss is calibrated, the loss stored in the tester is adjusted as the adjusted output loss.

[0071] The step specifically includes the following steps:

[0072] The power M of the radio frequency signal to be transmitted without considering the loss is determined, which can be referred to as the lossless transmission power; it can be understood that the lossless transmission power is the aforementioned lossless input power, which is described from the perspective of inputting the standard chip, and the lossless transmission power is described from the perspective of the tester transmitting;

[0073] The stored system output loss N is called;

[0074] The lossless transmission power and the stored system output loss are calculated and summed (M+N) to obtain the calibrated transmission power;

[0075] The tester transmits the radio frequency signal with the calibrated transmission power to perform the test.

[0076] In step 403, the output end of the test circuit board is measured to obtain the output test value Y. Since the signal output from the output end of the standard chip has a certain loss after passing through the socket and the test circuit board, the output test value is not the standard test value of GU, but the value measured under the influence of the initial output loss, which is less than the standard test value of GU.

[0077] In step 404, the test difference value (i.e., X-Y) of the output test value and the standard test value is determined, and the test difference value is judged: when the test difference value is within the set error range, the initial output loss is determined as the output loss; when the test difference value exceeds the set error range, a first compensation bias is applied to the stored output loss to obtain an adjusted output loss, and the steps of inputting the radio frequency signal, measuring the output test value, and determining the test difference value are repeated until the test difference value is within the error range, i.e., the output test value is equal to the standard test value, so as to determine the adjusted output loss as the system output loss, wherein the adjusted output loss is the sum of the first compensation bias and the stored output loss.

[0078] The output test value can be one of an output EVM value, an output current, and an output power corresponding to the standard test value. In the present application, the output test value at the output end of the test circuit board is adjusted by applying a corresponding deviation to the radio frequency signal emitted by the tester. The output test value after calibration should be equal to the standard test value, i.e., the output test value after calibration is equal to the sum of the output test value before calibration and the first compensation deviation.

[0079] It can be understood that the adjustment of the output loss can be performed through multiple iterations. For example, the first adjustment is performed on the basis of the initial output loss, and each subsequent adjustment is performed on the basis of the output loss after the last adjustment until the test difference is within the error range. Further, the stored output loss in steps 402-404 includes the initial output loss and the adjusted output loss during the adjustment process. When the first adjustment is performed, the stored output loss is the initial output loss. In subsequent adjustments, the stored output loss is the adjusted output loss obtained during the adjustment process.

[0080] The test difference is the deviation of the output test value of the test item of the standard chip from the standard test value under the influence of the current initial output loss. The set error range is used to determine whether the test item meets the test standard of the finished product test under the deviation. When the test difference is within the set error range, it means that the test value of the test item still meets the test standard even under the influence of the initial output loss. Therefore, the initial output loss can be determined as the system output loss for finished product testing.

[0081] It can be understood that since the initial output loss is completely based on the inherent loss of the test system and has not been adjusted by humans, when the test difference is within the set error range, it can be considered that the current test system does not need to be adjusted additionally and can be directly used for finished product testing. When the test difference exceeds the set error range, it is considered that the current initial output loss causes the corresponding test item to fail to meet the test standard. Therefore, a first compensation deviation is applied to the initial output loss for adjustment to obtain an adjusted output loss, so that the test item meets the test standard, wherein the final adjusted system output loss = first compensation deviation + stored output loss.

[0082] Based on test experience and test environment, the adjusted output loss obtained by applying the first compensation deviation to the radio frequency signal can adjust the initial contact loss and / or the initial output path loss respectively, or can adjust the sum of the initial contact loss and the initial output path loss as a whole. Specifically, traversal accumulation method, dichotomy method, linear estimation method, etc. can be used for adjustment.

[0083] Traverse accumulation method: assuming initial value is 0, traverse range is 5, step is 0.1, then the first compensation deviation changes as: 0, 0.1, 0.2, 0.3, …, 4.9, 5 (direction can be positive or negative, i.e. from 0, -0.1, -0.2, …, -4.9, -5). It can be understood that it is not necessary to traverse all values completely, only the test difference value less than the error range can confirm the current value as the first compensation deviation.

[0084] Binary method: assuming minimum value min = 0, maximum value max = 5; then the first compensation deviation = (min + max) / 2 = 2.5; if the test difference value is less than the lower limit value of the error range under the current first compensation deviation, it indicates that the required first compensation deviation is too small, which should be between the current first compensation deviation and max, then the first compensation deviation = (2.5 + max) / 2 = 3.75; if the test difference value is greater than the lower limit value of the error range under the current first compensation deviation, it indicates that the required first compensation deviation is too large, which should be between the current first compensation deviation and min, then the first compensation deviation = (0 + 2.5) / 2 = 1.25; subsequent is similar, until the test difference value is within the error range.

[0085] Linear estimation method: that is, according to the linear relationship between current and output power, such as the simplest y = x + b, where y is output power and x is current; assuming the coefficient of x is 1, if one of the test results is that when the input is x0, the output is 3 away from the target; the next input is x + 3 until the test difference value is within the error range. Since the current is controlled by the input radio frequency signal, the current needs to be adjusted by adjusting the radio frequency signal, and thus the power deviation value of the radio frequency signal, i.e. the first compensation deviation, can be obtained.

[0086] Thus, the measurement of the test system loss can be realized by testing the output end for the calibration of the system finished product test. It can be understood that the test method is universal for different test items.

[0087] In order to realize more accurate calibration, the application also proposes a method of combining output end test and input end test, i.e. the test system loss also includes system input loss, so as to obtain more accurate loss value through the joint verification of the output end and the input end.

[0088] The system input loss needs to be determined by adjusting the output loss, so the output loss needs to be adjusted first, and then the following steps are completed to determine the system input loss.

[0089] Reference Figure 3Similar to the output loss, the system input loss includes the input path loss of the input path 303 between the input end of the radio frequency signal passing through the test circuit board to the input end of the chip, and the contact loss between the socket 203 and the test circuit board 202. The initial input loss is also stored in the tester, which includes the contact loss between the socket and the test circuit board and / or the initial input path loss between the input end of the test circuit board and the input end of the chip. The more accurate loss can be obtained by the mutual verification of the output end and the input end. For the same reason, the initial input path loss is usually taken as the initial input loss, which is not described here.

[0090] Figure 8 The flowchart for testing the system input loss of the input end.

[0091] In step 801, the standard gain value M of the standard chip is obtained. Those skilled in the art can understand that the test items of the output end: current, EVM value and saturation power, cannot be used for testing the input end. Therefore, in this embodiment, the gain, which is related to both the output power and the input power (i.e. the gain value is the difference between the output power and the input power), is selected as the test item for testing the system input loss of the input end, wherein the standard gain value is the directly readable information stored in the tester or other storage devices.

[0092] In step 802, the test output power P out1 of the chip output end is obtained, and the actual output power P out2 is determined by the following formula: out2 P out1 = system output loss + P . The actual output power can be understood as the lossless output power, i.e. the output power of the chip without considering the system output loss, or the ideal output power. The power value can be stored in the tester or other storage devices. It can be understood that the test output power described here is the difference between the lossless output power of the chip output end and the system output loss, and the test system output loss is obtained after the output loss measurement. Therefore, the test system output loss is added to the radio frequency signal sent by the tester, and the test output power obtained in this step is the calibrated output power, which is the difference between the ideal output power and the adjusted output loss, and the result is the same as the standard output power or within the error range.

[0093] In step 803, the input power P in1 sent by the tester is obtained, and the actual input power P in2 received by the standard chip is determined by the following formula: in2 P in1-Stored input loss. Due to the existing system input loss, the input power received by the input pin of the standard chip is not equal to the input power sent by the test machine. It can be understood that in this embodiment, since the existing initial input loss does not necessarily enable the test item (i.e., gain) to meet the test standard, the actual input power determined based on the initial input loss is not necessarily absolutely accurate. It is only used to determine an initial gain obtained by the test for subsequent adjustment. Similar to the determination of the initial output loss described above, the initial input loss can also be determined based on a large amount of experimental experience or simulation based on the circuit board model, which will not be repeated here.

[0094] Input power P in1 , actual input power P in2 The value can be stored in the test machine or other storage devices and called when it is used.

[0095] In step 804, based on the actual output power and the actual input power, the test gain value N of the standard chip is determined by the following formula: N=P out2 -P in2 =System output loss + P out1 -(P in1 - storage input loss), where P out1 、P in1 are the lossless output power and lossless input power, both of which are fixed values. The adjusted output loss is determined by the above-mentioned test output loss.

[0096] In step 805, the gain difference (MN) between the test gain value and the standard gain value is determined, and a judgment is made:

[0097] When the gain difference is within the set error range, the initial input loss is determined as the system input loss;

[0098] When the gain difference exceeds the set error range, a second compensation deviation is applied to the stored input loss to obtain an adjusted input loss. The steps of testing Pin 2 and determining the gain value N are repeated until the gain difference is within the error range, at which point the adjusted input loss is determined as the system input loss. The adjusted input loss is the sum of the second compensation deviation and the stored input loss. In this application, the test gain value of the test circuit board is adjusted by applying a corresponding deviation to the RF signal emitted by the tester. The calibrated test gain value should be equal to the standard gain value, that is, the calibrated test gain value is equal to the sum of the pre-calibration test gain value and the second compensation deviation.

[0099] It is understandable that the adjustment of the input loss can be performed through multiple iterations. For example, the first adjustment is performed based on the initial input loss, and each subsequent adjustment is based on the input loss after the previous adjustment until the gain difference is within the error range. Similar to the adjustment of the output loss, the final input loss can be determined by traversal accumulation method, bisection method and linear prediction method. The iterative principle is the same and will not be repeated here. Furthermore, the input loss stored in steps 803-805 includes the initial input loss and the adjusted input loss during the adjustment process. When the adjustment is made for the first time, the stored input loss is the initial input loss. In subsequent adjustments, the stored input loss is the adjusted input loss obtained during the adjustment process.

[0100] In addition, in order to improve measurement efficiency, the test machine is also provided with a test difference form to record the initial output loss, adjusted output loss, output test value, and test difference; and / or a gain difference form is set to record the initial input loss, adjusted input loss, test gain value, and gain difference, and the input power, test output power, and actual output power sent by the test machine during the measurement process are stored in real time, so that the above parameters can be directly called when in use.

[0101] For the testing of each test item, external test equipment can be used for testing, or the test equipment integrated in the test machine can be used. For example, the test machine may include: a multimeter or a power meter or a power supply board for testing the output current; an RF test module for testing the output EVM value and the power of the RF signal output by the test machine.

[0102] This application also proposes a finished product testing method for RF chips. First, the test system loss is measured using the aforementioned method. Then, based on the test system loss, the power of the RF signal to be transmitted by the tester is adjusted to obtain a calibrated RF signal for testing. The power of this calibrated RF signal is the power of the RF signal to be transmitted plus the measured test system error.

[0103] Now refer to Figure 9 , shown is a block diagram of an electronic device 900 according to an embodiment of the present application, which is used to perform any of the aforementioned methods. The electronic device can be integrated into a test machine or can be independent of the test machine. The electronic device 900 may include one or more processors 902, system control logic 908 connected to at least one of the processors 902, system memory 904 connected to the system control logic 908, non-volatile memory (NVM) 906 connected to the system control logic 908, and a network interface 910 connected to the system control logic 908.

[0104] The processor 902 may include one or more single-core or multi-core processors. The processor 902 may include any combination of general-purpose processors and special-purpose processors (e.g., graphics processors, application processors, baseband processors, etc.). In the embodiments of this document, the processor 902 may be configured to execute one or more of the various embodiments proposed in this application, including but not limited to operations on values ​​such as actual output power and actual input power, and calls to data.

[0105] In some embodiments, the system control logic 908 may include any suitable interface controller to provide any suitable interface to at least one of the processors 902 and / or any suitable device or component in communication with the system control logic 908, including but not limited to controlling radio frequency signals emitted by the test machine.

[0106] In some embodiments, the system control logic 908 may include one or more memory controllers to provide an interface to the system memory 904. The system memory 904 may be used to load and store data and / or instructions. In some embodiments, the system memory 904 of the electronic device 900 may include any suitable volatile memory, such as a suitable dynamic random access memory (DRAM).

[0107] The non-volatile memory 906 may include one or more tangible, non-transitory computer-readable media for storing data and / or instructions. In some embodiments, the non-volatile memory 906 may include any suitable non-volatile memory such as flash memory and / or any suitable non-volatile storage device, such as at least one of an HDD (Hard Disk Drive), a CD (Compact Disc) drive, and a DVD (Digital Versatile Disc) drive. Both the system memory 904 and the non-volatile memory 906 may be used to store and read various data during the test process, including but not limited to the input power P sent by the test machine. in1 , the test output power P out1 and the actual output power P out2 All the data required for the testing process.

[0108] The non-volatile memory 906 may include a portion of storage resources installed on the device of the electronic device 900, or it may be accessible to the device but not necessarily a part of the device. For example, the non-volatile memory 906 may be accessed over a network via the network interface 910.

[0109] In particular, system memory 904 and non-volatile memory 906 may each include a temporary copy and a permanent copy of instructions 920. Instructions 920 may include instructions that, when executed by at least one of processors 902, cause electronic device 900 to implement the methods provided herein. In some embodiments, instructions 920, hardware, firmware, and / or software components thereof may additionally or alternatively be located in system control logic 908, network interface 910, and / or processor 902.

[0110] In some embodiments, the network interface 910 may be integrated with other components of the electronic device 900. For example, the network interface 910 may be integrated with at least one of the processor 902, the system memory 904, the non-volatile memory 906, and a firmware device (not shown) having instructions. When at least one of the processors 902 executes the instructions, the electronic device 900 implements one or more of the various embodiments described herein. The network interface 910 may further include any suitable hardware and / or firmware to provide a multiple-input multiple-output radio interface.

[0111] In one embodiment, at least one of the processors 902 may be packaged together with logic for one or more controllers of the system control logic 908 to form a system-in-package (SiP). In one embodiment, at least one of the processors 902 may be integrated on the same die with logic for one or more controllers of the system control logic 908 to form a system-on-chip (SoC).

[0112] The electronic device 900 may further include an input / output (I / O) device 912. The I / O device 912 may include a user interface to enable a user to interact with the device 900; and a peripheral component interface may be designed to enable peripheral components to interact with the electronic device 900.

[0113] In some embodiments, the user interface may include, but is not limited to, a display (e.g., an LCD display, a touch screen display, etc.), a speaker, a microphone, one or more cameras (e.g., a still image camera and / or a video camera), a flashlight (e.g., an LED flash), and a keyboard.

[0114] In some embodiments, the peripheral component interface may include, but is not limited to, a non-volatile memory port, an audio jack, and a power interface.

[0115] Those skilled in the art can understand that the structure illustrated by the embodiments of the present application does not constitute a specific limitation to the electronic device 900. In some other embodiments of the present application, the electronic device 900 can include more or fewer components than those illustrated, or combine certain components, or split certain components, or different arrangement of components. The illustrated components can be implemented in hardware, software, or a combination of software and hardware.

[0116] The program code can be applied to input instructions to perform the functions described herein and generate output information. The output information can be applied to one or more output devices in a known manner. For the purposes of this application, a processing system includes any system that has a processor, such as for example a digital signal processor (DSP), a microcontroller, an application specific integrated circuit (ASIC), or a microprocessor.

[0117] The program code can be implemented in a high-level procedural or object-oriented programming language to communicate with a processing system. If desired, the program code can also be implemented in assembly or machine language. In fact, the mechanisms described herein are not limited in scope to any particular programming language. In any case, the language can be a compiled or interpreted language.

[0118] One or more aspects of at least one embodiment can be implemented by representative instructions stored on a computer-readable storage medium that represents various logic within the processor, which when read by a machine causes the machine to fabricate logic to perform the techniques described herein. Such representations, known as "IP cores" can be stored on a tangible, computer readable storage medium and supplied to various customers or manufacturing facilities to load into the fabrication machines that make the logic or processor.

[0119] One embodiment of the present application discloses a computer readable medium storing one or more programs executable by one or more processors to implement the method of the present application.

[0120] One embodiment of the present application discloses a computer program product comprising a computer program which, when executed by a processor, implements the method of the present application.

[0121] The above describes the embodiments of the present application by specific specific embodiments, and those skilled in the art can easily understand other advantages and effects of the present application from the disclosure of the present application. Although the description of the present application will be introduced in combination with the preferred embodiments, it does not mean that the features of the present application are limited to the embodiments. In addition, in order to avoid confusion or obscure the focus of the present application, some specific details will be omitted in the description. It should be noted that the embodiments and features in the embodiments of the present application can be combined with each other without conflict.

[0122] Furthermore, various operations will be described as multiple discrete operations in a manner that is most helpful in understanding the illustrative embodiments; however, the order of description should not be construed as implying that these operations are necessarily order dependent. In particular, these operations do not need to be performed in the order presented.

[0123] Unless the context dictates otherwise, the terms "comprising," "having," and "including" are synonymous. The phrase "A / B" means "A or B." The phrase "A and / or B" means "(A and B) or (A or B)."

[0124] As used herein, the term "module" or "unit" may refer to, be or include: an application specific integrated circuit (ASIC), an electronic circuit, a (shared, dedicated or group) processor and / or memory that executes one or more software or firmware programs, a combinational logic circuit and / or other suitable components that provide the described functionality.

[0125] In the accompanying drawings, some structural or method features are shown in a specific arrangement and / or order. However, it should be understood that such specific arrangement and / or order may not be required. In some embodiments, these features may be arranged in a manner and / or order different from that shown in the illustrative drawings. In addition, the inclusion of structural or method features in a particular figure does not imply that such features are required in all embodiments, and in some embodiments, these features may not be included or may be combined with other features.

[0126] It should be understood that although the terms "first," "second," and the like may be used herein to describe various elements or data, these elements or data should not be limited by these terms. These terms are used only to distinguish one feature from another. For example, a first feature may be referred to as a second feature, and similarly, a second feature may be referred to as a first feature without departing from the scope of the exemplary embodiments.

[0127] It should be noted that in this specification, similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0128] While the present invention has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention.

Claims

1. A method for measuring test system loss during finished RF chip testing. The test system comprises a test machine, a test circuit board connected to the test machine, and a socket disposed on the test circuit board, the socket being used to mount a chip to electrically connect the chip to the test circuit board. The test system losses include: System output loss, the system output loss comprising: output contact loss between the output end of the socket and the output end of the test circuit board, and output path loss between the output end of the chip and the output end of the test circuit board; The tester stores an initial output loss, wherein the initial output loss includes an initial output contact loss between the output end of the socket and the test circuit board and / or an initial output path loss between the output end of the chip and the output end of the test circuit board; Characterized in that the method comprises: Providing a standard chip, wherein the test items of the standard chip meet the test standards of the finished product test, and the standard chip has a standard test value; Inputting a radio frequency signal into the standard chip through the test machine, wherein the power of the input radio frequency signal is the sum of the lossless input power and the stored output loss; measuring an output terminal of the test circuit board to obtain an output test value; Determine the test difference between the output test value and the standard test value, and make a judgment: When the test difference is within a set error range, determining the initial output loss as the system output loss; When the test difference exceeds a set error range, a first compensation deviation is applied to the stored output loss to obtain an adjusted output loss. The steps of inputting a radio frequency signal, measuring the output test value, and determining the test difference are repeated until the test difference is within the error range. The adjusted output loss is then determined as the system output loss, wherein the adjusted output loss is the sum of the first compensation deviation and the stored output loss, and the stored output loss includes the initial output loss and the adjusted output loss.

2. The method according to claim 1, wherein the testing system loss further comprises: System input loss, the system input loss comprising: input path loss of the RF signal from the input end of the test circuit board to the input end of the chip, and input contact loss between the input end of the socket and the test circuit board; The tester stores initial input loss, which includes initial input contact loss between the input end of the socket and the test circuit board and / or initial input path loss between the input end of the test circuit board and the chip input end; Characterized in that the method further comprises: Obtaining a standard gain value of the standard chip; Test the output end of the chip to obtain the test output power P out1 The actual output power P is determined by the following formula: out2 :P out2 = system output loss + P out1 ; Get the input power P sent by the test machine in1 The actual input power P received by the standard chip is determined by the following formula in2 :P in2 =P in1 - Storage input loss; Based on the actual output power and the actual input power, the test gain value N of the standard chip is determined by the following formula: N=P out2 -P in2 ; Determine the gain difference between the test gain value and the standard gain value, and make a judgment: When the gain difference is within a set error range, determining the initial input loss as the system input loss; When the gain difference exceeds the set error range, a second compensation deviation is applied to the stored input loss to obtain an adjusted input loss, and the steps of testing Pin2 and determining the gain value N are repeated until the gain difference is within the error range. The adjusted input loss is determined as the system input loss, wherein the adjusted input loss is the sum of the second compensation deviation and the stored input loss, and the stored input loss includes the initial input loss and the adjusted input loss.

3. The method according to claim 1 or 2, characterized in that The standard test value is one of a standard error vector amplitude value, a standard current, and a standard saturation power; The output test value is one of an output error vector amplitude value, an output current, and an output power.

4. The method according to claim 1 or 2, characterized in that The adjustment includes one of an ergodic accumulation method, a binary division method, and a linear prediction method.

5. The method according to claim 2, characterized in that Adjusting the initial output loss includes: adjusting the initial output contact loss and / or the initial output path loss; or adjusting the sum of the initial output contact loss and the initial output path loss; Adjusting the initial input loss includes: adjusting the initial input contact loss and / or the initial input path loss; or The sum of the initial input contact loss and the initial input path loss is adjusted.

6. The method according to claim 2, characterized in that Also includes: Setting a test difference form to record the initial output loss, the adjusted output loss, the output test value, and the test difference; and / or A gain difference form is set to record the initial input loss, the adjusted input loss, the test gain value, and the gain difference.

7. The method according to claim 3, characterized in that The testing machine comprises: A multimeter or power meter or power supply board for testing the output current; The radio frequency testing module is used to test the output error vector amplitude value and the output power.

8. The method according to claim 2, characterized in that Get the input power P sent by the test machine in1 , the test output power P out1 and the actual output power P out2 It is stored when needed and can be called when used.

9. A finished product testing method for radio frequency chips, characterized in that: Measuring the test system loss using the method according to any one of claims 1 to 8; Based on the test system error, the power of the RF signal to be sent by the tester is adjusted to obtain a calibration RF signal for testing. The power of the calibration RF signal is the power of the RF signal to be sent plus the test system loss.

10. An electronic device, characterized in that: The device comprises a memory storing computer-executable instructions and a processor; when the instructions are executed by the processor, the device implements the method according to any one of claims 1 to 9.

11. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 9 are implemented.

12. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 9 are implemented.

Images