IC chip test system and test method

Abstract

The invention provides an IC chip test system and method, the test system mainly comprises a test control unit, a test management unit and a test execution unit, the test control unit is connected with the test management unit through a network, and the test management unit is connected with the test execution unit through a concentrator; the test execution unit comprises a programmer and a tested device, the input end of the programmer is connected to the concentrator, the output end of the programmer is connected to the tested device, the tested device is integrated with function boards of different types of IC chips, and the function boards carry a plurality of peripheral drive hardware circuits. According to the invention, the chip type selection and verification period can be shortened, and the labor cost and the software and hardware matching cost are reduced.

Description

Technical Field

[0001] The present invention mainly relates to the field of chip testing technology, and in particular to an IC chip testing system and a testing method. Background Art

[0002] IC chip (integrated circuit chip) is a semiconductor product that integrates a large number of microelectronic components (such as transistors, resistors, capacitors, diodes, etc.) on a small silicon chip. These components are interconnected through complex circuits to form a microelectronic system with specific functions. IC chips are an indispensable component of modern electronic devices. They are widely used in various fields such as computers, communication equipment, consumer electronics, automotive electronics, industrial control systems, etc.

[0003] Chip performance testing is an important step to ensure that the chip can meet the expected performance requirements in actual applications, especially in the chip selection stage. These tests usually include multiple aspects, such as checking whether the chip's input and output interfaces, internal logic circuits, etc. are operating normally; using specific test vectors or test engineering source code to simulate the chip's working environment in actual applications to observe whether the chip can correctly respond to and process data; evaluating the chip's performance under different working conditions, such as processing speed, power consumption, latency, etc. When conducting chip performance testing, you can refer to the data sheet, technical documentation, and support tools provided by the original manufacturer or agent. Through these tests, you can comprehensively evaluate the chip performance and ensure that the chip meets the needs of specific applications.

[0004] At present, in the chip selection stage, users usually need the original manufacturer or agent to provide chips and supporting development boards (or draw their own boards) and technical information to verify whether the chip functions meet the requirements. In addition, both parties also need a series of professional and technical personnel to cooperate, and there is a certain communication time cycle. For the original manufacturer or agent, the more users there are, the more resources they will invest. In short, the current processing method has the disadvantages of low chip testing efficiency and high investment cost. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide an IC chip testing system and a testing method, which can shorten the chip selection and verification cycle and reduce the labor cost and the software and hardware supporting cost.

[0006] To solve the above technical problems, in the first aspect, the present invention provides an IC chip testing system, comprising: a test control unit, a test management unit and a test execution unit, wherein the test control unit is connected to the test management unit via a network, and the test management unit is connected to the test execution unit via a hub; wherein the test execution unit comprises a burner and a device under test, the input end of the burner is connected to the hub, the output end of the burner is connected to the device under test, the device under test is integrated with a function board of different types of IC chips, and the function board is equipped with a number of peripheral drive hardware circuits; the test control unit is configured to: send a binding or unbinding signal to the test management unit according to the received external input The test management unit is configured to: determine the current state of the device under test in the test execution unit; receive the information of the device under test and the test source code engineering file; bind or unbind the device under test; compile the test source code engineering file into an executable file; control the burner to burn the executable file; obtain the test result of the test execution unit; and send the test result to the test control unit. The test execution unit is configured to: execute the corresponding IC chip test process according to the burned test source code engineering file.

[0007] Optionally, the test control unit is configured with one or more of the following functions: IC chip selection, chip initialization configuration, template cases of test source code, code editing, engineering compilation, and remote monitoring and simulation functions.

[0008] Optionally, the peripheral drive hardware circuit includes one or more of the following: a TFT screen circuit, a digital tube clock circuit, a WIFI circuit, a buzzer circuit, a touch circuit and a temperature acquisition circuit.

[0009] Optionally, the test execution unit further includes a camera and / or a microphone, wherein the camera and / or the microphone are connected to the hub and are respectively used for video acquisition and voice acquisition during the IC chip test process.

[0010] In a second aspect, the present invention provides an IC chip testing method, which is applied to a test management unit in an IC chip testing system as described in the first aspect, and includes: determining a current state of a device under test in a test execution unit, and if the device under test is in an online state, determining whether the device under test is in an idle state; receiving information of the device under test and a test source code engineering file; performing a binding or unbinding operation of the device under test according to a request to bind or unbind the device under test; compiling the test source code engineering file into an executable file, the source code engineering corresponding to the executable file being the test source code engineering file; controlling a burner in the test execution unit to burn the executable file; obtaining a test result of the test execution unit; and sending the test result to a test control unit.

[0011] Optionally, determining whether the device under test is in an idle state also includes: traversing all USB devices, obtaining the burner LinkID according to the device type, reading the ICID of the connected device through the burner, combining the LinkID and the device ICID to form a unique identifier UID to construct a device object, adding the device object to the list of devices under test, and determining and marking the status of the device under test; wherein the ICID is the name of the IC chip corresponding to the device, and the LinkID is the burner identifier.

[0012] Optionally, compiling the test source code engineering file into an executable file includes: receiving the test source code engineering file to be compiled, starting a thread task to decrypt and decompress the test source code engineering file, compiling the test source code engineering file to generate an executable hex file, and feeding back the compilation information and hex file path to the test control unit.

[0013] Optionally, performing a binding operation on the device under test according to a request to bind the device under test includes: searching for a device with an idle ICID in a list of devices under test according to the ICID and IP:Port in the connection request, updating its status to in use, and updating the binding object to IP:Port, wherein the ICID is the name of the IC chip corresponding to the device, and the IP:Port is a unique identifier of the test control unit through IP and Port.

[0014] Optionally, obtaining the test result of the test execution unit includes: collecting operation data of each monitoring point in the device under test corresponding to the test execution unit.

[0015] In a third aspect, the present invention provides an IC chip testing method, which is applied to a test control unit in an IC chip testing system as described in the first aspect, comprising: determining an IC chip to be tested, generating an engineering project including initialization code and test code for chip resources used, wherein the engineering project is embodied as a test source code engineering file; sending a request to bind or unbind a device under test to a test management unit based on external input received; sending information of the device under test and a test source code engineering file to the test management unit; and receiving test results sent by the test management unit.

[0016] Optionally, the test source code project file includes: a test source code project file generated by selecting a template case, or a test source code project file formed by code editing.

[0017] Optionally, after receiving the test results sent by the test management unit, it also includes: presenting corresponding function charts, curves, videos and / or voices on the monitoring interface.

[0018] In a fourth aspect, the present invention provides an electronic device comprising: a processor and a memory, wherein the memory stores a program or input instruction that can be run on the processor, and when the program or input instruction is executed by the processor, the steps of the IC chip testing method as described in the second aspect or the third aspect are implemented.

[0019] In a fifth aspect, the present invention provides a readable storage medium storing a program or input instructions, which, when executed by a processor, implements the steps of the IC chip testing method as described in the second aspect or the third aspect.

[0020] Compared with the prior art, the present invention has the following advantages: the test control unit and the test management unit are connected through a network, the test management unit and the test execution unit are connected through a hub, wherein the test execution unit comprises a burner and a device under test, the input end of the burner is connected to the hub, the output end of the burner is connected to the device under test, the device under test is integrated with a function board of different types of IC chips, and the function board is equipped with a number of peripheral drive hardware circuits, therefore, the user can directly program, simulate and verify functions in this test system, greatly shortening the chip selection and verification cycle, and reducing the labor cost and the cost of supporting software and hardware. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The accompanying drawings are included to provide a further understanding of the present application. They are included and constitute a part of the present application. The accompanying drawings illustrate embodiments of the present application and together with the present specification serve to explain the principles of the present application. In the accompanying drawings: Figure 1 It is a structural schematic diagram of an IC chip testing system according to an embodiment of the present invention; Figure 2 is a schematic diagram of the structure of a test execution unit in one embodiment of the present invention; Figure 3 FIG. 1 is a flow chart of an IC chip testing method according to an embodiment of the present invention. Figure 1 ; Figure 4 This is a schematic diagram of an implementation process of a test control unit in one embodiment of the present invention; Figure 5 FIG. 1 is a flow chart of an IC chip testing method according to an embodiment of the present invention. Figure 2 ; Figure 6 It is a schematic diagram of an implementation process of a test management unit in one embodiment of the present invention; Figure 7 is a schematic diagram of the interaction between the test control unit and the test management unit in one embodiment of the present invention; Figure 8 FIG. 4 is a schematic diagram of an electronic device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for the description of the embodiments. Obviously, the drawings described below are only some examples or embodiments of the present application. For ordinary technicians in this field, the present application can also be applied to other similar scenarios based on these drawings without creative work. Unless it is obvious from the language environment or otherwise explained, the same reference numerals in the figures represent the same structure or operation.

[0023] As shown in this application and claims, unless the context clearly indicates an exception, the words "a", "an", "an" and / or "the" do not refer to the singular and may also include the plural. Generally speaking, the terms "include" and "comprise" only indicate the inclusion of the steps and elements that have been clearly identified, and these steps and elements do not constitute an exclusive list. The method or device may also include other steps or elements.

[0024] Flowcharts are used in the present application to illustrate the operations performed by the system according to the embodiments of the present application. It should be understood that the preceding or following operations are not necessarily performed accurately in order. On the contrary, various steps may be processed in reverse order or simultaneously. At the same time, other operations may be added to these processes, or one or more operations may be removed from these processes.

[0025] refer to Figure 1~Figure 2As shown, the IC chip test system of this embodiment mainly includes a test control unit, a test management unit and a test execution unit. The test control unit and the test management unit are connected through a network, which can be connected through a wired network or a wireless network. The test management unit and the test execution unit are connected through a hub; wherein the test execution unit includes a burner and a device under test, the input end of the burner is connected to the hub, the output end of the burner is connected to the device under test, and the device under test is integrated with a function board of different types of IC chips, and the function board is equipped with a number of peripheral drive hardware circuits.

[0026] In this embodiment, the test control unit is configured to: send a request to bind or unbind the device under test to the test management unit according to the received external input, send the information of the device under test and the test source code engineering file to the test management unit, and receive the test results sent by the test management unit. The test management unit is configured to: determine the current state of the device under test in the test execution unit, receive the information of the device under test and the test source code engineering file, bind or unbind the device under test, compile the test source code engineering file into an executable file, control the burner to burn the executable file, obtain the test result of the test execution unit, and send the test result to the test control unit. The test execution unit is configured to: execute the corresponding IC chip test process according to the burned test source code engineering file.

[0027] Exemplarily, in this embodiment, the test control unit can be set as a client (PC end), and the test management unit can be set as a chip test platform (server end or server end or server), which can be called by different clients to perform performance tests on the IC chip to be tested. Based on this setting method, the test system of this embodiment includes a chip test platform, a client, a function board integrating chips of different models, the function board is equipped with different peripheral driver hardware circuits, a burner connected to the device under test, and a hub connecting the burner and the chip test platform. Among them, the client can have functions such as IC chip selection, chip initialization configuration, template cases of test source code, IC resource configuration, code editing, engineering compilation, and remote monitoring and simulation.

[0028] For example, the chip initialization configuration usually involves setting the chip's operating mode, clock source, I / O port status, etc. Taking the STM32 series chip as an example, its initialization configuration may include configuring GPIO port, NVIC interrupt, USART communication, etc., and the specific initialization configuration and initialization code may vary according to different chip models and application requirements. The remote monitoring and simulation function allows the user to monitor and control the test operation status of the chip through software simulation or network connection without directly contacting the hardware. Other functions are not shown here, and each function of the above-mentioned test control unit has a corresponding implementation method. This embodiment is not to improve the specific implementation method of the above-mentioned functions, and will not be repeated here, and will not affect the understanding of the substantive content of this embodiment.

[0029] In this embodiment, the chip test platform can have the functions of managing all tested devices and all clients (online, offline, resource scheduling, device control, etc.). Therefore, users can directly program, simulate and verify functions in this test system, greatly shortening the chip selection and verification cycle, reducing labor costs and software and hardware supporting costs, and having wide application value in chip promotion.

[0030] In one example, the peripheral driving hardware circuit includes one or more of the following: a TFT screen circuit, a digital tube clock circuit, a WIFI circuit, a buzzer circuit, a touch circuit, and a temperature acquisition circuit.

[0031] The peripheral driver hardware circuit is a bridge between the IC chip and external devices (such as sensors, actuators, communication modules, etc.). It is responsible for converting the control signal of the IC chip into a signal that the external device can understand, and driving the external device to perform the corresponding operation. The design and implementation of these peripheral driver hardware circuits need to consider factors such as signal matching, power management, and electromagnetic compatibility (EMC). In addition to the peripheral driver hardware circuits such as the TFT screen circuit and digital tube clock circuit listed above, it can also include interrupt controllers, motor drive circuits, sensor interfaces, etc., which can be determined according to actual needs and are not specifically limited here.

[0032] In one example, the test execution unit further includes a camera and / or a microphone, which are connected to the hub and are used for video acquisition and voice acquisition during the IC chip test process, respectively.

[0033] For example, after setting up the camera and / or microphone, turn on the camera for video capture and turn on the microphone for voice capture, then the chip testing platform transmits this data back to the client, and the client presents the corresponding function charts / curves and video and voice information on the monitoring interface for the user to check and confirm.

[0034] The test system of this embodiment supports concurrent multi-users, and multiple clients (such as PC1, PC2, PC3, etc.) log in and operate different devices under test at the same time. After the device under test is occupied, other clients cannot control it. Only after the device under test is unbound by the client can it be bound and controlled again. In addition, the devices under test in the test system can be continuously supplemented as the types of IC chips increase, and the devices under test of the specified chip can also be expanded, that is, the chip test platform can be connected to multiple devices under test, such as device under test 1, device under test 2, device under test 3, etc.

[0035] Exemplarily, with the test control unit set as the client and the test management unit set as the chip test platform, the IC chip test system can be operated through the following process: 1. After the IC chip test system is running, each device under test and the burner are connected and powered on. After power-on, the device under test and the burner report the unique code such as the device name, IC model and burner ID to the chip test platform. The chip test platform dynamically creates device objects according to the device ID, IC model and burner ID for management. The online devices and the current status of the devices can be viewed, including online or offline or bound or idle. 2. Run the client on the PC, first select the IC chip to be tested through the chip selection interface, and after selecting the IC chip model to be debugged, you can select the test source code project file corresponding to the test function through the template case, or the user can edit the currently selected program through the code editing module, save and compile it. 3. Obtain the ID list of idle devices under test with matching IC models from the chip test platform through the test device management module of the client, and select a device for binding. After binding, the client sends a binding event to the chip test platform, and the chip test platform feeds back the binding device result to the client. 4. After the device is successfully bound, the selected test source code project file is sent to the chip test platform through the remote burning module of the client. The chip test platform compiles the received test source code project file into an executable hex file according to the device ID, the burner ID, and burns the executable file through the burner connected to the device under test, and finally returns the burning result to the client. 5. After the file is successfully burned, the client turns on the monitoring and debugging function and notifies the chip test platform. The chip test platform collects the operating data of each monitoring point in the corresponding test device and turns on the camera and voice collection. The chip test platform transmits this data back to the client, and the client presents the corresponding function chart / curve and video and voice information on the monitoring interface for the user to check and confirm. It should be noted that the monitoring point is preset in the burned executable file. The test board sends the monitoring point data to the burner in real time through UART / JTAG, and the burner sends it to the chip test platform through USB.

[0036] In this embodiment, the client can also send simulation related instructions to the chip test platform, and the chip test platform sends corresponding instructions to the burner connected to the corresponding device under test, and the burner completes the control of the corresponding device under test to realize on-board simulation. After entering the simulation successfully, the client calls out the simulation interface, where breakpoints can be set, register status and data can be monitored, variables and momery data can be monitored, etc., and real-time on-board simulation can be performed.

[0037] In this embodiment, the tested devices in the IC chip test system can be continuously supplemented as the chip types increase, and the tested devices of the specified chip can also be expanded. Users can directly program, simulate and verify functions in this test system, greatly shortening the chip selection and verification cycle, and reducing manpower and software and hardware supporting costs.

[0038] An embodiment of the present invention provides an IC chip testing method, which can be referred to Figure 3 As shown, method 300 is applied to the test management unit in the aforementioned IC chip test system, and mainly includes: S310, determining the current state of the device under test in the test execution unit, and if the device under test is in an online state, then determining whether the device under test is in an idle state; S320, receiving the information of the device under test and the test source code engineering file; S330, executing the binding or unbinding operation of the device under test according to the request to bind or unbind the device under test; S340, compiling the test source code engineering file into an executable file, and the source code engineering corresponding to the executable file is the test source code engineering file; S350, controlling the burner in the test execution unit to burn the executable file; S360, obtaining the test result of the test execution unit; and sending the test result to the test control unit.

[0039] In one example, determining whether the device under test is in an idle state can be: traversing all USB devices, obtaining the LinkID of the burner according to the device type, reading the ICID of the connected device through the burner, combining the LinkID and the device ICID to form a unique identifier UID to construct a device object, adding the device object to the list of devices under test, and determining and marking the state of the device under test. Among them, ICID is the name of the IC chip corresponding to the device, and LinkID is the burner identifier.

[0040] In one example, compiling a test source code project file into an executable file may be: receiving the test source code project file to be compiled, starting a thread task to decrypt and decompress the test source code project file, compiling the test source code project file to generate an executable hex file, and feeding back the compilation information and the hex file path to the test control unit.

[0041] In one example, performing a binding operation on the device under test according to a request to bind the device under test can be: according to the ICID and IP:Port in the connection request, querying the device whose ICID is idle in the list of devices under test, updating its status to in use, and updating the binding object to IP:Port, wherein ICID is the name of the IC chip corresponding to the device, and IP:Port is the unique identification of the test control unit through IP and Port.

[0042] In one example, obtaining the test result of the test execution unit includes collecting operation data of each monitoring point in the device under test corresponding to the test execution unit.

[0043] Exemplary, reference Figure 4 and Figure 7 As shown, when the test control unit is a client, it has functions such as communication services, SDK development kit, device management, chip selection, IC resource configuration, case templates, programming, compilation, burning, simulation and data monitoring, etc., completes the test project source code development, performs data monitoring, etc. The specific steps include: 1) Chip selection: compare and retrieve the resource information of each chip and search for the specified chip data; 2) Resource configuration: graphically configure chip resources and dynamically generate initialization code and projects; 3) Code editing: Provide a code editor to perform secondary development based on the code generated in step 2), including application code, monitoring point code, etc. 4) Project compilation (request): complete the project packaging encryption and upload, download and analyze the compilation results, and obtain the execution file path (the path on the chip test platform); compilation is to upload the local project to the chip test platform for compilation; 5) Device management: manage the connection to the chip test platform, bind or unbind devices, etc.; send a connection request (with ICID) to the chip test platform's specified IP and Port, obtain the available device UID, and complete device binding; send an unbinding message to the chip test platform (with UID) to complete device unbinding; 6) Project burning (request): Send a burning request to the chip test platform (carrying the execution file path and UID). The chip test platform finds the corresponding burner and test equipment according to the UID, and finds the executable file compiled by the chip test platform through the file path; 7) Data monitoring: cyclically send data requests to the chip test platform to obtain monitoring point data, and display it in real time in the form of charts and curves according to a certain period.

[0044] Another embodiment of the present invention provides an IC chip testing system method, referring to Figure 5As shown, method 500 can be applied to a test control unit in an IC chip test system, including: S510, determining an IC chip to be tested, generating an engineering project including initialization code and test code for chip resources to be used, the engineering project being embodied as a test source code engineering file; S520, sending a request to bind or unbind a device under test to a test management unit based on received external input; S530, sending information of the device under test and a test source code engineering file to the test management unit; S540, receiving a test result sent by the test management unit.

[0045] In one example, the test source code project file includes a test source code project file generated by selecting a template case, or a test source code project file formed by code editing.

[0046] In one example, after receiving the test result sent by the test management unit, the method 500 further includes presenting a corresponding function chart, curve, video and / or voice on the monitoring interface.

[0047] For example, please refer to Figure 6 and Figure 7 As shown, when the test management unit is a chip test platform, it can perform the following steps, including: 1) Communication service: complete TCP / IP protocol communication with the client and USB protocol communication with the writer; 2) Equipment management Device discovery: traverse all USB devices, obtain the LinkID of the burner according to the device type, read the connection ICID through the burner, and construct the device object by combining the LinkID and ICID with the unique identifier UID, add it to the device list, and mark the state as idle; Device allocation: Get ICID and IP:Port of current connection request through client management; query idle devices in the device list according to ICID, update their status to in use, update binding object to IP:Port, and return a response to the client (with UID, which is the unique identifier of communication on this connection); Device unbinding: The communication service module receives the unbinding command and publishes an unbinding event. The device management module responds to the unbinding event, searches for the corresponding object in the device list by UID, resets the object state to idle, resets the object's binding object to empty, and feeds back the result. 3) Client management: client connection monitoring, client IP:Port list management (addition and deletion); save client uploaded project information; 4) Cloud compilation service: After receiving the project data to be compiled (i.e. the test source code project file), the thread task is started to decrypt and decompress the data, and then the project data is compiled to generate an executable hex file, and the compilation information and hex file path are fed back; 5) Project burning: Find the executable file to be burned through the path, find the corresponding burner and the device connected to the burner in the device list through the UID, burn the executable file through the burner, and return the burning result information; 6) Data service: respond to client requests, monitor and collect test equipment monitoring point data through the burner, and send it back to the client.

[0048] Other details of each step in this embodiment can refer to the previous embodiment, which will not be expanded here. Through the IC chip testing method of this embodiment, users can directly program, simulate and verify functions, greatly shorten the chip selection and verification cycle, and reduce labor costs and software and hardware supporting costs.

[0049] The present application also provides an electronic device, comprising: a memory for storing programs or input instructions executable by a processor; and a processor for executing the above-mentioned programs or input instructions to implement the various processes of the above-mentioned IC chip testing method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0050] Figure 8 800 is a schematic diagram of an electronic device according to an embodiment of the present invention. The electronic device 800 may include an internal communication bus 801, a processor (Processor) 802, a read-only memory (ROM) 803, a random access memory (RAM) 804, and a communication port 805. When applied to a personal computer, the electronic device 800 may also include a hard disk 806. The internal communication bus 801 can realize data communication between components of the electronic device 800. The processor 802 can make judgments and issue prompts. In some embodiments, the processor 802 can be composed of one or more processors. The communication port 805 can realize data communication between the electronic device 800 and the outside. In some embodiments, the electronic device 800 can send and receive information and data from the network through the communication port 805. The electronic device 800 may also include different forms of program storage units and data storage units, such as a hard disk 806, a read-only memory (ROM) 803 and a random access memory (RAM) 804, which can store various data files used for computer processing and / or communication, and possible programs or input instructions executed by the processor 802. The processing result of the processor 802 is transmitted to the user equipment through the communication port 805 and displayed on the user interface.

[0051] The IC chip testing method described above may be implemented as a computer program, stored in the hard disk 806 , and recorded in the processor 802 for execution, so as to implement any IC chip testing method in the present application.

[0052] An embodiment of the present application also provides a readable storage medium, on which a program or input instruction is stored. When the program or input instruction is executed by a processor, the various processes of the above-mentioned IC chip testing method embodiment are implemented and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0053] For those skilled in the art, the above invention disclosure is only used as an example and does not constitute a limitation of the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and amendments to the present application. Such modifications, improvements and amendments are suggested in the present application, so such modifications, improvements and amendments still belong to the spirit and scope of the exemplary embodiments of the present application.

[0054] Similarly, it should be noted that in order to simplify the description of the disclosure of this application and thus help understand one or more embodiments of the invention, in the above description of the embodiments of this application, multiple features are sometimes combined into one embodiment, figure or description thereof. However, this disclosure method does not mean that the features required by the object of this application are more than the features mentioned in the claims. In fact, the features of the embodiments are less than all the features of the single embodiment disclosed above.

[0055] Although the present application has been described with reference to the current specific embodiments, ordinary technicians in this technical field should recognize that the above embodiments are only used to illustrate the present application, and various equivalent changes or substitutions may be made without departing from the spirit of the present application. Therefore, as long as the changes and modifications to the above embodiments are within the essential spirit of the present application, they will fall within the scope of the claims of the present application.

Claims

1. An IC chip testing system, characterized in that: include: A test control unit, a test management unit and a test execution unit, wherein the test control unit and the test management unit are connected via a network, and the test management unit and the test execution unit are connected via a hub; The test execution unit includes a burner and a device under test, the input end of the burner is connected to the hub, the output end of the burner is connected to the device under test, the device under test is integrated with a function board of different types of IC chips, and the function board is equipped with a number of peripheral drive hardware circuits; The test control unit is configured to: send a request to bind or unbind the device under test to the test management unit according to the received external input; send information of the device under test and a test source code engineering file to the test management unit; receive a test result sent by the test management unit; The test management unit is configured to: determine the current state of the device under test in the test execution unit; Receive the information of the device under test and the test source code engineering file; bind or unbind the device under test; compile the test source code engineering file into an executable file; control the burner to burn the executable file; Obtaining the test result of the test execution unit; sending the test result to the test control unit; The test execution unit is configured to execute a corresponding IC chip test process according to the burned test source code engineering file.

2. The IC chip testing system according to claim 1, wherein: The test control unit is configured with one or more of the following functions: IC chip selection, chip initialization configuration, template cases of test source code, code editing, engineering compilation, and remote monitoring and simulation functions.

3. The IC chip testing system according to claim 1, wherein: The peripheral drive hardware circuit includes one or more of the following: a TFT screen circuit, a digital tube clock circuit, a WIFI circuit, a buzzer circuit, a touch circuit and a temperature acquisition circuit.

4. The IC chip testing system according to claim 1, wherein: The test execution unit further includes a camera and / or a microphone, which are connected to the hub and are used for video acquisition and voice acquisition during the IC chip test process, respectively.

5. An IC chip testing method, applied to a test management unit in an IC chip testing system according to any one of claims 1 to 4, characterized in that: include: Determine the current state of the device under test in the test execution unit, and if the device under test is in an online state, determine whether the device under test is in an idle state; Receiving information of the device under test and a test source code engineering file; Execute a binding or unbinding operation of the device under test according to a request to bind or unbind the device under test; Compile the test source code project file into an executable file, the source code project corresponding to the executable file is the test source code project file; Controlling a burner in the test execution unit to burn the executable file; Acquire the test result of the test execution unit; and send the test result to the test control unit.

6. The IC chip testing method according to claim 5, characterized in that: Determining whether the device under test is in an idle state further includes: Traverse all USB devices, obtain the burner LinkID according to the device type, read the ICID of the connected device through the burner, combine the LinkID and the device ICID to build a device object with a unique identifier UID, add the device object to the list of devices under test, determine and mark the status of the device under test; wherein the ICID is the name of the IC chip corresponding to the device, and the LinkID is the burner identifier.

7. The IC chip testing method according to claim 5, characterized in that: Compiling the test source code project file into an executable file includes: Receive the test source code engineering file that needs to be compiled, start the thread task to decrypt and decompress the test source code engineering file, compile the test source code engineering file to generate an executable hex file, and feed back the compilation information and hex file path to the test control unit.

8. The IC chip testing method according to claim 5, characterized in that: Performing a binding operation of the device under test according to a request for binding the device under test includes: According to the ICID and IP:Port in the connection request, search for the device with idle ICID in the list of tested devices, update its status to in use, and update the binding object to IP:Port, where the ICID is the name of the IC chip corresponding to the device, and the IP:Port is the unique identification of the test control unit through IP and Port.

9. The IC chip testing method according to claim 5, characterized in that: Acquiring the test result of the test execution unit includes: collecting the operation data of each monitoring point in the device under test corresponding to the test execution unit.

10. An IC chip testing method, applied to a test control unit in an IC chip testing system as claimed in any one of claims 1 to 4, characterized in that: include: Determine the IC chip to be tested, and generate an engineering project including initialization code and test code of chip resources used, wherein the engineering project is embodied as a test source code engineering file; Sending a request to bind or unbind the device under test to the test management unit according to the received external input; Sending the information of the device under test and the test source code engineering file to the test management unit; Receive the test result sent by the test management unit.

11. The IC chip testing method according to claim 10, wherein: The test source code engineering file includes: a test source code engineering file generated by selecting a template case, or a test source code engineering file formed by code editing.

12. The IC chip testing method according to claim 10, wherein: After receiving the test results sent by the test management unit, it also includes: presenting corresponding function charts, curves, videos and / or voices on the monitoring interface.

13. An electronic device, characterized in that: include: A processor and a memory, wherein the memory stores a program or input instruction that can be run on the processor, and when the program or input instruction is executed by the processor, the steps of the IC chip testing method as described in any one of claims 5 to 12 are implemented.

14. A readable storage medium, characterized in that: The readable storage medium stores a program or input instructions, and when the program or input instructions are executed by a processor, the steps of the IC chip testing method according to any one of claims 5 to 12 are implemented.

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